Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.9 / 7dfbf876eefc88fd5c2e691efaddf7ec346a1bce / . / arch / arm64 / boot / dts / qcom / dsi-hx83112b-djn-1080p-cmd.dtsi
blob: 222d47fb75f96bfde287479f5ededa01fb73b7f5 [file] [log] [blame]
jialongjhan7dfbf872020-04-21 20:24:23 +0800[diff] [blame^]1/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13&mdss_mdp {
14 dsi_djn_hx83112b_1080p_cmd: qcom,mdss_dsi_djn_hx83112b_1080p_cmd {
15 qcom,mdss-dsi-panel-name =
16 "djn hx83112b 1080p cmd mode dsi panel";
17 //[Arima][8901][JialongJhan] enable LCM Command mode 20190403 Start
18 qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
19 //[Arima][8901][JialongJhan] enable LCM Command mode 20190403 End
20 qcom,mdss-dsi-panel-framerate = <60>;
21 qcom,mdss-dsi-virtual-channel-id = <0>;
22 qcom,mdss-dsi-stream = <0>;
23 qcom,mdss-dsi-panel-width = <1080>;
24 qcom,mdss-dsi-panel-height = <2160>;
25 qcom,mdss-dsi-h-front-porch = <40>;
26 qcom,mdss-dsi-h-back-porch = <12>;
27 qcom,mdss-dsi-h-pulse-width = <4>;
28 qcom,mdss-dsi-h-sync-skew = <0>;
29 qcom,mdss-dsi-v-back-porch = <2>;
30 qcom,mdss-dsi-v-front-porch = <32>;
31 qcom,mdss-dsi-v-pulse-width = <2>;
32 qcom,mdss-dsi-h-left-border = <0>;
33 qcom,mdss-dsi-h-right-border = <0>;
34 qcom,mdss-dsi-v-top-border = <0>;
35 qcom,mdss-dsi-v-bottom-border = <0>;
36 qcom,mdss-dsi-bpp = <24>;
37 qcom,mdss-dsi-underflow-color = <0xff>;
38 qcom,mdss-dsi-border-color = <0>;
39 //[Arima][8901][JialongJhan] enable LCM Command mode 20190403 Start
40 qcom,mdss-dsi-te-pin-select = <1>;
41 qcom,mdss-dsi-te-dcs-command = <1>;
42 qcom,mdss-dsi-te-check-enable;
43 qcom,mdss-dsi-te-using-te-pin;
44 //[Arima][8901][JialongJhan] enable LCM Command mode 20190403 End
45 //Qcom
46 qcom,mdss-tear-check-sync-init-val = <2160>;
47 qcom,mdss-tear-check-sync-threshold-start = <4>;
48 qcom,mdss-tear-check-sync-threshold-continue = <4>;
49 qcom,mdss-tear-check-start-pos = <2160>;
50 //Qcom
51 qcom,mdss-dsi-h-sync-pulse = <0>;
52 qcom,mdss-dsi-traffic-mode = "burst_mode";
53 qcom,mdss-dsi-bllp-eof-power-mode;
54 qcom,mdss-dsi-bllp-power-mode;
55 qcom,mdss-dsi-lane-0-state;
56 qcom,mdss-dsi-lane-1-state;
57 qcom,mdss-dsi-lane-2-state;
58 qcom,mdss-dsi-lane-3-state;
59 //qcom,mdss-dsi-hfp-power-mode;
60 //qcom,mdss-dsi-hbp-power-mode;
61 qcom,mdss-dsi-hsa-power-mode;
62 qcom,mdss-pan-physical-width-dimension=<65>;
63 qcom,mdss-pan-physical-height-dimension=<128>;
64 qcom,mdss-dsi-panel-timings = [e6 38 26 00 68 6e 2a
65 3c 44 03 04 00];
66 qcom,mdss-dsi-t-clk-post = <0x0d>;
67 qcom,mdss-dsi-t-clk-pre = <0x2f>;
68 qcom,mdss-dsi-bl-min-level = <1>;
69 qcom,mdss-dsi-bl-max-level = <4095>;
70 qcom,mdss-dsi-dma-trigger = "trigger_sw";
71 qcom,mdss-dsi-mdp-trigger = "none";
72 //[Arima][8901][Jialong]LCM initial code from IC firmware Start
73 qcom,mdss-dsi-on-command = [39 01 00 00 00 00 04 B9 83 11 2B
74 39 01 00 00 00 00 02 BD 01
75 39 01 00 00 00 00 03 C2 08 70
76 39 01 00 00 00 00 02 BD 03
77 39 01 00 00 00 00 05 B2 04 38 08 70
78 39 01 00 00 00 00 02 BD 00
79 39 01 00 00 00 00 0B B1 F8 27 27 00 00 0B 0E 0B 0E 33
80 39 01 00 00 00 00 03 D2 2D 2D
81 39 01 00 00 00 00 0C B2 80 02 18 80 70 00 08 1C 08 11 05
82 39 01 00 00 00 00 02 E9 D1
83 39 01 00 00 00 00 03 B2 00 08
84 39 01 00 00 00 00 02 E9 00
85 39 01 00 00 00 00 02 BD 02
86 39 01 00 00 00 00 03 B2 B5 0A
87 39 01 00 00 00 00 02 BD 00
88 39 01 00 00 00 00 09 DD 00 00 08 1C 08 34 34 88
89 39 01 00 00 00 00 19 B4 65 6B 00 00 D0 D4 36 CF 06 CE 00 CE 00 00 00 07 00 2A 07 01 07 00 00 2A
90 39 01 00 00 00 00 02 BD 03
91 39 01 00 00 00 00 02 E9 C3
92 39 01 00 00 00 00 04 B4 01 67 2A
93 39 01 00 00 00 00 02 E9 00
94 39 01 00 00 00 00 02 BD 00
95 39 01 00 00 00 00 02 C1 01
96 39 01 00 00 00 00 02 BD 01
97 39 01 00 00 00 00 3A C1 FF FB F9 F6 F4 F1 EF EA E7 E5 E2 DF DD DA D8 D5 D2 CF CC C5 BE B7 B0 A8 A0 98 8E 85 7B 72 69 5E 53 48 3E 35 2B 22 17 0D 09 07 05 01 00 26 F0 86 25 6E B6 DD F3 D8 CC 9B 00
98 39 01 00 00 00 00 02 BD 02
99 39 01 00 00 00 00 3A C1 FF FB F9 F6 F4 F1 EF EA E7 E5 E2 DF DD DA D8 D5 D2 CF CC C5 BE B7 B0 A8 A0 98 8E 85 7B 72 69 5E 53 48 3E 35 2B 22 17 0D 09 07 05 01 00 26 F0 86 25 6E B6 DD F3 D8 CC 9B 00
100 39 01 00 00 00 00 02 BD 03
101 39 01 00 00 00 00 3A C1 FF FB F9 F6 F4 F1 EF EA E7 E5 E2 DF DD DA D8 D5 D2 CF CC C5 BE B7 B0 A8 A0 98 8E 85 7B 72 69 5E 53 48 3E 35 2B 22 17 0D 09 07 05 01 00 26 F0 86 25 6E B6 DD F3 D8 CC 9B 00
102 39 01 00 00 00 00 02 BD 00
103 39 01 00 00 00 00 02 C2 C8
104 39 01 00 00 00 00 02 CC 08
105 39 01 00 00 00 00 26 D3 81 00 00 00 00 01 00 04 00 01 13 40 04 09 09 0B 0B 32 10 08 00 08 32 10 08 00 08 32 10 08 00 08 00 00 0A 08 7B
106 39 01 00 00 00 00 02 E9 C5
107 39 01 00 00 00 00 02 C6 F7
108 39 01 00 00 00 00 02 E9 00
109 39 01 00 00 00 00 02 E9 D4
110 39 01 00 00 00 00 02 C6 6E
111 39 01 00 00 00 00 02 E9 00
112 39 01 00 00 00 00 02 E9 EF
113 39 01 00 00 00 00 02 D3 0C
114 39 01 00 00 00 00 02 E9 00
115 39 01 00 00 00 00 02 BD 01
116 39 01 00 00 00 00 02 E9 C8
117 39 01 00 00 00 00 02 D3 A1
118 39 01 00 00 00 00 02 E9 00
119 39 01 00 00 00 00 02 BD 00
120 39 01 00 00 00 00 39 D5 18 18 19 18 18 20 18 18 18 10 10 18 18 00 00 18 18 01 01 18 18 28 28 18 18 18 18 18 2F 2F 30 30 31 31 35 35 36 36 37 37 18 18 18 18 18 18 18 18 FC FC 00 00 FC FC 00 00
121 39 01 00 00 00 00 31 D6 18 18 19 18 18 20 19 18 18 10 10 18 18 00 00 18 18 01 01 18 18 28 28 18 18 18 18 18 2F 2F 30 30 31 31 35 35 36 36 37 37 18 18 18 18 18 18 18 18
122 39 01 00 00 00 00 19 D8 AA AA AA AF EA AA AA AA AA AF EA AA AA AA AB AF EF AA AA AA AA AF EA AA
123 39 01 00 00 00 00 02 BD 01
124 39 01 00 00 00 00 0D D8 AA AA AB AF EA AA AA AA AE AF EA AA
125 39 01 00 00 00 00 02 BD 02
126 39 01 00 00 00 00 0D D8 AA AA AA AF EA AA AA AA AA AF EA AA
127 39 01 00 00 00 00 02 BD 03
128 39 01 00 00 00 00 19 D8 BA AA AA AF EA AA AA AA AA AF EA AA BA AA AA AF EA AA AA AA AA AF EA AA
129 39 01 00 00 00 00 02 BD 00
130 39 01 00 00 00 00 02 E9 E4
131 39 01 00 00 00 00 03 E7 17 69
132 39 01 00 00 00 00 02 E9 00
133 39 01 00 00 00 00 1A E7 09 09 00 07 E8 00 26 00 07 00 00 E8 32 00 E9 0A 0A 00 00 00 01 01 00 12 04
134 39 01 00 00 00 00 02 BD 01
135 39 01 00 00 00 00 0A E7 02 00 01 20 01 18 08 A8 09
136 39 01 00 00 00 00 02 BD 02
137 39 01 00 00 00 00 04 E7 20 20 00
138 39 01 00 00 00 00 02 BD 03
139 39 01 00 00 00 00 07 E7 00 DC 11 70 00 20
140 39 01 00 00 00 00 02 E9 C9
141 39 01 00 00 00 00 07 E7 2A CE 02 70 01 04
142 39 01 00 00 00 00 02 E9 00
143 39 01 00 00 00 00 02 BD 00
144 39 01 00 00 00 00 02 D1 27
145 05 01 00 00 78 00 02 11 00
146 05 01 00 00 14 00 02 29 00
147 39 01 00 00 00 00 03 51 00 00
148 39 01 00 00 00 00 02 53 24];
149 //[Arima][8901][Jialong]LCM initial code from IC firmware End
150 qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00
151 05 01 00 00 78 00 02 10 00];
152 qcom,mdss-dsi-off-dstb-command = [
153 39 01 00 00 00 00 04 B9 83 11 2A
154 39 01 00 00 00 00 02 BD 00
155 39 01 00 00 50 00 02 B1 09];
156 qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
157 qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
158 qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
159 qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
160 qcom,mdss-dsi-tx-eot-append;
161 qcom,mdss-dsi-lp11-init;
162 qcom,mdss-dsi-post-init-delay = <1>;
163 };
164};