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Ben Skeggs6ee73862009-12-11 19:24:15 +10001/*
2 * Copyright 2007-2008 Nouveau Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24#ifndef __NOUVEAU_BIOS_H__
25#define __NOUVEAU_BIOS_H__
26
27#include "nvreg.h"
28#include "nouveau_i2c.h"
29
30#define DCB_MAX_NUM_ENTRIES 16
31#define DCB_MAX_NUM_I2C_ENTRIES 16
32#define DCB_MAX_NUM_GPIO_ENTRIES 32
33#define DCB_MAX_NUM_CONNECTOR_ENTRIES 16
34
35#define DCB_LOC_ON_CHIP 0
36
37struct dcb_entry {
38 int index; /* may not be raw dcb index if merging has happened */
39 uint8_t type;
40 uint8_t i2c_index;
41 uint8_t heads;
42 uint8_t connector;
43 uint8_t bus;
44 uint8_t location;
45 uint8_t or;
46 bool duallink_possible;
47 union {
48 struct sor_conf {
49 int link;
50 } sorconf;
51 struct {
52 int maxfreq;
53 } crtconf;
54 struct {
55 struct sor_conf sor;
56 bool use_straps_for_mode;
57 bool use_power_scripts;
58 } lvdsconf;
59 struct {
60 bool has_component_output;
61 } tvconf;
62 struct {
63 struct sor_conf sor;
64 int link_nr;
65 int link_bw;
66 } dpconf;
67 struct {
68 struct sor_conf sor;
69 } tmdsconf;
70 };
71 bool i2c_upper_default;
72};
73
74struct dcb_i2c_entry {
75 uint8_t port_type;
76 uint8_t read, write;
77 struct nouveau_i2c_chan *chan;
78};
79
Ben Skeggs6ee73862009-12-11 19:24:15 +100080enum dcb_gpio_tag {
81 DCB_GPIO_TVDAC0 = 0xc,
82 DCB_GPIO_TVDAC1 = 0x2d,
83};
84
85struct dcb_gpio_entry {
86 enum dcb_gpio_tag tag;
87 int line;
88 bool invert;
89};
90
Ben Skeggsa6678b22010-02-24 09:46:27 +100091struct dcb_gpio_table {
Ben Skeggs6ee73862009-12-11 19:24:15 +100092 int entries;
93 struct dcb_gpio_entry entry[DCB_MAX_NUM_GPIO_ENTRIES];
94};
95
96struct dcb_connector_table_entry {
97 uint32_t entry;
98 uint8_t type;
99 uint8_t index;
100 uint8_t gpio_tag;
101};
102
103struct dcb_connector_table {
104 int entries;
105 struct dcb_connector_table_entry entry[DCB_MAX_NUM_CONNECTOR_ENTRIES];
106};
107
Ben Skeggs7f245b22010-02-24 09:56:18 +1000108struct dcb_table {
Ben Skeggs6ee73862009-12-11 19:24:15 +1000109 uint8_t version;
110
Ben Skeggs7f245b22010-02-24 09:56:18 +1000111 int entries;
112 struct dcb_entry entry[DCB_MAX_NUM_ENTRIES];
Ben Skeggs6ee73862009-12-11 19:24:15 +1000113
114 uint8_t *i2c_table;
115 uint8_t i2c_default_indices;
Ben Skeggs7f245b22010-02-24 09:56:18 +1000116 struct dcb_i2c_entry i2c[DCB_MAX_NUM_I2C_ENTRIES];
Ben Skeggs6ee73862009-12-11 19:24:15 +1000117
118 uint16_t gpio_table_ptr;
Ben Skeggsa6678b22010-02-24 09:46:27 +1000119 struct dcb_gpio_table gpio;
Ben Skeggs6ee73862009-12-11 19:24:15 +1000120 uint16_t connector_table_ptr;
121 struct dcb_connector_table connector;
122};
123
124enum nouveau_encoder_type {
125 OUTPUT_ANALOG = 0,
126 OUTPUT_TV = 1,
127 OUTPUT_TMDS = 2,
128 OUTPUT_LVDS = 3,
129 OUTPUT_DP = 6,
130 OUTPUT_ANY = -1
131};
132
133enum nouveau_or {
134 OUTPUT_A = (1 << 0),
135 OUTPUT_B = (1 << 1),
136 OUTPUT_C = (1 << 2)
137};
138
139enum LVDS_script {
140 /* Order *does* matter here */
141 LVDS_INIT = 1,
142 LVDS_RESET,
143 LVDS_BACKLIGHT_ON,
144 LVDS_BACKLIGHT_OFF,
145 LVDS_PANEL_ON,
146 LVDS_PANEL_OFF
147};
148
149/* changing these requires matching changes to reg tables in nv_get_clock */
150#define MAX_PLL_TYPES 4
151enum pll_types {
152 NVPLL,
153 MPLL,
154 VPLL1,
155 VPLL2
156};
157
158struct pll_lims {
159 struct {
160 int minfreq;
161 int maxfreq;
162 int min_inputfreq;
163 int max_inputfreq;
164
165 uint8_t min_m;
166 uint8_t max_m;
167 uint8_t min_n;
168 uint8_t max_n;
169 } vco1, vco2;
170
171 uint8_t max_log2p;
172 /*
173 * for most pre nv50 cards setting a log2P of 7 (the common max_log2p
174 * value) is no different to 6 (at least for vplls) so allowing the MNP
175 * calc to use 7 causes the generated clock to be out by a factor of 2.
176 * however, max_log2p cannot be fixed-up during parsing as the
177 * unmodified max_log2p value is still needed for setting mplls, hence
178 * an additional max_usable_log2p member
179 */
180 uint8_t max_usable_log2p;
181 uint8_t log2p_bias;
182
183 uint8_t min_p;
184 uint8_t max_p;
185
186 int refclk;
187};
188
189struct nouveau_bios_info {
Ben Skeggs6ee73862009-12-11 19:24:15 +1000190 uint8_t chip_version;
191
192 uint32_t dactestval;
193 uint32_t tvdactestval;
194 uint8_t digital_min_front_porch;
195 bool fp_no_ddc;
196};
197
198struct nvbios {
199 struct drm_device *dev;
200 struct nouveau_bios_info pub;
201
Ben Skeggsd9184fa2010-02-16 11:14:14 +1000202 struct mutex lock;
Ben Skeggs39c9bfb2010-02-09 10:22:29 +1000203
Ben Skeggs6ee73862009-12-11 19:24:15 +1000204 uint8_t data[NV_PROM_SIZE];
205 unsigned int length;
206 bool execute;
207
208 uint8_t major_version;
209 uint8_t feature_byte;
210 bool is_mobile;
211
212 uint32_t fmaxvco, fminvco;
213
214 bool old_style_init;
215 uint16_t init_script_tbls_ptr;
216 uint16_t extra_init_script_tbl_ptr;
217 uint16_t macro_index_tbl_ptr;
218 uint16_t macro_tbl_ptr;
219 uint16_t condition_tbl_ptr;
220 uint16_t io_condition_tbl_ptr;
221 uint16_t io_flag_condition_tbl_ptr;
222 uint16_t init_function_tbl_ptr;
223
224 uint16_t pll_limit_tbl_ptr;
225 uint16_t ram_restrict_tbl_ptr;
Marcin Koƛcielnicki37383652009-12-15 00:37:31 +0000226 uint8_t ram_restrict_group_count;
Ben Skeggs6ee73862009-12-11 19:24:15 +1000227
228 uint16_t some_script_ptr; /* BIT I + 14 */
229 uint16_t init96_tbl_ptr; /* BIT I + 16 */
230
Ben Skeggs7f245b22010-02-24 09:56:18 +1000231 struct dcb_table dcb;
Ben Skeggs6ee73862009-12-11 19:24:15 +1000232
233 struct {
234 int crtchead;
235 /* these need remembering across suspend */
236 uint32_t saved_nv_pfb_cfg0;
237 } state;
238
239 struct {
240 struct dcb_entry *output;
241 uint16_t script_table_ptr;
242 uint16_t dp_table_ptr;
243 } display;
244
245 struct {
246 uint16_t fptablepointer; /* also used by tmds */
247 uint16_t fpxlatetableptr;
248 int xlatwidth;
249 uint16_t lvdsmanufacturerpointer;
250 uint16_t fpxlatemanufacturertableptr;
251 uint16_t mode_ptr;
252 uint16_t xlated_entry;
253 bool power_off_for_reset;
254 bool reset_after_pclk_change;
255 bool dual_link;
256 bool link_c_increment;
257 bool BITbit1;
258 bool if_is_24bit;
259 int duallink_transition_clk;
260 uint8_t strapless_is_24bit;
261 uint8_t *edid;
262
263 /* will need resetting after suspend */
264 int last_script_invoc;
265 bool lvds_init_run;
266 } fp;
267
268 struct {
269 uint16_t output0_script_ptr;
270 uint16_t output1_script_ptr;
271 } tmds;
272
273 struct {
274 uint16_t mem_init_tbl_ptr;
275 uint16_t sdr_seq_tbl_ptr;
276 uint16_t ddr_seq_tbl_ptr;
277
278 struct {
279 uint8_t crt, tv, panel;
280 } i2c_indices;
281
282 uint16_t lvds_single_a_script_ptr;
283 } legacy;
284};
285
286#endif