Ghanim Fodi | 37b6495 | 2017-01-24 15:42:30 +0200 | [diff] [blame] | 1 | /* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/debugfs.h> |
| 14 | #include "ipahal.h" |
| 15 | #include "ipahal_i.h" |
| 16 | #include "ipahal_reg_i.h" |
| 17 | #include "ipahal_fltrt_i.h" |
| 18 | |
| 19 | struct ipahal_context *ipahal_ctx; |
| 20 | |
| 21 | static const char *ipahal_imm_cmd_name_to_str[IPA_IMM_CMD_MAX] = { |
| 22 | __stringify(IPA_IMM_CMD_IP_V4_FILTER_INIT), |
| 23 | __stringify(IPA_IMM_CMD_IP_V6_FILTER_INIT), |
| 24 | __stringify(IPA_IMM_CMD_IP_V4_NAT_INIT), |
| 25 | __stringify(IPA_IMM_CMD_IP_V4_ROUTING_INIT), |
| 26 | __stringify(IPA_IMM_CMD_IP_V6_ROUTING_INIT), |
| 27 | __stringify(IPA_IMM_CMD_HDR_INIT_LOCAL), |
| 28 | __stringify(IPA_IMM_CMD_HDR_INIT_SYSTEM), |
| 29 | __stringify(IPA_IMM_CMD_REGISTER_WRITE), |
| 30 | __stringify(IPA_IMM_CMD_NAT_DMA), |
| 31 | __stringify(IPA_IMM_CMD_IP_PACKET_INIT), |
| 32 | __stringify(IPA_IMM_CMD_DMA_SHARED_MEM), |
| 33 | __stringify(IPA_IMM_CMD_IP_PACKET_TAG_STATUS), |
| 34 | __stringify(IPA_IMM_CMD_DMA_TASK_32B_ADDR), |
Amir Levy | 05fccd0 | 2017-06-13 16:25:45 +0300 | [diff] [blame] | 35 | __stringify(IPA_IMM_CMD_TABLE_DMA), |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 36 | }; |
| 37 | |
| 38 | static const char *ipahal_pkt_status_exception_to_str |
| 39 | [IPAHAL_PKT_STATUS_EXCEPTION_MAX] = { |
| 40 | __stringify(IPAHAL_PKT_STATUS_EXCEPTION_NONE), |
| 41 | __stringify(IPAHAL_PKT_STATUS_EXCEPTION_DEAGGR), |
| 42 | __stringify(IPAHAL_PKT_STATUS_EXCEPTION_IPTYPE), |
| 43 | __stringify(IPAHAL_PKT_STATUS_EXCEPTION_PACKET_LENGTH), |
| 44 | __stringify(IPAHAL_PKT_STATUS_EXCEPTION_PACKET_THRESHOLD), |
| 45 | __stringify(IPAHAL_PKT_STATUS_EXCEPTION_FRAG_RULE_MISS), |
| 46 | __stringify(IPAHAL_PKT_STATUS_EXCEPTION_SW_FILT), |
| 47 | __stringify(IPAHAL_PKT_STATUS_EXCEPTION_NAT), |
| 48 | }; |
| 49 | |
| 50 | #define IPAHAL_MEM_ALLOC(__size, __is_atomic_ctx) \ |
| 51 | (kzalloc((__size), ((__is_atomic_ctx)?GFP_ATOMIC:GFP_KERNEL))) |
| 52 | |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 53 | static u16 ipahal_imm_cmd_get_opcode(enum ipahal_imm_cmd_name cmd); |
| 54 | |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 55 | |
| 56 | static struct ipahal_imm_cmd_pyld *ipa_imm_cmd_construct_dma_task_32b_addr( |
| 57 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 58 | { |
| 59 | struct ipahal_imm_cmd_pyld *pyld; |
| 60 | struct ipa_imm_cmd_hw_dma_task_32b_addr *data; |
| 61 | struct ipahal_imm_cmd_dma_task_32b_addr *dma_params = |
| 62 | (struct ipahal_imm_cmd_dma_task_32b_addr *)params; |
| 63 | |
| 64 | pyld = IPAHAL_MEM_ALLOC(sizeof(*pyld) + sizeof(*data), is_atomic_ctx); |
| 65 | if (unlikely(!pyld)) { |
| 66 | IPAHAL_ERR("kzalloc err\n"); |
| 67 | return pyld; |
| 68 | } |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 69 | /* Currently supports only one packet */ |
| 70 | pyld->opcode = ipahal_imm_cmd_get_opcode(cmd) + (1 << 8); |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 71 | pyld->len = sizeof(*data); |
| 72 | data = (struct ipa_imm_cmd_hw_dma_task_32b_addr *)pyld->data; |
| 73 | |
| 74 | if (unlikely(dma_params->size1 & ~0xFFFF)) { |
| 75 | IPAHAL_ERR("Size1 is bigger than 16bit width 0x%x\n", |
| 76 | dma_params->size1); |
| 77 | WARN_ON(1); |
| 78 | } |
| 79 | if (unlikely(dma_params->packet_size & ~0xFFFF)) { |
| 80 | IPAHAL_ERR("Pkt size is bigger than 16bit width 0x%x\n", |
| 81 | dma_params->packet_size); |
| 82 | WARN_ON(1); |
| 83 | } |
| 84 | data->cmplt = dma_params->cmplt ? 1 : 0; |
| 85 | data->eof = dma_params->eof ? 1 : 0; |
| 86 | data->flsh = dma_params->flsh ? 1 : 0; |
| 87 | data->lock = dma_params->lock ? 1 : 0; |
| 88 | data->unlock = dma_params->unlock ? 1 : 0; |
| 89 | data->size1 = dma_params->size1; |
| 90 | data->addr1 = dma_params->addr1; |
| 91 | data->packet_size = dma_params->packet_size; |
| 92 | |
| 93 | return pyld; |
| 94 | } |
| 95 | |
| 96 | static struct ipahal_imm_cmd_pyld *ipa_imm_cmd_construct_ip_packet_tag_status( |
| 97 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 98 | { |
| 99 | struct ipahal_imm_cmd_pyld *pyld; |
| 100 | struct ipa_imm_cmd_hw_ip_packet_tag_status *data; |
| 101 | struct ipahal_imm_cmd_ip_packet_tag_status *tag_params = |
| 102 | (struct ipahal_imm_cmd_ip_packet_tag_status *)params; |
| 103 | |
| 104 | pyld = IPAHAL_MEM_ALLOC(sizeof(*pyld) + sizeof(*data), is_atomic_ctx); |
| 105 | if (unlikely(!pyld)) { |
| 106 | IPAHAL_ERR("kzalloc err\n"); |
| 107 | return pyld; |
| 108 | } |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 109 | pyld->opcode = ipahal_imm_cmd_get_opcode(cmd); |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 110 | pyld->len = sizeof(*data); |
| 111 | data = (struct ipa_imm_cmd_hw_ip_packet_tag_status *)pyld->data; |
| 112 | |
| 113 | if (unlikely(tag_params->tag & ~0xFFFFFFFFFFFF)) { |
| 114 | IPAHAL_ERR("tag is bigger than 48bit width 0x%llx\n", |
| 115 | tag_params->tag); |
| 116 | WARN_ON(1); |
| 117 | } |
| 118 | data->tag = tag_params->tag; |
| 119 | |
| 120 | return pyld; |
| 121 | } |
| 122 | |
| 123 | static struct ipahal_imm_cmd_pyld *ipa_imm_cmd_construct_dma_shared_mem( |
| 124 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 125 | { |
| 126 | struct ipahal_imm_cmd_pyld *pyld; |
| 127 | struct ipa_imm_cmd_hw_dma_shared_mem *data; |
| 128 | struct ipahal_imm_cmd_dma_shared_mem *mem_params = |
| 129 | (struct ipahal_imm_cmd_dma_shared_mem *)params; |
| 130 | |
| 131 | pyld = IPAHAL_MEM_ALLOC(sizeof(*pyld) + sizeof(*data), is_atomic_ctx); |
| 132 | if (unlikely(!pyld)) { |
| 133 | IPAHAL_ERR("kzalloc err\n"); |
| 134 | return pyld; |
| 135 | } |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 136 | pyld->opcode = ipahal_imm_cmd_get_opcode(cmd); |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 137 | pyld->len = sizeof(*data); |
| 138 | data = (struct ipa_imm_cmd_hw_dma_shared_mem *)pyld->data; |
| 139 | |
| 140 | if (unlikely(mem_params->size & ~0xFFFF)) { |
| 141 | IPAHAL_ERR("Size is bigger than 16bit width 0x%x\n", |
| 142 | mem_params->size); |
| 143 | WARN_ON(1); |
| 144 | } |
| 145 | if (unlikely(mem_params->local_addr & ~0xFFFF)) { |
| 146 | IPAHAL_ERR("Local addr is bigger than 16bit width 0x%x\n", |
| 147 | mem_params->local_addr); |
| 148 | WARN_ON(1); |
| 149 | } |
| 150 | data->direction = mem_params->is_read ? 1 : 0; |
| 151 | data->size = mem_params->size; |
| 152 | data->local_addr = mem_params->local_addr; |
| 153 | data->system_addr = mem_params->system_addr; |
| 154 | data->skip_pipeline_clear = mem_params->skip_pipeline_clear ? 1 : 0; |
| 155 | switch (mem_params->pipeline_clear_options) { |
| 156 | case IPAHAL_HPS_CLEAR: |
| 157 | data->pipeline_clear_options = 0; |
| 158 | break; |
| 159 | case IPAHAL_SRC_GRP_CLEAR: |
| 160 | data->pipeline_clear_options = 1; |
| 161 | break; |
| 162 | case IPAHAL_FULL_PIPELINE_CLEAR: |
| 163 | data->pipeline_clear_options = 2; |
| 164 | break; |
| 165 | default: |
| 166 | IPAHAL_ERR("unsupported pipline clear option %d\n", |
| 167 | mem_params->pipeline_clear_options); |
| 168 | WARN_ON(1); |
| 169 | }; |
| 170 | |
| 171 | return pyld; |
| 172 | } |
| 173 | |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 174 | static struct ipahal_imm_cmd_pyld *ipa_imm_cmd_construct_dma_shared_mem_v_4_0( |
| 175 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 176 | { |
| 177 | struct ipahal_imm_cmd_pyld *pyld; |
| 178 | struct ipa_imm_cmd_hw_dma_shared_mem_v_4_0 *data; |
| 179 | struct ipahal_imm_cmd_dma_shared_mem *mem_params = |
| 180 | (struct ipahal_imm_cmd_dma_shared_mem *)params; |
| 181 | |
| 182 | if (unlikely(mem_params->size & ~0xFFFF)) { |
| 183 | IPAHAL_ERR("Size is bigger than 16bit width 0x%x\n", |
| 184 | mem_params->size); |
| 185 | WARN_ON(1); |
| 186 | return NULL; |
| 187 | } |
| 188 | if (unlikely(mem_params->local_addr & ~0xFFFF)) { |
| 189 | IPAHAL_ERR("Local addr is bigger than 16bit width 0x%x\n", |
| 190 | mem_params->local_addr); |
| 191 | WARN_ON(1); |
| 192 | return NULL; |
| 193 | } |
| 194 | |
| 195 | pyld = IPAHAL_MEM_ALLOC(sizeof(*pyld) + sizeof(*data), is_atomic_ctx); |
| 196 | if (unlikely(!pyld)) { |
| 197 | WARN_ON(1); |
| 198 | return pyld; |
| 199 | } |
| 200 | |
| 201 | pyld->opcode = ipahal_imm_cmd_get_opcode(cmd); |
| 202 | pyld->len = sizeof(*data); |
| 203 | data = (struct ipa_imm_cmd_hw_dma_shared_mem_v_4_0 *)pyld->data; |
| 204 | |
| 205 | data->direction = mem_params->is_read ? 1 : 0; |
| 206 | data->clear_after_read = mem_params->clear_after_read; |
| 207 | data->size = mem_params->size; |
| 208 | data->local_addr = mem_params->local_addr; |
| 209 | data->system_addr = mem_params->system_addr; |
| 210 | pyld->opcode |= (mem_params->skip_pipeline_clear ? 1 : 0) << 8; |
| 211 | switch (mem_params->pipeline_clear_options) { |
| 212 | case IPAHAL_HPS_CLEAR: |
| 213 | break; |
| 214 | case IPAHAL_SRC_GRP_CLEAR: |
| 215 | pyld->opcode |= (1 << 9); |
| 216 | break; |
| 217 | case IPAHAL_FULL_PIPELINE_CLEAR: |
| 218 | pyld->opcode |= (2 << 9); |
| 219 | break; |
| 220 | default: |
| 221 | IPAHAL_ERR("unsupported pipline clear option %d\n", |
| 222 | mem_params->pipeline_clear_options); |
| 223 | WARN_ON(1); |
| 224 | }; |
| 225 | |
| 226 | return pyld; |
| 227 | } |
| 228 | |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 229 | static struct ipahal_imm_cmd_pyld *ipa_imm_cmd_construct_register_write( |
| 230 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 231 | { |
| 232 | struct ipahal_imm_cmd_pyld *pyld; |
| 233 | struct ipa_imm_cmd_hw_register_write *data; |
| 234 | struct ipahal_imm_cmd_register_write *regwrt_params = |
| 235 | (struct ipahal_imm_cmd_register_write *)params; |
| 236 | |
| 237 | pyld = IPAHAL_MEM_ALLOC(sizeof(*pyld) + sizeof(*data), is_atomic_ctx); |
| 238 | if (unlikely(!pyld)) { |
| 239 | IPAHAL_ERR("kzalloc err\n"); |
| 240 | return pyld; |
| 241 | } |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 242 | pyld->opcode = ipahal_imm_cmd_get_opcode(cmd); |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 243 | pyld->len = sizeof(*data); |
| 244 | data = (struct ipa_imm_cmd_hw_register_write *)pyld->data; |
| 245 | |
| 246 | if (unlikely(regwrt_params->offset & ~0xFFFF)) { |
| 247 | IPAHAL_ERR("Offset is bigger than 16bit width 0x%x\n", |
| 248 | regwrt_params->offset); |
| 249 | WARN_ON(1); |
| 250 | } |
| 251 | data->offset = regwrt_params->offset; |
| 252 | data->value = regwrt_params->value; |
| 253 | data->value_mask = regwrt_params->value_mask; |
| 254 | |
| 255 | data->skip_pipeline_clear = regwrt_params->skip_pipeline_clear ? 1 : 0; |
| 256 | switch (regwrt_params->pipeline_clear_options) { |
| 257 | case IPAHAL_HPS_CLEAR: |
| 258 | data->pipeline_clear_options = 0; |
| 259 | break; |
| 260 | case IPAHAL_SRC_GRP_CLEAR: |
| 261 | data->pipeline_clear_options = 1; |
| 262 | break; |
| 263 | case IPAHAL_FULL_PIPELINE_CLEAR: |
| 264 | data->pipeline_clear_options = 2; |
| 265 | break; |
| 266 | default: |
| 267 | IPAHAL_ERR("unsupported pipline clear option %d\n", |
| 268 | regwrt_params->pipeline_clear_options); |
| 269 | WARN_ON(1); |
| 270 | }; |
| 271 | |
| 272 | return pyld; |
| 273 | } |
| 274 | |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 275 | static struct ipahal_imm_cmd_pyld *ipa_imm_cmd_construct_register_write_v_4_0( |
| 276 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 277 | { |
| 278 | struct ipahal_imm_cmd_pyld *pyld; |
| 279 | struct ipa_imm_cmd_hw_register_write_v_4_0 *data; |
| 280 | struct ipahal_imm_cmd_register_write *regwrt_params = |
| 281 | (struct ipahal_imm_cmd_register_write *)params; |
| 282 | |
| 283 | if (unlikely(regwrt_params->offset & ~0xFFFF)) { |
| 284 | IPAHAL_ERR("Offset is bigger than 16bit width 0x%x\n", |
| 285 | regwrt_params->offset); |
| 286 | WARN_ON(1); |
| 287 | return NULL; |
| 288 | } |
| 289 | |
| 290 | pyld = IPAHAL_MEM_ALLOC(sizeof(*pyld) + sizeof(*data), is_atomic_ctx); |
| 291 | if (unlikely(!pyld)) { |
| 292 | WARN_ON(1); |
| 293 | return pyld; |
| 294 | } |
| 295 | pyld->opcode = ipahal_imm_cmd_get_opcode(cmd); |
| 296 | pyld->len = sizeof(*data); |
| 297 | data = (struct ipa_imm_cmd_hw_register_write_v_4_0 *)pyld->data; |
| 298 | |
| 299 | data->offset = regwrt_params->offset; |
| 300 | data->offset_high = regwrt_params->offset >> 16; |
| 301 | data->value = regwrt_params->value; |
| 302 | data->value_mask = regwrt_params->value_mask; |
| 303 | |
| 304 | pyld->opcode |= (regwrt_params->skip_pipeline_clear ? 1 : 0) << 8; |
| 305 | switch (regwrt_params->pipeline_clear_options) { |
| 306 | case IPAHAL_HPS_CLEAR: |
| 307 | break; |
| 308 | case IPAHAL_SRC_GRP_CLEAR: |
| 309 | pyld->opcode |= (1 << 9); |
| 310 | break; |
| 311 | case IPAHAL_FULL_PIPELINE_CLEAR: |
| 312 | pyld->opcode |= (2 << 9); |
| 313 | break; |
| 314 | default: |
| 315 | IPAHAL_ERR("unsupported pipline clear option %d\n", |
| 316 | regwrt_params->pipeline_clear_options); |
| 317 | WARN_ON(1); |
| 318 | }; |
| 319 | |
| 320 | return pyld; |
| 321 | } |
| 322 | |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 323 | static struct ipahal_imm_cmd_pyld *ipa_imm_cmd_construct_ip_packet_init( |
| 324 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 325 | { |
| 326 | struct ipahal_imm_cmd_pyld *pyld; |
| 327 | struct ipa_imm_cmd_hw_ip_packet_init *data; |
| 328 | struct ipahal_imm_cmd_ip_packet_init *pktinit_params = |
| 329 | (struct ipahal_imm_cmd_ip_packet_init *)params; |
| 330 | |
| 331 | pyld = IPAHAL_MEM_ALLOC(sizeof(*pyld) + sizeof(*data), is_atomic_ctx); |
| 332 | if (unlikely(!pyld)) { |
| 333 | IPAHAL_ERR("kzalloc err\n"); |
| 334 | return pyld; |
| 335 | } |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 336 | pyld->opcode = ipahal_imm_cmd_get_opcode(cmd); |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 337 | pyld->len = sizeof(*data); |
| 338 | data = (struct ipa_imm_cmd_hw_ip_packet_init *)pyld->data; |
| 339 | |
| 340 | if (unlikely(pktinit_params->destination_pipe_index & ~0x1F)) { |
| 341 | IPAHAL_ERR("Dst pipe idx is bigger than 5bit width 0x%x\n", |
| 342 | pktinit_params->destination_pipe_index); |
| 343 | WARN_ON(1); |
| 344 | } |
| 345 | data->destination_pipe_index = pktinit_params->destination_pipe_index; |
| 346 | |
| 347 | return pyld; |
| 348 | } |
| 349 | |
| 350 | static struct ipahal_imm_cmd_pyld *ipa_imm_cmd_construct_nat_dma( |
| 351 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 352 | { |
| 353 | struct ipahal_imm_cmd_pyld *pyld; |
| 354 | struct ipa_imm_cmd_hw_nat_dma *data; |
| 355 | struct ipahal_imm_cmd_nat_dma *nat_params = |
| 356 | (struct ipahal_imm_cmd_nat_dma *)params; |
| 357 | |
| 358 | pyld = IPAHAL_MEM_ALLOC(sizeof(*pyld) + sizeof(*data), is_atomic_ctx); |
| 359 | if (unlikely(!pyld)) { |
| 360 | IPAHAL_ERR("kzalloc err\n"); |
| 361 | return pyld; |
| 362 | } |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 363 | pyld->opcode = ipahal_imm_cmd_get_opcode(cmd); |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 364 | pyld->len = sizeof(*data); |
| 365 | data = (struct ipa_imm_cmd_hw_nat_dma *)pyld->data; |
| 366 | |
| 367 | data->table_index = nat_params->table_index; |
| 368 | data->base_addr = nat_params->base_addr; |
| 369 | data->offset = nat_params->offset; |
| 370 | data->data = nat_params->data; |
| 371 | |
| 372 | return pyld; |
| 373 | } |
| 374 | |
Amir Levy | 05fccd0 | 2017-06-13 16:25:45 +0300 | [diff] [blame] | 375 | static struct ipahal_imm_cmd_pyld *ipa_imm_cmd_construct_table_dma_ipav4( |
| 376 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 377 | { |
| 378 | struct ipahal_imm_cmd_pyld *pyld; |
| 379 | struct ipa_imm_cmd_hw_table_dma_ipav4 *data; |
| 380 | struct ipahal_imm_cmd_table_dma *nat_params = |
| 381 | (struct ipahal_imm_cmd_table_dma *)params; |
| 382 | |
| 383 | pyld = IPAHAL_MEM_ALLOC(sizeof(*pyld) + sizeof(*data), is_atomic_ctx); |
| 384 | if (unlikely(!pyld)) { |
| 385 | IPAHAL_ERR("kzalloc err\n"); |
| 386 | return pyld; |
| 387 | } |
| 388 | pyld->opcode = ipahal_imm_cmd_get_opcode(cmd); |
| 389 | pyld->len = sizeof(*data); |
| 390 | data = (struct ipa_imm_cmd_hw_table_dma_ipav4 *)pyld->data; |
| 391 | |
| 392 | data->table_index = nat_params->table_index; |
| 393 | data->base_addr = nat_params->base_addr; |
| 394 | data->offset = nat_params->offset; |
| 395 | data->data = nat_params->data; |
| 396 | |
| 397 | return pyld; |
| 398 | } |
| 399 | |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 400 | static struct ipahal_imm_cmd_pyld *ipa_imm_cmd_construct_hdr_init_system( |
| 401 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 402 | { |
| 403 | struct ipahal_imm_cmd_pyld *pyld; |
| 404 | struct ipa_imm_cmd_hw_hdr_init_system *data; |
| 405 | struct ipahal_imm_cmd_hdr_init_system *syshdr_params = |
| 406 | (struct ipahal_imm_cmd_hdr_init_system *)params; |
| 407 | |
| 408 | pyld = IPAHAL_MEM_ALLOC(sizeof(*pyld) + sizeof(*data), is_atomic_ctx); |
| 409 | if (unlikely(!pyld)) { |
| 410 | IPAHAL_ERR("kzalloc err\n"); |
| 411 | return pyld; |
| 412 | } |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 413 | pyld->opcode = ipahal_imm_cmd_get_opcode(cmd); |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 414 | pyld->len = sizeof(*data); |
| 415 | data = (struct ipa_imm_cmd_hw_hdr_init_system *)pyld->data; |
| 416 | |
| 417 | data->hdr_table_addr = syshdr_params->hdr_table_addr; |
| 418 | |
| 419 | return pyld; |
| 420 | } |
| 421 | |
| 422 | static struct ipahal_imm_cmd_pyld *ipa_imm_cmd_construct_hdr_init_local( |
| 423 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 424 | { |
| 425 | struct ipahal_imm_cmd_pyld *pyld; |
| 426 | struct ipa_imm_cmd_hw_hdr_init_local *data; |
| 427 | struct ipahal_imm_cmd_hdr_init_local *lclhdr_params = |
| 428 | (struct ipahal_imm_cmd_hdr_init_local *)params; |
| 429 | |
| 430 | pyld = IPAHAL_MEM_ALLOC(sizeof(*pyld) + sizeof(*data), is_atomic_ctx); |
| 431 | if (unlikely(!pyld)) { |
| 432 | IPAHAL_ERR("kzalloc err\n"); |
| 433 | return pyld; |
| 434 | } |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 435 | pyld->opcode = ipahal_imm_cmd_get_opcode(cmd); |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 436 | pyld->len = sizeof(*data); |
| 437 | data = (struct ipa_imm_cmd_hw_hdr_init_local *)pyld->data; |
| 438 | |
| 439 | if (unlikely(lclhdr_params->size_hdr_table & ~0xFFF)) { |
| 440 | IPAHAL_ERR("Hdr tble size is bigger than 12bit width 0x%x\n", |
| 441 | lclhdr_params->size_hdr_table); |
| 442 | WARN_ON(1); |
| 443 | } |
| 444 | data->hdr_table_addr = lclhdr_params->hdr_table_addr; |
| 445 | data->size_hdr_table = lclhdr_params->size_hdr_table; |
| 446 | data->hdr_addr = lclhdr_params->hdr_addr; |
| 447 | |
| 448 | return pyld; |
| 449 | } |
| 450 | |
| 451 | static struct ipahal_imm_cmd_pyld *ipa_imm_cmd_construct_ip_v6_routing_init( |
| 452 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 453 | { |
| 454 | struct ipahal_imm_cmd_pyld *pyld; |
| 455 | struct ipa_imm_cmd_hw_ip_v6_routing_init *data; |
| 456 | struct ipahal_imm_cmd_ip_v6_routing_init *rt6_params = |
| 457 | (struct ipahal_imm_cmd_ip_v6_routing_init *)params; |
| 458 | |
| 459 | pyld = IPAHAL_MEM_ALLOC(sizeof(*pyld) + sizeof(*data), is_atomic_ctx); |
| 460 | if (unlikely(!pyld)) { |
| 461 | IPAHAL_ERR("kzalloc err\n"); |
| 462 | return pyld; |
| 463 | } |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 464 | pyld->opcode = ipahal_imm_cmd_get_opcode(cmd); |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 465 | pyld->len = sizeof(*data); |
| 466 | data = (struct ipa_imm_cmd_hw_ip_v6_routing_init *)pyld->data; |
| 467 | |
| 468 | data->hash_rules_addr = rt6_params->hash_rules_addr; |
| 469 | data->hash_rules_size = rt6_params->hash_rules_size; |
| 470 | data->hash_local_addr = rt6_params->hash_local_addr; |
| 471 | data->nhash_rules_addr = rt6_params->nhash_rules_addr; |
| 472 | data->nhash_rules_size = rt6_params->nhash_rules_size; |
| 473 | data->nhash_local_addr = rt6_params->nhash_local_addr; |
| 474 | |
| 475 | return pyld; |
| 476 | } |
| 477 | |
| 478 | static struct ipahal_imm_cmd_pyld *ipa_imm_cmd_construct_ip_v4_routing_init( |
| 479 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 480 | { |
| 481 | struct ipahal_imm_cmd_pyld *pyld; |
| 482 | struct ipa_imm_cmd_hw_ip_v4_routing_init *data; |
| 483 | struct ipahal_imm_cmd_ip_v4_routing_init *rt4_params = |
| 484 | (struct ipahal_imm_cmd_ip_v4_routing_init *)params; |
| 485 | |
| 486 | pyld = IPAHAL_MEM_ALLOC(sizeof(*pyld) + sizeof(*data), is_atomic_ctx); |
| 487 | if (unlikely(!pyld)) { |
| 488 | IPAHAL_ERR("kzalloc err\n"); |
| 489 | return pyld; |
| 490 | } |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 491 | pyld->opcode = ipahal_imm_cmd_get_opcode(cmd); |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 492 | pyld->len = sizeof(*data); |
| 493 | data = (struct ipa_imm_cmd_hw_ip_v4_routing_init *)pyld->data; |
| 494 | |
| 495 | data->hash_rules_addr = rt4_params->hash_rules_addr; |
| 496 | data->hash_rules_size = rt4_params->hash_rules_size; |
| 497 | data->hash_local_addr = rt4_params->hash_local_addr; |
| 498 | data->nhash_rules_addr = rt4_params->nhash_rules_addr; |
| 499 | data->nhash_rules_size = rt4_params->nhash_rules_size; |
| 500 | data->nhash_local_addr = rt4_params->nhash_local_addr; |
| 501 | |
| 502 | return pyld; |
| 503 | } |
| 504 | |
| 505 | static struct ipahal_imm_cmd_pyld *ipa_imm_cmd_construct_ip_v4_nat_init( |
| 506 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 507 | { |
| 508 | struct ipahal_imm_cmd_pyld *pyld; |
| 509 | struct ipa_imm_cmd_hw_ip_v4_nat_init *data; |
| 510 | struct ipahal_imm_cmd_ip_v4_nat_init *nat4_params = |
| 511 | (struct ipahal_imm_cmd_ip_v4_nat_init *)params; |
| 512 | |
| 513 | pyld = IPAHAL_MEM_ALLOC(sizeof(*pyld) + sizeof(*data), is_atomic_ctx); |
| 514 | if (unlikely(!pyld)) { |
| 515 | IPAHAL_ERR("kzalloc err\n"); |
| 516 | return pyld; |
| 517 | } |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 518 | pyld->opcode = ipahal_imm_cmd_get_opcode(cmd); |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 519 | pyld->len = sizeof(*data); |
| 520 | data = (struct ipa_imm_cmd_hw_ip_v4_nat_init *)pyld->data; |
| 521 | |
| 522 | data->ipv4_rules_addr = nat4_params->ipv4_rules_addr; |
| 523 | data->ipv4_expansion_rules_addr = |
| 524 | nat4_params->ipv4_expansion_rules_addr; |
| 525 | data->index_table_addr = nat4_params->index_table_addr; |
| 526 | data->index_table_expansion_addr = |
| 527 | nat4_params->index_table_expansion_addr; |
| 528 | data->table_index = nat4_params->table_index; |
| 529 | data->ipv4_rules_addr_type = |
| 530 | nat4_params->ipv4_rules_addr_shared ? 1 : 0; |
| 531 | data->ipv4_expansion_rules_addr_type = |
| 532 | nat4_params->ipv4_expansion_rules_addr_shared ? 1 : 0; |
| 533 | data->index_table_addr_type = |
| 534 | nat4_params->index_table_addr_shared ? 1 : 0; |
| 535 | data->index_table_expansion_addr_type = |
| 536 | nat4_params->index_table_expansion_addr_shared ? 1 : 0; |
| 537 | data->size_base_tables = nat4_params->size_base_tables; |
| 538 | data->size_expansion_tables = nat4_params->size_expansion_tables; |
| 539 | data->public_ip_addr = nat4_params->public_ip_addr; |
| 540 | |
| 541 | return pyld; |
| 542 | } |
| 543 | |
| 544 | static struct ipahal_imm_cmd_pyld *ipa_imm_cmd_construct_ip_v6_filter_init( |
| 545 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 546 | { |
| 547 | struct ipahal_imm_cmd_pyld *pyld; |
| 548 | struct ipa_imm_cmd_hw_ip_v6_filter_init *data; |
| 549 | struct ipahal_imm_cmd_ip_v6_filter_init *flt6_params = |
| 550 | (struct ipahal_imm_cmd_ip_v6_filter_init *)params; |
| 551 | |
| 552 | pyld = IPAHAL_MEM_ALLOC(sizeof(*pyld) + sizeof(*data), is_atomic_ctx); |
| 553 | if (unlikely(!pyld)) { |
| 554 | IPAHAL_ERR("kzalloc err\n"); |
| 555 | return pyld; |
| 556 | } |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 557 | pyld->opcode = ipahal_imm_cmd_get_opcode(cmd); |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 558 | pyld->len = sizeof(*data); |
| 559 | data = (struct ipa_imm_cmd_hw_ip_v6_filter_init *)pyld->data; |
| 560 | |
| 561 | data->hash_rules_addr = flt6_params->hash_rules_addr; |
| 562 | data->hash_rules_size = flt6_params->hash_rules_size; |
| 563 | data->hash_local_addr = flt6_params->hash_local_addr; |
| 564 | data->nhash_rules_addr = flt6_params->nhash_rules_addr; |
| 565 | data->nhash_rules_size = flt6_params->nhash_rules_size; |
| 566 | data->nhash_local_addr = flt6_params->nhash_local_addr; |
| 567 | |
| 568 | return pyld; |
| 569 | } |
| 570 | |
| 571 | static struct ipahal_imm_cmd_pyld *ipa_imm_cmd_construct_ip_v4_filter_init( |
| 572 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 573 | { |
| 574 | struct ipahal_imm_cmd_pyld *pyld; |
| 575 | struct ipa_imm_cmd_hw_ip_v4_filter_init *data; |
| 576 | struct ipahal_imm_cmd_ip_v4_filter_init *flt4_params = |
| 577 | (struct ipahal_imm_cmd_ip_v4_filter_init *)params; |
| 578 | |
| 579 | pyld = IPAHAL_MEM_ALLOC(sizeof(*pyld) + sizeof(*data), is_atomic_ctx); |
| 580 | if (unlikely(!pyld)) { |
| 581 | IPAHAL_ERR("kzalloc err\n"); |
| 582 | return pyld; |
| 583 | } |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 584 | pyld->opcode = ipahal_imm_cmd_get_opcode(cmd); |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 585 | pyld->len = sizeof(*data); |
| 586 | data = (struct ipa_imm_cmd_hw_ip_v4_filter_init *)pyld->data; |
| 587 | |
| 588 | data->hash_rules_addr = flt4_params->hash_rules_addr; |
| 589 | data->hash_rules_size = flt4_params->hash_rules_size; |
| 590 | data->hash_local_addr = flt4_params->hash_local_addr; |
| 591 | data->nhash_rules_addr = flt4_params->nhash_rules_addr; |
| 592 | data->nhash_rules_size = flt4_params->nhash_rules_size; |
| 593 | data->nhash_local_addr = flt4_params->nhash_local_addr; |
| 594 | |
| 595 | return pyld; |
| 596 | } |
| 597 | |
| 598 | /* |
| 599 | * struct ipahal_imm_cmd_obj - immediate command H/W information for |
| 600 | * specific IPA version |
| 601 | * @construct - CB to construct imm command payload from abstracted structure |
| 602 | * @opcode - Immediate command OpCode |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 603 | */ |
| 604 | struct ipahal_imm_cmd_obj { |
| 605 | struct ipahal_imm_cmd_pyld *(*construct)(enum ipahal_imm_cmd_name cmd, |
| 606 | const void *params, bool is_atomic_ctx); |
| 607 | u16 opcode; |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 608 | }; |
| 609 | |
| 610 | /* |
| 611 | * This table contains the info regard each immediate command for IPAv3 |
| 612 | * and later. |
| 613 | * Information like: opcode and construct functions. |
| 614 | * All the information on the IMM on IPAv3 are statically defined below. |
| 615 | * If information is missing regard some IMM on some IPA version, |
| 616 | * the init function will fill it with the information from the previous |
| 617 | * IPA version. |
| 618 | * Information is considered missing if all of the fields are 0 |
| 619 | * If opcode is -1, this means that the IMM is removed on the |
| 620 | * specific version |
| 621 | */ |
| 622 | static struct ipahal_imm_cmd_obj |
| 623 | ipahal_imm_cmd_objs[IPA_HW_MAX][IPA_IMM_CMD_MAX] = { |
| 624 | /* IPAv3 */ |
| 625 | [IPA_HW_v3_0][IPA_IMM_CMD_IP_V4_FILTER_INIT] = { |
| 626 | ipa_imm_cmd_construct_ip_v4_filter_init, |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 627 | 3}, |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 628 | [IPA_HW_v3_0][IPA_IMM_CMD_IP_V6_FILTER_INIT] = { |
| 629 | ipa_imm_cmd_construct_ip_v6_filter_init, |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 630 | 4}, |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 631 | [IPA_HW_v3_0][IPA_IMM_CMD_IP_V4_NAT_INIT] = { |
| 632 | ipa_imm_cmd_construct_ip_v4_nat_init, |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 633 | 5}, |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 634 | [IPA_HW_v3_0][IPA_IMM_CMD_IP_V4_ROUTING_INIT] = { |
| 635 | ipa_imm_cmd_construct_ip_v4_routing_init, |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 636 | 7}, |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 637 | [IPA_HW_v3_0][IPA_IMM_CMD_IP_V6_ROUTING_INIT] = { |
| 638 | ipa_imm_cmd_construct_ip_v6_routing_init, |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 639 | 8}, |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 640 | [IPA_HW_v3_0][IPA_IMM_CMD_HDR_INIT_LOCAL] = { |
| 641 | ipa_imm_cmd_construct_hdr_init_local, |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 642 | 9}, |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 643 | [IPA_HW_v3_0][IPA_IMM_CMD_HDR_INIT_SYSTEM] = { |
| 644 | ipa_imm_cmd_construct_hdr_init_system, |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 645 | 10}, |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 646 | [IPA_HW_v3_0][IPA_IMM_CMD_REGISTER_WRITE] = { |
| 647 | ipa_imm_cmd_construct_register_write, |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 648 | 12}, |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 649 | [IPA_HW_v3_0][IPA_IMM_CMD_NAT_DMA] = { |
| 650 | ipa_imm_cmd_construct_nat_dma, |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 651 | 14}, |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 652 | [IPA_HW_v3_0][IPA_IMM_CMD_IP_PACKET_INIT] = { |
| 653 | ipa_imm_cmd_construct_ip_packet_init, |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 654 | 16}, |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 655 | [IPA_HW_v3_0][IPA_IMM_CMD_DMA_TASK_32B_ADDR] = { |
| 656 | ipa_imm_cmd_construct_dma_task_32b_addr, |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 657 | 17}, |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 658 | [IPA_HW_v3_0][IPA_IMM_CMD_DMA_SHARED_MEM] = { |
| 659 | ipa_imm_cmd_construct_dma_shared_mem, |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 660 | 19}, |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 661 | [IPA_HW_v3_0][IPA_IMM_CMD_IP_PACKET_TAG_STATUS] = { |
| 662 | ipa_imm_cmd_construct_ip_packet_tag_status, |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 663 | 20}, |
| 664 | |
| 665 | /* IPAv4 */ |
| 666 | [IPA_HW_v4_0][IPA_IMM_CMD_REGISTER_WRITE] = { |
| 667 | ipa_imm_cmd_construct_register_write_v_4_0, |
| 668 | 12}, |
Amir Levy | 05fccd0 | 2017-06-13 16:25:45 +0300 | [diff] [blame] | 669 | /* NAT_DMA was renamed to TABLE_DMA for IPAv4 */ |
| 670 | [IPA_HW_v4_0][IPA_IMM_CMD_NAT_DMA] = { |
| 671 | NULL, |
| 672 | -1 }, |
| 673 | [IPA_HW_v4_0][IPA_IMM_CMD_TABLE_DMA] = { |
| 674 | ipa_imm_cmd_construct_table_dma_ipav4, |
| 675 | 14}, |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 676 | [IPA_HW_v4_0][IPA_IMM_CMD_DMA_SHARED_MEM] = { |
| 677 | ipa_imm_cmd_construct_dma_shared_mem_v_4_0, |
| 678 | 19}, |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 679 | }; |
| 680 | |
| 681 | /* |
| 682 | * ipahal_imm_cmd_init() - Build the Immediate command information table |
| 683 | * See ipahal_imm_cmd_objs[][] comments |
| 684 | */ |
| 685 | static int ipahal_imm_cmd_init(enum ipa_hw_type ipa_hw_type) |
| 686 | { |
| 687 | int i; |
| 688 | int j; |
| 689 | struct ipahal_imm_cmd_obj zero_obj; |
| 690 | |
| 691 | IPAHAL_DBG_LOW("Entry - HW_TYPE=%d\n", ipa_hw_type); |
| 692 | |
| 693 | if ((ipa_hw_type < 0) || (ipa_hw_type >= IPA_HW_MAX)) { |
| 694 | IPAHAL_ERR("invalid IPA HW type (%d)\n", ipa_hw_type); |
| 695 | return -EINVAL; |
| 696 | } |
| 697 | |
| 698 | memset(&zero_obj, 0, sizeof(zero_obj)); |
| 699 | for (i = IPA_HW_v3_0 ; i < ipa_hw_type ; i++) { |
| 700 | for (j = 0; j < IPA_IMM_CMD_MAX ; j++) { |
| 701 | if (!memcmp(&ipahal_imm_cmd_objs[i+1][j], &zero_obj, |
| 702 | sizeof(struct ipahal_imm_cmd_obj))) { |
| 703 | memcpy(&ipahal_imm_cmd_objs[i+1][j], |
| 704 | &ipahal_imm_cmd_objs[i][j], |
| 705 | sizeof(struct ipahal_imm_cmd_obj)); |
| 706 | } else { |
| 707 | /* |
| 708 | * explicitly overridden immediate command. |
| 709 | * Check validity |
| 710 | */ |
| 711 | if (!ipahal_imm_cmd_objs[i+1][j].opcode) { |
| 712 | IPAHAL_ERR( |
| 713 | "imm_cmd=%s with zero opcode ipa_ver=%d\n", |
| 714 | ipahal_imm_cmd_name_str(j), i+1); |
| 715 | WARN_ON(1); |
| 716 | } |
| 717 | if (!ipahal_imm_cmd_objs[i+1][j].construct) { |
| 718 | IPAHAL_ERR( |
| 719 | "imm_cmd=%s with NULL construct func ipa_ver=%d\n", |
| 720 | ipahal_imm_cmd_name_str(j), i+1); |
| 721 | WARN_ON(1); |
| 722 | } |
| 723 | } |
| 724 | } |
| 725 | } |
| 726 | |
| 727 | return 0; |
| 728 | } |
| 729 | |
| 730 | /* |
| 731 | * ipahal_imm_cmd_name_str() - returns string that represent the imm cmd |
| 732 | * @cmd_name: [in] Immediate command name |
| 733 | */ |
| 734 | const char *ipahal_imm_cmd_name_str(enum ipahal_imm_cmd_name cmd_name) |
| 735 | { |
| 736 | if (cmd_name < 0 || cmd_name >= IPA_IMM_CMD_MAX) { |
| 737 | IPAHAL_ERR("requested name of invalid imm_cmd=%d\n", cmd_name); |
| 738 | return "Invalid IMM_CMD"; |
| 739 | } |
| 740 | |
| 741 | return ipahal_imm_cmd_name_to_str[cmd_name]; |
| 742 | } |
| 743 | |
| 744 | /* |
| 745 | * ipahal_imm_cmd_get_opcode() - Get the fixed opcode of the immediate command |
| 746 | */ |
Michael Adisumarta | b5d170f | 2017-05-17 14:34:11 -0700 | [diff] [blame] | 747 | static u16 ipahal_imm_cmd_get_opcode(enum ipahal_imm_cmd_name cmd) |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 748 | { |
| 749 | u32 opcode; |
| 750 | |
| 751 | if (cmd >= IPA_IMM_CMD_MAX) { |
| 752 | IPAHAL_ERR("Invalid immediate command imm_cmd=%u\n", cmd); |
| 753 | ipa_assert(); |
| 754 | return -EFAULT; |
| 755 | } |
| 756 | |
| 757 | IPAHAL_DBG_LOW("Get opcode of IMM_CMD=%s\n", |
| 758 | ipahal_imm_cmd_name_str(cmd)); |
| 759 | opcode = ipahal_imm_cmd_objs[ipahal_ctx->hw_type][cmd].opcode; |
| 760 | if (opcode == -1) { |
| 761 | IPAHAL_ERR("Try to get opcode of obsolete IMM_CMD=%s\n", |
| 762 | ipahal_imm_cmd_name_str(cmd)); |
| 763 | ipa_assert(); |
| 764 | return -EFAULT; |
| 765 | } |
| 766 | |
| 767 | return opcode; |
| 768 | } |
| 769 | |
| 770 | /* |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 771 | * ipahal_construct_imm_cmd() - Construct immdiate command |
| 772 | * This function builds imm cmd bulk that can be be sent to IPA |
| 773 | * The command will be allocated dynamically. |
| 774 | * After done using it, call ipahal_destroy_imm_cmd() to release it |
| 775 | */ |
| 776 | struct ipahal_imm_cmd_pyld *ipahal_construct_imm_cmd( |
| 777 | enum ipahal_imm_cmd_name cmd, const void *params, bool is_atomic_ctx) |
| 778 | { |
| 779 | if (!params) { |
| 780 | IPAHAL_ERR("Input error: params=%p\n", params); |
| 781 | ipa_assert(); |
| 782 | return NULL; |
| 783 | } |
| 784 | |
| 785 | if (cmd >= IPA_IMM_CMD_MAX) { |
| 786 | IPAHAL_ERR("Invalid immediate command %u\n", cmd); |
| 787 | ipa_assert(); |
| 788 | return NULL; |
| 789 | } |
| 790 | |
| 791 | IPAHAL_DBG_LOW("construct IMM_CMD:%s\n", ipahal_imm_cmd_name_str(cmd)); |
| 792 | return ipahal_imm_cmd_objs[ipahal_ctx->hw_type][cmd].construct( |
| 793 | cmd, params, is_atomic_ctx); |
| 794 | } |
| 795 | |
| 796 | /* |
| 797 | * ipahal_construct_nop_imm_cmd() - Construct immediate comamnd for NO-Op |
| 798 | * Core driver may want functionality to inject NOP commands to IPA |
| 799 | * to ensure e.g., PIPLINE clear before someother operation. |
| 800 | * The functionality given by this function can be reached by |
| 801 | * ipahal_construct_imm_cmd(). This function is helper to the core driver |
| 802 | * to reach this NOP functionlity easily. |
| 803 | * @skip_pipline_clear: if to skip pipeline clear waiting (don't wait) |
| 804 | * @pipline_clr_opt: options for pipeline clear waiting |
| 805 | * @is_atomic_ctx: is called in atomic context or can sleep? |
| 806 | */ |
| 807 | struct ipahal_imm_cmd_pyld *ipahal_construct_nop_imm_cmd( |
| 808 | bool skip_pipline_clear, |
| 809 | enum ipahal_pipeline_clear_option pipline_clr_opt, |
| 810 | bool is_atomic_ctx) |
| 811 | { |
| 812 | struct ipahal_imm_cmd_register_write cmd; |
| 813 | struct ipahal_imm_cmd_pyld *cmd_pyld; |
| 814 | |
| 815 | memset(&cmd, 0, sizeof(cmd)); |
| 816 | cmd.skip_pipeline_clear = skip_pipline_clear; |
| 817 | cmd.pipeline_clear_options = pipline_clr_opt; |
| 818 | cmd.value_mask = 0x0; |
| 819 | |
| 820 | cmd_pyld = ipahal_construct_imm_cmd(IPA_IMM_CMD_REGISTER_WRITE, |
| 821 | &cmd, is_atomic_ctx); |
| 822 | |
| 823 | if (!cmd_pyld) |
| 824 | IPAHAL_ERR("failed to construct register_write imm cmd\n"); |
| 825 | |
| 826 | return cmd_pyld; |
| 827 | } |
| 828 | |
| 829 | |
| 830 | /* IPA Packet Status Logic */ |
| 831 | |
| 832 | #define IPA_PKT_STATUS_SET_MSK(__hw_bit_msk, __shft) \ |
| 833 | (status->status_mask |= \ |
| 834 | ((hw_status->status_mask & (__hw_bit_msk) ? 1 : 0) << (__shft))) |
| 835 | |
| 836 | static void ipa_pkt_status_parse( |
| 837 | const void *unparsed_status, struct ipahal_pkt_status *status) |
| 838 | { |
| 839 | enum ipahal_pkt_status_opcode opcode = 0; |
| 840 | enum ipahal_pkt_status_exception exception_type = 0; |
| 841 | |
| 842 | struct ipa_pkt_status_hw *hw_status = |
| 843 | (struct ipa_pkt_status_hw *)unparsed_status; |
| 844 | |
| 845 | status->pkt_len = hw_status->pkt_len; |
| 846 | status->endp_src_idx = hw_status->endp_src_idx; |
| 847 | status->endp_dest_idx = hw_status->endp_dest_idx; |
| 848 | status->metadata = hw_status->metadata; |
| 849 | status->flt_local = hw_status->flt_local; |
| 850 | status->flt_hash = hw_status->flt_hash; |
| 851 | status->flt_global = hw_status->flt_hash; |
| 852 | status->flt_ret_hdr = hw_status->flt_ret_hdr; |
| 853 | status->flt_miss = ~(hw_status->flt_rule_id) ? false : true; |
| 854 | status->flt_rule_id = hw_status->flt_rule_id; |
| 855 | status->rt_local = hw_status->rt_local; |
| 856 | status->rt_hash = hw_status->rt_hash; |
| 857 | status->ucp = hw_status->ucp; |
| 858 | status->rt_tbl_idx = hw_status->rt_tbl_idx; |
| 859 | status->rt_miss = ~(hw_status->rt_rule_id) ? false : true; |
| 860 | status->rt_rule_id = hw_status->rt_rule_id; |
| 861 | status->nat_hit = hw_status->nat_hit; |
| 862 | status->nat_entry_idx = hw_status->nat_entry_idx; |
| 863 | status->tag_info = hw_status->tag_info; |
| 864 | status->seq_num = hw_status->seq_num; |
| 865 | status->time_of_day_ctr = hw_status->time_of_day_ctr; |
| 866 | status->hdr_local = hw_status->hdr_local; |
| 867 | status->hdr_offset = hw_status->hdr_offset; |
| 868 | status->frag_hit = hw_status->frag_hit; |
| 869 | status->frag_rule = hw_status->frag_rule; |
| 870 | |
| 871 | switch (hw_status->status_opcode) { |
| 872 | case 0x1: |
| 873 | opcode = IPAHAL_PKT_STATUS_OPCODE_PACKET; |
| 874 | break; |
| 875 | case 0x2: |
| 876 | opcode = IPAHAL_PKT_STATUS_OPCODE_NEW_FRAG_RULE; |
| 877 | break; |
| 878 | case 0x4: |
| 879 | opcode = IPAHAL_PKT_STATUS_OPCODE_DROPPED_PACKET; |
| 880 | break; |
| 881 | case 0x8: |
| 882 | opcode = IPAHAL_PKT_STATUS_OPCODE_SUSPENDED_PACKET; |
| 883 | break; |
| 884 | case 0x10: |
| 885 | opcode = IPAHAL_PKT_STATUS_OPCODE_LOG; |
| 886 | break; |
| 887 | case 0x20: |
| 888 | opcode = IPAHAL_PKT_STATUS_OPCODE_DCMP; |
| 889 | break; |
| 890 | case 0x40: |
| 891 | opcode = IPAHAL_PKT_STATUS_OPCODE_PACKET_2ND_PASS; |
| 892 | break; |
| 893 | default: |
| 894 | IPAHAL_ERR("unsupported Status Opcode 0x%x\n", |
| 895 | hw_status->status_opcode); |
| 896 | WARN_ON(1); |
| 897 | }; |
| 898 | status->status_opcode = opcode; |
| 899 | |
| 900 | switch (hw_status->nat_type) { |
| 901 | case 0: |
| 902 | status->nat_type = IPAHAL_PKT_STATUS_NAT_NONE; |
| 903 | break; |
| 904 | case 1: |
| 905 | status->nat_type = IPAHAL_PKT_STATUS_NAT_SRC; |
| 906 | break; |
| 907 | case 2: |
| 908 | status->nat_type = IPAHAL_PKT_STATUS_NAT_DST; |
| 909 | break; |
| 910 | default: |
| 911 | IPAHAL_ERR("unsupported Status NAT type 0x%x\n", |
| 912 | hw_status->nat_type); |
| 913 | WARN_ON(1); |
| 914 | }; |
| 915 | |
| 916 | switch (hw_status->exception) { |
| 917 | case 0: |
| 918 | exception_type = IPAHAL_PKT_STATUS_EXCEPTION_NONE; |
| 919 | break; |
| 920 | case 1: |
| 921 | exception_type = IPAHAL_PKT_STATUS_EXCEPTION_DEAGGR; |
| 922 | break; |
| 923 | case 4: |
| 924 | exception_type = IPAHAL_PKT_STATUS_EXCEPTION_IPTYPE; |
| 925 | break; |
| 926 | case 8: |
| 927 | exception_type = IPAHAL_PKT_STATUS_EXCEPTION_PACKET_LENGTH; |
| 928 | break; |
| 929 | case 16: |
| 930 | exception_type = IPAHAL_PKT_STATUS_EXCEPTION_FRAG_RULE_MISS; |
| 931 | break; |
| 932 | case 32: |
| 933 | exception_type = IPAHAL_PKT_STATUS_EXCEPTION_SW_FILT; |
| 934 | break; |
| 935 | case 64: |
| 936 | exception_type = IPAHAL_PKT_STATUS_EXCEPTION_NAT; |
| 937 | break; |
| 938 | default: |
| 939 | IPAHAL_ERR("unsupported Status Exception type 0x%x\n", |
| 940 | hw_status->exception); |
| 941 | WARN_ON(1); |
| 942 | }; |
| 943 | status->exception = exception_type; |
| 944 | |
| 945 | IPA_PKT_STATUS_SET_MSK(0x1, IPAHAL_PKT_STATUS_MASK_FRAG_PROCESS_SHFT); |
| 946 | IPA_PKT_STATUS_SET_MSK(0x2, IPAHAL_PKT_STATUS_MASK_FILT_PROCESS_SHFT); |
| 947 | IPA_PKT_STATUS_SET_MSK(0x4, IPAHAL_PKT_STATUS_MASK_NAT_PROCESS_SHFT); |
| 948 | IPA_PKT_STATUS_SET_MSK(0x8, IPAHAL_PKT_STATUS_MASK_ROUTE_PROCESS_SHFT); |
| 949 | IPA_PKT_STATUS_SET_MSK(0x10, IPAHAL_PKT_STATUS_MASK_TAG_VALID_SHFT); |
| 950 | IPA_PKT_STATUS_SET_MSK(0x20, IPAHAL_PKT_STATUS_MASK_FRAGMENT_SHFT); |
| 951 | IPA_PKT_STATUS_SET_MSK(0x40, |
| 952 | IPAHAL_PKT_STATUS_MASK_FIRST_FRAGMENT_SHFT); |
| 953 | IPA_PKT_STATUS_SET_MSK(0x80, IPAHAL_PKT_STATUS_MASK_V4_SHFT); |
| 954 | IPA_PKT_STATUS_SET_MSK(0x100, |
| 955 | IPAHAL_PKT_STATUS_MASK_CKSUM_PROCESS_SHFT); |
| 956 | IPA_PKT_STATUS_SET_MSK(0x200, IPAHAL_PKT_STATUS_MASK_AGGR_PROCESS_SHFT); |
| 957 | IPA_PKT_STATUS_SET_MSK(0x400, IPAHAL_PKT_STATUS_MASK_DEST_EOT_SHFT); |
| 958 | IPA_PKT_STATUS_SET_MSK(0x800, |
| 959 | IPAHAL_PKT_STATUS_MASK_DEAGGR_PROCESS_SHFT); |
| 960 | IPA_PKT_STATUS_SET_MSK(0x1000, IPAHAL_PKT_STATUS_MASK_DEAGG_FIRST_SHFT); |
| 961 | IPA_PKT_STATUS_SET_MSK(0x2000, IPAHAL_PKT_STATUS_MASK_SRC_EOT_SHFT); |
| 962 | IPA_PKT_STATUS_SET_MSK(0x4000, IPAHAL_PKT_STATUS_MASK_PREV_EOT_SHFT); |
| 963 | IPA_PKT_STATUS_SET_MSK(0x8000, IPAHAL_PKT_STATUS_MASK_BYTE_LIMIT_SHFT); |
| 964 | status->status_mask &= 0xFFFF; |
| 965 | } |
| 966 | |
| 967 | /* |
| 968 | * struct ipahal_pkt_status_obj - Pakcet Status H/W information for |
| 969 | * specific IPA version |
| 970 | * @size: H/W size of the status packet |
| 971 | * @parse: CB that parses the H/W packet status into the abstracted structure |
| 972 | */ |
| 973 | struct ipahal_pkt_status_obj { |
| 974 | u32 size; |
| 975 | void (*parse)(const void *unparsed_status, |
| 976 | struct ipahal_pkt_status *status); |
| 977 | }; |
| 978 | |
| 979 | /* |
| 980 | * This table contains the info regard packet status for IPAv3 and later |
| 981 | * Information like: size of packet status and parsing function |
| 982 | * All the information on the pkt Status on IPAv3 are statically defined below. |
| 983 | * If information is missing regard some IPA version, the init function |
| 984 | * will fill it with the information from the previous IPA version. |
| 985 | * Information is considered missing if all of the fields are 0 |
| 986 | */ |
| 987 | static struct ipahal_pkt_status_obj ipahal_pkt_status_objs[IPA_HW_MAX] = { |
| 988 | /* IPAv3 */ |
| 989 | [IPA_HW_v3_0] = { |
| 990 | IPA3_0_PKT_STATUS_SIZE, |
| 991 | ipa_pkt_status_parse, |
| 992 | }, |
| 993 | }; |
| 994 | |
| 995 | /* |
| 996 | * ipahal_pkt_status_init() - Build the packet status information array |
| 997 | * for the different IPA versions |
| 998 | * See ipahal_pkt_status_objs[] comments |
| 999 | */ |
| 1000 | static int ipahal_pkt_status_init(enum ipa_hw_type ipa_hw_type) |
| 1001 | { |
| 1002 | int i; |
| 1003 | struct ipahal_pkt_status_obj zero_obj; |
| 1004 | |
| 1005 | IPAHAL_DBG_LOW("Entry - HW_TYPE=%d\n", ipa_hw_type); |
| 1006 | |
| 1007 | if ((ipa_hw_type < 0) || (ipa_hw_type >= IPA_HW_MAX)) { |
| 1008 | IPAHAL_ERR("invalid IPA HW type (%d)\n", ipa_hw_type); |
| 1009 | return -EINVAL; |
| 1010 | } |
| 1011 | |
| 1012 | /* |
| 1013 | * Since structure alignment is implementation dependent, |
| 1014 | * add test to avoid different and incompatible data layouts. |
| 1015 | * |
| 1016 | * In case new H/W has different size or structure of status packet, |
| 1017 | * add a compile time validty check for it like below (as well as |
| 1018 | * the new defines and/or the new strucutre in the internal header). |
| 1019 | */ |
| 1020 | BUILD_BUG_ON(sizeof(struct ipa_pkt_status_hw) != |
| 1021 | IPA3_0_PKT_STATUS_SIZE); |
| 1022 | |
| 1023 | memset(&zero_obj, 0, sizeof(zero_obj)); |
| 1024 | for (i = IPA_HW_v3_0 ; i < ipa_hw_type ; i++) { |
| 1025 | if (!memcmp(&ipahal_pkt_status_objs[i+1], &zero_obj, |
| 1026 | sizeof(struct ipahal_pkt_status_obj))) { |
| 1027 | memcpy(&ipahal_pkt_status_objs[i+1], |
| 1028 | &ipahal_pkt_status_objs[i], |
| 1029 | sizeof(struct ipahal_pkt_status_obj)); |
| 1030 | } else { |
| 1031 | /* |
| 1032 | * explicitly overridden Packet Status info |
| 1033 | * Check validity |
| 1034 | */ |
| 1035 | if (!ipahal_pkt_status_objs[i+1].size) { |
| 1036 | IPAHAL_ERR( |
| 1037 | "Packet Status with zero size ipa_ver=%d\n", |
| 1038 | i+1); |
| 1039 | WARN_ON(1); |
| 1040 | } |
| 1041 | if (!ipahal_pkt_status_objs[i+1].parse) { |
| 1042 | IPAHAL_ERR( |
| 1043 | "Packet Status without Parse func ipa_ver=%d\n", |
| 1044 | i+1); |
| 1045 | WARN_ON(1); |
| 1046 | } |
| 1047 | } |
| 1048 | } |
| 1049 | |
| 1050 | return 0; |
| 1051 | } |
| 1052 | |
| 1053 | /* |
| 1054 | * ipahal_pkt_status_get_size() - Get H/W size of packet status |
| 1055 | */ |
| 1056 | u32 ipahal_pkt_status_get_size(void) |
| 1057 | { |
| 1058 | return ipahal_pkt_status_objs[ipahal_ctx->hw_type].size; |
| 1059 | } |
| 1060 | |
| 1061 | /* |
| 1062 | * ipahal_pkt_status_parse() - Parse Packet Status payload to abstracted form |
| 1063 | * @unparsed_status: Pointer to H/W format of the packet status as read from H/W |
| 1064 | * @status: Pointer to pre-allocated buffer where the parsed info will be stored |
| 1065 | */ |
| 1066 | void ipahal_pkt_status_parse(const void *unparsed_status, |
| 1067 | struct ipahal_pkt_status *status) |
| 1068 | { |
| 1069 | if (!unparsed_status || !status) { |
| 1070 | IPAHAL_ERR("Input Error: unparsed_status=%p status=%p\n", |
| 1071 | unparsed_status, status); |
| 1072 | return; |
| 1073 | } |
| 1074 | |
| 1075 | IPAHAL_DBG_LOW("Parse Status Packet\n"); |
| 1076 | memset(status, 0, sizeof(*status)); |
| 1077 | ipahal_pkt_status_objs[ipahal_ctx->hw_type].parse(unparsed_status, |
| 1078 | status); |
| 1079 | } |
| 1080 | |
| 1081 | /* |
| 1082 | * ipahal_pkt_status_exception_str() - returns string represents exception type |
| 1083 | * @exception: [in] The exception type |
| 1084 | */ |
| 1085 | const char *ipahal_pkt_status_exception_str( |
| 1086 | enum ipahal_pkt_status_exception exception) |
| 1087 | { |
| 1088 | if (exception < 0 || exception >= IPAHAL_PKT_STATUS_EXCEPTION_MAX) { |
| 1089 | IPAHAL_ERR( |
| 1090 | "requested string of invalid pkt_status exception=%d\n", |
| 1091 | exception); |
| 1092 | return "Invalid PKT_STATUS_EXCEPTION"; |
| 1093 | } |
| 1094 | |
| 1095 | return ipahal_pkt_status_exception_to_str[exception]; |
| 1096 | } |
| 1097 | |
| 1098 | #ifdef CONFIG_DEBUG_FS |
| 1099 | static void ipahal_debugfs_init(void) |
| 1100 | { |
| 1101 | ipahal_ctx->dent = debugfs_create_dir("ipahal", 0); |
| 1102 | if (!ipahal_ctx->dent || IS_ERR(ipahal_ctx->dent)) { |
| 1103 | IPAHAL_ERR("fail to create ipahal debugfs folder\n"); |
| 1104 | goto fail; |
| 1105 | } |
| 1106 | |
| 1107 | return; |
| 1108 | fail: |
| 1109 | debugfs_remove_recursive(ipahal_ctx->dent); |
| 1110 | ipahal_ctx->dent = NULL; |
| 1111 | } |
| 1112 | |
| 1113 | static void ipahal_debugfs_remove(void) |
| 1114 | { |
| 1115 | if (!ipahal_ctx) |
| 1116 | return; |
| 1117 | |
| 1118 | if (IS_ERR(ipahal_ctx->dent)) { |
| 1119 | IPAHAL_ERR("ipahal debugfs folder was not created\n"); |
| 1120 | return; |
| 1121 | } |
| 1122 | |
| 1123 | debugfs_remove_recursive(ipahal_ctx->dent); |
| 1124 | } |
| 1125 | #else /* CONFIG_DEBUG_FS */ |
| 1126 | static void ipahal_debugfs_init(void) {} |
| 1127 | static void ipahal_debugfs_remove(void) {} |
| 1128 | #endif /* CONFIG_DEBUG_FS */ |
| 1129 | |
| 1130 | /* |
| 1131 | * ipahal_cp_hdr_to_hw_buff_v3() - copy header to hardware buffer according to |
| 1132 | * base address and offset given. |
| 1133 | * @base: dma base address |
| 1134 | * @offset: offset from base address where the data will be copied |
| 1135 | * @hdr: the header to be copied |
| 1136 | * @hdr_len: the length of the header |
| 1137 | */ |
| 1138 | static void ipahal_cp_hdr_to_hw_buff_v3(void *const base, u32 offset, |
| 1139 | u8 *const hdr, u32 hdr_len) |
| 1140 | { |
| 1141 | memcpy(base + offset, hdr, hdr_len); |
| 1142 | } |
| 1143 | |
| 1144 | /* |
| 1145 | * ipahal_cp_proc_ctx_to_hw_buff_v3() - copy processing context to |
| 1146 | * base address and offset given. |
| 1147 | * @type: header processing context type (no processing context, |
| 1148 | * IPA_HDR_PROC_ETHII_TO_ETHII etc.) |
| 1149 | * @base: dma base address |
| 1150 | * @offset: offset from base address where the data will be copied |
| 1151 | * @hdr_len: the length of the header |
| 1152 | * @is_hdr_proc_ctx: header is located in phys_base (true) or hdr_base_addr |
| 1153 | * @phys_base: memory location in DDR |
| 1154 | * @hdr_base_addr: base address in table |
| 1155 | * @offset_entry: offset from hdr_base_addr in table |
Skylar Chang | 7fa2271 | 2017-04-03 18:29:21 -0700 | [diff] [blame^] | 1156 | * @l2tp_params: l2tp parameters |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 1157 | */ |
| 1158 | static int ipahal_cp_proc_ctx_to_hw_buff_v3(enum ipa_hdr_proc_type type, |
| 1159 | void *const base, u32 offset, |
| 1160 | u32 hdr_len, bool is_hdr_proc_ctx, |
| 1161 | dma_addr_t phys_base, u32 hdr_base_addr, |
Skylar Chang | 7fa2271 | 2017-04-03 18:29:21 -0700 | [diff] [blame^] | 1162 | struct ipa_hdr_offset_entry *offset_entry, |
| 1163 | union ipa_l2tp_hdr_proc_ctx_params l2tp_params){ |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 1164 | if (type == IPA_HDR_PROC_NONE) { |
| 1165 | struct ipa_hw_hdr_proc_ctx_add_hdr_seq *ctx; |
| 1166 | |
| 1167 | ctx = (struct ipa_hw_hdr_proc_ctx_add_hdr_seq *) |
| 1168 | (base + offset); |
| 1169 | ctx->hdr_add.tlv.type = IPA_PROC_CTX_TLV_TYPE_HDR_ADD; |
| 1170 | ctx->hdr_add.tlv.length = 1; |
| 1171 | ctx->hdr_add.tlv.value = hdr_len; |
| 1172 | ctx->hdr_add.hdr_addr = is_hdr_proc_ctx ? phys_base : |
| 1173 | hdr_base_addr + offset_entry->offset; |
| 1174 | IPAHAL_DBG("header address 0x%x\n", |
| 1175 | ctx->hdr_add.hdr_addr); |
| 1176 | ctx->end.type = IPA_PROC_CTX_TLV_TYPE_END; |
| 1177 | ctx->end.length = 0; |
| 1178 | ctx->end.value = 0; |
Skylar Chang | 7fa2271 | 2017-04-03 18:29:21 -0700 | [diff] [blame^] | 1179 | } else if (type == IPA_HDR_PROC_L2TP_HEADER_ADD) { |
| 1180 | struct ipa_hw_hdr_proc_ctx_add_l2tp_hdr_cmd_seq *ctx; |
| 1181 | |
| 1182 | ctx = (struct ipa_hw_hdr_proc_ctx_add_l2tp_hdr_cmd_seq *) |
| 1183 | (base + offset); |
| 1184 | ctx->hdr_add.tlv.type = IPA_PROC_CTX_TLV_TYPE_HDR_ADD; |
| 1185 | ctx->hdr_add.tlv.length = 1; |
| 1186 | ctx->hdr_add.tlv.value = hdr_len; |
| 1187 | ctx->hdr_add.hdr_addr = is_hdr_proc_ctx ? phys_base : |
| 1188 | hdr_base_addr + offset_entry->offset; |
| 1189 | IPAHAL_DBG("header address 0x%x\n", |
| 1190 | ctx->hdr_add.hdr_addr); |
| 1191 | ctx->l2tp_params.tlv.type = IPA_PROC_CTX_TLV_TYPE_PROC_CMD; |
| 1192 | ctx->l2tp_params.tlv.length = 1; |
| 1193 | ctx->l2tp_params.tlv.value = |
| 1194 | IPA_HDR_UCP_L2TP_HEADER_ADD; |
| 1195 | ctx->l2tp_params.l2tp_params.eth_hdr_retained = |
| 1196 | l2tp_params.hdr_add_param.eth_hdr_retained; |
| 1197 | ctx->l2tp_params.l2tp_params.input_ip_version = |
| 1198 | l2tp_params.hdr_add_param.input_ip_version; |
| 1199 | ctx->l2tp_params.l2tp_params.output_ip_version = |
| 1200 | l2tp_params.hdr_add_param.output_ip_version; |
| 1201 | |
| 1202 | IPAHAL_DBG("command id %d\n", ctx->l2tp_params.tlv.value); |
| 1203 | ctx->end.type = IPA_PROC_CTX_TLV_TYPE_END; |
| 1204 | ctx->end.length = 0; |
| 1205 | ctx->end.value = 0; |
| 1206 | } else if (type == IPA_HDR_PROC_L2TP_HEADER_REMOVE) { |
| 1207 | struct ipa_hw_hdr_proc_ctx_remove_l2tp_hdr_cmd_seq *ctx; |
| 1208 | |
| 1209 | ctx = (struct ipa_hw_hdr_proc_ctx_remove_l2tp_hdr_cmd_seq *) |
| 1210 | (base + offset); |
| 1211 | ctx->hdr_add.tlv.type = IPA_PROC_CTX_TLV_TYPE_HDR_ADD; |
| 1212 | ctx->hdr_add.tlv.length = 1; |
| 1213 | ctx->hdr_add.tlv.value = hdr_len; |
| 1214 | ctx->hdr_add.hdr_addr = is_hdr_proc_ctx ? phys_base : |
| 1215 | hdr_base_addr + offset_entry->offset; |
| 1216 | IPAHAL_DBG("header address 0x%x length %d\n", |
| 1217 | ctx->hdr_add.hdr_addr, ctx->hdr_add.tlv.value); |
| 1218 | ctx->l2tp_params.tlv.type = IPA_PROC_CTX_TLV_TYPE_PROC_CMD; |
| 1219 | ctx->l2tp_params.tlv.length = 1; |
| 1220 | ctx->l2tp_params.tlv.value = |
| 1221 | IPA_HDR_UCP_L2TP_HEADER_REMOVE; |
| 1222 | ctx->l2tp_params.l2tp_params.hdr_len_remove = |
| 1223 | l2tp_params.hdr_remove_param.hdr_len_remove; |
| 1224 | ctx->l2tp_params.l2tp_params.eth_hdr_retained = |
| 1225 | l2tp_params.hdr_remove_param.eth_hdr_retained; |
| 1226 | |
| 1227 | IPAHAL_DBG("command id %d\n", ctx->l2tp_params.tlv.value); |
| 1228 | ctx->end.type = IPA_PROC_CTX_TLV_TYPE_END; |
| 1229 | ctx->end.length = 0; |
| 1230 | ctx->end.value = 0; |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 1231 | } else { |
| 1232 | struct ipa_hw_hdr_proc_ctx_add_hdr_cmd_seq *ctx; |
| 1233 | |
| 1234 | ctx = (struct ipa_hw_hdr_proc_ctx_add_hdr_cmd_seq *) |
| 1235 | (base + offset); |
| 1236 | ctx->hdr_add.tlv.type = IPA_PROC_CTX_TLV_TYPE_HDR_ADD; |
| 1237 | ctx->hdr_add.tlv.length = 1; |
| 1238 | ctx->hdr_add.tlv.value = hdr_len; |
| 1239 | ctx->hdr_add.hdr_addr = is_hdr_proc_ctx ? phys_base : |
| 1240 | hdr_base_addr + offset_entry->offset; |
| 1241 | IPAHAL_DBG("header address 0x%x\n", |
| 1242 | ctx->hdr_add.hdr_addr); |
| 1243 | ctx->cmd.type = IPA_PROC_CTX_TLV_TYPE_PROC_CMD; |
| 1244 | ctx->cmd.length = 0; |
| 1245 | switch (type) { |
| 1246 | case IPA_HDR_PROC_ETHII_TO_ETHII: |
| 1247 | ctx->cmd.value = IPA_HDR_UCP_ETHII_TO_ETHII; |
| 1248 | break; |
| 1249 | case IPA_HDR_PROC_ETHII_TO_802_3: |
| 1250 | ctx->cmd.value = IPA_HDR_UCP_ETHII_TO_802_3; |
| 1251 | break; |
| 1252 | case IPA_HDR_PROC_802_3_TO_ETHII: |
| 1253 | ctx->cmd.value = IPA_HDR_UCP_802_3_TO_ETHII; |
| 1254 | break; |
| 1255 | case IPA_HDR_PROC_802_3_TO_802_3: |
| 1256 | ctx->cmd.value = IPA_HDR_UCP_802_3_TO_802_3; |
| 1257 | break; |
| 1258 | default: |
| 1259 | IPAHAL_ERR("unknown ipa_hdr_proc_type %d", type); |
| 1260 | WARN_ON(1); |
| 1261 | return -EINVAL; |
| 1262 | } |
| 1263 | IPAHAL_DBG("command id %d\n", ctx->cmd.value); |
| 1264 | ctx->end.type = IPA_PROC_CTX_TLV_TYPE_END; |
| 1265 | ctx->end.length = 0; |
| 1266 | ctx->end.value = 0; |
| 1267 | } |
| 1268 | |
| 1269 | return 0; |
| 1270 | } |
| 1271 | |
| 1272 | /* |
| 1273 | * ipahal_get_proc_ctx_needed_len_v3() - calculates the needed length for |
| 1274 | * addition of header processing context according to the type of processing |
| 1275 | * context. |
| 1276 | * @type: header processing context type (no processing context, |
| 1277 | * IPA_HDR_PROC_ETHII_TO_ETHII etc.) |
| 1278 | */ |
| 1279 | static int ipahal_get_proc_ctx_needed_len_v3(enum ipa_hdr_proc_type type) |
| 1280 | { |
| 1281 | return (type == IPA_HDR_PROC_NONE) ? |
| 1282 | sizeof(struct ipa_hw_hdr_proc_ctx_add_hdr_seq) : |
| 1283 | sizeof(struct ipa_hw_hdr_proc_ctx_add_hdr_cmd_seq); |
| 1284 | } |
| 1285 | |
| 1286 | /* |
| 1287 | * struct ipahal_hdr_funcs - headers handling functions for specific IPA |
| 1288 | * version |
| 1289 | * @ipahal_cp_hdr_to_hw_buff - copy function for regular headers |
| 1290 | */ |
| 1291 | struct ipahal_hdr_funcs { |
| 1292 | void (*ipahal_cp_hdr_to_hw_buff)(void *const base, u32 offset, |
| 1293 | u8 *const hdr, u32 hdr_len); |
| 1294 | |
| 1295 | int (*ipahal_cp_proc_ctx_to_hw_buff)(enum ipa_hdr_proc_type type, |
| 1296 | void *const base, u32 offset, u32 hdr_len, |
| 1297 | bool is_hdr_proc_ctx, dma_addr_t phys_base, |
| 1298 | u32 hdr_base_addr, |
Skylar Chang | 7fa2271 | 2017-04-03 18:29:21 -0700 | [diff] [blame^] | 1299 | struct ipa_hdr_offset_entry *offset_entry, |
| 1300 | union ipa_l2tp_hdr_proc_ctx_params l2tp_params); |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 1301 | |
| 1302 | int (*ipahal_get_proc_ctx_needed_len)(enum ipa_hdr_proc_type type); |
| 1303 | }; |
| 1304 | |
| 1305 | static struct ipahal_hdr_funcs hdr_funcs; |
| 1306 | |
| 1307 | static void ipahal_hdr_init(enum ipa_hw_type ipa_hw_type) |
| 1308 | { |
| 1309 | |
| 1310 | IPAHAL_DBG("Entry - HW_TYPE=%d\n", ipa_hw_type); |
| 1311 | |
| 1312 | /* |
| 1313 | * once there are changes in HW and need to use different case, insert |
| 1314 | * new case for the new h/w. put the default always for the latest HW |
| 1315 | * and make sure all previous supported versions have their cases. |
| 1316 | */ |
| 1317 | switch (ipa_hw_type) { |
| 1318 | case IPA_HW_v3_0: |
| 1319 | default: |
| 1320 | hdr_funcs.ipahal_cp_hdr_to_hw_buff = |
| 1321 | ipahal_cp_hdr_to_hw_buff_v3; |
| 1322 | hdr_funcs.ipahal_cp_proc_ctx_to_hw_buff = |
| 1323 | ipahal_cp_proc_ctx_to_hw_buff_v3; |
| 1324 | hdr_funcs.ipahal_get_proc_ctx_needed_len = |
| 1325 | ipahal_get_proc_ctx_needed_len_v3; |
| 1326 | } |
| 1327 | IPAHAL_DBG("Exit\n"); |
| 1328 | } |
| 1329 | |
| 1330 | /* |
| 1331 | * ipahal_cp_hdr_to_hw_buff() - copy header to hardware buffer according to |
| 1332 | * base address and offset given. |
| 1333 | * @base: dma base address |
| 1334 | * @offset: offset from base address where the data will be copied |
| 1335 | * @hdr: the header to be copied |
| 1336 | * @hdr_len: the length of the header |
| 1337 | */ |
| 1338 | void ipahal_cp_hdr_to_hw_buff(void *base, u32 offset, u8 *const hdr, |
| 1339 | u32 hdr_len) |
| 1340 | { |
| 1341 | IPAHAL_DBG_LOW("Entry\n"); |
| 1342 | IPAHAL_DBG("base %p, offset %d, hdr %p, hdr_len %d\n", base, |
| 1343 | offset, hdr, hdr_len); |
| 1344 | if (!base || !hdr_len || !hdr) { |
| 1345 | IPAHAL_ERR("failed on validating params"); |
| 1346 | return; |
| 1347 | } |
| 1348 | |
| 1349 | hdr_funcs.ipahal_cp_hdr_to_hw_buff(base, offset, hdr, hdr_len); |
| 1350 | |
| 1351 | IPAHAL_DBG_LOW("Exit\n"); |
| 1352 | } |
| 1353 | |
| 1354 | /* |
| 1355 | * ipahal_cp_proc_ctx_to_hw_buff() - copy processing context to |
| 1356 | * base address and offset given. |
| 1357 | * @type: type of header processing context |
| 1358 | * @base: dma base address |
| 1359 | * @offset: offset from base address where the data will be copied |
| 1360 | * @hdr_len: the length of the header |
| 1361 | * @is_hdr_proc_ctx: header is located in phys_base (true) or hdr_base_addr |
| 1362 | * @phys_base: memory location in DDR |
| 1363 | * @hdr_base_addr: base address in table |
| 1364 | * @offset_entry: offset from hdr_base_addr in table |
Skylar Chang | 7fa2271 | 2017-04-03 18:29:21 -0700 | [diff] [blame^] | 1365 | * @l2tp_params: l2tp parameters |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 1366 | */ |
| 1367 | int ipahal_cp_proc_ctx_to_hw_buff(enum ipa_hdr_proc_type type, |
| 1368 | void *const base, u32 offset, u32 hdr_len, |
| 1369 | bool is_hdr_proc_ctx, dma_addr_t phys_base, |
Skylar Chang | 7fa2271 | 2017-04-03 18:29:21 -0700 | [diff] [blame^] | 1370 | u32 hdr_base_addr, struct ipa_hdr_offset_entry *offset_entry, |
| 1371 | union ipa_l2tp_hdr_proc_ctx_params l2tp_params) |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 1372 | { |
| 1373 | IPAHAL_DBG( |
| 1374 | "type %d, base %p, offset %d, hdr_len %d, is_hdr_proc_ctx %d, hdr_base_addr %d, offset_entry %p\n" |
| 1375 | , type, base, offset, hdr_len, is_hdr_proc_ctx, |
| 1376 | hdr_base_addr, offset_entry); |
| 1377 | |
| 1378 | if (!base || |
| 1379 | !hdr_len || |
Gidon Studinski | 3021a6f | 2016-11-10 12:48:48 +0200 | [diff] [blame] | 1380 | (is_hdr_proc_ctx && !phys_base) || |
| 1381 | (!is_hdr_proc_ctx && !offset_entry) || |
| 1382 | (!is_hdr_proc_ctx && !hdr_base_addr)) { |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 1383 | IPAHAL_ERR( |
| 1384 | "invalid input: hdr_len:%u phys_base:%pad hdr_base_addr:%u is_hdr_proc_ctx:%d offset_entry:%pK\n" |
| 1385 | , hdr_len, &phys_base, hdr_base_addr |
| 1386 | , is_hdr_proc_ctx, offset_entry); |
| 1387 | return -EINVAL; |
| 1388 | } |
| 1389 | |
| 1390 | return hdr_funcs.ipahal_cp_proc_ctx_to_hw_buff(type, base, offset, |
| 1391 | hdr_len, is_hdr_proc_ctx, phys_base, |
Skylar Chang | 7fa2271 | 2017-04-03 18:29:21 -0700 | [diff] [blame^] | 1392 | hdr_base_addr, offset_entry, l2tp_params); |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 1393 | } |
| 1394 | |
| 1395 | /* |
| 1396 | * ipahal_get_proc_ctx_needed_len() - calculates the needed length for |
| 1397 | * addition of header processing context according to the type of processing |
| 1398 | * context |
| 1399 | * @type: header processing context type (no processing context, |
| 1400 | * IPA_HDR_PROC_ETHII_TO_ETHII etc.) |
| 1401 | */ |
| 1402 | int ipahal_get_proc_ctx_needed_len(enum ipa_hdr_proc_type type) |
| 1403 | { |
| 1404 | int res; |
| 1405 | |
| 1406 | IPAHAL_DBG("entry\n"); |
| 1407 | |
| 1408 | res = hdr_funcs.ipahal_get_proc_ctx_needed_len(type); |
| 1409 | |
| 1410 | IPAHAL_DBG("Exit\n"); |
| 1411 | |
| 1412 | return res; |
| 1413 | } |
| 1414 | |
Ghanim Fodi | 37b6495 | 2017-01-24 15:42:30 +0200 | [diff] [blame] | 1415 | /* |
| 1416 | * Get IPA Data Processing Star image memory size at IPA SRAM |
| 1417 | */ |
| 1418 | u32 ipahal_get_dps_img_mem_size(void) |
| 1419 | { |
| 1420 | return IPA_HW_DPS_IMG_MEM_SIZE_V3_0; |
| 1421 | } |
| 1422 | |
| 1423 | /* |
| 1424 | * Get IPA Header Processing Star image memory size at IPA SRAM |
| 1425 | */ |
| 1426 | u32 ipahal_get_hps_img_mem_size(void) |
| 1427 | { |
| 1428 | return IPA_HW_HPS_IMG_MEM_SIZE_V3_0; |
| 1429 | } |
Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 1430 | |
| 1431 | int ipahal_init(enum ipa_hw_type ipa_hw_type, void __iomem *base, |
| 1432 | struct device *ipa_pdev) |
| 1433 | { |
| 1434 | int result; |
| 1435 | |
| 1436 | IPAHAL_DBG("Entry - IPA HW TYPE=%d base=%p ipa_pdev=%p\n", |
| 1437 | ipa_hw_type, base, ipa_pdev); |
| 1438 | |
| 1439 | ipahal_ctx = kzalloc(sizeof(*ipahal_ctx), GFP_KERNEL); |
| 1440 | if (!ipahal_ctx) { |
| 1441 | IPAHAL_ERR("kzalloc err for ipahal_ctx\n"); |
| 1442 | result = -ENOMEM; |
| 1443 | goto bail_err_exit; |
| 1444 | } |
| 1445 | |
| 1446 | if (ipa_hw_type < IPA_HW_v3_0) { |
| 1447 | IPAHAL_ERR("ipahal supported on IPAv3 and later only\n"); |
| 1448 | result = -EINVAL; |
| 1449 | goto bail_free_ctx; |
| 1450 | } |
| 1451 | |
| 1452 | if (ipa_hw_type >= IPA_HW_MAX) { |
| 1453 | IPAHAL_ERR("invalid IPA HW type (%d)\n", ipa_hw_type); |
| 1454 | result = -EINVAL; |
| 1455 | goto bail_free_ctx; |
| 1456 | } |
| 1457 | |
| 1458 | if (!base) { |
| 1459 | IPAHAL_ERR("invalid memory io mapping addr\n"); |
| 1460 | result = -EINVAL; |
| 1461 | goto bail_free_ctx; |
| 1462 | } |
| 1463 | |
| 1464 | if (!ipa_pdev) { |
| 1465 | IPAHAL_ERR("invalid IPA platform device\n"); |
| 1466 | result = -EINVAL; |
| 1467 | goto bail_free_ctx; |
| 1468 | } |
| 1469 | |
| 1470 | ipahal_ctx->hw_type = ipa_hw_type; |
| 1471 | ipahal_ctx->base = base; |
| 1472 | ipahal_ctx->ipa_pdev = ipa_pdev; |
| 1473 | |
| 1474 | if (ipahal_reg_init(ipa_hw_type)) { |
| 1475 | IPAHAL_ERR("failed to init ipahal reg\n"); |
| 1476 | result = -EFAULT; |
| 1477 | goto bail_free_ctx; |
| 1478 | } |
| 1479 | |
| 1480 | if (ipahal_imm_cmd_init(ipa_hw_type)) { |
| 1481 | IPAHAL_ERR("failed to init ipahal imm cmd\n"); |
| 1482 | result = -EFAULT; |
| 1483 | goto bail_free_ctx; |
| 1484 | } |
| 1485 | |
| 1486 | if (ipahal_pkt_status_init(ipa_hw_type)) { |
| 1487 | IPAHAL_ERR("failed to init ipahal pkt status\n"); |
| 1488 | result = -EFAULT; |
| 1489 | goto bail_free_ctx; |
| 1490 | } |
| 1491 | |
| 1492 | ipahal_hdr_init(ipa_hw_type); |
| 1493 | |
| 1494 | if (ipahal_fltrt_init(ipa_hw_type)) { |
| 1495 | IPAHAL_ERR("failed to init ipahal flt rt\n"); |
| 1496 | result = -EFAULT; |
| 1497 | goto bail_free_ctx; |
| 1498 | } |
| 1499 | |
| 1500 | ipahal_debugfs_init(); |
| 1501 | |
| 1502 | return 0; |
| 1503 | |
| 1504 | bail_free_ctx: |
| 1505 | kfree(ipahal_ctx); |
| 1506 | ipahal_ctx = NULL; |
| 1507 | bail_err_exit: |
| 1508 | return result; |
| 1509 | } |
| 1510 | |
| 1511 | void ipahal_destroy(void) |
| 1512 | { |
| 1513 | IPAHAL_DBG("Entry\n"); |
| 1514 | ipahal_fltrt_destroy(); |
| 1515 | ipahal_debugfs_remove(); |
| 1516 | kfree(ipahal_ctx); |
| 1517 | ipahal_ctx = NULL; |
| 1518 | } |
| 1519 | |
| 1520 | void ipahal_free_dma_mem(struct ipa_mem_buffer *mem) |
| 1521 | { |
| 1522 | if (likely(mem)) { |
| 1523 | dma_free_coherent(ipahal_ctx->ipa_pdev, mem->size, mem->base, |
| 1524 | mem->phys_base); |
| 1525 | mem->size = 0; |
| 1526 | mem->base = NULL; |
| 1527 | mem->phys_base = 0; |
| 1528 | } |
| 1529 | } |