blob: 4f08ee8c17b49b88aea644207d2c57e8d6092b2c [file] [log] [blame]
Chris Leechc13c8262006-05-23 17:18:44 -07001/*
2 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free
6 * Software Foundation; either version 2 of the License, or (at your option)
7 * any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59
16 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called COPYING.
20 */
21
22/*
23 * This code implements the DMA subsystem. It provides a HW-neutral interface
24 * for other kernel code to use asynchronous memory copy capabilities,
25 * if present, and allows different HW DMA drivers to register as providing
26 * this capability.
27 *
28 * Due to the fact we are accelerating what is already a relatively fast
29 * operation, the code goes to great lengths to avoid additional overhead,
30 * such as locking.
31 *
32 * LOCKING:
33 *
Dan Williamsaa1e6f12009-01-06 11:38:17 -070034 * The subsystem keeps a global list of dma_device structs it is protected by a
35 * mutex, dma_list_mutex.
Chris Leechc13c8262006-05-23 17:18:44 -070036 *
Dan Williamsf27c5802009-01-06 11:38:18 -070037 * A subsystem can get access to a channel by calling dmaengine_get() followed
38 * by dma_find_channel(), or if it has need for an exclusive channel it can call
39 * dma_request_channel(). Once a channel is allocated a reference is taken
40 * against its corresponding driver to disable removal.
41 *
Chris Leechc13c8262006-05-23 17:18:44 -070042 * Each device has a channels list, which runs unlocked but is never modified
43 * once the device is registered, it's just setup by the driver.
44 *
Dan Williamsf27c5802009-01-06 11:38:18 -070045 * See Documentation/dmaengine.txt for more details
Chris Leechc13c8262006-05-23 17:18:44 -070046 */
47
Joe Perches63433252012-07-18 09:51:28 -070048#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
49
Alexey Dobriyanb7f080c2011-06-16 11:01:34 +000050#include <linux/dma-mapping.h>
Chris Leechc13c8262006-05-23 17:18:44 -070051#include <linux/init.h>
52#include <linux/module.h>
Dan Williams7405f742007-01-02 11:10:43 -070053#include <linux/mm.h>
Chris Leechc13c8262006-05-23 17:18:44 -070054#include <linux/device.h>
55#include <linux/dmaengine.h>
56#include <linux/hardirq.h>
57#include <linux/spinlock.h>
58#include <linux/percpu.h>
59#include <linux/rcupdate.h>
60#include <linux/mutex.h>
Dan Williams7405f742007-01-02 11:10:43 -070061#include <linux/jiffies.h>
Dan Williams2ba05622009-01-06 11:38:14 -070062#include <linux/rculist.h>
Dan Williams864498a2009-01-06 11:38:21 -070063#include <linux/idr.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090064#include <linux/slab.h>
Andy Shevchenko4e82f5d2013-04-09 14:05:44 +030065#include <linux/acpi.h>
66#include <linux/acpi_dma.h>
Jon Hunter9a6cecc2012-09-14 17:41:57 -050067#include <linux/of_dma.h>
Dan Williams45c463a2013-10-18 19:35:24 +020068#include <linux/mempool.h>
Chris Leechc13c8262006-05-23 17:18:44 -070069
70static DEFINE_MUTEX(dma_list_mutex);
Axel Lin21ef4b82011-07-20 11:32:28 +080071static DEFINE_IDR(dma_idr);
Chris Leechc13c8262006-05-23 17:18:44 -070072static LIST_HEAD(dma_device_list);
Dan Williams6f49a572009-01-06 11:38:14 -070073static long dmaengine_ref_count;
Chris Leechc13c8262006-05-23 17:18:44 -070074
75/* --- sysfs implementation --- */
76
Dan Williams41d5e592009-01-06 11:38:21 -070077/**
78 * dev_to_dma_chan - convert a device pointer to the its sysfs container object
79 * @dev - device node
80 *
81 * Must be called under dma_list_mutex
82 */
83static struct dma_chan *dev_to_dma_chan(struct device *dev)
84{
85 struct dma_chan_dev *chan_dev;
86
87 chan_dev = container_of(dev, typeof(*chan_dev), device);
88 return chan_dev->chan;
89}
90
Greg Kroah-Hartman58b267d2013-07-24 15:05:08 -070091static ssize_t memcpy_count_show(struct device *dev,
92 struct device_attribute *attr, char *buf)
Chris Leechc13c8262006-05-23 17:18:44 -070093{
Dan Williams41d5e592009-01-06 11:38:21 -070094 struct dma_chan *chan;
Chris Leechc13c8262006-05-23 17:18:44 -070095 unsigned long count = 0;
96 int i;
Dan Williams41d5e592009-01-06 11:38:21 -070097 int err;
Chris Leechc13c8262006-05-23 17:18:44 -070098
Dan Williams41d5e592009-01-06 11:38:21 -070099 mutex_lock(&dma_list_mutex);
100 chan = dev_to_dma_chan(dev);
101 if (chan) {
102 for_each_possible_cpu(i)
103 count += per_cpu_ptr(chan->local, i)->memcpy_count;
104 err = sprintf(buf, "%lu\n", count);
105 } else
106 err = -ENODEV;
107 mutex_unlock(&dma_list_mutex);
Chris Leechc13c8262006-05-23 17:18:44 -0700108
Dan Williams41d5e592009-01-06 11:38:21 -0700109 return err;
Chris Leechc13c8262006-05-23 17:18:44 -0700110}
Greg Kroah-Hartman58b267d2013-07-24 15:05:08 -0700111static DEVICE_ATTR_RO(memcpy_count);
Chris Leechc13c8262006-05-23 17:18:44 -0700112
Greg Kroah-Hartman58b267d2013-07-24 15:05:08 -0700113static ssize_t bytes_transferred_show(struct device *dev,
114 struct device_attribute *attr, char *buf)
Chris Leechc13c8262006-05-23 17:18:44 -0700115{
Dan Williams41d5e592009-01-06 11:38:21 -0700116 struct dma_chan *chan;
Chris Leechc13c8262006-05-23 17:18:44 -0700117 unsigned long count = 0;
118 int i;
Dan Williams41d5e592009-01-06 11:38:21 -0700119 int err;
Chris Leechc13c8262006-05-23 17:18:44 -0700120
Dan Williams41d5e592009-01-06 11:38:21 -0700121 mutex_lock(&dma_list_mutex);
122 chan = dev_to_dma_chan(dev);
123 if (chan) {
124 for_each_possible_cpu(i)
125 count += per_cpu_ptr(chan->local, i)->bytes_transferred;
126 err = sprintf(buf, "%lu\n", count);
127 } else
128 err = -ENODEV;
129 mutex_unlock(&dma_list_mutex);
Chris Leechc13c8262006-05-23 17:18:44 -0700130
Dan Williams41d5e592009-01-06 11:38:21 -0700131 return err;
Chris Leechc13c8262006-05-23 17:18:44 -0700132}
Greg Kroah-Hartman58b267d2013-07-24 15:05:08 -0700133static DEVICE_ATTR_RO(bytes_transferred);
Chris Leechc13c8262006-05-23 17:18:44 -0700134
Greg Kroah-Hartman58b267d2013-07-24 15:05:08 -0700135static ssize_t in_use_show(struct device *dev, struct device_attribute *attr,
136 char *buf)
Chris Leechc13c8262006-05-23 17:18:44 -0700137{
Dan Williams41d5e592009-01-06 11:38:21 -0700138 struct dma_chan *chan;
139 int err;
Chris Leechc13c8262006-05-23 17:18:44 -0700140
Dan Williams41d5e592009-01-06 11:38:21 -0700141 mutex_lock(&dma_list_mutex);
142 chan = dev_to_dma_chan(dev);
143 if (chan)
144 err = sprintf(buf, "%d\n", chan->client_count);
145 else
146 err = -ENODEV;
147 mutex_unlock(&dma_list_mutex);
148
149 return err;
Chris Leechc13c8262006-05-23 17:18:44 -0700150}
Greg Kroah-Hartman58b267d2013-07-24 15:05:08 -0700151static DEVICE_ATTR_RO(in_use);
Chris Leechc13c8262006-05-23 17:18:44 -0700152
Greg Kroah-Hartman58b267d2013-07-24 15:05:08 -0700153static struct attribute *dma_dev_attrs[] = {
154 &dev_attr_memcpy_count.attr,
155 &dev_attr_bytes_transferred.attr,
156 &dev_attr_in_use.attr,
157 NULL,
Chris Leechc13c8262006-05-23 17:18:44 -0700158};
Greg Kroah-Hartman58b267d2013-07-24 15:05:08 -0700159ATTRIBUTE_GROUPS(dma_dev);
Chris Leechc13c8262006-05-23 17:18:44 -0700160
Dan Williams41d5e592009-01-06 11:38:21 -0700161static void chan_dev_release(struct device *dev)
162{
163 struct dma_chan_dev *chan_dev;
164
165 chan_dev = container_of(dev, typeof(*chan_dev), device);
Dan Williams864498a2009-01-06 11:38:21 -0700166 if (atomic_dec_and_test(chan_dev->idr_ref)) {
167 mutex_lock(&dma_list_mutex);
168 idr_remove(&dma_idr, chan_dev->dev_id);
169 mutex_unlock(&dma_list_mutex);
170 kfree(chan_dev->idr_ref);
171 }
Dan Williams41d5e592009-01-06 11:38:21 -0700172 kfree(chan_dev);
173}
174
Chris Leechc13c8262006-05-23 17:18:44 -0700175static struct class dma_devclass = {
Tony Jones891f78e2007-09-25 02:03:03 +0200176 .name = "dma",
Greg Kroah-Hartman58b267d2013-07-24 15:05:08 -0700177 .dev_groups = dma_dev_groups,
Dan Williams41d5e592009-01-06 11:38:21 -0700178 .dev_release = chan_dev_release,
Chris Leechc13c8262006-05-23 17:18:44 -0700179};
180
181/* --- client and device registration --- */
182
Dan Williams59b5ec22009-01-06 11:38:15 -0700183#define dma_device_satisfies_mask(device, mask) \
184 __dma_device_satisfies_mask((device), &(mask))
Dan Williamsd379b012007-07-09 11:56:42 -0700185static int
Lars-Peter Clausena53e28d2013-03-25 13:23:52 +0100186__dma_device_satisfies_mask(struct dma_device *device,
187 const dma_cap_mask_t *want)
Dan Williamsd379b012007-07-09 11:56:42 -0700188{
189 dma_cap_mask_t has;
190
Dan Williams59b5ec22009-01-06 11:38:15 -0700191 bitmap_and(has.bits, want->bits, device->cap_mask.bits,
Dan Williamsd379b012007-07-09 11:56:42 -0700192 DMA_TX_TYPE_END);
193 return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END);
194}
195
Dan Williams6f49a572009-01-06 11:38:14 -0700196static struct module *dma_chan_to_owner(struct dma_chan *chan)
197{
198 return chan->device->dev->driver->owner;
199}
200
201/**
202 * balance_ref_count - catch up the channel reference count
203 * @chan - channel to balance ->client_count versus dmaengine_ref_count
204 *
205 * balance_ref_count must be called under dma_list_mutex
206 */
207static void balance_ref_count(struct dma_chan *chan)
208{
209 struct module *owner = dma_chan_to_owner(chan);
210
211 while (chan->client_count < dmaengine_ref_count) {
212 __module_get(owner);
213 chan->client_count++;
214 }
215}
216
217/**
218 * dma_chan_get - try to grab a dma channel's parent driver module
219 * @chan - channel to grab
220 *
221 * Must be called under dma_list_mutex
222 */
223static int dma_chan_get(struct dma_chan *chan)
224{
225 int err = -ENODEV;
226 struct module *owner = dma_chan_to_owner(chan);
227
228 if (chan->client_count) {
229 __module_get(owner);
230 err = 0;
231 } else if (try_module_get(owner))
232 err = 0;
233
234 if (err == 0)
235 chan->client_count++;
236
237 /* allocate upon first client reference */
238 if (chan->client_count == 1 && err == 0) {
Dan Williamsaa1e6f12009-01-06 11:38:17 -0700239 int desc_cnt = chan->device->device_alloc_chan_resources(chan);
Dan Williams6f49a572009-01-06 11:38:14 -0700240
241 if (desc_cnt < 0) {
242 err = desc_cnt;
243 chan->client_count = 0;
244 module_put(owner);
Dan Williams59b5ec22009-01-06 11:38:15 -0700245 } else if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask))
Dan Williams6f49a572009-01-06 11:38:14 -0700246 balance_ref_count(chan);
247 }
248
249 return err;
250}
251
252/**
253 * dma_chan_put - drop a reference to a dma channel's parent driver module
254 * @chan - channel to release
255 *
256 * Must be called under dma_list_mutex
257 */
258static void dma_chan_put(struct dma_chan *chan)
259{
260 if (!chan->client_count)
261 return; /* this channel failed alloc_chan_resources */
262 chan->client_count--;
263 module_put(dma_chan_to_owner(chan));
264 if (chan->client_count == 0)
265 chan->device->device_free_chan_resources(chan);
266}
267
Dan Williams7405f742007-01-02 11:10:43 -0700268enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
269{
270 enum dma_status status;
271 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
272
273 dma_async_issue_pending(chan);
274 do {
275 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
276 if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
Joe Perches63433252012-07-18 09:51:28 -0700277 pr_err("%s: timeout!\n", __func__);
Dan Williams7405f742007-01-02 11:10:43 -0700278 return DMA_ERROR;
279 }
Bartlomiej Zolnierkiewicz2cbe7fe2012-11-08 10:02:07 +0000280 if (status != DMA_IN_PROGRESS)
281 break;
282 cpu_relax();
283 } while (1);
Dan Williams7405f742007-01-02 11:10:43 -0700284
285 return status;
286}
287EXPORT_SYMBOL(dma_sync_wait);
288
Chris Leechc13c8262006-05-23 17:18:44 -0700289/**
Dan Williamsbec08512009-01-06 11:38:14 -0700290 * dma_cap_mask_all - enable iteration over all operation types
291 */
292static dma_cap_mask_t dma_cap_mask_all;
293
294/**
295 * dma_chan_tbl_ent - tracks channel allocations per core/operation
296 * @chan - associated channel for this entry
297 */
298struct dma_chan_tbl_ent {
299 struct dma_chan *chan;
300};
301
302/**
303 * channel_table - percpu lookup table for memory-to-memory offload providers
304 */
Tejun Heoa29d8b82010-02-02 14:39:15 +0900305static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END];
Dan Williamsbec08512009-01-06 11:38:14 -0700306
307static int __init dma_channel_table_init(void)
308{
309 enum dma_transaction_type cap;
310 int err = 0;
311
312 bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END);
313
Dan Williams59b5ec22009-01-06 11:38:15 -0700314 /* 'interrupt', 'private', and 'slave' are channel capabilities,
315 * but are not associated with an operation so they do not need
316 * an entry in the channel_table
Dan Williamsbec08512009-01-06 11:38:14 -0700317 */
318 clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits);
Dan Williams59b5ec22009-01-06 11:38:15 -0700319 clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits);
Dan Williamsbec08512009-01-06 11:38:14 -0700320 clear_bit(DMA_SLAVE, dma_cap_mask_all.bits);
321
322 for_each_dma_cap_mask(cap, dma_cap_mask_all) {
323 channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent);
324 if (!channel_table[cap]) {
325 err = -ENOMEM;
326 break;
327 }
328 }
329
330 if (err) {
Joe Perches63433252012-07-18 09:51:28 -0700331 pr_err("initialization failure\n");
Dan Williamsbec08512009-01-06 11:38:14 -0700332 for_each_dma_cap_mask(cap, dma_cap_mask_all)
333 if (channel_table[cap])
334 free_percpu(channel_table[cap]);
335 }
336
337 return err;
338}
Dan Williams652afc22009-01-06 11:38:22 -0700339arch_initcall(dma_channel_table_init);
Dan Williamsbec08512009-01-06 11:38:14 -0700340
341/**
342 * dma_find_channel - find a channel to carry out the operation
343 * @tx_type: transaction type
344 */
345struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
346{
Christoph Lametere7dcaa42009-10-03 19:48:23 +0900347 return this_cpu_read(channel_table[tx_type]->chan);
Dan Williamsbec08512009-01-06 11:38:14 -0700348}
349EXPORT_SYMBOL(dma_find_channel);
350
Dave Jianga2bd1142012-04-04 16:10:46 -0700351/*
352 * net_dma_find_channel - find a channel for net_dma
353 * net_dma has alignment requirements
354 */
355struct dma_chan *net_dma_find_channel(void)
356{
357 struct dma_chan *chan = dma_find_channel(DMA_MEMCPY);
358 if (chan && !is_dma_copy_aligned(chan->device, 1, 1, 1))
359 return NULL;
360
361 return chan;
362}
363EXPORT_SYMBOL(net_dma_find_channel);
364
Dan Williamsbec08512009-01-06 11:38:14 -0700365/**
Dan Williams2ba05622009-01-06 11:38:14 -0700366 * dma_issue_pending_all - flush all pending operations across all channels
367 */
368void dma_issue_pending_all(void)
369{
370 struct dma_device *device;
371 struct dma_chan *chan;
372
Dan Williams2ba05622009-01-06 11:38:14 -0700373 rcu_read_lock();
Dan Williams59b5ec22009-01-06 11:38:15 -0700374 list_for_each_entry_rcu(device, &dma_device_list, global_node) {
375 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
376 continue;
Dan Williams2ba05622009-01-06 11:38:14 -0700377 list_for_each_entry(chan, &device->channels, device_node)
378 if (chan->client_count)
379 device->device_issue_pending(chan);
Dan Williams59b5ec22009-01-06 11:38:15 -0700380 }
Dan Williams2ba05622009-01-06 11:38:14 -0700381 rcu_read_unlock();
382}
383EXPORT_SYMBOL(dma_issue_pending_all);
384
385/**
Brice Goglinc4d27c42013-08-19 11:43:35 +0200386 * dma_chan_is_local - returns true if the channel is in the same numa-node as the cpu
Dan Williamsbec08512009-01-06 11:38:14 -0700387 */
Brice Goglinc4d27c42013-08-19 11:43:35 +0200388static bool dma_chan_is_local(struct dma_chan *chan, int cpu)
389{
390 int node = dev_to_node(chan->device->dev);
391 return node == -1 || cpumask_test_cpu(cpu, cpumask_of_node(node));
392}
393
394/**
395 * min_chan - returns the channel with min count and in the same numa-node as the cpu
396 * @cap: capability to match
397 * @cpu: cpu index which the channel should be close to
398 *
399 * If some channels are close to the given cpu, the one with the lowest
400 * reference count is returned. Otherwise, cpu is ignored and only the
401 * reference count is taken into account.
402 * Must be called under dma_list_mutex.
403 */
404static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu)
Dan Williamsbec08512009-01-06 11:38:14 -0700405{
406 struct dma_device *device;
407 struct dma_chan *chan;
Dan Williamsbec08512009-01-06 11:38:14 -0700408 struct dma_chan *min = NULL;
Brice Goglinc4d27c42013-08-19 11:43:35 +0200409 struct dma_chan *localmin = NULL;
Dan Williamsbec08512009-01-06 11:38:14 -0700410
411 list_for_each_entry(device, &dma_device_list, global_node) {
Dan Williams59b5ec22009-01-06 11:38:15 -0700412 if (!dma_has_cap(cap, device->cap_mask) ||
413 dma_has_cap(DMA_PRIVATE, device->cap_mask))
Dan Williamsbec08512009-01-06 11:38:14 -0700414 continue;
415 list_for_each_entry(chan, &device->channels, device_node) {
416 if (!chan->client_count)
417 continue;
Brice Goglinc4d27c42013-08-19 11:43:35 +0200418 if (!min || chan->table_count < min->table_count)
Dan Williamsbec08512009-01-06 11:38:14 -0700419 min = chan;
420
Brice Goglinc4d27c42013-08-19 11:43:35 +0200421 if (dma_chan_is_local(chan, cpu))
422 if (!localmin ||
423 chan->table_count < localmin->table_count)
424 localmin = chan;
Dan Williamsbec08512009-01-06 11:38:14 -0700425 }
Dan Williamsbec08512009-01-06 11:38:14 -0700426 }
427
Brice Goglinc4d27c42013-08-19 11:43:35 +0200428 chan = localmin ? localmin : min;
Dan Williamsbec08512009-01-06 11:38:14 -0700429
Brice Goglinc4d27c42013-08-19 11:43:35 +0200430 if (chan)
431 chan->table_count++;
Dan Williamsbec08512009-01-06 11:38:14 -0700432
Brice Goglinc4d27c42013-08-19 11:43:35 +0200433 return chan;
Dan Williamsbec08512009-01-06 11:38:14 -0700434}
435
436/**
437 * dma_channel_rebalance - redistribute the available channels
438 *
439 * Optimize for cpu isolation (each cpu gets a dedicated channel for an
440 * operation type) in the SMP case, and operation isolation (avoid
441 * multi-tasking channels) in the non-SMP case. Must be called under
442 * dma_list_mutex.
443 */
444static void dma_channel_rebalance(void)
445{
446 struct dma_chan *chan;
447 struct dma_device *device;
448 int cpu;
449 int cap;
Dan Williamsbec08512009-01-06 11:38:14 -0700450
451 /* undo the last distribution */
452 for_each_dma_cap_mask(cap, dma_cap_mask_all)
453 for_each_possible_cpu(cpu)
454 per_cpu_ptr(channel_table[cap], cpu)->chan = NULL;
455
Dan Williams59b5ec22009-01-06 11:38:15 -0700456 list_for_each_entry(device, &dma_device_list, global_node) {
457 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
458 continue;
Dan Williamsbec08512009-01-06 11:38:14 -0700459 list_for_each_entry(chan, &device->channels, device_node)
460 chan->table_count = 0;
Dan Williams59b5ec22009-01-06 11:38:15 -0700461 }
Dan Williamsbec08512009-01-06 11:38:14 -0700462
463 /* don't populate the channel_table if no clients are available */
464 if (!dmaengine_ref_count)
465 return;
466
467 /* redistribute available channels */
Dan Williamsbec08512009-01-06 11:38:14 -0700468 for_each_dma_cap_mask(cap, dma_cap_mask_all)
469 for_each_online_cpu(cpu) {
Brice Goglinc4d27c42013-08-19 11:43:35 +0200470 chan = min_chan(cap, cpu);
Dan Williamsbec08512009-01-06 11:38:14 -0700471 per_cpu_ptr(channel_table[cap], cpu)->chan = chan;
472 }
473}
474
Lars-Peter Clausena53e28d2013-03-25 13:23:52 +0100475static struct dma_chan *private_candidate(const dma_cap_mask_t *mask,
476 struct dma_device *dev,
Dan Williamse2346672009-01-06 11:38:21 -0700477 dma_filter_fn fn, void *fn_param)
Dan Williams59b5ec22009-01-06 11:38:15 -0700478{
479 struct dma_chan *chan;
Dan Williams59b5ec22009-01-06 11:38:15 -0700480
481 if (!__dma_device_satisfies_mask(dev, mask)) {
482 pr_debug("%s: wrong capabilities\n", __func__);
483 return NULL;
484 }
485 /* devices with multiple channels need special handling as we need to
486 * ensure that all channels are either private or public.
487 */
488 if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask))
489 list_for_each_entry(chan, &dev->channels, device_node) {
490 /* some channels are already publicly allocated */
491 if (chan->client_count)
492 return NULL;
493 }
494
495 list_for_each_entry(chan, &dev->channels, device_node) {
496 if (chan->client_count) {
497 pr_debug("%s: %s busy\n",
Dan Williams41d5e592009-01-06 11:38:21 -0700498 __func__, dma_chan_name(chan));
Dan Williams59b5ec22009-01-06 11:38:15 -0700499 continue;
500 }
Dan Williamse2346672009-01-06 11:38:21 -0700501 if (fn && !fn(chan, fn_param)) {
502 pr_debug("%s: %s filter said false\n",
503 __func__, dma_chan_name(chan));
504 continue;
505 }
506 return chan;
Dan Williams59b5ec22009-01-06 11:38:15 -0700507 }
508
Dan Williamse2346672009-01-06 11:38:21 -0700509 return NULL;
Dan Williams59b5ec22009-01-06 11:38:15 -0700510}
511
512/**
Daniel Mack6b9019a2013-08-14 18:35:03 +0200513 * dma_request_slave_channel - try to get specific channel exclusively
Zhangfei Gao7bb587f2013-06-28 20:39:12 +0800514 * @chan: target channel
515 */
516struct dma_chan *dma_get_slave_channel(struct dma_chan *chan)
517{
518 int err = -EBUSY;
519
520 /* lock against __dma_request_channel */
521 mutex_lock(&dma_list_mutex);
522
Vinod Kould9a6c8f2013-08-19 10:47:26 +0530523 if (chan->client_count == 0) {
Zhangfei Gao7bb587f2013-06-28 20:39:12 +0800524 err = dma_chan_get(chan);
Vinod Kould9a6c8f2013-08-19 10:47:26 +0530525 if (err)
526 pr_debug("%s: failed to get %s: (%d)\n",
527 __func__, dma_chan_name(chan), err);
528 } else
Zhangfei Gao7bb587f2013-06-28 20:39:12 +0800529 chan = NULL;
530
531 mutex_unlock(&dma_list_mutex);
532
Zhangfei Gao7bb587f2013-06-28 20:39:12 +0800533
534 return chan;
535}
536EXPORT_SYMBOL_GPL(dma_get_slave_channel);
537
Stephen Warren8010dad2013-11-26 12:40:51 -0700538struct dma_chan *dma_get_any_slave_channel(struct dma_device *device)
539{
540 dma_cap_mask_t mask;
541 struct dma_chan *chan;
542 int err;
543
544 dma_cap_zero(mask);
545 dma_cap_set(DMA_SLAVE, mask);
546
547 /* lock against __dma_request_channel */
548 mutex_lock(&dma_list_mutex);
549
550 chan = private_candidate(&mask, device, NULL, NULL);
551 if (chan) {
552 err = dma_chan_get(chan);
553 if (err) {
554 pr_debug("%s: failed to get %s: (%d)\n",
555 __func__, dma_chan_name(chan), err);
556 chan = NULL;
557 }
558 }
559
560 mutex_unlock(&dma_list_mutex);
561
562 return chan;
563}
564EXPORT_SYMBOL_GPL(dma_get_any_slave_channel);
565
Zhangfei Gao7bb587f2013-06-28 20:39:12 +0800566/**
Daniel Mack6b9019a2013-08-14 18:35:03 +0200567 * __dma_request_channel - try to allocate an exclusive channel
Dan Williams59b5ec22009-01-06 11:38:15 -0700568 * @mask: capabilities that the channel must satisfy
569 * @fn: optional callback to disposition available channels
570 * @fn_param: opaque parameter to pass to dma_filter_fn
571 */
Lars-Peter Clausena53e28d2013-03-25 13:23:52 +0100572struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
573 dma_filter_fn fn, void *fn_param)
Dan Williams59b5ec22009-01-06 11:38:15 -0700574{
575 struct dma_device *device, *_d;
576 struct dma_chan *chan = NULL;
Dan Williams59b5ec22009-01-06 11:38:15 -0700577 int err;
578
579 /* Find a channel */
580 mutex_lock(&dma_list_mutex);
581 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
Dan Williamse2346672009-01-06 11:38:21 -0700582 chan = private_candidate(mask, device, fn, fn_param);
583 if (chan) {
Dan Williams59b5ec22009-01-06 11:38:15 -0700584 /* Found a suitable channel, try to grab, prep, and
585 * return it. We first set DMA_PRIVATE to disable
586 * balance_ref_count as this channel will not be
587 * published in the general-purpose allocator
588 */
589 dma_cap_set(DMA_PRIVATE, device->cap_mask);
Atsushi Nemoto0f571512009-03-06 20:07:14 +0900590 device->privatecnt++;
Dan Williams59b5ec22009-01-06 11:38:15 -0700591 err = dma_chan_get(chan);
592
593 if (err == -ENODEV) {
Joe Perches63433252012-07-18 09:51:28 -0700594 pr_debug("%s: %s module removed\n",
595 __func__, dma_chan_name(chan));
Dan Williams59b5ec22009-01-06 11:38:15 -0700596 list_del_rcu(&device->global_node);
597 } else if (err)
Fabio Estevamd8b53482012-02-21 12:51:59 -0200598 pr_debug("%s: failed to get %s: (%d)\n",
Joe Perches63433252012-07-18 09:51:28 -0700599 __func__, dma_chan_name(chan), err);
Dan Williams59b5ec22009-01-06 11:38:15 -0700600 else
601 break;
Atsushi Nemoto0f571512009-03-06 20:07:14 +0900602 if (--device->privatecnt == 0)
603 dma_cap_clear(DMA_PRIVATE, device->cap_mask);
Dan Williamse2346672009-01-06 11:38:21 -0700604 chan = NULL;
605 }
Dan Williams59b5ec22009-01-06 11:38:15 -0700606 }
607 mutex_unlock(&dma_list_mutex);
608
Joe Perches63433252012-07-18 09:51:28 -0700609 pr_debug("%s: %s (%s)\n",
610 __func__,
611 chan ? "success" : "fail",
Dan Williams41d5e592009-01-06 11:38:21 -0700612 chan ? dma_chan_name(chan) : NULL);
Dan Williams59b5ec22009-01-06 11:38:15 -0700613
614 return chan;
615}
616EXPORT_SYMBOL_GPL(__dma_request_channel);
617
Jon Hunter9a6cecc2012-09-14 17:41:57 -0500618/**
619 * dma_request_slave_channel - try to allocate an exclusive slave channel
620 * @dev: pointer to client device structure
621 * @name: slave channel name
622 */
Markus Pargmannbef29ec2013-02-24 16:36:09 +0100623struct dma_chan *dma_request_slave_channel(struct device *dev, const char *name)
Jon Hunter9a6cecc2012-09-14 17:41:57 -0500624{
625 /* If device-tree is present get slave info from here */
626 if (dev->of_node)
627 return of_dma_request_slave_channel(dev->of_node, name);
628
Andy Shevchenko4e82f5d2013-04-09 14:05:44 +0300629 /* If device was enumerated by ACPI get slave info from here */
630 if (ACPI_HANDLE(dev))
631 return acpi_dma_request_slave_chan_by_name(dev, name);
632
Jon Hunter9a6cecc2012-09-14 17:41:57 -0500633 return NULL;
634}
635EXPORT_SYMBOL_GPL(dma_request_slave_channel);
636
Dan Williams59b5ec22009-01-06 11:38:15 -0700637void dma_release_channel(struct dma_chan *chan)
638{
639 mutex_lock(&dma_list_mutex);
640 WARN_ONCE(chan->client_count != 1,
641 "chan reference count %d != 1\n", chan->client_count);
642 dma_chan_put(chan);
Atsushi Nemoto0f571512009-03-06 20:07:14 +0900643 /* drop PRIVATE cap enabled by __dma_request_channel() */
644 if (--chan->device->privatecnt == 0)
645 dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask);
Dan Williams59b5ec22009-01-06 11:38:15 -0700646 mutex_unlock(&dma_list_mutex);
647}
648EXPORT_SYMBOL_GPL(dma_release_channel);
649
Dan Williamsbec08512009-01-06 11:38:14 -0700650/**
Dan Williams209b84a2009-01-06 11:38:17 -0700651 * dmaengine_get - register interest in dma_channels
Chris Leechc13c8262006-05-23 17:18:44 -0700652 */
Dan Williams209b84a2009-01-06 11:38:17 -0700653void dmaengine_get(void)
Chris Leechc13c8262006-05-23 17:18:44 -0700654{
Dan Williams6f49a572009-01-06 11:38:14 -0700655 struct dma_device *device, *_d;
656 struct dma_chan *chan;
657 int err;
658
Chris Leechc13c8262006-05-23 17:18:44 -0700659 mutex_lock(&dma_list_mutex);
Dan Williams6f49a572009-01-06 11:38:14 -0700660 dmaengine_ref_count++;
661
662 /* try to grab channels */
Dan Williams59b5ec22009-01-06 11:38:15 -0700663 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
664 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
665 continue;
Dan Williams6f49a572009-01-06 11:38:14 -0700666 list_for_each_entry(chan, &device->channels, device_node) {
667 err = dma_chan_get(chan);
668 if (err == -ENODEV) {
669 /* module removed before we could use it */
Dan Williams2ba05622009-01-06 11:38:14 -0700670 list_del_rcu(&device->global_node);
Dan Williams6f49a572009-01-06 11:38:14 -0700671 break;
672 } else if (err)
Fabio Estevam0eb5a352012-10-04 17:11:16 -0700673 pr_debug("%s: failed to get %s: (%d)\n",
Joe Perches63433252012-07-18 09:51:28 -0700674 __func__, dma_chan_name(chan), err);
Dan Williams6f49a572009-01-06 11:38:14 -0700675 }
Dan Williams59b5ec22009-01-06 11:38:15 -0700676 }
Dan Williams6f49a572009-01-06 11:38:14 -0700677
Dan Williamsbec08512009-01-06 11:38:14 -0700678 /* if this is the first reference and there were channels
679 * waiting we need to rebalance to get those channels
680 * incorporated into the channel table
681 */
682 if (dmaengine_ref_count == 1)
683 dma_channel_rebalance();
Chris Leechc13c8262006-05-23 17:18:44 -0700684 mutex_unlock(&dma_list_mutex);
Chris Leechc13c8262006-05-23 17:18:44 -0700685}
Dan Williams209b84a2009-01-06 11:38:17 -0700686EXPORT_SYMBOL(dmaengine_get);
Chris Leechc13c8262006-05-23 17:18:44 -0700687
688/**
Dan Williams209b84a2009-01-06 11:38:17 -0700689 * dmaengine_put - let dma drivers be removed when ref_count == 0
Chris Leechc13c8262006-05-23 17:18:44 -0700690 */
Dan Williams209b84a2009-01-06 11:38:17 -0700691void dmaengine_put(void)
Chris Leechc13c8262006-05-23 17:18:44 -0700692{
Dan Williamsd379b012007-07-09 11:56:42 -0700693 struct dma_device *device;
Chris Leechc13c8262006-05-23 17:18:44 -0700694 struct dma_chan *chan;
695
Chris Leechc13c8262006-05-23 17:18:44 -0700696 mutex_lock(&dma_list_mutex);
Dan Williams6f49a572009-01-06 11:38:14 -0700697 dmaengine_ref_count--;
698 BUG_ON(dmaengine_ref_count < 0);
699 /* drop channel references */
Dan Williams59b5ec22009-01-06 11:38:15 -0700700 list_for_each_entry(device, &dma_device_list, global_node) {
701 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
702 continue;
Dan Williams6f49a572009-01-06 11:38:14 -0700703 list_for_each_entry(chan, &device->channels, device_node)
704 dma_chan_put(chan);
Dan Williams59b5ec22009-01-06 11:38:15 -0700705 }
Chris Leechc13c8262006-05-23 17:18:44 -0700706 mutex_unlock(&dma_list_mutex);
Chris Leechc13c8262006-05-23 17:18:44 -0700707}
Dan Williams209b84a2009-01-06 11:38:17 -0700708EXPORT_SYMBOL(dmaengine_put);
Chris Leechc13c8262006-05-23 17:18:44 -0700709
Dan Williams138f4c32009-09-08 17:42:51 -0700710static bool device_has_all_tx_types(struct dma_device *device)
711{
712 /* A device that satisfies this test has channels that will never cause
713 * an async_tx channel switch event as all possible operation types can
714 * be handled.
715 */
716 #ifdef CONFIG_ASYNC_TX_DMA
717 if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask))
718 return false;
719 #endif
720
721 #if defined(CONFIG_ASYNC_MEMCPY) || defined(CONFIG_ASYNC_MEMCPY_MODULE)
722 if (!dma_has_cap(DMA_MEMCPY, device->cap_mask))
723 return false;
724 #endif
725
Dan Williams138f4c32009-09-08 17:42:51 -0700726 #if defined(CONFIG_ASYNC_XOR) || defined(CONFIG_ASYNC_XOR_MODULE)
727 if (!dma_has_cap(DMA_XOR, device->cap_mask))
728 return false;
Dan Williams7b3cc2b2009-11-19 17:10:37 -0700729
730 #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
Dan Williams4499a242009-11-19 17:10:25 -0700731 if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask))
732 return false;
Dan Williams138f4c32009-09-08 17:42:51 -0700733 #endif
Dan Williams7b3cc2b2009-11-19 17:10:37 -0700734 #endif
Dan Williams138f4c32009-09-08 17:42:51 -0700735
736 #if defined(CONFIG_ASYNC_PQ) || defined(CONFIG_ASYNC_PQ_MODULE)
737 if (!dma_has_cap(DMA_PQ, device->cap_mask))
738 return false;
Dan Williams7b3cc2b2009-11-19 17:10:37 -0700739
740 #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA
Dan Williams4499a242009-11-19 17:10:25 -0700741 if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask))
742 return false;
Dan Williams138f4c32009-09-08 17:42:51 -0700743 #endif
Dan Williams7b3cc2b2009-11-19 17:10:37 -0700744 #endif
Dan Williams138f4c32009-09-08 17:42:51 -0700745
746 return true;
747}
748
Dan Williams257b17c2009-03-25 09:13:23 -0700749static int get_dma_id(struct dma_device *device)
750{
751 int rc;
752
Dan Williams257b17c2009-03-25 09:13:23 -0700753 mutex_lock(&dma_list_mutex);
Dan Williams257b17c2009-03-25 09:13:23 -0700754
Tejun Heo69ee2662013-02-27 17:04:03 -0800755 rc = idr_alloc(&dma_idr, NULL, 0, 0, GFP_KERNEL);
756 if (rc >= 0)
757 device->dev_id = rc;
758
759 mutex_unlock(&dma_list_mutex);
760 return rc < 0 ? rc : 0;
Dan Williams257b17c2009-03-25 09:13:23 -0700761}
762
Chris Leechc13c8262006-05-23 17:18:44 -0700763/**
Randy Dunlap65088712006-07-03 19:45:31 -0700764 * dma_async_device_register - registers DMA devices found
Chris Leechc13c8262006-05-23 17:18:44 -0700765 * @device: &dma_device
766 */
767int dma_async_device_register(struct dma_device *device)
768{
Jeff Garzikff487fb2007-03-08 09:57:34 -0800769 int chancnt = 0, rc;
Chris Leechc13c8262006-05-23 17:18:44 -0700770 struct dma_chan* chan;
Dan Williams864498a2009-01-06 11:38:21 -0700771 atomic_t *idr_ref;
Chris Leechc13c8262006-05-23 17:18:44 -0700772
773 if (!device)
774 return -ENODEV;
775
Dan Williams7405f742007-01-02 11:10:43 -0700776 /* validate device routines */
777 BUG_ON(dma_has_cap(DMA_MEMCPY, device->cap_mask) &&
778 !device->device_prep_dma_memcpy);
779 BUG_ON(dma_has_cap(DMA_XOR, device->cap_mask) &&
780 !device->device_prep_dma_xor);
Dan Williams099f53c2009-04-08 14:28:37 -0700781 BUG_ON(dma_has_cap(DMA_XOR_VAL, device->cap_mask) &&
782 !device->device_prep_dma_xor_val);
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700783 BUG_ON(dma_has_cap(DMA_PQ, device->cap_mask) &&
784 !device->device_prep_dma_pq);
785 BUG_ON(dma_has_cap(DMA_PQ_VAL, device->cap_mask) &&
786 !device->device_prep_dma_pq_val);
Zhang Wei9b941c62008-03-13 17:45:28 -0700787 BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) &&
Dan Williams7405f742007-01-02 11:10:43 -0700788 !device->device_prep_dma_interrupt);
Ira Snydera86ee032010-09-30 11:46:44 +0000789 BUG_ON(dma_has_cap(DMA_SG, device->cap_mask) &&
790 !device->device_prep_dma_sg);
Sascha Hauer782bc952010-09-30 13:56:32 +0000791 BUG_ON(dma_has_cap(DMA_CYCLIC, device->cap_mask) &&
792 !device->device_prep_dma_cyclic);
Haavard Skinnemoendc0ee6432008-07-08 11:59:35 -0700793 BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) &&
Linus Walleijc3635c72010-03-26 16:44:01 -0700794 !device->device_control);
Jassi Brarb14dab72011-10-13 12:33:30 +0530795 BUG_ON(dma_has_cap(DMA_INTERLEAVE, device->cap_mask) &&
796 !device->device_prep_interleaved_dma);
Dan Williams7405f742007-01-02 11:10:43 -0700797
798 BUG_ON(!device->device_alloc_chan_resources);
799 BUG_ON(!device->device_free_chan_resources);
Linus Walleij07934482010-03-26 16:50:49 -0700800 BUG_ON(!device->device_tx_status);
Dan Williams7405f742007-01-02 11:10:43 -0700801 BUG_ON(!device->device_issue_pending);
802 BUG_ON(!device->dev);
803
Dan Williams138f4c32009-09-08 17:42:51 -0700804 /* note: this only matters in the
Dan Williams5fc6d892010-10-07 16:44:50 -0700805 * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case
Dan Williams138f4c32009-09-08 17:42:51 -0700806 */
807 if (device_has_all_tx_types(device))
808 dma_cap_set(DMA_ASYNC_TX, device->cap_mask);
809
Dan Williams864498a2009-01-06 11:38:21 -0700810 idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL);
811 if (!idr_ref)
812 return -ENOMEM;
Dan Williams257b17c2009-03-25 09:13:23 -0700813 rc = get_dma_id(device);
814 if (rc != 0) {
815 kfree(idr_ref);
Dan Williams864498a2009-01-06 11:38:21 -0700816 return rc;
Dan Williams257b17c2009-03-25 09:13:23 -0700817 }
818
819 atomic_set(idr_ref, 0);
Chris Leechc13c8262006-05-23 17:18:44 -0700820
821 /* represent channels in sysfs. Probably want devs too */
822 list_for_each_entry(chan, &device->channels, device_node) {
Dan Williams257b17c2009-03-25 09:13:23 -0700823 rc = -ENOMEM;
Chris Leechc13c8262006-05-23 17:18:44 -0700824 chan->local = alloc_percpu(typeof(*chan->local));
825 if (chan->local == NULL)
Dan Williams257b17c2009-03-25 09:13:23 -0700826 goto err_out;
Dan Williams41d5e592009-01-06 11:38:21 -0700827 chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL);
828 if (chan->dev == NULL) {
829 free_percpu(chan->local);
Dan Williams257b17c2009-03-25 09:13:23 -0700830 chan->local = NULL;
831 goto err_out;
Dan Williams41d5e592009-01-06 11:38:21 -0700832 }
Chris Leechc13c8262006-05-23 17:18:44 -0700833
834 chan->chan_id = chancnt++;
Dan Williams41d5e592009-01-06 11:38:21 -0700835 chan->dev->device.class = &dma_devclass;
836 chan->dev->device.parent = device->dev;
837 chan->dev->chan = chan;
Dan Williams864498a2009-01-06 11:38:21 -0700838 chan->dev->idr_ref = idr_ref;
839 chan->dev->dev_id = device->dev_id;
840 atomic_inc(idr_ref);
Dan Williams41d5e592009-01-06 11:38:21 -0700841 dev_set_name(&chan->dev->device, "dma%dchan%d",
Kay Sievers06190d82008-11-11 13:12:33 -0700842 device->dev_id, chan->chan_id);
Chris Leechc13c8262006-05-23 17:18:44 -0700843
Dan Williams41d5e592009-01-06 11:38:21 -0700844 rc = device_register(&chan->dev->device);
Jeff Garzikff487fb2007-03-08 09:57:34 -0800845 if (rc) {
Jeff Garzikff487fb2007-03-08 09:57:34 -0800846 free_percpu(chan->local);
847 chan->local = NULL;
Dan Williams257b17c2009-03-25 09:13:23 -0700848 kfree(chan->dev);
849 atomic_dec(idr_ref);
Jeff Garzikff487fb2007-03-08 09:57:34 -0800850 goto err_out;
851 }
Dan Williams7cc5bf92008-07-08 11:58:21 -0700852 chan->client_count = 0;
Chris Leechc13c8262006-05-23 17:18:44 -0700853 }
Dan Williams59b5ec22009-01-06 11:38:15 -0700854 device->chancnt = chancnt;
Chris Leechc13c8262006-05-23 17:18:44 -0700855
856 mutex_lock(&dma_list_mutex);
Dan Williams59b5ec22009-01-06 11:38:15 -0700857 /* take references on public channels */
858 if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask))
Dan Williams6f49a572009-01-06 11:38:14 -0700859 list_for_each_entry(chan, &device->channels, device_node) {
860 /* if clients are already waiting for channels we need
861 * to take references on their behalf
862 */
863 if (dma_chan_get(chan) == -ENODEV) {
864 /* note we can only get here for the first
865 * channel as the remaining channels are
866 * guaranteed to get a reference
867 */
868 rc = -ENODEV;
869 mutex_unlock(&dma_list_mutex);
870 goto err_out;
871 }
872 }
Dan Williams2ba05622009-01-06 11:38:14 -0700873 list_add_tail_rcu(&device->global_node, &dma_device_list);
Atsushi Nemoto0f571512009-03-06 20:07:14 +0900874 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
875 device->privatecnt++; /* Always private */
Dan Williamsbec08512009-01-06 11:38:14 -0700876 dma_channel_rebalance();
Chris Leechc13c8262006-05-23 17:18:44 -0700877 mutex_unlock(&dma_list_mutex);
878
Chris Leechc13c8262006-05-23 17:18:44 -0700879 return 0;
Jeff Garzikff487fb2007-03-08 09:57:34 -0800880
881err_out:
Dan Williams257b17c2009-03-25 09:13:23 -0700882 /* if we never registered a channel just release the idr */
883 if (atomic_read(idr_ref) == 0) {
884 mutex_lock(&dma_list_mutex);
885 idr_remove(&dma_idr, device->dev_id);
886 mutex_unlock(&dma_list_mutex);
887 kfree(idr_ref);
888 return rc;
889 }
890
Jeff Garzikff487fb2007-03-08 09:57:34 -0800891 list_for_each_entry(chan, &device->channels, device_node) {
892 if (chan->local == NULL)
893 continue;
Dan Williams41d5e592009-01-06 11:38:21 -0700894 mutex_lock(&dma_list_mutex);
895 chan->dev->chan = NULL;
896 mutex_unlock(&dma_list_mutex);
897 device_unregister(&chan->dev->device);
Jeff Garzikff487fb2007-03-08 09:57:34 -0800898 free_percpu(chan->local);
899 }
900 return rc;
Chris Leechc13c8262006-05-23 17:18:44 -0700901}
David Brownell765e3d82007-03-16 13:38:05 -0800902EXPORT_SYMBOL(dma_async_device_register);
Chris Leechc13c8262006-05-23 17:18:44 -0700903
904/**
Dan Williams6f49a572009-01-06 11:38:14 -0700905 * dma_async_device_unregister - unregister a DMA device
Randy Dunlap65088712006-07-03 19:45:31 -0700906 * @device: &dma_device
Dan Williamsf27c5802009-01-06 11:38:18 -0700907 *
908 * This routine is called by dma driver exit routines, dmaengine holds module
909 * references to prevent it being called while channels are in use.
Randy Dunlap65088712006-07-03 19:45:31 -0700910 */
911void dma_async_device_unregister(struct dma_device *device)
Chris Leechc13c8262006-05-23 17:18:44 -0700912{
913 struct dma_chan *chan;
Chris Leechc13c8262006-05-23 17:18:44 -0700914
915 mutex_lock(&dma_list_mutex);
Dan Williams2ba05622009-01-06 11:38:14 -0700916 list_del_rcu(&device->global_node);
Dan Williamsbec08512009-01-06 11:38:14 -0700917 dma_channel_rebalance();
Chris Leechc13c8262006-05-23 17:18:44 -0700918 mutex_unlock(&dma_list_mutex);
919
920 list_for_each_entry(chan, &device->channels, device_node) {
Dan Williams6f49a572009-01-06 11:38:14 -0700921 WARN_ONCE(chan->client_count,
922 "%s called while %d clients hold a reference\n",
923 __func__, chan->client_count);
Dan Williams41d5e592009-01-06 11:38:21 -0700924 mutex_lock(&dma_list_mutex);
925 chan->dev->chan = NULL;
926 mutex_unlock(&dma_list_mutex);
927 device_unregister(&chan->dev->device);
Anatolij Gustschinadef4772010-01-26 10:26:06 +0100928 free_percpu(chan->local);
Chris Leechc13c8262006-05-23 17:18:44 -0700929 }
Chris Leechc13c8262006-05-23 17:18:44 -0700930}
David Brownell765e3d82007-03-16 13:38:05 -0800931EXPORT_SYMBOL(dma_async_device_unregister);
Chris Leechc13c8262006-05-23 17:18:44 -0700932
Dan Williams45c463a2013-10-18 19:35:24 +0200933struct dmaengine_unmap_pool {
934 struct kmem_cache *cache;
935 const char *name;
936 mempool_t *pool;
937 size_t size;
938};
939
940#define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) }
941static struct dmaengine_unmap_pool unmap_pool[] = {
942 __UNMAP_POOL(2),
943 #if IS_ENABLED(CONFIG_ASYNC_TX_DMA)
944 __UNMAP_POOL(16),
945 __UNMAP_POOL(128),
946 __UNMAP_POOL(256),
947 #endif
948};
949
950static struct dmaengine_unmap_pool *__get_unmap_pool(int nr)
Dan Williams7405f742007-01-02 11:10:43 -0700951{
Dan Williams45c463a2013-10-18 19:35:24 +0200952 int order = get_count_order(nr);
Dan Williams7405f742007-01-02 11:10:43 -0700953
Dan Williams45c463a2013-10-18 19:35:24 +0200954 switch (order) {
955 case 0 ... 1:
956 return &unmap_pool[0];
957 case 2 ... 4:
958 return &unmap_pool[1];
959 case 5 ... 7:
960 return &unmap_pool[2];
961 case 8:
962 return &unmap_pool[3];
963 default:
964 BUG();
965 return NULL;
966 }
967}
Dan Williams00367312008-02-02 19:49:57 -0700968
Dan Williams45c463a2013-10-18 19:35:24 +0200969static void dmaengine_unmap(struct kref *kref)
970{
971 struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref);
972 struct device *dev = unmap->dev;
973 int cnt, i;
974
975 cnt = unmap->to_cnt;
976 for (i = 0; i < cnt; i++)
977 dma_unmap_page(dev, unmap->addr[i], unmap->len,
978 DMA_TO_DEVICE);
979 cnt += unmap->from_cnt;
980 for (; i < cnt; i++)
981 dma_unmap_page(dev, unmap->addr[i], unmap->len,
982 DMA_FROM_DEVICE);
983 cnt += unmap->bidi_cnt;
Dan Williams7476bd72013-10-18 19:35:29 +0200984 for (; i < cnt; i++) {
985 if (unmap->addr[i] == 0)
986 continue;
Dan Williams45c463a2013-10-18 19:35:24 +0200987 dma_unmap_page(dev, unmap->addr[i], unmap->len,
988 DMA_BIDIRECTIONAL);
Dan Williams7476bd72013-10-18 19:35:29 +0200989 }
Dan Williams45c463a2013-10-18 19:35:24 +0200990 mempool_free(unmap, __get_unmap_pool(cnt)->pool);
991}
992
993void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap)
994{
995 if (unmap)
996 kref_put(&unmap->kref, dmaengine_unmap);
997}
998EXPORT_SYMBOL_GPL(dmaengine_unmap_put);
999
1000static void dmaengine_destroy_unmap_pool(void)
1001{
1002 int i;
1003
1004 for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
1005 struct dmaengine_unmap_pool *p = &unmap_pool[i];
1006
1007 if (p->pool)
1008 mempool_destroy(p->pool);
1009 p->pool = NULL;
1010 if (p->cache)
1011 kmem_cache_destroy(p->cache);
1012 p->cache = NULL;
1013 }
1014}
1015
1016static int __init dmaengine_init_unmap_pool(void)
1017{
1018 int i;
1019
1020 for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
1021 struct dmaengine_unmap_pool *p = &unmap_pool[i];
1022 size_t size;
1023
1024 size = sizeof(struct dmaengine_unmap_data) +
1025 sizeof(dma_addr_t) * p->size;
1026
1027 p->cache = kmem_cache_create(p->name, size, 0,
1028 SLAB_HWCACHE_ALIGN, NULL);
1029 if (!p->cache)
1030 break;
1031 p->pool = mempool_create_slab_pool(1, p->cache);
1032 if (!p->pool)
1033 break;
Dan Williams00367312008-02-02 19:49:57 -07001034 }
Dan Williams7405f742007-01-02 11:10:43 -07001035
Dan Williams45c463a2013-10-18 19:35:24 +02001036 if (i == ARRAY_SIZE(unmap_pool))
1037 return 0;
Dan Williams7405f742007-01-02 11:10:43 -07001038
Dan Williams45c463a2013-10-18 19:35:24 +02001039 dmaengine_destroy_unmap_pool();
1040 return -ENOMEM;
Dan Williams7405f742007-01-02 11:10:43 -07001041}
Dan Williams7405f742007-01-02 11:10:43 -07001042
Dan Williams89716462013-10-18 19:35:25 +02001043struct dmaengine_unmap_data *
Dan Williams45c463a2013-10-18 19:35:24 +02001044dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags)
Dan Williams7405f742007-01-02 11:10:43 -07001045{
Dan Williams45c463a2013-10-18 19:35:24 +02001046 struct dmaengine_unmap_data *unmap;
Dan Williams7405f742007-01-02 11:10:43 -07001047
Dan Williams45c463a2013-10-18 19:35:24 +02001048 unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags);
1049 if (!unmap)
1050 return NULL;
Dan Williams00367312008-02-02 19:49:57 -07001051
Dan Williams45c463a2013-10-18 19:35:24 +02001052 memset(unmap, 0, sizeof(*unmap));
1053 kref_init(&unmap->kref);
1054 unmap->dev = dev;
Dan Williams7405f742007-01-02 11:10:43 -07001055
Dan Williams45c463a2013-10-18 19:35:24 +02001056 return unmap;
Dan Williams7405f742007-01-02 11:10:43 -07001057}
Dan Williams89716462013-10-18 19:35:25 +02001058EXPORT_SYMBOL(dmaengine_get_unmap_data);
Dan Williams7405f742007-01-02 11:10:43 -07001059
1060/**
1061 * dma_async_memcpy_pg_to_pg - offloaded copy from page to page
1062 * @chan: DMA channel to offload copy to
1063 * @dest_pg: destination page
1064 * @dest_off: offset in page to copy to
1065 * @src_pg: source page
1066 * @src_off: offset in page to copy from
1067 * @len: length
1068 *
1069 * Both @dest_page/@dest_off and @src_page/@src_off must be mappable to a bus
1070 * address according to the DMA mapping API rules for streaming mappings.
1071 * Both @dest_page/@dest_off and @src_page/@src_off must stay memory resident
1072 * (kernel memory or locked user space pages).
1073 */
1074dma_cookie_t
1075dma_async_memcpy_pg_to_pg(struct dma_chan *chan, struct page *dest_pg,
1076 unsigned int dest_off, struct page *src_pg, unsigned int src_off,
1077 size_t len)
1078{
1079 struct dma_device *dev = chan->device;
1080 struct dma_async_tx_descriptor *tx;
Dan Williams45c463a2013-10-18 19:35:24 +02001081 struct dmaengine_unmap_data *unmap;
Dan Williams7405f742007-01-02 11:10:43 -07001082 dma_cookie_t cookie;
Maciej Sosnowski4f005db2009-04-23 12:31:51 +02001083 unsigned long flags;
Dan Williams7405f742007-01-02 11:10:43 -07001084
Dan Williams45c463a2013-10-18 19:35:24 +02001085 unmap = dmaengine_get_unmap_data(dev->dev, 2, GFP_NOIO);
1086 if (!unmap)
1087 return -ENOMEM;
1088
1089 unmap->to_cnt = 1;
1090 unmap->from_cnt = 1;
1091 unmap->addr[0] = dma_map_page(dev->dev, src_pg, src_off, len,
1092 DMA_TO_DEVICE);
1093 unmap->addr[1] = dma_map_page(dev->dev, dest_pg, dest_off, len,
1094 DMA_FROM_DEVICE);
1095 unmap->len = len;
Maciej Sosnowski4f005db2009-04-23 12:31:51 +02001096 flags = DMA_CTRL_ACK;
Dan Williams45c463a2013-10-18 19:35:24 +02001097 tx = dev->device_prep_dma_memcpy(chan, unmap->addr[1], unmap->addr[0],
1098 len, flags);
Dan Williams00367312008-02-02 19:49:57 -07001099
1100 if (!tx) {
Dan Williams45c463a2013-10-18 19:35:24 +02001101 dmaengine_unmap_put(unmap);
Dan Williams7405f742007-01-02 11:10:43 -07001102 return -ENOMEM;
Dan Williams00367312008-02-02 19:49:57 -07001103 }
Dan Williams7405f742007-01-02 11:10:43 -07001104
Dan Williams45c463a2013-10-18 19:35:24 +02001105 dma_set_unmap(tx, unmap);
Dan Williams7405f742007-01-02 11:10:43 -07001106 cookie = tx->tx_submit(tx);
Dan Williams45c463a2013-10-18 19:35:24 +02001107 dmaengine_unmap_put(unmap);
Dan Williams7405f742007-01-02 11:10:43 -07001108
Christoph Lametere7dcaa42009-10-03 19:48:23 +09001109 preempt_disable();
1110 __this_cpu_add(chan->local->bytes_transferred, len);
1111 __this_cpu_inc(chan->local->memcpy_count);
1112 preempt_enable();
Dan Williams7405f742007-01-02 11:10:43 -07001113
1114 return cookie;
1115}
1116EXPORT_SYMBOL(dma_async_memcpy_pg_to_pg);
1117
Dan Williams56ea27f2013-10-18 19:35:22 +02001118/**
1119 * dma_async_memcpy_buf_to_buf - offloaded copy between virtual addresses
1120 * @chan: DMA channel to offload copy to
1121 * @dest: destination address (virtual)
1122 * @src: source address (virtual)
1123 * @len: length
1124 *
1125 * Both @dest and @src must be mappable to a bus address according to the
1126 * DMA mapping API rules for streaming mappings.
1127 * Both @dest and @src must stay memory resident (kernel memory or locked
1128 * user space pages).
1129 */
1130dma_cookie_t
1131dma_async_memcpy_buf_to_buf(struct dma_chan *chan, void *dest,
1132 void *src, size_t len)
1133{
1134 return dma_async_memcpy_pg_to_pg(chan, virt_to_page(dest),
1135 (unsigned long) dest & ~PAGE_MASK,
1136 virt_to_page(src),
1137 (unsigned long) src & ~PAGE_MASK, len);
1138}
1139EXPORT_SYMBOL(dma_async_memcpy_buf_to_buf);
1140
1141/**
1142 * dma_async_memcpy_buf_to_pg - offloaded copy from address to page
1143 * @chan: DMA channel to offload copy to
1144 * @page: destination page
1145 * @offset: offset in page to copy to
1146 * @kdata: source address (virtual)
1147 * @len: length
1148 *
1149 * Both @page/@offset and @kdata must be mappable to a bus address according
1150 * to the DMA mapping API rules for streaming mappings.
1151 * Both @page/@offset and @kdata must stay memory resident (kernel memory or
1152 * locked user space pages)
1153 */
1154dma_cookie_t
1155dma_async_memcpy_buf_to_pg(struct dma_chan *chan, struct page *page,
1156 unsigned int offset, void *kdata, size_t len)
1157{
1158 return dma_async_memcpy_pg_to_pg(chan, page, offset,
1159 virt_to_page(kdata),
1160 (unsigned long) kdata & ~PAGE_MASK, len);
1161}
1162EXPORT_SYMBOL(dma_async_memcpy_buf_to_pg);
1163
Dan Williams7405f742007-01-02 11:10:43 -07001164void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
1165 struct dma_chan *chan)
1166{
1167 tx->chan = chan;
Dan Williams5fc6d892010-10-07 16:44:50 -07001168 #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
Dan Williams7405f742007-01-02 11:10:43 -07001169 spin_lock_init(&tx->lock);
Dan Williamscaa20d972010-05-17 16:24:16 -07001170 #endif
Dan Williams7405f742007-01-02 11:10:43 -07001171}
1172EXPORT_SYMBOL(dma_async_tx_descriptor_init);
1173
Dan Williams07f22112009-01-05 17:14:31 -07001174/* dma_wait_for_async_tx - spin wait for a transaction to complete
1175 * @tx: in-flight transaction to wait on
Dan Williams07f22112009-01-05 17:14:31 -07001176 */
1177enum dma_status
1178dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
1179{
Dan Williams95475e52009-07-14 12:19:02 -07001180 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
Dan Williams07f22112009-01-05 17:14:31 -07001181
1182 if (!tx)
Vinod Kouladfedd92013-10-16 13:29:02 +05301183 return DMA_COMPLETE;
Dan Williams07f22112009-01-05 17:14:31 -07001184
Dan Williams95475e52009-07-14 12:19:02 -07001185 while (tx->cookie == -EBUSY) {
1186 if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
1187 pr_err("%s timeout waiting for descriptor submission\n",
Joe Perches63433252012-07-18 09:51:28 -07001188 __func__);
Dan Williams95475e52009-07-14 12:19:02 -07001189 return DMA_ERROR;
1190 }
1191 cpu_relax();
1192 }
1193 return dma_sync_wait(tx->chan, tx->cookie);
Dan Williams07f22112009-01-05 17:14:31 -07001194}
1195EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
1196
1197/* dma_run_dependencies - helper routine for dma drivers to process
1198 * (start) dependent operations on their target channel
1199 * @tx: transaction with dependencies
1200 */
1201void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
1202{
Dan Williamscaa20d972010-05-17 16:24:16 -07001203 struct dma_async_tx_descriptor *dep = txd_next(tx);
Dan Williams07f22112009-01-05 17:14:31 -07001204 struct dma_async_tx_descriptor *dep_next;
1205 struct dma_chan *chan;
1206
1207 if (!dep)
1208 return;
1209
Yuri Tikhonovdd59b852009-01-12 15:17:20 -07001210 /* we'll submit tx->next now, so clear the link */
Dan Williamscaa20d972010-05-17 16:24:16 -07001211 txd_clear_next(tx);
Dan Williams07f22112009-01-05 17:14:31 -07001212 chan = dep->chan;
1213
1214 /* keep submitting up until a channel switch is detected
1215 * in that case we will be called again as a result of
1216 * processing the interrupt from async_tx_channel_switch
1217 */
1218 for (; dep; dep = dep_next) {
Dan Williamscaa20d972010-05-17 16:24:16 -07001219 txd_lock(dep);
1220 txd_clear_parent(dep);
1221 dep_next = txd_next(dep);
Dan Williams07f22112009-01-05 17:14:31 -07001222 if (dep_next && dep_next->chan == chan)
Dan Williamscaa20d972010-05-17 16:24:16 -07001223 txd_clear_next(dep); /* ->next will be submitted */
Dan Williams07f22112009-01-05 17:14:31 -07001224 else
1225 dep_next = NULL; /* submit current dep and terminate */
Dan Williamscaa20d972010-05-17 16:24:16 -07001226 txd_unlock(dep);
Dan Williams07f22112009-01-05 17:14:31 -07001227
1228 dep->tx_submit(dep);
1229 }
1230
1231 chan->device->device_issue_pending(chan);
1232}
1233EXPORT_SYMBOL_GPL(dma_run_dependencies);
1234
Chris Leechc13c8262006-05-23 17:18:44 -07001235static int __init dma_bus_init(void)
1236{
Dan Williams45c463a2013-10-18 19:35:24 +02001237 int err = dmaengine_init_unmap_pool();
1238
1239 if (err)
1240 return err;
Chris Leechc13c8262006-05-23 17:18:44 -07001241 return class_register(&dma_devclass);
1242}
Dan Williams652afc22009-01-06 11:38:22 -07001243arch_initcall(dma_bus_init);
Chris Leechc13c8262006-05-23 17:18:44 -07001244
Dan Williamsbec08512009-01-06 11:38:14 -07001245