blob: 6d36c35c86f5547d7d9fe8627db9d6129af4c129 [file] [log] [blame]
Grant Likelyca632f52011-06-06 01:16:30 -06001/*
Wan ZongShun30eaed02009-12-01 14:29:20 +00002 * Copyright (c) 2009 Nuvoton technology.
3 * Wan ZongShun <mcuos.com@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
Grant Likelyca632f52011-06-06 01:16:30 -06009 */
Wan ZongShun30eaed02009-12-01 14:29:20 +000010
Axel Lin00d29522011-11-24 11:10:51 +080011#include <linux/module.h>
Wan ZongShun30eaed02009-12-01 14:29:20 +000012#include <linux/init.h>
13#include <linux/spinlock.h>
14#include <linux/workqueue.h>
15#include <linux/interrupt.h>
16#include <linux/delay.h>
17#include <linux/errno.h>
18#include <linux/err.h>
19#include <linux/clk.h>
20#include <linux/device.h>
21#include <linux/platform_device.h>
22#include <linux/gpio.h>
23#include <linux/io.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090024#include <linux/slab.h>
Wan ZongShun30eaed02009-12-01 14:29:20 +000025
26#include <linux/spi/spi.h>
27#include <linux/spi/spi_bitbang.h>
28
Arnd Bergmann54ecf4f2012-08-24 15:18:36 +020029#include <linux/platform_data/spi-nuc900.h>
Wan ZongShun30eaed02009-12-01 14:29:20 +000030
31/* usi registers offset */
32#define USI_CNT 0x00
33#define USI_DIV 0x04
34#define USI_SSR 0x08
35#define USI_RX0 0x10
36#define USI_TX0 0x10
37
38/* usi register bit */
39#define ENINT (0x01 << 17)
40#define ENFLG (0x01 << 16)
41#define TXNUM (0x03 << 8)
42#define TXNEG (0x01 << 2)
43#define RXNEG (0x01 << 1)
44#define LSB (0x01 << 10)
45#define SELECTLEV (0x01 << 2)
46#define SELECTPOL (0x01 << 31)
47#define SELECTSLAVE 0x01
48#define GOBUSY 0x01
49
50struct nuc900_spi {
51 struct spi_bitbang bitbang;
52 struct completion done;
53 void __iomem *regs;
54 int irq;
55 int len;
56 int count;
57 const unsigned char *tx;
58 unsigned char *rx;
59 struct clk *clk;
Wan ZongShun30eaed02009-12-01 14:29:20 +000060 struct spi_master *master;
Wan ZongShun30eaed02009-12-01 14:29:20 +000061 struct nuc900_spi_info *pdata;
62 spinlock_t lock;
Wan ZongShun30eaed02009-12-01 14:29:20 +000063};
64
65static inline struct nuc900_spi *to_hw(struct spi_device *sdev)
66{
67 return spi_master_get_devdata(sdev->master);
68}
69
70static void nuc900_slave_select(struct spi_device *spi, unsigned int ssr)
71{
72 struct nuc900_spi *hw = to_hw(spi);
73 unsigned int val;
74 unsigned int cs = spi->mode & SPI_CS_HIGH ? 1 : 0;
75 unsigned int cpol = spi->mode & SPI_CPOL ? 1 : 0;
76 unsigned long flags;
77
78 spin_lock_irqsave(&hw->lock, flags);
79
80 val = __raw_readl(hw->regs + USI_SSR);
81
82 if (!cs)
83 val &= ~SELECTLEV;
84 else
85 val |= SELECTLEV;
86
87 if (!ssr)
88 val &= ~SELECTSLAVE;
89 else
90 val |= SELECTSLAVE;
91
92 __raw_writel(val, hw->regs + USI_SSR);
93
94 val = __raw_readl(hw->regs + USI_CNT);
95
96 if (!cpol)
97 val &= ~SELECTPOL;
98 else
99 val |= SELECTPOL;
100
101 __raw_writel(val, hw->regs + USI_CNT);
102
103 spin_unlock_irqrestore(&hw->lock, flags);
104}
105
106static void nuc900_spi_chipsel(struct spi_device *spi, int value)
107{
108 switch (value) {
109 case BITBANG_CS_INACTIVE:
110 nuc900_slave_select(spi, 0);
111 break;
112
113 case BITBANG_CS_ACTIVE:
114 nuc900_slave_select(spi, 1);
115 break;
116 }
117}
118
119static void nuc900_spi_setup_txnum(struct nuc900_spi *hw,
120 unsigned int txnum)
121{
122 unsigned int val;
123 unsigned long flags;
124
125 spin_lock_irqsave(&hw->lock, flags);
126
127 val = __raw_readl(hw->regs + USI_CNT);
128
129 if (!txnum)
130 val &= ~TXNUM;
131 else
132 val |= txnum << 0x08;
133
134 __raw_writel(val, hw->regs + USI_CNT);
135
136 spin_unlock_irqrestore(&hw->lock, flags);
137
138}
139
140static void nuc900_spi_setup_txbitlen(struct nuc900_spi *hw,
141 unsigned int txbitlen)
142{
143 unsigned int val;
144 unsigned long flags;
145
146 spin_lock_irqsave(&hw->lock, flags);
147
148 val = __raw_readl(hw->regs + USI_CNT);
149
150 val |= (txbitlen << 0x03);
151
152 __raw_writel(val, hw->regs + USI_CNT);
153
154 spin_unlock_irqrestore(&hw->lock, flags);
155}
156
157static void nuc900_spi_gobusy(struct nuc900_spi *hw)
158{
159 unsigned int val;
160 unsigned long flags;
161
162 spin_lock_irqsave(&hw->lock, flags);
163
164 val = __raw_readl(hw->regs + USI_CNT);
165
166 val |= GOBUSY;
167
168 __raw_writel(val, hw->regs + USI_CNT);
169
170 spin_unlock_irqrestore(&hw->lock, flags);
171}
172
Wan ZongShun30eaed02009-12-01 14:29:20 +0000173static inline unsigned int hw_txbyte(struct nuc900_spi *hw, int count)
174{
175 return hw->tx ? hw->tx[count] : 0;
176}
177
178static int nuc900_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
179{
180 struct nuc900_spi *hw = to_hw(spi);
181
182 hw->tx = t->tx_buf;
183 hw->rx = t->rx_buf;
184 hw->len = t->len;
185 hw->count = 0;
186
187 __raw_writel(hw_txbyte(hw, 0x0), hw->regs + USI_TX0);
188
189 nuc900_spi_gobusy(hw);
190
191 wait_for_completion(&hw->done);
192
193 return hw->count;
194}
195
196static irqreturn_t nuc900_spi_irq(int irq, void *dev)
197{
198 struct nuc900_spi *hw = dev;
199 unsigned int status;
200 unsigned int count = hw->count;
201
202 status = __raw_readl(hw->regs + USI_CNT);
203 __raw_writel(status, hw->regs + USI_CNT);
204
205 if (status & ENFLG) {
206 hw->count++;
207
208 if (hw->rx)
209 hw->rx[count] = __raw_readl(hw->regs + USI_RX0);
210 count++;
211
212 if (count < hw->len) {
213 __raw_writel(hw_txbyte(hw, count), hw->regs + USI_TX0);
214 nuc900_spi_gobusy(hw);
215 } else {
216 complete(&hw->done);
217 }
218
219 return IRQ_HANDLED;
220 }
221
222 complete(&hw->done);
223 return IRQ_HANDLED;
224}
225
226static void nuc900_tx_edge(struct nuc900_spi *hw, unsigned int edge)
227{
228 unsigned int val;
229 unsigned long flags;
230
231 spin_lock_irqsave(&hw->lock, flags);
232
233 val = __raw_readl(hw->regs + USI_CNT);
234
235 if (edge)
236 val |= TXNEG;
237 else
238 val &= ~TXNEG;
239 __raw_writel(val, hw->regs + USI_CNT);
240
241 spin_unlock_irqrestore(&hw->lock, flags);
242}
243
244static void nuc900_rx_edge(struct nuc900_spi *hw, unsigned int edge)
245{
246 unsigned int val;
247 unsigned long flags;
248
249 spin_lock_irqsave(&hw->lock, flags);
250
251 val = __raw_readl(hw->regs + USI_CNT);
252
253 if (edge)
254 val |= RXNEG;
255 else
256 val &= ~RXNEG;
257 __raw_writel(val, hw->regs + USI_CNT);
258
259 spin_unlock_irqrestore(&hw->lock, flags);
260}
261
262static void nuc900_send_first(struct nuc900_spi *hw, unsigned int lsb)
263{
264 unsigned int val;
265 unsigned long flags;
266
267 spin_lock_irqsave(&hw->lock, flags);
268
269 val = __raw_readl(hw->regs + USI_CNT);
270
271 if (lsb)
272 val |= LSB;
273 else
274 val &= ~LSB;
275 __raw_writel(val, hw->regs + USI_CNT);
276
277 spin_unlock_irqrestore(&hw->lock, flags);
278}
279
280static void nuc900_set_sleep(struct nuc900_spi *hw, unsigned int sleep)
281{
282 unsigned int val;
283 unsigned long flags;
284
285 spin_lock_irqsave(&hw->lock, flags);
286
287 val = __raw_readl(hw->regs + USI_CNT);
288
289 if (sleep)
290 val |= (sleep << 12);
291 else
292 val &= ~(0x0f << 12);
293 __raw_writel(val, hw->regs + USI_CNT);
294
295 spin_unlock_irqrestore(&hw->lock, flags);
296}
297
298static void nuc900_enable_int(struct nuc900_spi *hw)
299{
300 unsigned int val;
301 unsigned long flags;
302
303 spin_lock_irqsave(&hw->lock, flags);
304
305 val = __raw_readl(hw->regs + USI_CNT);
306
307 val |= ENINT;
308
309 __raw_writel(val, hw->regs + USI_CNT);
310
311 spin_unlock_irqrestore(&hw->lock, flags);
312}
313
314static void nuc900_set_divider(struct nuc900_spi *hw)
315{
316 __raw_writel(hw->pdata->divider, hw->regs + USI_DIV);
317}
318
319static void nuc900_init_spi(struct nuc900_spi *hw)
320{
321 clk_enable(hw->clk);
322 spin_lock_init(&hw->lock);
323
324 nuc900_tx_edge(hw, hw->pdata->txneg);
325 nuc900_rx_edge(hw, hw->pdata->rxneg);
326 nuc900_send_first(hw, hw->pdata->lsb);
327 nuc900_set_sleep(hw, hw->pdata->sleep);
328 nuc900_spi_setup_txbitlen(hw, hw->pdata->txbitlen);
329 nuc900_spi_setup_txnum(hw, hw->pdata->txnum);
330 nuc900_set_divider(hw);
331 nuc900_enable_int(hw);
332}
333
Grant Likelyfd4a3192012-12-07 16:57:14 +0000334static int nuc900_spi_probe(struct platform_device *pdev)
Wan ZongShun30eaed02009-12-01 14:29:20 +0000335{
336 struct nuc900_spi *hw;
337 struct spi_master *master;
Axel Lin8120ff82014-02-08 11:15:57 +0800338 struct resource *res;
Wan ZongShun30eaed02009-12-01 14:29:20 +0000339 int err = 0;
340
341 master = spi_alloc_master(&pdev->dev, sizeof(struct nuc900_spi));
342 if (master == NULL) {
343 dev_err(&pdev->dev, "No memory for spi_master\n");
Jingoo Han75194592013-12-09 19:18:18 +0900344 return -ENOMEM;
Wan ZongShun30eaed02009-12-01 14:29:20 +0000345 }
346
347 hw = spi_master_get_devdata(master);
Axel Lin94c69f72013-09-10 15:43:41 +0800348 hw->master = master;
Jingoo Han8074cf02013-07-30 16:58:59 +0900349 hw->pdata = dev_get_platdata(&pdev->dev);
Wan ZongShun30eaed02009-12-01 14:29:20 +0000350
351 if (hw->pdata == NULL) {
352 dev_err(&pdev->dev, "No platform data supplied\n");
353 err = -ENOENT;
354 goto err_pdata;
355 }
356
357 platform_set_drvdata(pdev, hw);
358 init_completion(&hw->done);
359
Axel Lin044d0bb2013-08-15 14:11:21 +0800360 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
Wan ZongShun30eaed02009-12-01 14:29:20 +0000361 master->num_chipselect = hw->pdata->num_cs;
362 master->bus_num = hw->pdata->bus_num;
363 hw->bitbang.master = hw->master;
Wan ZongShun30eaed02009-12-01 14:29:20 +0000364 hw->bitbang.chipselect = nuc900_spi_chipsel;
365 hw->bitbang.txrx_bufs = nuc900_spi_txrx;
Wan ZongShun30eaed02009-12-01 14:29:20 +0000366
Axel Lin8120ff82014-02-08 11:15:57 +0800367 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
368 hw->regs = devm_ioremap_resource(&pdev->dev, res);
Jingoo Han75194592013-12-09 19:18:18 +0900369 if (IS_ERR(hw->regs)) {
370 err = PTR_ERR(hw->regs);
Wan ZongShun30eaed02009-12-01 14:29:20 +0000371 goto err_pdata;
372 }
373
Wan ZongShun30eaed02009-12-01 14:29:20 +0000374 hw->irq = platform_get_irq(pdev, 0);
375 if (hw->irq < 0) {
376 dev_err(&pdev->dev, "No IRQ specified\n");
377 err = -ENOENT;
Jingoo Han75194592013-12-09 19:18:18 +0900378 goto err_pdata;
Wan ZongShun30eaed02009-12-01 14:29:20 +0000379 }
380
Jingoo Han75194592013-12-09 19:18:18 +0900381 err = devm_request_irq(&pdev->dev, hw->irq, nuc900_spi_irq, 0,
382 pdev->name, hw);
Wan ZongShun30eaed02009-12-01 14:29:20 +0000383 if (err) {
384 dev_err(&pdev->dev, "Cannot claim IRQ\n");
Jingoo Han75194592013-12-09 19:18:18 +0900385 goto err_pdata;
Wan ZongShun30eaed02009-12-01 14:29:20 +0000386 }
387
Jingoo Han75194592013-12-09 19:18:18 +0900388 hw->clk = devm_clk_get(&pdev->dev, "spi");
Wan ZongShun30eaed02009-12-01 14:29:20 +0000389 if (IS_ERR(hw->clk)) {
390 dev_err(&pdev->dev, "No clock for device\n");
391 err = PTR_ERR(hw->clk);
Jingoo Han75194592013-12-09 19:18:18 +0900392 goto err_pdata;
Wan ZongShun30eaed02009-12-01 14:29:20 +0000393 }
394
Axel Lin97371fa2011-11-25 00:23:28 +0100395 mfp_set_groupg(&pdev->dev, NULL);
Wan ZongShun30eaed02009-12-01 14:29:20 +0000396 nuc900_init_spi(hw);
397
398 err = spi_bitbang_start(&hw->bitbang);
399 if (err) {
400 dev_err(&pdev->dev, "Failed to register SPI master\n");
401 goto err_register;
402 }
403
404 return 0;
405
406err_register:
407 clk_disable(hw->clk);
Wan ZongShun30eaed02009-12-01 14:29:20 +0000408err_pdata:
Joe Perchesbc3f67a2010-11-14 19:04:47 -0800409 spi_master_put(hw->master);
Wan ZongShun30eaed02009-12-01 14:29:20 +0000410 return err;
411}
412
Grant Likelyfd4a3192012-12-07 16:57:14 +0000413static int nuc900_spi_remove(struct platform_device *dev)
Wan ZongShun30eaed02009-12-01 14:29:20 +0000414{
415 struct nuc900_spi *hw = platform_get_drvdata(dev);
416
Axel Lin708a7e42011-05-15 07:33:28 +0800417 spi_bitbang_stop(&hw->bitbang);
Wan ZongShun30eaed02009-12-01 14:29:20 +0000418 clk_disable(hw->clk);
Wan ZongShun30eaed02009-12-01 14:29:20 +0000419 spi_master_put(hw->master);
420 return 0;
421}
422
423static struct platform_driver nuc900_spi_driver = {
424 .probe = nuc900_spi_probe,
Grant Likelyfd4a3192012-12-07 16:57:14 +0000425 .remove = nuc900_spi_remove,
Wan ZongShun30eaed02009-12-01 14:29:20 +0000426 .driver = {
427 .name = "nuc900-spi",
428 .owner = THIS_MODULE,
429 },
430};
Grant Likely940ab882011-10-05 11:29:49 -0600431module_platform_driver(nuc900_spi_driver);
Wan ZongShun30eaed02009-12-01 14:29:20 +0000432
433MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
434MODULE_DESCRIPTION("nuc900 spi driver!");
435MODULE_LICENSE("GPL");
436MODULE_ALIAS("platform:nuc900-spi");