blob: 83e382b4ae282ec60eb13d2b354f4afbbe8715c5 [file] [log] [blame]
Felipe Balbi72246da2011-08-19 18:10:58 +03001/**
2 * core.c - DesignWare USB3 DRD Controller Core file
3 *
4 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
Felipe Balbi72246da2011-08-19 18:10:58 +03005 *
6 * Authors: Felipe Balbi <balbi@ti.com>,
7 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions, and the following disclaimer,
14 * without modification.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. The names of the above-listed copyright holders may not be used
19 * to endorse or promote products derived from this software without
20 * specific prior written permission.
21 *
22 * ALTERNATIVELY, this software may be distributed under the terms of the
23 * GNU General Public License ("GPL") version 2, as published by the Free
24 * Software Foundation.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
27 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
28 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
30 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
31 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
32 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
33 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
34 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
35 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
36 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 */
38
Felipe Balbia72e6582011-09-05 13:37:28 +030039#include <linux/module.h>
Felipe Balbi72246da2011-08-19 18:10:58 +030040#include <linux/kernel.h>
41#include <linux/slab.h>
42#include <linux/spinlock.h>
43#include <linux/platform_device.h>
44#include <linux/pm_runtime.h>
45#include <linux/interrupt.h>
46#include <linux/ioport.h>
47#include <linux/io.h>
48#include <linux/list.h>
49#include <linux/delay.h>
50#include <linux/dma-mapping.h>
51
52#include <linux/usb/ch9.h>
53#include <linux/usb/gadget.h>
Paul Gortmaker2204fde2011-09-30 18:08:59 -040054#include <linux/module.h>
Felipe Balbi72246da2011-08-19 18:10:58 +030055
56#include "core.h"
57#include "gadget.h"
58#include "io.h"
59
60#include "debug.h"
61
Felipe Balbi6c167fc2011-10-07 22:55:04 +030062static char *maximum_speed = "super";
63module_param(maximum_speed, charp, 0);
64MODULE_PARM_DESC(maximum_speed, "Maximum supported speed.");
65
Felipe Balbi8300dd22011-10-18 13:54:01 +030066/* -------------------------------------------------------------------------- */
67
68#define DWC3_DEVS_POSSIBLE 32
69
70static DECLARE_BITMAP(dwc3_devs, DWC3_DEVS_POSSIBLE);
71
72int dwc3_get_device_id(void)
73{
74 int id;
75
76again:
77 id = find_first_zero_bit(dwc3_devs, DWC3_DEVS_POSSIBLE);
78 if (id < DWC3_DEVS_POSSIBLE) {
79 int old;
80
81 old = test_and_set_bit(id, dwc3_devs);
82 if (old)
83 goto again;
84 } else {
85 pr_err("dwc3: no space for new device\n");
86 id = -ENOMEM;
87 }
88
89 return 0;
90}
91EXPORT_SYMBOL_GPL(dwc3_get_device_id);
92
93void dwc3_put_device_id(int id)
94{
95 int ret;
96
97 if (id < 0)
98 return;
99
100 ret = test_bit(id, dwc3_devs);
101 WARN(!ret, "dwc3: ID %d not in use\n", id);
102 clear_bit(id, dwc3_devs);
103}
104EXPORT_SYMBOL_GPL(dwc3_put_device_id);
105
106/* -------------------------------------------------------------------------- */
107
Felipe Balbi72246da2011-08-19 18:10:58 +0300108/**
109 * dwc3_core_soft_reset - Issues core soft reset and PHY reset
110 * @dwc: pointer to our context structure
111 */
112static void dwc3_core_soft_reset(struct dwc3 *dwc)
113{
114 u32 reg;
115
116 /* Before Resetting PHY, put Core in Reset */
117 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
118 reg |= DWC3_GCTL_CORESOFTRESET;
119 dwc3_writel(dwc->regs, DWC3_GCTL, reg);
120
121 /* Assert USB3 PHY reset */
122 reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
123 reg |= DWC3_GUSB3PIPECTL_PHYSOFTRST;
124 dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
125
126 /* Assert USB2 PHY reset */
127 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
128 reg |= DWC3_GUSB2PHYCFG_PHYSOFTRST;
129 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
130
131 mdelay(100);
132
133 /* Clear USB3 PHY reset */
134 reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
135 reg &= ~DWC3_GUSB3PIPECTL_PHYSOFTRST;
136 dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
137
138 /* Clear USB2 PHY reset */
139 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
140 reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
141 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
142
143 /* After PHYs are stable we can take Core out of reset state */
144 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
145 reg &= ~DWC3_GCTL_CORESOFTRESET;
146 dwc3_writel(dwc->regs, DWC3_GCTL, reg);
147}
148
149/**
150 * dwc3_free_one_event_buffer - Frees one event buffer
151 * @dwc: Pointer to our controller context structure
152 * @evt: Pointer to event buffer to be freed
153 */
154static void dwc3_free_one_event_buffer(struct dwc3 *dwc,
155 struct dwc3_event_buffer *evt)
156{
157 dma_free_coherent(dwc->dev, evt->length, evt->buf, evt->dma);
158 kfree(evt);
159}
160
161/**
162 * dwc3_alloc_one_event_buffer - Allocated one event buffer structure
163 * @dwc: Pointer to our controller context structure
164 * @length: size of the event buffer
165 *
166 * Returns a pointer to the allocated event buffer structure on succes
167 * otherwise ERR_PTR(errno).
168 */
169static struct dwc3_event_buffer *__devinit
170dwc3_alloc_one_event_buffer(struct dwc3 *dwc, unsigned length)
171{
172 struct dwc3_event_buffer *evt;
173
174 evt = kzalloc(sizeof(*evt), GFP_KERNEL);
175 if (!evt)
176 return ERR_PTR(-ENOMEM);
177
178 evt->dwc = dwc;
179 evt->length = length;
180 evt->buf = dma_alloc_coherent(dwc->dev, length,
181 &evt->dma, GFP_KERNEL);
182 if (!evt->buf) {
183 kfree(evt);
184 return ERR_PTR(-ENOMEM);
185 }
186
187 return evt;
188}
189
190/**
191 * dwc3_free_event_buffers - frees all allocated event buffers
192 * @dwc: Pointer to our controller context structure
193 */
194static void dwc3_free_event_buffers(struct dwc3 *dwc)
195{
196 struct dwc3_event_buffer *evt;
197 int i;
198
Felipe Balbi9f622b22011-10-12 10:31:04 +0300199 for (i = 0; i < dwc->num_event_buffers; i++) {
Felipe Balbi72246da2011-08-19 18:10:58 +0300200 evt = dwc->ev_buffs[i];
201 if (evt) {
202 dwc3_free_one_event_buffer(dwc, evt);
203 dwc->ev_buffs[i] = NULL;
204 }
205 }
206}
207
208/**
209 * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length
210 * @dwc: Pointer to out controller context structure
Felipe Balbi72246da2011-08-19 18:10:58 +0300211 * @length: size of event buffer
212 *
213 * Returns 0 on success otherwise negative errno. In error the case, dwc
214 * may contain some buffers allocated but not all which were requested.
215 */
Felipe Balbi9f622b22011-10-12 10:31:04 +0300216static int __devinit dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length)
Felipe Balbi72246da2011-08-19 18:10:58 +0300217{
Felipe Balbi9f622b22011-10-12 10:31:04 +0300218 int num;
Felipe Balbi72246da2011-08-19 18:10:58 +0300219 int i;
220
Felipe Balbi9f622b22011-10-12 10:31:04 +0300221 num = DWC3_NUM_INT(dwc->hwparams.hwparams1);
222 dwc->num_event_buffers = num;
223
Felipe Balbi72246da2011-08-19 18:10:58 +0300224 for (i = 0; i < num; i++) {
225 struct dwc3_event_buffer *evt;
226
227 evt = dwc3_alloc_one_event_buffer(dwc, length);
228 if (IS_ERR(evt)) {
229 dev_err(dwc->dev, "can't allocate event buffer\n");
230 return PTR_ERR(evt);
231 }
232 dwc->ev_buffs[i] = evt;
233 }
234
235 return 0;
236}
237
238/**
239 * dwc3_event_buffers_setup - setup our allocated event buffers
240 * @dwc: Pointer to out controller context structure
241 *
242 * Returns 0 on success otherwise negative errno.
243 */
244static int __devinit dwc3_event_buffers_setup(struct dwc3 *dwc)
245{
246 struct dwc3_event_buffer *evt;
247 int n;
248
Felipe Balbi9f622b22011-10-12 10:31:04 +0300249 for (n = 0; n < dwc->num_event_buffers; n++) {
Felipe Balbi72246da2011-08-19 18:10:58 +0300250 evt = dwc->ev_buffs[n];
251 dev_dbg(dwc->dev, "Event buf %p dma %08llx length %d\n",
252 evt->buf, (unsigned long long) evt->dma,
253 evt->length);
254
255 dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(n),
256 lower_32_bits(evt->dma));
257 dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(n),
258 upper_32_bits(evt->dma));
259 dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(n),
260 evt->length & 0xffff);
261 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(n), 0);
262 }
263
264 return 0;
265}
266
267static void dwc3_event_buffers_cleanup(struct dwc3 *dwc)
268{
269 struct dwc3_event_buffer *evt;
270 int n;
271
Felipe Balbi9f622b22011-10-12 10:31:04 +0300272 for (n = 0; n < dwc->num_event_buffers; n++) {
Felipe Balbi72246da2011-08-19 18:10:58 +0300273 evt = dwc->ev_buffs[n];
274 dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(n), 0);
275 dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(n), 0);
276 dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(n), 0);
277 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(n), 0);
278 }
279}
280
Felipe Balbi26ceca92011-09-30 10:58:49 +0300281static void __devinit dwc3_cache_hwparams(struct dwc3 *dwc)
282{
283 struct dwc3_hwparams *parms = &dwc->hwparams;
284
285 parms->hwparams0 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS0);
286 parms->hwparams1 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS1);
287 parms->hwparams2 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS2);
288 parms->hwparams3 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS3);
289 parms->hwparams4 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS4);
290 parms->hwparams5 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS5);
291 parms->hwparams6 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS6);
292 parms->hwparams7 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS7);
293 parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8);
294}
295
Felipe Balbi72246da2011-08-19 18:10:58 +0300296/**
297 * dwc3_core_init - Low-level initialization of DWC3 Core
298 * @dwc: Pointer to our controller context structure
299 *
300 * Returns 0 on success otherwise negative errno.
301 */
302static int __devinit dwc3_core_init(struct dwc3 *dwc)
303{
304 unsigned long timeout;
305 u32 reg;
306 int ret;
307
Sebastian Andrzej Siewior7650bd72011-08-29 13:56:36 +0200308 reg = dwc3_readl(dwc->regs, DWC3_GSNPSID);
309 /* This should read as U3 followed by revision number */
310 if ((reg & DWC3_GSNPSID_MASK) != 0x55330000) {
311 dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n");
312 ret = -ENODEV;
313 goto err0;
314 }
315 dwc->revision = reg & DWC3_GSNPSREV_MASK;
316
Felipe Balbi72246da2011-08-19 18:10:58 +0300317 dwc3_core_soft_reset(dwc);
318
319 /* issue device SoftReset too */
320 timeout = jiffies + msecs_to_jiffies(500);
321 dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST);
322 do {
323 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
324 if (!(reg & DWC3_DCTL_CSFTRST))
325 break;
326
327 if (time_after(jiffies, timeout)) {
328 dev_err(dwc->dev, "Reset Timed Out\n");
329 ret = -ETIMEDOUT;
330 goto err0;
331 }
332
333 cpu_relax();
334 } while (true);
335
Felipe Balbi9f622b22011-10-12 10:31:04 +0300336 dwc3_cache_hwparams(dwc);
337
338 ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE);
Felipe Balbi72246da2011-08-19 18:10:58 +0300339 if (ret) {
340 dev_err(dwc->dev, "failed to allocate event buffers\n");
341 ret = -ENOMEM;
342 goto err1;
343 }
344
345 ret = dwc3_event_buffers_setup(dwc);
346 if (ret) {
347 dev_err(dwc->dev, "failed to setup event buffers\n");
348 goto err1;
349 }
350
Felipe Balbi72246da2011-08-19 18:10:58 +0300351 return 0;
352
353err1:
354 dwc3_free_event_buffers(dwc);
355
356err0:
357 return ret;
358}
359
360static void dwc3_core_exit(struct dwc3 *dwc)
361{
362 dwc3_event_buffers_cleanup(dwc);
363 dwc3_free_event_buffers(dwc);
364}
365
366#define DWC3_ALIGN_MASK (16 - 1)
367
368static int __devinit dwc3_probe(struct platform_device *pdev)
369{
Felipe Balbi72246da2011-08-19 18:10:58 +0300370 struct resource *res;
371 struct dwc3 *dwc;
Felipe Balbi0949e992011-10-12 10:44:56 +0300372
Felipe Balbi72246da2011-08-19 18:10:58 +0300373 int ret = -ENOMEM;
374 int irq;
Felipe Balbi0949e992011-10-12 10:44:56 +0300375
376 void __iomem *regs;
Felipe Balbi72246da2011-08-19 18:10:58 +0300377 void *mem;
378
Felipe Balbi0949e992011-10-12 10:44:56 +0300379 u8 mode;
380
Felipe Balbi72246da2011-08-19 18:10:58 +0300381 mem = kzalloc(sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL);
382 if (!mem) {
383 dev_err(&pdev->dev, "not enough memory\n");
384 goto err0;
385 }
386 dwc = PTR_ALIGN(mem, DWC3_ALIGN_MASK + 1);
387 dwc->mem = mem;
388
389 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
390 if (!res) {
391 dev_err(&pdev->dev, "missing resource\n");
392 goto err1;
393 }
394
Felipe Balbid07e8812011-10-12 14:08:26 +0300395 dwc->res = res;
396
Felipe Balbi72246da2011-08-19 18:10:58 +0300397 res = request_mem_region(res->start, resource_size(res),
398 dev_name(&pdev->dev));
399 if (!res) {
400 dev_err(&pdev->dev, "can't request mem region\n");
401 goto err1;
402 }
403
404 regs = ioremap(res->start, resource_size(res));
405 if (!regs) {
406 dev_err(&pdev->dev, "ioremap failed\n");
407 goto err2;
408 }
409
410 irq = platform_get_irq(pdev, 0);
411 if (irq < 0) {
412 dev_err(&pdev->dev, "missing IRQ\n");
413 goto err3;
414 }
415
416 spin_lock_init(&dwc->lock);
417 platform_set_drvdata(pdev, dwc);
418
419 dwc->regs = regs;
420 dwc->regs_size = resource_size(res);
421 dwc->dev = &pdev->dev;
422 dwc->irq = irq;
423
Felipe Balbi6c167fc2011-10-07 22:55:04 +0300424 if (!strncmp("super", maximum_speed, 5))
425 dwc->maximum_speed = DWC3_DCFG_SUPERSPEED;
426 else if (!strncmp("high", maximum_speed, 4))
427 dwc->maximum_speed = DWC3_DCFG_HIGHSPEED;
428 else if (!strncmp("full", maximum_speed, 4))
429 dwc->maximum_speed = DWC3_DCFG_FULLSPEED1;
430 else if (!strncmp("low", maximum_speed, 3))
431 dwc->maximum_speed = DWC3_DCFG_LOWSPEED;
432 else
433 dwc->maximum_speed = DWC3_DCFG_SUPERSPEED;
434
Felipe Balbi72246da2011-08-19 18:10:58 +0300435 pm_runtime_enable(&pdev->dev);
436 pm_runtime_get_sync(&pdev->dev);
437 pm_runtime_forbid(&pdev->dev);
438
439 ret = dwc3_core_init(dwc);
440 if (ret) {
441 dev_err(&pdev->dev, "failed to initialize core\n");
442 goto err3;
443 }
444
Felipe Balbi0949e992011-10-12 10:44:56 +0300445 mode = DWC3_MODE(dwc->hwparams.hwparams0);
446
447 switch (mode) {
Felipe Balbi0949e992011-10-12 10:44:56 +0300448 case DWC3_MODE_DEVICE:
Felipe Balbi72246da2011-08-19 18:10:58 +0300449 ret = dwc3_gadget_init(dwc);
450 if (ret) {
Felipe Balbi0949e992011-10-12 10:44:56 +0300451 dev_err(&pdev->dev, "failed to initialize gadget\n");
Felipe Balbi72246da2011-08-19 18:10:58 +0300452 goto err4;
453 }
Felipe Balbi0949e992011-10-12 10:44:56 +0300454 break;
Felipe Balbid07e8812011-10-12 14:08:26 +0300455 case DWC3_MODE_HOST:
456 ret = dwc3_host_init(dwc);
457 if (ret) {
458 dev_err(&pdev->dev, "failed to initialize host\n");
459 goto err4;
460 }
461 break;
462 case DWC3_MODE_DRD:
463 ret = dwc3_host_init(dwc);
464 if (ret) {
465 dev_err(&pdev->dev, "failed to initialize host\n");
466 goto err4;
467 }
468
469 ret = dwc3_gadget_init(dwc);
470 if (ret) {
471 dev_err(&pdev->dev, "failed to initialize gadget\n");
472 goto err4;
473 }
474 break;
Felipe Balbi0949e992011-10-12 10:44:56 +0300475 default:
476 dev_err(&pdev->dev, "Unsupported mode of operation %d\n", mode);
477 goto err4;
Felipe Balbi72246da2011-08-19 18:10:58 +0300478 }
Felipe Balbi0949e992011-10-12 10:44:56 +0300479 dwc->mode = mode;
Felipe Balbi72246da2011-08-19 18:10:58 +0300480
481 ret = dwc3_debugfs_init(dwc);
482 if (ret) {
483 dev_err(&pdev->dev, "failed to initialize debugfs\n");
484 goto err5;
485 }
486
487 pm_runtime_allow(&pdev->dev);
488
489 return 0;
490
491err5:
Felipe Balbi0949e992011-10-12 10:44:56 +0300492 switch (mode) {
Felipe Balbi0949e992011-10-12 10:44:56 +0300493 case DWC3_MODE_DEVICE:
Felipe Balbi72246da2011-08-19 18:10:58 +0300494 dwc3_gadget_exit(dwc);
Felipe Balbi0949e992011-10-12 10:44:56 +0300495 break;
Felipe Balbid07e8812011-10-12 14:08:26 +0300496 case DWC3_MODE_HOST:
497 dwc3_host_exit(dwc);
498 break;
499 case DWC3_MODE_DRD:
500 dwc3_host_exit(dwc);
501 dwc3_gadget_exit(dwc);
502 break;
Felipe Balbi0949e992011-10-12 10:44:56 +0300503 default:
504 /* do nothing */
505 break;
506 }
Felipe Balbi72246da2011-08-19 18:10:58 +0300507
508err4:
509 dwc3_core_exit(dwc);
510
511err3:
512 iounmap(regs);
513
514err2:
515 release_mem_region(res->start, resource_size(res));
516
517err1:
518 kfree(dwc->mem);
519
520err0:
521 return ret;
522}
523
524static int __devexit dwc3_remove(struct platform_device *pdev)
525{
Felipe Balbi72246da2011-08-19 18:10:58 +0300526 struct dwc3 *dwc = platform_get_drvdata(pdev);
527 struct resource *res;
Felipe Balbi72246da2011-08-19 18:10:58 +0300528
529 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
530
531 pm_runtime_put(&pdev->dev);
532 pm_runtime_disable(&pdev->dev);
533
534 dwc3_debugfs_exit(dwc);
535
Felipe Balbi0949e992011-10-12 10:44:56 +0300536 switch (dwc->mode) {
Felipe Balbi0949e992011-10-12 10:44:56 +0300537 case DWC3_MODE_DEVICE:
Felipe Balbi72246da2011-08-19 18:10:58 +0300538 dwc3_gadget_exit(dwc);
Felipe Balbi0949e992011-10-12 10:44:56 +0300539 break;
Felipe Balbid07e8812011-10-12 14:08:26 +0300540 case DWC3_MODE_HOST:
541 dwc3_host_exit(dwc);
542 break;
543 case DWC3_MODE_DRD:
544 dwc3_host_exit(dwc);
545 dwc3_gadget_exit(dwc);
546 break;
Felipe Balbi0949e992011-10-12 10:44:56 +0300547 default:
548 /* do nothing */
549 break;
550 }
Felipe Balbi72246da2011-08-19 18:10:58 +0300551
552 dwc3_core_exit(dwc);
553 release_mem_region(res->start, resource_size(res));
554 iounmap(dwc->regs);
555 kfree(dwc->mem);
556
557 return 0;
558}
559
Felipe Balbi72246da2011-08-19 18:10:58 +0300560static struct platform_driver dwc3_driver = {
561 .probe = dwc3_probe,
562 .remove = __devexit_p(dwc3_remove),
563 .driver = {
564 .name = "dwc3",
565 },
Felipe Balbi72246da2011-08-19 18:10:58 +0300566};
567
Sebastian Andrzej Siewior7ae4fc42011-10-19 19:39:50 +0200568MODULE_ALIAS("platform:dwc3");
Felipe Balbi72246da2011-08-19 18:10:58 +0300569MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
570MODULE_LICENSE("Dual BSD/GPL");
571MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver");
572
573static int __devinit dwc3_init(void)
574{
575 return platform_driver_register(&dwc3_driver);
576}
577module_init(dwc3_init);
578
579static void __exit dwc3_exit(void)
580{
581 platform_driver_unregister(&dwc3_driver);
582}
583module_exit(dwc3_exit);