Luis R. Rodriguez | b3950e6 | 2010-04-15 17:39:03 -0400 | [diff] [blame] | 1 | /* |
Sujith Manoharan | 5b68138 | 2011-05-17 13:36:18 +0530 | [diff] [blame] | 2 | * Copyright (c) 2008-2011 Atheros Communications Inc. |
Luis R. Rodriguez | b3950e6 | 2010-04-15 17:39:03 -0400 | [diff] [blame] | 3 | * |
| 4 | * Permission to use, copy, modify, and/or distribute this software for any |
| 5 | * purpose with or without fee is hereby granted, provided that the above |
| 6 | * copyright notice and this permission notice appear in all copies. |
| 7 | * |
| 8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 15 | */ |
| 16 | |
| 17 | #include "hw.h" |
Luis R. Rodriguez | b622a72 | 2010-04-15 17:39:28 -0400 | [diff] [blame] | 18 | #include "ar9003_mac.h" |
Luis R. Rodriguez | 7284635 | 2010-05-12 21:15:05 -0400 | [diff] [blame] | 19 | #include "ar9003_2p2_initvals.h" |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 20 | #include "ar9485_initvals.h" |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 21 | #include "ar9340_initvals.h" |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 22 | #include "ar9330_1p1_initvals.h" |
| 23 | #include "ar9330_1p2_initvals.h" |
Gabor Juhos | a0fbb9b | 2012-07-03 19:13:22 +0200 | [diff] [blame] | 24 | #include "ar955x_1p0_initvals.h" |
Luis R. Rodriguez | 5a63ef0 | 2011-08-24 15:36:08 -0700 | [diff] [blame] | 25 | #include "ar9580_1p0_initvals.h" |
Rajkumar Manoharan | 76db2f8 | 2011-10-13 11:00:43 +0530 | [diff] [blame] | 26 | #include "ar9462_2p0_initvals.h" |
Sujith Manoharan | aaa53ee | 2012-09-10 09:19:54 +0530 | [diff] [blame] | 27 | #include "ar9565_1p0_initvals.h" |
Luis R. Rodriguez | b3950e6 | 2010-04-15 17:39:03 -0400 | [diff] [blame] | 28 | |
| 29 | /* General hardware code for the AR9003 hadware family */ |
| 30 | |
Luis R. Rodriguez | 886b42b | 2010-10-14 11:44:27 -0700 | [diff] [blame] | 31 | /* |
| 32 | * The AR9003 family uses a new INI format (pre, core, post |
| 33 | * arrays per subsystem). This provides support for the |
| 34 | * AR9003 2.2 chipsets. |
| 35 | */ |
| 36 | static void ar9003_hw_init_mode_regs(struct ath_hw *ah) |
Luis R. Rodriguez | 7284635 | 2010-05-12 21:15:05 -0400 | [diff] [blame] | 37 | { |
Rajkumar Manoharan | 423e38e | 2011-10-13 11:00:44 +0530 | [diff] [blame] | 38 | #define AR9462_BB_CTX_COEFJ(x) \ |
| 39 | ar9462_##x##_baseband_core_txfir_coeff_japan_2484 |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 40 | |
Rajkumar Manoharan | 423e38e | 2011-10-13 11:00:44 +0530 | [diff] [blame] | 41 | #define AR9462_BBC_TXIFR_COEFFJ \ |
| 42 | ar9462_2p0_baseband_core_txfir_coeff_japan_2484 |
Sujith Manoharan | aaa53ee | 2012-09-10 09:19:54 +0530 | [diff] [blame] | 43 | |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 44 | if (AR_SREV_9330_11(ah)) { |
| 45 | /* mac */ |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 46 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 47 | ar9331_1p1_mac_core); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 48 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 49 | ar9331_1p1_mac_postamble); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 50 | |
| 51 | /* bb */ |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 52 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 53 | ar9331_1p1_baseband_core); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 54 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 55 | ar9331_1p1_baseband_postamble); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 56 | |
| 57 | /* radio */ |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 58 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 59 | ar9331_1p1_radio_core); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 60 | |
| 61 | /* soc */ |
| 62 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 63 | ar9331_1p1_soc_preamble); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 64 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 65 | ar9331_1p1_soc_postamble); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 66 | |
| 67 | /* rx/tx gain */ |
| 68 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 69 | ar9331_common_rx_gain_1p1); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 70 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 71 | ar9331_modes_lowest_ob_db_tx_gain_1p1); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 72 | |
| 73 | /* additional clock settings */ |
| 74 | if (ah->is_clk_25mhz) |
Felix Fietkau | c7d36f9 | 2012-03-14 16:40:31 +0100 | [diff] [blame] | 75 | INIT_INI_ARRAY(&ah->iniAdditional, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 76 | ar9331_1p1_xtal_25M); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 77 | else |
Felix Fietkau | c7d36f9 | 2012-03-14 16:40:31 +0100 | [diff] [blame] | 78 | INIT_INI_ARRAY(&ah->iniAdditional, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 79 | ar9331_1p1_xtal_40M); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 80 | } else if (AR_SREV_9330_12(ah)) { |
| 81 | /* mac */ |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 82 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 83 | ar9331_1p2_mac_core); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 84 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 85 | ar9331_1p2_mac_postamble); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 86 | |
| 87 | /* bb */ |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 88 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 89 | ar9331_1p2_baseband_core); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 90 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 91 | ar9331_1p2_baseband_postamble); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 92 | |
| 93 | /* radio */ |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 94 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 95 | ar9331_1p2_radio_core); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 96 | |
| 97 | /* soc */ |
| 98 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 99 | ar9331_1p2_soc_preamble); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 100 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 101 | ar9331_1p2_soc_postamble); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 102 | |
| 103 | /* rx/tx gain */ |
| 104 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 105 | ar9331_common_rx_gain_1p2); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 106 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 107 | ar9331_modes_lowest_ob_db_tx_gain_1p2); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 108 | |
| 109 | /* additional clock settings */ |
| 110 | if (ah->is_clk_25mhz) |
Felix Fietkau | c7d36f9 | 2012-03-14 16:40:31 +0100 | [diff] [blame] | 111 | INIT_INI_ARRAY(&ah->iniAdditional, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 112 | ar9331_1p2_xtal_25M); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 113 | else |
Felix Fietkau | c7d36f9 | 2012-03-14 16:40:31 +0100 | [diff] [blame] | 114 | INIT_INI_ARRAY(&ah->iniAdditional, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 115 | ar9331_1p2_xtal_40M); |
Gabor Juhos | 172805a | 2011-06-21 11:23:26 +0200 | [diff] [blame] | 116 | } else if (AR_SREV_9340(ah)) { |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 117 | /* mac */ |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 118 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 119 | ar9340_1p0_mac_core); |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 120 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 121 | ar9340_1p0_mac_postamble); |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 122 | |
| 123 | /* bb */ |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 124 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 125 | ar9340_1p0_baseband_core); |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 126 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 127 | ar9340_1p0_baseband_postamble); |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 128 | |
| 129 | /* radio */ |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 130 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 131 | ar9340_1p0_radio_core); |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 132 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 133 | ar9340_1p0_radio_postamble); |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 134 | |
| 135 | /* soc */ |
| 136 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 137 | ar9340_1p0_soc_preamble); |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 138 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 139 | ar9340_1p0_soc_postamble); |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 140 | |
| 141 | /* rx/tx gain */ |
| 142 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 143 | ar9340Common_wo_xlna_rx_gain_table_1p0); |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 144 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 145 | ar9340Modes_high_ob_db_tx_gain_table_1p0); |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 146 | |
Felix Fietkau | c7d36f9 | 2012-03-14 16:40:31 +0100 | [diff] [blame] | 147 | INIT_INI_ARRAY(&ah->iniModesFastClock, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 148 | ar9340Modes_fast_clock_1p0); |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 149 | |
Felix Fietkau | c7d36f9 | 2012-03-14 16:40:31 +0100 | [diff] [blame] | 150 | if (!ah->is_clk_25mhz) |
| 151 | INIT_INI_ARRAY(&ah->iniAdditional, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 152 | ar9340_1p0_radio_core_40M); |
Vasanthakumar Thiagarajan | d89baac | 2011-04-19 19:29:04 +0530 | [diff] [blame] | 153 | } else if (AR_SREV_9485_11(ah)) { |
Vivek Natarajan | 1a63e2c | 2011-02-18 16:49:47 +0530 | [diff] [blame] | 154 | /* mac */ |
Vivek Natarajan | 1a63e2c | 2011-02-18 16:49:47 +0530 | [diff] [blame] | 155 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 156 | ar9485_1_1_mac_core); |
Vivek Natarajan | 1a63e2c | 2011-02-18 16:49:47 +0530 | [diff] [blame] | 157 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 158 | ar9485_1_1_mac_postamble); |
Vivek Natarajan | 1a63e2c | 2011-02-18 16:49:47 +0530 | [diff] [blame] | 159 | |
| 160 | /* bb */ |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 161 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], ar9485_1_1); |
Vivek Natarajan | 1a63e2c | 2011-02-18 16:49:47 +0530 | [diff] [blame] | 162 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 163 | ar9485_1_1_baseband_core); |
Vivek Natarajan | 1a63e2c | 2011-02-18 16:49:47 +0530 | [diff] [blame] | 164 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 165 | ar9485_1_1_baseband_postamble); |
Vivek Natarajan | 1a63e2c | 2011-02-18 16:49:47 +0530 | [diff] [blame] | 166 | |
| 167 | /* radio */ |
Vivek Natarajan | 1a63e2c | 2011-02-18 16:49:47 +0530 | [diff] [blame] | 168 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 169 | ar9485_1_1_radio_core); |
Vivek Natarajan | 1a63e2c | 2011-02-18 16:49:47 +0530 | [diff] [blame] | 170 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 171 | ar9485_1_1_radio_postamble); |
Vivek Natarajan | 1a63e2c | 2011-02-18 16:49:47 +0530 | [diff] [blame] | 172 | |
| 173 | /* soc */ |
| 174 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 175 | ar9485_1_1_soc_preamble); |
Vivek Natarajan | 1a63e2c | 2011-02-18 16:49:47 +0530 | [diff] [blame] | 176 | |
| 177 | /* rx/tx gain */ |
| 178 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 179 | ar9485Common_wo_xlna_rx_gain_1_1); |
Vivek Natarajan | 1a63e2c | 2011-02-18 16:49:47 +0530 | [diff] [blame] | 180 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 181 | ar9485_modes_lowest_ob_db_tx_gain_1_1); |
Vivek Natarajan | 1a63e2c | 2011-02-18 16:49:47 +0530 | [diff] [blame] | 182 | |
| 183 | /* Load PCIE SERDES settings from INI */ |
| 184 | |
| 185 | /* Awake Setting */ |
| 186 | |
| 187 | INIT_INI_ARRAY(&ah->iniPcieSerdes, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 188 | ar9485_1_1_pcie_phy_clkreq_disable_L1); |
Vivek Natarajan | 1a63e2c | 2011-02-18 16:49:47 +0530 | [diff] [blame] | 189 | |
| 190 | /* Sleep Setting */ |
| 191 | |
| 192 | INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 193 | ar9485_1_1_pcie_phy_clkreq_disable_L1); |
Rajkumar Manoharan | 423e38e | 2011-10-13 11:00:44 +0530 | [diff] [blame] | 194 | } else if (AR_SREV_9462_20(ah)) { |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 195 | |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 196 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core); |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 197 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 198 | ar9462_2p0_mac_postamble); |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 199 | |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 200 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 201 | ar9462_2p0_baseband_core); |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 202 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 203 | ar9462_2p0_baseband_postamble); |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 204 | |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 205 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 206 | ar9462_2p0_radio_core); |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 207 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 208 | ar9462_2p0_radio_postamble); |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 209 | INIT_INI_ARRAY(&ah->ini_radio_post_sys2ant, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 210 | ar9462_2p0_radio_postamble_sys2ant); |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 211 | |
| 212 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 213 | ar9462_2p0_soc_preamble); |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 214 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 215 | ar9462_2p0_soc_postamble); |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 216 | |
| 217 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 218 | ar9462_common_rx_gain_table_2p0); |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 219 | |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 220 | /* Awake -> Sleep Setting */ |
| 221 | INIT_INI_ARRAY(&ah->iniPcieSerdes, |
Rajkumar Manoharan | 1680260 | 2012-10-25 17:11:31 +0530 | [diff] [blame] | 222 | ar9462_pciephy_clkreq_disable_L1_2p0); |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 223 | /* Sleep -> Awake Setting */ |
| 224 | INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower, |
Rajkumar Manoharan | 1680260 | 2012-10-25 17:11:31 +0530 | [diff] [blame] | 225 | ar9462_pciephy_clkreq_disable_L1_2p0); |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 226 | |
| 227 | /* Fast clock modal settings */ |
Felix Fietkau | c7d36f9 | 2012-03-14 16:40:31 +0100 | [diff] [blame] | 228 | INIT_INI_ARRAY(&ah->iniModesFastClock, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 229 | ar9462_modes_fast_clock_2p0); |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 230 | |
| 231 | INIT_INI_ARRAY(&ah->iniCckfirJapan2484, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 232 | AR9462_BB_CTX_COEFJ(2p0)); |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 233 | |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 234 | INIT_INI_ARRAY(&ah->ini_japan2484, AR9462_BBC_TXIFR_COEFFJ); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 235 | } else if (AR_SREV_9550(ah)) { |
| 236 | /* mac */ |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 237 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 238 | ar955x_1p0_mac_core); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 239 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 240 | ar955x_1p0_mac_postamble); |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 241 | |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 242 | /* bb */ |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 243 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 244 | ar955x_1p0_baseband_core); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 245 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 246 | ar955x_1p0_baseband_postamble); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 247 | |
| 248 | /* radio */ |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 249 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 250 | ar955x_1p0_radio_core); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 251 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 252 | ar955x_1p0_radio_postamble); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 253 | |
| 254 | /* soc */ |
| 255 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 256 | ar955x_1p0_soc_preamble); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 257 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 258 | ar955x_1p0_soc_postamble); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 259 | |
| 260 | /* rx/tx gain */ |
| 261 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 262 | ar955x_1p0_common_wo_xlna_rx_gain_table); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 263 | INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 264 | ar955x_1p0_common_wo_xlna_rx_gain_bounds); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 265 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 266 | ar955x_1p0_modes_xpa_tx_gain_table); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 267 | |
| 268 | /* Fast clock modal settings */ |
| 269 | INIT_INI_ARRAY(&ah->iniModesFastClock, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 270 | ar955x_1p0_modes_fast_clock); |
Luis R. Rodriguez | 5a63ef0 | 2011-08-24 15:36:08 -0700 | [diff] [blame] | 271 | } else if (AR_SREV_9580(ah)) { |
| 272 | /* mac */ |
Luis R. Rodriguez | 5a63ef0 | 2011-08-24 15:36:08 -0700 | [diff] [blame] | 273 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 274 | ar9580_1p0_mac_core); |
Luis R. Rodriguez | 5a63ef0 | 2011-08-24 15:36:08 -0700 | [diff] [blame] | 275 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 276 | ar9580_1p0_mac_postamble); |
Luis R. Rodriguez | 5a63ef0 | 2011-08-24 15:36:08 -0700 | [diff] [blame] | 277 | |
| 278 | /* bb */ |
Luis R. Rodriguez | 5a63ef0 | 2011-08-24 15:36:08 -0700 | [diff] [blame] | 279 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 280 | ar9580_1p0_baseband_core); |
Luis R. Rodriguez | 5a63ef0 | 2011-08-24 15:36:08 -0700 | [diff] [blame] | 281 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 282 | ar9580_1p0_baseband_postamble); |
Luis R. Rodriguez | 5a63ef0 | 2011-08-24 15:36:08 -0700 | [diff] [blame] | 283 | |
| 284 | /* radio */ |
Luis R. Rodriguez | 5a63ef0 | 2011-08-24 15:36:08 -0700 | [diff] [blame] | 285 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 286 | ar9580_1p0_radio_core); |
Luis R. Rodriguez | 5a63ef0 | 2011-08-24 15:36:08 -0700 | [diff] [blame] | 287 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 288 | ar9580_1p0_radio_postamble); |
Luis R. Rodriguez | 5a63ef0 | 2011-08-24 15:36:08 -0700 | [diff] [blame] | 289 | |
| 290 | /* soc */ |
| 291 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 292 | ar9580_1p0_soc_preamble); |
Luis R. Rodriguez | 5a63ef0 | 2011-08-24 15:36:08 -0700 | [diff] [blame] | 293 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 294 | ar9580_1p0_soc_postamble); |
Luis R. Rodriguez | 5a63ef0 | 2011-08-24 15:36:08 -0700 | [diff] [blame] | 295 | |
| 296 | /* rx/tx gain */ |
| 297 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 298 | ar9580_1p0_rx_gain_table); |
Luis R. Rodriguez | 5a63ef0 | 2011-08-24 15:36:08 -0700 | [diff] [blame] | 299 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 300 | ar9580_1p0_low_ob_db_tx_gain_table); |
Luis R. Rodriguez | 5a63ef0 | 2011-08-24 15:36:08 -0700 | [diff] [blame] | 301 | |
Felix Fietkau | c7d36f9 | 2012-03-14 16:40:31 +0100 | [diff] [blame] | 302 | INIT_INI_ARRAY(&ah->iniModesFastClock, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 303 | ar9580_1p0_modes_fast_clock); |
Sujith Manoharan | aaa53ee | 2012-09-10 09:19:54 +0530 | [diff] [blame] | 304 | } else if (AR_SREV_9565(ah)) { |
| 305 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], |
| 306 | ar9565_1p0_mac_core); |
| 307 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], |
| 308 | ar9565_1p0_mac_postamble); |
| 309 | |
| 310 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], |
| 311 | ar9565_1p0_baseband_core); |
| 312 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], |
| 313 | ar9565_1p0_baseband_postamble); |
| 314 | |
| 315 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], |
| 316 | ar9565_1p0_radio_core); |
| 317 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], |
| 318 | ar9565_1p0_radio_postamble); |
| 319 | |
| 320 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], |
| 321 | ar9565_1p0_soc_preamble); |
| 322 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], |
| 323 | ar9565_1p0_soc_postamble); |
| 324 | |
| 325 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
| 326 | ar9565_1p0_Common_rx_gain_table); |
| 327 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 328 | ar9565_1p0_Modes_lowest_ob_db_tx_gain_table); |
| 329 | |
| 330 | INIT_INI_ARRAY(&ah->iniPcieSerdes, |
Rajkumar Manoharan | 8446484 | 2012-10-25 17:16:51 +0530 | [diff] [blame^] | 331 | ar9565_1p0_pciephy_clkreq_disable_L1); |
Sujith Manoharan | aaa53ee | 2012-09-10 09:19:54 +0530 | [diff] [blame] | 332 | INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower, |
Rajkumar Manoharan | 8446484 | 2012-10-25 17:16:51 +0530 | [diff] [blame^] | 333 | ar9565_1p0_pciephy_clkreq_disable_L1); |
Sujith Manoharan | aaa53ee | 2012-09-10 09:19:54 +0530 | [diff] [blame] | 334 | |
| 335 | INIT_INI_ARRAY(&ah->iniModesFastClock, |
| 336 | ar9565_1p0_modes_fast_clock); |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 337 | } else { |
| 338 | /* mac */ |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 339 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 340 | ar9300_2p2_mac_core); |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 341 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 342 | ar9300_2p2_mac_postamble); |
Luis R. Rodriguez | 7284635 | 2010-05-12 21:15:05 -0400 | [diff] [blame] | 343 | |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 344 | /* bb */ |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 345 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 346 | ar9300_2p2_baseband_core); |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 347 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 348 | ar9300_2p2_baseband_postamble); |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 349 | |
| 350 | /* radio */ |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 351 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 352 | ar9300_2p2_radio_core); |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 353 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 354 | ar9300_2p2_radio_postamble); |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 355 | |
| 356 | /* soc */ |
| 357 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 358 | ar9300_2p2_soc_preamble); |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 359 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 360 | ar9300_2p2_soc_postamble); |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 361 | |
| 362 | /* rx/tx gain */ |
| 363 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 364 | ar9300Common_rx_gain_table_2p2); |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 365 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 366 | ar9300Modes_lowest_ob_db_tx_gain_table_2p2); |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 367 | |
| 368 | /* Load PCIE SERDES settings from INI */ |
| 369 | |
| 370 | /* Awake Setting */ |
| 371 | |
| 372 | INIT_INI_ARRAY(&ah->iniPcieSerdes, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 373 | ar9300PciePhy_pll_on_clkreq_disable_L1_2p2); |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 374 | |
| 375 | /* Sleep Setting */ |
| 376 | |
| 377 | INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 378 | ar9300PciePhy_pll_on_clkreq_disable_L1_2p2); |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 379 | |
| 380 | /* Fast clock modal settings */ |
Felix Fietkau | c7d36f9 | 2012-03-14 16:40:31 +0100 | [diff] [blame] | 381 | INIT_INI_ARRAY(&ah->iniModesFastClock, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 382 | ar9300Modes_fast_clock_2p2); |
Vasanthakumar Thiagarajan | c88457e | 2010-12-06 04:27:37 -0800 | [diff] [blame] | 383 | } |
Luis R. Rodriguez | 7284635 | 2010-05-12 21:15:05 -0400 | [diff] [blame] | 384 | } |
| 385 | |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 386 | static void ar9003_tx_gain_table_mode0(struct ath_hw *ah) |
| 387 | { |
| 388 | if (AR_SREV_9330_12(ah)) |
| 389 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 390 | ar9331_modes_lowest_ob_db_tx_gain_1p2); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 391 | else if (AR_SREV_9330_11(ah)) |
| 392 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 393 | ar9331_modes_lowest_ob_db_tx_gain_1p1); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 394 | else if (AR_SREV_9340(ah)) |
| 395 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 396 | ar9340Modes_lowest_ob_db_tx_gain_table_1p0); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 397 | else if (AR_SREV_9485_11(ah)) |
| 398 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 399 | ar9485_modes_lowest_ob_db_tx_gain_1_1); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 400 | else if (AR_SREV_9550(ah)) |
| 401 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 402 | ar955x_1p0_modes_xpa_tx_gain_table); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 403 | else if (AR_SREV_9580(ah)) |
| 404 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 405 | ar9580_1p0_lowest_ob_db_tx_gain_table); |
Rajkumar Manoharan | 423e38e | 2011-10-13 11:00:44 +0530 | [diff] [blame] | 406 | else if (AR_SREV_9462_20(ah)) |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 407 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 408 | ar9462_modes_low_ob_db_tx_gain_table_2p0); |
Sujith Manoharan | aaa53ee | 2012-09-10 09:19:54 +0530 | [diff] [blame] | 409 | else if (AR_SREV_9565(ah)) |
| 410 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 411 | ar9565_1p0_modes_low_ob_db_tx_gain_table); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 412 | else |
| 413 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 414 | ar9300Modes_lowest_ob_db_tx_gain_table_2p2); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 415 | } |
| 416 | |
| 417 | static void ar9003_tx_gain_table_mode1(struct ath_hw *ah) |
| 418 | { |
| 419 | if (AR_SREV_9330_12(ah)) |
| 420 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 421 | ar9331_modes_high_ob_db_tx_gain_1p2); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 422 | else if (AR_SREV_9330_11(ah)) |
| 423 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 424 | ar9331_modes_high_ob_db_tx_gain_1p1); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 425 | else if (AR_SREV_9340(ah)) |
| 426 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 427 | ar9340Modes_high_ob_db_tx_gain_table_1p0); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 428 | else if (AR_SREV_9485_11(ah)) |
| 429 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 430 | ar9485Modes_high_ob_db_tx_gain_1_1); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 431 | else if (AR_SREV_9580(ah)) |
| 432 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 433 | ar9580_1p0_high_ob_db_tx_gain_table); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 434 | else if (AR_SREV_9550(ah)) |
| 435 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 436 | ar955x_1p0_modes_no_xpa_tx_gain_table); |
Rajkumar Manoharan | 423e38e | 2011-10-13 11:00:44 +0530 | [diff] [blame] | 437 | else if (AR_SREV_9462_20(ah)) |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 438 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 439 | ar9462_modes_high_ob_db_tx_gain_table_2p0); |
Sujith Manoharan | aaa53ee | 2012-09-10 09:19:54 +0530 | [diff] [blame] | 440 | else if (AR_SREV_9565(ah)) |
| 441 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 442 | ar9565_1p0_modes_high_ob_db_tx_gain_table); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 443 | else |
| 444 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 445 | ar9300Modes_high_ob_db_tx_gain_table_2p2); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 446 | } |
| 447 | |
| 448 | static void ar9003_tx_gain_table_mode2(struct ath_hw *ah) |
| 449 | { |
| 450 | if (AR_SREV_9330_12(ah)) |
| 451 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 452 | ar9331_modes_low_ob_db_tx_gain_1p2); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 453 | else if (AR_SREV_9330_11(ah)) |
| 454 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 455 | ar9331_modes_low_ob_db_tx_gain_1p1); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 456 | else if (AR_SREV_9340(ah)) |
| 457 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 458 | ar9340Modes_low_ob_db_tx_gain_table_1p0); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 459 | else if (AR_SREV_9485_11(ah)) |
| 460 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 461 | ar9485Modes_low_ob_db_tx_gain_1_1); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 462 | else if (AR_SREV_9580(ah)) |
| 463 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 464 | ar9580_1p0_low_ob_db_tx_gain_table); |
Sujith Manoharan | aaa53ee | 2012-09-10 09:19:54 +0530 | [diff] [blame] | 465 | else if (AR_SREV_9565(ah)) |
| 466 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 467 | ar9565_1p0_modes_low_ob_db_tx_gain_table); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 468 | else |
| 469 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 470 | ar9300Modes_low_ob_db_tx_gain_table_2p2); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 471 | } |
| 472 | |
| 473 | static void ar9003_tx_gain_table_mode3(struct ath_hw *ah) |
| 474 | { |
| 475 | if (AR_SREV_9330_12(ah)) |
| 476 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 477 | ar9331_modes_high_power_tx_gain_1p2); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 478 | else if (AR_SREV_9330_11(ah)) |
| 479 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 480 | ar9331_modes_high_power_tx_gain_1p1); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 481 | else if (AR_SREV_9340(ah)) |
| 482 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 483 | ar9340Modes_high_power_tx_gain_table_1p0); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 484 | else if (AR_SREV_9485_11(ah)) |
| 485 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 486 | ar9485Modes_high_power_tx_gain_1_1); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 487 | else if (AR_SREV_9580(ah)) |
| 488 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 489 | ar9580_1p0_high_power_tx_gain_table); |
Sujith Manoharan | aaa53ee | 2012-09-10 09:19:54 +0530 | [diff] [blame] | 490 | else if (AR_SREV_9565(ah)) |
| 491 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 492 | ar9565_1p0_modes_high_power_tx_gain_table); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 493 | else |
| 494 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 495 | ar9300Modes_high_power_tx_gain_table_2p2); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 496 | } |
| 497 | |
Felix Fietkau | b05a011 | 2012-07-15 19:53:32 +0200 | [diff] [blame] | 498 | static void ar9003_tx_gain_table_mode4(struct ath_hw *ah) |
| 499 | { |
| 500 | if (AR_SREV_9340(ah)) |
| 501 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 502 | ar9340Modes_mixed_ob_db_tx_gain_table_1p0); |
Felix Fietkau | b05a011 | 2012-07-15 19:53:32 +0200 | [diff] [blame] | 503 | else if (AR_SREV_9580(ah)) |
| 504 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 505 | ar9580_1p0_mixed_ob_db_tx_gain_table); |
Felix Fietkau | b05a011 | 2012-07-15 19:53:32 +0200 | [diff] [blame] | 506 | } |
| 507 | |
Luis R. Rodriguez | c14a85d | 2010-04-15 17:39:21 -0400 | [diff] [blame] | 508 | static void ar9003_tx_gain_table_apply(struct ath_hw *ah) |
| 509 | { |
| 510 | switch (ar9003_hw_get_tx_gain_idx(ah)) { |
| 511 | case 0: |
| 512 | default: |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 513 | ar9003_tx_gain_table_mode0(ah); |
Luis R. Rodriguez | c14a85d | 2010-04-15 17:39:21 -0400 | [diff] [blame] | 514 | break; |
| 515 | case 1: |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 516 | ar9003_tx_gain_table_mode1(ah); |
Luis R. Rodriguez | c14a85d | 2010-04-15 17:39:21 -0400 | [diff] [blame] | 517 | break; |
| 518 | case 2: |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 519 | ar9003_tx_gain_table_mode2(ah); |
Vasanthakumar Thiagarajan | ff48ba4 | 2010-12-06 04:27:38 -0800 | [diff] [blame] | 520 | break; |
| 521 | case 3: |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 522 | ar9003_tx_gain_table_mode3(ah); |
Luis R. Rodriguez | c14a85d | 2010-04-15 17:39:21 -0400 | [diff] [blame] | 523 | break; |
Felix Fietkau | b05a011 | 2012-07-15 19:53:32 +0200 | [diff] [blame] | 524 | case 4: |
| 525 | ar9003_tx_gain_table_mode4(ah); |
| 526 | break; |
Luis R. Rodriguez | c14a85d | 2010-04-15 17:39:21 -0400 | [diff] [blame] | 527 | } |
| 528 | } |
| 529 | |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 530 | static void ar9003_rx_gain_table_mode0(struct ath_hw *ah) |
| 531 | { |
| 532 | if (AR_SREV_9330_12(ah)) |
| 533 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 534 | ar9331_common_rx_gain_1p2); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 535 | else if (AR_SREV_9330_11(ah)) |
| 536 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 537 | ar9331_common_rx_gain_1p1); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 538 | else if (AR_SREV_9340(ah)) |
| 539 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 540 | ar9340Common_rx_gain_table_1p0); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 541 | else if (AR_SREV_9485_11(ah)) |
| 542 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 543 | ar9485Common_wo_xlna_rx_gain_1_1); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 544 | else if (AR_SREV_9550(ah)) { |
| 545 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 546 | ar955x_1p0_common_rx_gain_table); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 547 | INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 548 | ar955x_1p0_common_rx_gain_bounds); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 549 | } else if (AR_SREV_9580(ah)) |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 550 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 551 | ar9580_1p0_rx_gain_table); |
Rajkumar Manoharan | 423e38e | 2011-10-13 11:00:44 +0530 | [diff] [blame] | 552 | else if (AR_SREV_9462_20(ah)) |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 553 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 554 | ar9462_common_rx_gain_table_2p0); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 555 | else |
| 556 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 557 | ar9300Common_rx_gain_table_2p2); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 558 | } |
| 559 | |
| 560 | static void ar9003_rx_gain_table_mode1(struct ath_hw *ah) |
| 561 | { |
| 562 | if (AR_SREV_9330_12(ah)) |
| 563 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 564 | ar9331_common_wo_xlna_rx_gain_1p2); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 565 | else if (AR_SREV_9330_11(ah)) |
| 566 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 567 | ar9331_common_wo_xlna_rx_gain_1p1); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 568 | else if (AR_SREV_9340(ah)) |
| 569 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 570 | ar9340Common_wo_xlna_rx_gain_table_1p0); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 571 | else if (AR_SREV_9485_11(ah)) |
| 572 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 573 | ar9485Common_wo_xlna_rx_gain_1_1); |
Rajkumar Manoharan | 423e38e | 2011-10-13 11:00:44 +0530 | [diff] [blame] | 574 | else if (AR_SREV_9462_20(ah)) |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 575 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 576 | ar9462_common_wo_xlna_rx_gain_table_2p0); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 577 | else if (AR_SREV_9550(ah)) { |
| 578 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 579 | ar955x_1p0_common_wo_xlna_rx_gain_table); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 580 | INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 581 | ar955x_1p0_common_wo_xlna_rx_gain_bounds); |
Gabor Juhos | 8bc45c6 | 2012-07-03 19:13:23 +0200 | [diff] [blame] | 582 | } else if (AR_SREV_9580(ah)) |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 583 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 584 | ar9580_1p0_wo_xlna_rx_gain_table); |
Sujith Manoharan | aaa53ee | 2012-09-10 09:19:54 +0530 | [diff] [blame] | 585 | else if (AR_SREV_9565(ah)) |
| 586 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
| 587 | ar9565_1p0_common_wo_xlna_rx_gain_table); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 588 | else |
| 589 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 590 | ar9300Common_wo_xlna_rx_gain_table_2p2); |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 591 | } |
| 592 | |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 593 | static void ar9003_rx_gain_table_mode2(struct ath_hw *ah) |
| 594 | { |
Sujith Manoharan | c91ec46 | 2012-02-22 12:40:03 +0530 | [diff] [blame] | 595 | if (AR_SREV_9462_20(ah)) |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 596 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
Felix Fietkau | a364517 | 2012-07-15 19:53:33 +0200 | [diff] [blame] | 597 | ar9462_common_mixed_rx_gain_table_2p0); |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 598 | } |
| 599 | |
Luis R. Rodriguez | c14a85d | 2010-04-15 17:39:21 -0400 | [diff] [blame] | 600 | static void ar9003_rx_gain_table_apply(struct ath_hw *ah) |
| 601 | { |
| 602 | switch (ar9003_hw_get_rx_gain_idx(ah)) { |
| 603 | case 0: |
| 604 | default: |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 605 | ar9003_rx_gain_table_mode0(ah); |
Luis R. Rodriguez | c14a85d | 2010-04-15 17:39:21 -0400 | [diff] [blame] | 606 | break; |
| 607 | case 1: |
Senthil Balasubramanian | 4d0707e | 2011-09-13 22:38:17 +0530 | [diff] [blame] | 608 | ar9003_rx_gain_table_mode1(ah); |
Luis R. Rodriguez | c14a85d | 2010-04-15 17:39:21 -0400 | [diff] [blame] | 609 | break; |
Senthil Balasubramanian | 2577c6e | 2011-09-13 22:38:18 +0530 | [diff] [blame] | 610 | case 2: |
| 611 | ar9003_rx_gain_table_mode2(ah); |
| 612 | break; |
Luis R. Rodriguez | c14a85d | 2010-04-15 17:39:21 -0400 | [diff] [blame] | 613 | } |
| 614 | } |
| 615 | |
| 616 | /* set gain table pointers according to values read from the eeprom */ |
| 617 | static void ar9003_hw_init_mode_gain_regs(struct ath_hw *ah) |
| 618 | { |
| 619 | ar9003_tx_gain_table_apply(ah); |
| 620 | ar9003_rx_gain_table_apply(ah); |
| 621 | } |
| 622 | |
Luis R. Rodriguez | b3950e6 | 2010-04-15 17:39:03 -0400 | [diff] [blame] | 623 | /* |
| 624 | * Helper for ASPM support. |
| 625 | * |
| 626 | * Disable PLL when in L0s as well as receiver clock when in L1. |
| 627 | * This power saving option must be enabled through the SerDes. |
| 628 | * |
| 629 | * Programming the SerDes must go through the same 288 bit serial shift |
| 630 | * register as the other analog registers. Hence the 9 writes. |
| 631 | */ |
| 632 | static void ar9003_hw_configpcipowersave(struct ath_hw *ah, |
Stanislaw Gruszka | 84c87dc | 2011-08-05 13:10:32 +0200 | [diff] [blame] | 633 | bool power_off) |
Luis R. Rodriguez | b3950e6 | 2010-04-15 17:39:03 -0400 | [diff] [blame] | 634 | { |
Luis R. Rodriguez | b3950e6 | 2010-04-15 17:39:03 -0400 | [diff] [blame] | 635 | /* Nothing to do on restore for 11N */ |
Stanislaw Gruszka | 84c87dc | 2011-08-05 13:10:32 +0200 | [diff] [blame] | 636 | if (!power_off /* !restore */) { |
Luis R. Rodriguez | b3950e6 | 2010-04-15 17:39:03 -0400 | [diff] [blame] | 637 | /* set bit 19 to allow forcing of pcie core into L1 state */ |
| 638 | REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA); |
| 639 | |
| 640 | /* Several PCIe massages to ensure proper behaviour */ |
| 641 | if (ah->config.pcie_waen) |
| 642 | REG_WRITE(ah, AR_WA, ah->config.pcie_waen); |
Luis R. Rodriguez | 9a658d2 | 2010-06-21 18:38:47 -0400 | [diff] [blame] | 643 | else |
| 644 | REG_WRITE(ah, AR_WA, ah->WARegVal); |
Luis R. Rodriguez | b3950e6 | 2010-04-15 17:39:03 -0400 | [diff] [blame] | 645 | } |
Luis R. Rodriguez | 653fe37 | 2010-06-21 18:38:48 -0400 | [diff] [blame] | 646 | |
| 647 | /* |
| 648 | * Configire PCIE after Ini init. SERDES values now come from ini file |
| 649 | * This enables PCIe low power mode. |
| 650 | */ |
Luis R. Rodriguez | 6a0ec30 | 2010-06-21 18:38:49 -0400 | [diff] [blame] | 651 | if (ah->config.pcieSerDesWrite) { |
Luis R. Rodriguez | 653fe37 | 2010-06-21 18:38:48 -0400 | [diff] [blame] | 652 | unsigned int i; |
Luis R. Rodriguez | d5c4d19 | 2010-06-21 18:38:50 -0400 | [diff] [blame] | 653 | struct ar5416IniArray *array; |
Luis R. Rodriguez | 653fe37 | 2010-06-21 18:38:48 -0400 | [diff] [blame] | 654 | |
Luis R. Rodriguez | d5c4d19 | 2010-06-21 18:38:50 -0400 | [diff] [blame] | 655 | array = power_off ? &ah->iniPcieSerdes : |
| 656 | &ah->iniPcieSerdesLowPower; |
| 657 | |
| 658 | for (i = 0; i < array->ia_rows; i++) { |
Luis R. Rodriguez | 653fe37 | 2010-06-21 18:38:48 -0400 | [diff] [blame] | 659 | REG_WRITE(ah, |
Luis R. Rodriguez | d5c4d19 | 2010-06-21 18:38:50 -0400 | [diff] [blame] | 660 | INI_RA(array, i, 0), |
| 661 | INI_RA(array, i, 1)); |
Luis R. Rodriguez | 653fe37 | 2010-06-21 18:38:48 -0400 | [diff] [blame] | 662 | } |
| 663 | } |
Luis R. Rodriguez | b3950e6 | 2010-04-15 17:39:03 -0400 | [diff] [blame] | 664 | } |
| 665 | |
| 666 | /* Sets up the AR9003 hardware familiy callbacks */ |
| 667 | void ar9003_hw_attach_ops(struct ath_hw *ah) |
| 668 | { |
| 669 | struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); |
| 670 | struct ath_hw_ops *ops = ath9k_hw_ops(ah); |
| 671 | |
| 672 | priv_ops->init_mode_regs = ar9003_hw_init_mode_regs; |
Luis R. Rodriguez | c14a85d | 2010-04-15 17:39:21 -0400 | [diff] [blame] | 673 | priv_ops->init_mode_gain_regs = ar9003_hw_init_mode_gain_regs; |
Luis R. Rodriguez | b3950e6 | 2010-04-15 17:39:03 -0400 | [diff] [blame] | 674 | |
| 675 | ops->config_pci_powersave = ar9003_hw_configpcipowersave; |
| 676 | |
| 677 | ar9003_hw_attach_phy_ops(ah); |
| 678 | ar9003_hw_attach_calib_ops(ah); |
| 679 | ar9003_hw_attach_mac_ops(ah); |
Luis R. Rodriguez | b3950e6 | 2010-04-15 17:39:03 -0400 | [diff] [blame] | 680 | } |