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Thomas Gleixner6eda5832009-05-01 18:29:57 +02001#ifndef _PERF_PERF_H
2#define _PERF_PERF_H
3
David Howellsd2709c72012-11-19 22:21:03 +00004#include <asm/unistd.h>
5
Vince Weaver11d15782009-07-08 17:46:14 -04006#if defined(__i386__)
Peter Zijlstraa94d3422013-10-30 11:42:46 +01007#define mb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
8#define wmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
Vince Weaver11d15782009-07-08 17:46:14 -04009#define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
10#define cpu_relax() asm volatile("rep; nop" ::: "memory");
Stephane Eranianfbe96f22011-09-30 15:40:40 +020011#define CPUINFO_PROC "model name"
Ingo Molnareae7a752012-03-14 12:42:34 -030012#ifndef __NR_perf_event_open
13# define __NR_perf_event_open 336
14#endif
Davidlohr Buesoa0439712013-12-14 20:31:55 -080015#ifndef __NR_futex
16# define __NR_futex 240
17#endif
Vince Weaver11d15782009-07-08 17:46:14 -040018#endif
19
20#if defined(__x86_64__)
Peter Zijlstraa94d3422013-10-30 11:42:46 +010021#define mb() asm volatile("mfence" ::: "memory")
22#define wmb() asm volatile("sfence" ::: "memory")
Peter Zijlstra1a482f32009-05-23 18:28:58 +020023#define rmb() asm volatile("lfence" ::: "memory")
24#define cpu_relax() asm volatile("rep; nop" ::: "memory");
Stephane Eranianfbe96f22011-09-30 15:40:40 +020025#define CPUINFO_PROC "model name"
Ingo Molnareae7a752012-03-14 12:42:34 -030026#ifndef __NR_perf_event_open
27# define __NR_perf_event_open 298
28#endif
Davidlohr Buesoa0439712013-12-14 20:31:55 -080029#ifndef __NR_futex
30# define __NR_futex 202
31#endif
Peter Zijlstra1a482f32009-05-23 18:28:58 +020032#endif
33
34#ifdef __powerpc__
Sukadev Bhattiprolu1483c2a2012-10-31 11:21:28 -070035#include "../../arch/powerpc/include/uapi/asm/unistd.h"
Peter Zijlstraa94d3422013-10-30 11:42:46 +010036#define mb() asm volatile ("sync" ::: "memory")
37#define wmb() asm volatile ("sync" ::: "memory")
Peter Zijlstra1a482f32009-05-23 18:28:58 +020038#define rmb() asm volatile ("sync" ::: "memory")
Stephane Eranianfbe96f22011-09-30 15:40:40 +020039#define CPUINFO_PROC "cpu"
Peter Zijlstra1a482f32009-05-23 18:28:58 +020040#endif
41
Martin Schwidefsky12310e92009-06-22 12:08:22 +020042#ifdef __s390__
Peter Zijlstraa94d3422013-10-30 11:42:46 +010043#define mb() asm volatile("bcr 15,0" ::: "memory")
44#define wmb() asm volatile("bcr 15,0" ::: "memory")
Martin Schwidefsky12310e92009-06-22 12:08:22 +020045#define rmb() asm volatile("bcr 15,0" ::: "memory")
Martin Schwidefsky12310e92009-06-22 12:08:22 +020046#endif
47
Paul Mundtfebe8342009-06-25 14:41:57 +090048#ifdef __sh__
Paul Mundtfebe8342009-06-25 14:41:57 +090049#if defined(__SH4A__) || defined(__SH5__)
Peter Zijlstraa94d3422013-10-30 11:42:46 +010050# define mb() asm volatile("synco" ::: "memory")
51# define wmb() asm volatile("synco" ::: "memory")
Paul Mundtfebe8342009-06-25 14:41:57 +090052# define rmb() asm volatile("synco" ::: "memory")
53#else
Peter Zijlstraa94d3422013-10-30 11:42:46 +010054# define mb() asm volatile("" ::: "memory")
55# define wmb() asm volatile("" ::: "memory")
Paul Mundtfebe8342009-06-25 14:41:57 +090056# define rmb() asm volatile("" ::: "memory")
57#endif
Stephane Eranianfbe96f22011-09-30 15:40:40 +020058#define CPUINFO_PROC "cpu type"
Paul Mundtfebe8342009-06-25 14:41:57 +090059#endif
60
Kyle McMartin2d4618d2009-06-23 21:38:49 -040061#ifdef __hppa__
Peter Zijlstraa94d3422013-10-30 11:42:46 +010062#define mb() asm volatile("" ::: "memory")
63#define wmb() asm volatile("" ::: "memory")
Kyle McMartin2d4618d2009-06-23 21:38:49 -040064#define rmb() asm volatile("" ::: "memory")
Stephane Eranianfbe96f22011-09-30 15:40:40 +020065#define CPUINFO_PROC "cpu"
Kyle McMartin2d4618d2009-06-23 21:38:49 -040066#endif
67
Jens Axboe825c9fb2009-09-04 02:56:22 -070068#ifdef __sparc__
Peter Zijlstraa94d3422013-10-30 11:42:46 +010069#ifdef __LP64__
70#define mb() asm volatile("ba,pt %%xcc, 1f\n" \
71 "membar #StoreLoad\n" \
72 "1:\n":::"memory")
73#else
74#define mb() asm volatile("":::"memory")
75#endif
76#define wmb() asm volatile("":::"memory")
Jens Axboe825c9fb2009-09-04 02:56:22 -070077#define rmb() asm volatile("":::"memory")
Stephane Eranianfbe96f22011-09-30 15:40:40 +020078#define CPUINFO_PROC "cpu"
Jens Axboe825c9fb2009-09-04 02:56:22 -070079#endif
80
Michael Creefcd14b32009-10-26 21:32:06 +130081#ifdef __alpha__
Peter Zijlstraa94d3422013-10-30 11:42:46 +010082#define mb() asm volatile("mb" ::: "memory")
83#define wmb() asm volatile("wmb" ::: "memory")
Michael Creefcd14b32009-10-26 21:32:06 +130084#define rmb() asm volatile("mb" ::: "memory")
Stephane Eranianfbe96f22011-09-30 15:40:40 +020085#define CPUINFO_PROC "cpu model"
Michael Creefcd14b32009-10-26 21:32:06 +130086#endif
87
Luck, Tony11ada262009-11-17 09:05:56 -080088#ifdef __ia64__
Peter Zijlstraa94d3422013-10-30 11:42:46 +010089#define mb() asm volatile ("mf" ::: "memory")
90#define wmb() asm volatile ("mf" ::: "memory")
Luck, Tony11ada262009-11-17 09:05:56 -080091#define rmb() asm volatile ("mf" ::: "memory")
92#define cpu_relax() asm volatile ("hint @pause" ::: "memory")
Stephane Eranianfbe96f22011-09-30 15:40:40 +020093#define CPUINFO_PROC "model name"
Luck, Tony11ada262009-11-17 09:05:56 -080094#endif
95
Jamie Iles58e9f942009-12-11 12:20:09 +000096#ifdef __arm__
Jamie Iles58e9f942009-12-11 12:20:09 +000097/*
98 * Use the __kuser_memory_barrier helper in the CPU helper page. See
99 * arch/arm/kernel/entry-armv.S in the kernel source for details.
100 */
Peter Zijlstraa94d3422013-10-30 11:42:46 +0100101#define mb() ((void(*)(void))0xffff0fa0)()
102#define wmb() ((void(*)(void))0xffff0fa0)()
Will Deaconda7196e2010-03-03 11:47:58 +0000103#define rmb() ((void(*)(void))0xffff0fa0)()
Stephane Eranianfbe96f22011-09-30 15:40:40 +0200104#define CPUINFO_PROC "Processor"
Jamie Iles58e9f942009-12-11 12:20:09 +0000105#endif
106
Will Deacon03089682012-03-05 11:49:32 +0000107#ifdef __aarch64__
Peter Zijlstraa94d3422013-10-30 11:42:46 +0100108#define mb() asm volatile("dmb ish" ::: "memory")
Peter Zijlstraf428ebd2014-01-24 16:40:02 +0100109#define wmb() asm volatile("dmb ishst" ::: "memory")
110#define rmb() asm volatile("dmb ishld" ::: "memory")
Will Deacon03089682012-03-05 11:49:32 +0000111#define cpu_relax() asm volatile("yield" ::: "memory")
112#endif
113
Deng-Cheng Zhuc1e028e2010-10-12 19:33:33 +0800114#ifdef __mips__
Peter Zijlstraa94d3422013-10-30 11:42:46 +0100115#define mb() asm volatile( \
Deng-Cheng Zhuc1e028e2010-10-12 19:33:33 +0800116 ".set mips2\n\t" \
117 "sync\n\t" \
118 ".set mips0" \
119 : /* no output */ \
120 : /* no input */ \
121 : "memory")
Peter Zijlstraa94d3422013-10-30 11:42:46 +0100122#define wmb() mb()
123#define rmb() mb()
Stephane Eranianfbe96f22011-09-30 15:40:40 +0200124#define CPUINFO_PROC "cpu model"
Deng-Cheng Zhuc1e028e2010-10-12 19:33:33 +0800125#endif
126
Vineet Gupta98547832013-01-18 15:12:24 +0530127#ifdef __arc__
Peter Zijlstraa94d3422013-10-30 11:42:46 +0100128#define mb() asm volatile("" ::: "memory")
129#define wmb() asm volatile("" ::: "memory")
Vineet Gupta98547832013-01-18 15:12:24 +0530130#define rmb() asm volatile("" ::: "memory")
Vineet Gupta98547832013-01-18 15:12:24 +0530131#define CPUINFO_PROC "Processor"
132#endif
133
James Hogan1bea5b82013-01-31 12:22:37 +0000134#ifdef __metag__
Peter Zijlstraa94d3422013-10-30 11:42:46 +0100135#define mb() asm volatile("" ::: "memory")
136#define wmb() asm volatile("" ::: "memory")
James Hogan1bea5b82013-01-31 12:22:37 +0000137#define rmb() asm volatile("" ::: "memory")
James Hogan1bea5b82013-01-31 12:22:37 +0000138#define CPUINFO_PROC "CPU"
139#endif
140
Baruch Siach3a468172014-01-13 12:27:35 +0200141#ifdef __xtensa__
142#define mb() asm volatile("memw" ::: "memory")
143#define wmb() asm volatile("memw" ::: "memory")
144#define rmb() asm volatile("" ::: "memory")
145#define CPUINFO_PROC "core ID"
146#endif
147
Zhigang Lu620830b2014-02-11 11:03:48 +0800148#ifdef __tile__
149#define mb() asm volatile ("mf" ::: "memory")
150#define wmb() asm volatile ("mf" ::: "memory")
151#define rmb() asm volatile ("mf" ::: "memory")
152#define cpu_relax() asm volatile ("mfspr zero, PASS" ::: "memory")
153#define CPUINFO_PROC "model name"
154#endif
155
Peter Zijlstraa94d3422013-10-30 11:42:46 +0100156#define barrier() asm volatile ("" ::: "memory")
157
158#ifndef cpu_relax
159#define cpu_relax() barrier()
160#endif
161
162#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
163
164
Peter Zijlstra1a482f32009-05-23 18:28:58 +0200165#include <time.h>
166#include <unistd.h>
167#include <sys/types.h>
168#include <sys/syscall.h>
169
David Howellsd2709c72012-11-19 22:21:03 +0000170#include <linux/perf_event.h>
Peter Zijlstra7c6a1c62009-06-25 17:05:54 +0200171#include "util/types.h"
Arnaldo Carvalho de Melo80354582010-05-17 15:51:10 -0300172#include <stdbool.h>
Peter Zijlstra1a482f32009-05-23 18:28:58 +0200173
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200174/*
Ingo Molnarcdd6c482009-09-21 12:02:48 +0200175 * prctl(PR_TASK_PERF_EVENTS_DISABLE) will (cheaply) disable all
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200176 * counters in the current task.
177 */
Ingo Molnarcdd6c482009-09-21 12:02:48 +0200178#define PR_TASK_PERF_EVENTS_DISABLE 31
179#define PR_TASK_PERF_EVENTS_ENABLE 32
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200180
Thomas Gleixnera92e702372009-05-01 18:39:47 +0200181#ifndef NSEC_PER_SEC
182# define NSEC_PER_SEC 1000000000ULL
183#endif
David Ahern70f7b4a2013-08-07 21:56:38 -0400184#ifndef NSEC_PER_USEC
185# define NSEC_PER_USEC 1000ULL
186#endif
Thomas Gleixnera92e702372009-05-01 18:39:47 +0200187
188static inline unsigned long long rdclock(void)
189{
190 struct timespec ts;
191
192 clock_gettime(CLOCK_MONOTONIC, &ts);
193 return ts.tv_sec * 1000000000ULL + ts.tv_nsec;
194}
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200195
196/*
197 * Pick up some kernel type conventions:
198 */
199#define __user
200#define asmlinkage
201
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200202#define unlikely(x) __builtin_expect(!!(x), 0)
203#define min(x, y) ({ \
204 typeof(x) _min1 = (x); \
205 typeof(y) _min2 = (y); \
206 (void) (&_min1 == &_min2); \
207 _min1 < _min2 ? _min1 : _min2; })
208
Jiri Olsa52502bf2012-10-31 15:52:47 +0100209extern bool test_attr__enabled;
210void test_attr__init(void);
211void test_attr__open(struct perf_event_attr *attr, pid_t pid, int cpu,
212 int fd, int group_fd, unsigned long flags);
213
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200214static inline int
Ingo Molnarcdd6c482009-09-21 12:02:48 +0200215sys_perf_event_open(struct perf_event_attr *attr,
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200216 pid_t pid, int cpu, int group_fd,
217 unsigned long flags)
218{
Jiri Olsa52502bf2012-10-31 15:52:47 +0100219 int fd;
220
221 fd = syscall(__NR_perf_event_open, attr, pid, cpu,
222 group_fd, flags);
223
224 if (unlikely(test_attr__enabled))
225 test_attr__open(attr, pid, cpu, fd, group_fd, flags);
226
227 return fd;
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200228}
229
Ingo Molnar85a9f922009-05-25 09:59:50 +0200230#define MAX_COUNTERS 256
231#define MAX_NR_CPUS 256
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200232
Frederic Weisbecker8cb76d92009-06-26 16:28:00 +0200233struct ip_callchain {
234 u64 nr;
235 u64 ips[0];
Peter Zijlstraf5970552009-06-18 23:22:55 +0200236};
237
Roberto Agostino Vitillob5387522012-02-09 23:21:01 +0100238struct branch_flags {
239 u64 mispred:1;
240 u64 predicted:1;
Andi Kleenf5d05bc2013-09-20 07:40:41 -0700241 u64 in_tx:1;
242 u64 abort:1;
243 u64 reserved:60;
Roberto Agostino Vitillob5387522012-02-09 23:21:01 +0100244};
245
246struct branch_entry {
247 u64 from;
248 u64 to;
249 struct branch_flags flags;
250};
251
252struct branch_stack {
253 u64 nr;
254 struct branch_entry entries[0];
255};
256
Feng Tang70cb4e92012-10-30 11:56:02 +0800257extern const char *input_name;
Arnaldo Carvalho de Melo80354582010-05-17 15:51:10 -0300258extern bool perf_host, perf_guest;
Stephane Eranianfbe96f22011-09-30 15:40:40 +0200259extern const char perf_version_string[];
Zhang, Yanmina1645ce2010-04-19 13:32:50 +0800260
Arnaldo Carvalho de Melo3af6e332011-10-13 08:52:46 -0300261void pthread__unblock_sigwinch(void);
262
Namhyung Kim12864b32012-04-26 14:15:22 +0900263#include "util/target.h"
Namhyung Kimbea03402012-04-26 14:15:15 +0900264
Jiri Olsa26d33022012-08-07 15:20:47 +0200265enum perf_call_graph_mode {
266 CALLCHAIN_NONE,
267 CALLCHAIN_FP,
Jiri Olsaa601fdf2014-02-03 12:44:43 +0100268 CALLCHAIN_DWARF,
269 CALLCHAIN_MAX
Jiri Olsa26d33022012-08-07 15:20:47 +0200270};
271
Arnaldo Carvalho de Melob4006792013-12-19 14:43:45 -0300272struct record_opts {
Arnaldo Carvalho de Melo602ad872013-11-12 16:46:16 -0300273 struct target target;
Jiri Olsa26d33022012-08-07 15:20:47 +0200274 int call_graph;
Jiri Olsaeb853e82014-02-03 12:44:42 +0100275 bool call_graph_enabled;
Arnaldo Carvalho de Meloed80f582011-11-11 15:12:56 -0200276 bool group;
Arnaldo Carvalho de Melo0f82ebc2011-11-08 14:41:57 -0200277 bool inherit_stat;
Arnaldo Carvalho de Melo509051e2014-01-14 17:52:14 -0300278 bool no_buffering;
Arnaldo Carvalho de Melo0f82ebc2011-11-08 14:41:57 -0200279 bool no_inherit;
Adrian Hunter69e7e5b2013-11-18 11:55:57 +0200280 bool no_inherit_set;
Arnaldo Carvalho de Melo0f82ebc2011-11-08 14:41:57 -0200281 bool no_samples;
282 bool raw_samples;
283 bool sample_address;
Andi Kleen05484292013-01-24 16:10:29 +0100284 bool sample_weight;
Arnaldo Carvalho de Melo0f82ebc2011-11-08 14:41:57 -0200285 bool sample_time;
Andrew Vagin3e76ac72011-12-20 17:32:45 +0300286 bool period;
Arnaldo Carvalho de Melo0f82ebc2011-11-08 14:41:57 -0200287 unsigned int freq;
Arnaldo Carvalho de Melo01c2d992011-11-09 09:16:26 -0200288 unsigned int mmap_pages;
Arnaldo Carvalho de Melo0f82ebc2011-11-08 14:41:57 -0200289 unsigned int user_freq;
Stephane Eraniana00dc312012-05-25 23:13:44 +0200290 u64 branch_stack;
Arnaldo Carvalho de Melo0f82ebc2011-11-08 14:41:57 -0200291 u64 default_interval;
292 u64 user_interval;
Jiri Olsa26d33022012-08-07 15:20:47 +0200293 u16 stack_dump_size;
Andi Kleen475eeab2013-09-20 07:40:43 -0700294 bool sample_transaction;
Andi Kleen6619a532014-01-11 13:38:27 -0800295 unsigned initial_delay;
Arnaldo Carvalho de Melo0f82ebc2011-11-08 14:41:57 -0200296};
297
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200298#endif