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Archit Tanejae1ef4d22010-09-15 18:47:29 +05301/*
2 * linux/drivers/video/omap2/dss/dss_features.h
3 *
4 * Copyright (C) 2010 Texas Instruments
5 * Author: Archit Taneja <archit@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef __OMAP2_DSS_FEATURES_H
21#define __OMAP2_DSS_FEATURES_H
22
Mythri P K60634a22011-09-08 19:06:26 +053023#if defined(CONFIG_OMAP4_DSS_HDMI)
24#include "ti_hdmi.h"
25#endif
26
Chandrabhanu Mahapatrae86d4562012-06-29 10:43:13 +053027#define MAX_DSS_MANAGERS 4
Archit Tanejab8c095b2011-09-13 18:20:33 +053028#define MAX_DSS_OVERLAYS 4
Chandrabhanu Mahapatrae86d4562012-06-29 10:43:13 +053029#define MAX_DSS_LCD_MANAGERS 3
Archit Tanejaa72b64b2011-05-12 17:26:26 +053030#define MAX_NUM_DSI 2
Archit Tanejae1ef4d22010-09-15 18:47:29 +053031
32/* DSS has feature id */
33enum dss_feat_id {
Archit Tanejac124f232012-01-30 10:52:39 +053034 FEAT_LCDENABLEPOL,
35 FEAT_LCDENABLESIGNAL,
36 FEAT_PCKFREEENABLE,
37 FEAT_FUNCGATED,
38 FEAT_MGR_LCD2,
Chandrabhanu Mahapatrae86d4562012-06-29 10:43:13 +053039 FEAT_MGR_LCD3,
Archit Tanejac124f232012-01-30 10:52:39 +053040 FEAT_LINEBUFFERSPLIT,
41 FEAT_ROWREPEATENABLE,
42 FEAT_RESIZECONF,
Murthy, Raghuveer5c6366e2011-03-03 09:27:58 -060043 /* Independent core clk divider */
Archit Tanejac124f232012-01-30 10:52:39 +053044 FEAT_CORE_CLK_DIV,
45 FEAT_LCD_CLK_SRC,
Tomi Valkeinenc94dfe02011-04-15 10:42:59 +030046 /* DSI-PLL power command 0x3 is not working */
Archit Tanejac124f232012-01-30 10:52:39 +053047 FEAT_DSI_PLL_PWR_BUG,
48 FEAT_DSI_PLL_FREQSEL,
49 FEAT_DSI_DCS_CMD_CONFIG_VC,
50 FEAT_DSI_VC_OCP_WIDTH,
51 FEAT_DSI_REVERSE_TXCLKESC,
52 FEAT_DSI_GNQ,
53 FEAT_HDMI_CTS_SWMODE,
Ricardo Neri70988192012-02-16 09:20:57 -060054 FEAT_HDMI_AUDIO_USE_MCLK,
Archit Tanejac124f232012-01-30 10:52:39 +053055 FEAT_HANDLE_UV_SEPARATE,
56 FEAT_ATTR2,
57 FEAT_VENC_REQUIRES_TV_DAC_CLK,
58 FEAT_CPR,
59 FEAT_PRELOAD,
60 FEAT_FIR_COEF_V,
61 FEAT_ALPHA_FIXED_ZORDER,
62 FEAT_ALPHA_FREE_ZORDER,
63 FEAT_FIFO_MERGE,
Tomi Valkeinene0e405b2012-01-13 13:18:11 +020064 /* An unknown HW bug causing the normal FIFO thresholds not to work */
Archit Tanejac124f232012-01-30 10:52:39 +053065 FEAT_OMAP3_DSI_FIFO_BUG,
Chandrabhanu Mahapatra65e006f2012-05-11 19:19:55 +053066 FEAT_BURST_2D,
Archit Tanejae1ef4d22010-09-15 18:47:29 +053067};
68
69/* DSS register field id */
70enum dss_feat_reg_field {
71 FEAT_REG_FIRHINC,
72 FEAT_REG_FIRVINC,
73 FEAT_REG_FIFOHIGHTHRESHOLD,
74 FEAT_REG_FIFOLOWTHRESHOLD,
75 FEAT_REG_FIFOSIZE,
Archit Taneja87a74842011-03-02 11:19:50 +053076 FEAT_REG_HORIZONTALACCU,
77 FEAT_REG_VERTICALACCU,
Taneja, Architea751592011-03-08 05:50:35 -060078 FEAT_REG_DISPC_CLK_SWITCH,
Taneja, Archit49641112011-03-14 23:28:23 -050079 FEAT_REG_DSIPLL_REGN,
80 FEAT_REG_DSIPLL_REGM,
81 FEAT_REG_DSIPLL_REGM_DISPC,
82 FEAT_REG_DSIPLL_REGM_DSI,
Archit Tanejae1ef4d22010-09-15 18:47:29 +053083};
84
Taneja, Archit31ef8232011-03-14 23:28:22 -050085enum dss_range_param {
86 FEAT_PARAM_DSS_FCK,
Tomi Valkeinen9eaaf202011-08-29 15:56:04 +030087 FEAT_PARAM_DSS_PCD,
Taneja, Archit49641112011-03-14 23:28:23 -050088 FEAT_PARAM_DSIPLL_REGN,
89 FEAT_PARAM_DSIPLL_REGM,
90 FEAT_PARAM_DSIPLL_REGM_DISPC,
91 FEAT_PARAM_DSIPLL_REGM_DSI,
92 FEAT_PARAM_DSIPLL_FINT,
93 FEAT_PARAM_DSIPLL_LPDIV,
Archit Taneja0373cac2011-09-08 13:25:17 +053094 FEAT_PARAM_DOWNSCALE,
Chandrabhanu Mahapatra7282f1b2011-12-19 14:03:56 +053095 FEAT_PARAM_LINEWIDTH,
Archit Taneja8f366162012-04-16 12:53:44 +053096 FEAT_PARAM_MGR_WIDTH,
97 FEAT_PARAM_MGR_HEIGHT,
Taneja, Archit31ef8232011-03-14 23:28:22 -050098};
99
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530100/* DSS Feature Functions */
101int dss_feat_get_num_mgrs(void);
102int dss_feat_get_num_ovls(void);
Taneja, Archit31ef8232011-03-14 23:28:22 -0500103unsigned long dss_feat_get_param_min(enum dss_range_param param);
104unsigned long dss_feat_get_param_max(enum dss_range_param param);
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530105enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
106enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
Tomi Valkeinen67019db2011-08-15 15:18:15 +0300107enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane);
Archit Taneja8dad2ab2010-11-25 17:58:10 +0530108bool dss_feat_color_mode_supported(enum omap_plane plane,
109 enum omap_color_mode color_mode);
Archit Taneja89a35e52011-04-12 13:52:23 +0530110const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id);
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530111
Tomi Valkeinen5ed8cf52011-06-21 09:35:36 +0300112u32 dss_feat_get_buffer_size_unit(void); /* in bytes */
113u32 dss_feat_get_burst_size_unit(void); /* in bytes */
114
Chandrabhanu Mahapatra65e006f2012-05-11 19:19:55 +0530115bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type);
116
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530117bool dss_has_feature(enum dss_feat_id id);
118void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end);
119void dss_features_init(void);
Mythri P K60634a22011-09-08 19:06:26 +0530120#if defined(CONFIG_OMAP4_DSS_HDMI)
121void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data);
122#endif
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530123#endif