Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1 | /* |
| 2 | * MUSB OTG driver - support for Mentor's DMA controller |
| 3 | * |
| 4 | * Copyright 2005 Mentor Graphics Corporation |
| 5 | * Copyright (C) 2005-2007 by Texas Instruments |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License |
| 9 | * version 2 as published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, but |
| 12 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA |
| 19 | * 02110-1301 USA |
| 20 | * |
| 21 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 22 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 23 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 24 | * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 25 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 26 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 27 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 28 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 30 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 31 | * |
| 32 | */ |
| 33 | #include <linux/device.h> |
| 34 | #include <linux/interrupt.h> |
| 35 | #include <linux/platform_device.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 36 | #include <linux/slab.h> |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 37 | #include "musb_core.h" |
Bryan Wu | 6995eb6 | 2008-12-02 21:33:47 +0200 | [diff] [blame] | 38 | #include "musbhsdma.h" |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 39 | |
| 40 | static int dma_controller_start(struct dma_controller *c) |
| 41 | { |
| 42 | /* nothing to do */ |
| 43 | return 0; |
| 44 | } |
| 45 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 46 | static void dma_channel_release(struct dma_channel *channel); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 47 | |
| 48 | static int dma_controller_stop(struct dma_controller *c) |
| 49 | { |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 50 | struct musb_dma_controller *controller = container_of(c, |
| 51 | struct musb_dma_controller, controller); |
| 52 | struct musb *musb = controller->private_data; |
| 53 | struct dma_channel *channel; |
| 54 | u8 bit; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 55 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 56 | if (controller->used_channels != 0) { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 57 | dev_err(musb->controller, |
| 58 | "Stopping DMA controller while channel active\n"); |
| 59 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 60 | for (bit = 0; bit < MUSB_HSDMA_CHANNELS; bit++) { |
| 61 | if (controller->used_channels & (1 << bit)) { |
| 62 | channel = &controller->channel[bit].channel; |
| 63 | dma_channel_release(channel); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 64 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 65 | if (!controller->used_channels) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 66 | break; |
| 67 | } |
| 68 | } |
| 69 | } |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 70 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 71 | return 0; |
| 72 | } |
| 73 | |
| 74 | static struct dma_channel *dma_channel_allocate(struct dma_controller *c, |
| 75 | struct musb_hw_ep *hw_ep, u8 transmit) |
| 76 | { |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 77 | struct musb_dma_controller *controller = container_of(c, |
| 78 | struct musb_dma_controller, controller); |
| 79 | struct musb_dma_channel *musb_channel = NULL; |
| 80 | struct dma_channel *channel = NULL; |
| 81 | u8 bit; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 82 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 83 | for (bit = 0; bit < MUSB_HSDMA_CHANNELS; bit++) { |
| 84 | if (!(controller->used_channels & (1 << bit))) { |
| 85 | controller->used_channels |= (1 << bit); |
| 86 | musb_channel = &(controller->channel[bit]); |
| 87 | musb_channel->controller = controller; |
| 88 | musb_channel->idx = bit; |
| 89 | musb_channel->epnum = hw_ep->epnum; |
| 90 | musb_channel->transmit = transmit; |
| 91 | channel = &(musb_channel->channel); |
| 92 | channel->private_data = musb_channel; |
| 93 | channel->status = MUSB_DMA_STATUS_FREE; |
Anil Shetty | 6587cc0 | 2010-09-24 13:44:05 +0300 | [diff] [blame] | 94 | channel->max_len = 0x100000; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 95 | /* Tx => mode 1; Rx => mode 0 */ |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 96 | channel->desired_mode = transmit; |
| 97 | channel->actual_len = 0; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 98 | break; |
| 99 | } |
| 100 | } |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 101 | |
| 102 | return channel; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 103 | } |
| 104 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 105 | static void dma_channel_release(struct dma_channel *channel) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 106 | { |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 107 | struct musb_dma_channel *musb_channel = channel->private_data; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 108 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 109 | channel->actual_len = 0; |
| 110 | musb_channel->start_addr = 0; |
| 111 | musb_channel->len = 0; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 112 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 113 | musb_channel->controller->used_channels &= |
| 114 | ~(1 << musb_channel->idx); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 115 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 116 | channel->status = MUSB_DMA_STATUS_UNKNOWN; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 117 | } |
| 118 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 119 | static void configure_channel(struct dma_channel *channel, |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 120 | u16 packet_sz, u8 mode, |
| 121 | dma_addr_t dma_addr, u32 len) |
| 122 | { |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 123 | struct musb_dma_channel *musb_channel = channel->private_data; |
| 124 | struct musb_dma_controller *controller = musb_channel->controller; |
| 125 | void __iomem *mbase = controller->base; |
| 126 | u8 bchannel = musb_channel->idx; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 127 | u16 csr = 0; |
| 128 | |
| 129 | DBG(4, "%p, pkt_sz %d, addr 0x%x, len %d, mode %d\n", |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 130 | channel, packet_sz, dma_addr, len, mode); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 131 | |
| 132 | if (mode) { |
| 133 | csr |= 1 << MUSB_HSDMA_MODE1_SHIFT; |
| 134 | BUG_ON(len < packet_sz); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 135 | } |
Hema HK | c0f1f8e | 2010-06-24 23:07:09 +0530 | [diff] [blame] | 136 | csr |= MUSB_HSDMA_BURSTMODE_INCR16 |
| 137 | << MUSB_HSDMA_BURSTMODE_SHIFT; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 138 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 139 | csr |= (musb_channel->epnum << MUSB_HSDMA_ENDPOINT_SHIFT) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 140 | | (1 << MUSB_HSDMA_ENABLE_SHIFT) |
| 141 | | (1 << MUSB_HSDMA_IRQENABLE_SHIFT) |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 142 | | (musb_channel->transmit |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 143 | ? (1 << MUSB_HSDMA_TRANSMIT_SHIFT) |
| 144 | : 0); |
| 145 | |
| 146 | /* address/count */ |
Bryan Wu | 6995eb6 | 2008-12-02 21:33:47 +0200 | [diff] [blame] | 147 | musb_write_hsdma_addr(mbase, bchannel, dma_addr); |
| 148 | musb_write_hsdma_count(mbase, bchannel, len); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 149 | |
| 150 | /* control (this should start things) */ |
| 151 | musb_writew(mbase, |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 152 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_CONTROL), |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 153 | csr); |
| 154 | } |
| 155 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 156 | static int dma_channel_program(struct dma_channel *channel, |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 157 | u16 packet_sz, u8 mode, |
| 158 | dma_addr_t dma_addr, u32 len) |
| 159 | { |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 160 | struct musb_dma_channel *musb_channel = channel->private_data; |
Anand Gadiyar | 6e16edf | 2010-11-08 00:20:30 -0600 | [diff] [blame] | 161 | struct musb_dma_controller *controller = musb_channel->controller; |
| 162 | struct musb *musb = controller->private_data; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 163 | |
| 164 | DBG(2, "ep%d-%s pkt_sz %d, dma_addr 0x%x length %d, mode %d\n", |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 165 | musb_channel->epnum, |
| 166 | musb_channel->transmit ? "Tx" : "Rx", |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 167 | packet_sz, dma_addr, len, mode); |
| 168 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 169 | BUG_ON(channel->status == MUSB_DMA_STATUS_UNKNOWN || |
| 170 | channel->status == MUSB_DMA_STATUS_BUSY); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 171 | |
Anand Gadiyar | 6e16edf | 2010-11-08 00:20:30 -0600 | [diff] [blame] | 172 | /* |
| 173 | * The DMA engine in RTL1.8 and above cannot handle |
| 174 | * DMA addresses that are not aligned to a 4 byte boundary. |
| 175 | * It ends up masking the last two bits of the address |
| 176 | * programmed in DMA_ADDR. |
| 177 | * |
| 178 | * Fail such DMA transfers, so that the backup PIO mode |
| 179 | * can carry out the transfer |
| 180 | */ |
| 181 | if ((musb->hwvers >= MUSB_HWVERS_1800) && (dma_addr % 4)) |
| 182 | return false; |
| 183 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 184 | channel->actual_len = 0; |
| 185 | musb_channel->start_addr = dma_addr; |
| 186 | musb_channel->len = len; |
| 187 | musb_channel->max_packet_sz = packet_sz; |
| 188 | channel->status = MUSB_DMA_STATUS_BUSY; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 189 | |
Anand Gadiyar | 8ca47c8 | 2010-07-08 16:34:55 +0530 | [diff] [blame] | 190 | configure_channel(channel, packet_sz, mode, dma_addr, len); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 191 | |
| 192 | return true; |
| 193 | } |
| 194 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 195 | static int dma_channel_abort(struct dma_channel *channel) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 196 | { |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 197 | struct musb_dma_channel *musb_channel = channel->private_data; |
| 198 | void __iomem *mbase = musb_channel->controller->base; |
| 199 | |
| 200 | u8 bchannel = musb_channel->idx; |
Sergei Shtylyov | b6e434a | 2009-03-26 18:27:47 -0700 | [diff] [blame] | 201 | int offset; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 202 | u16 csr; |
| 203 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 204 | if (channel->status == MUSB_DMA_STATUS_BUSY) { |
| 205 | if (musb_channel->transmit) { |
Sergei Shtylyov | b6e434a | 2009-03-26 18:27:47 -0700 | [diff] [blame] | 206 | offset = MUSB_EP_OFFSET(musb_channel->epnum, |
| 207 | MUSB_TXCSR); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 208 | |
Sergei Shtylyov | b6e434a | 2009-03-26 18:27:47 -0700 | [diff] [blame] | 209 | /* |
| 210 | * The programming guide says that we must clear |
| 211 | * the DMAENAB bit before the DMAMODE bit... |
| 212 | */ |
| 213 | csr = musb_readw(mbase, offset); |
| 214 | csr &= ~(MUSB_TXCSR_AUTOSET | MUSB_TXCSR_DMAENAB); |
| 215 | musb_writew(mbase, offset, csr); |
| 216 | csr &= ~MUSB_TXCSR_DMAMODE; |
| 217 | musb_writew(mbase, offset, csr); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 218 | } else { |
Sergei Shtylyov | b6e434a | 2009-03-26 18:27:47 -0700 | [diff] [blame] | 219 | offset = MUSB_EP_OFFSET(musb_channel->epnum, |
| 220 | MUSB_RXCSR); |
| 221 | |
| 222 | csr = musb_readw(mbase, offset); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 223 | csr &= ~(MUSB_RXCSR_AUTOCLEAR | |
| 224 | MUSB_RXCSR_DMAENAB | |
| 225 | MUSB_RXCSR_DMAMODE); |
Sergei Shtylyov | b6e434a | 2009-03-26 18:27:47 -0700 | [diff] [blame] | 226 | musb_writew(mbase, offset, csr); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 227 | } |
| 228 | |
| 229 | musb_writew(mbase, |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 230 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_CONTROL), |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 231 | 0); |
Bryan Wu | 6995eb6 | 2008-12-02 21:33:47 +0200 | [diff] [blame] | 232 | musb_write_hsdma_addr(mbase, bchannel, 0); |
| 233 | musb_write_hsdma_count(mbase, bchannel, 0); |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 234 | channel->status = MUSB_DMA_STATUS_FREE; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 235 | } |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 236 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 237 | return 0; |
| 238 | } |
| 239 | |
| 240 | static irqreturn_t dma_controller_irq(int irq, void *private_data) |
| 241 | { |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 242 | struct musb_dma_controller *controller = private_data; |
| 243 | struct musb *musb = controller->private_data; |
| 244 | struct musb_dma_channel *musb_channel; |
| 245 | struct dma_channel *channel; |
| 246 | |
| 247 | void __iomem *mbase = controller->base; |
| 248 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 249 | irqreturn_t retval = IRQ_NONE; |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 250 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 251 | unsigned long flags; |
| 252 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 253 | u8 bchannel; |
| 254 | u8 int_hsdma; |
| 255 | |
Anand Gadiyar | f933a0c | 2009-12-28 13:40:36 +0200 | [diff] [blame] | 256 | u32 addr, count; |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 257 | u16 csr; |
| 258 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 259 | spin_lock_irqsave(&musb->lock, flags); |
| 260 | |
| 261 | int_hsdma = musb_readb(mbase, MUSB_HSDMA_INTR); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 262 | |
Cliff Cai | 6bd03e7 | 2009-11-16 16:19:26 +0530 | [diff] [blame] | 263 | #ifdef CONFIG_BLACKFIN |
| 264 | /* Clear DMA interrupt flags */ |
| 265 | musb_writeb(mbase, MUSB_HSDMA_INTR, int_hsdma); |
| 266 | #endif |
| 267 | |
Anand Gadiyar | f933a0c | 2009-12-28 13:40:36 +0200 | [diff] [blame] | 268 | if (!int_hsdma) { |
| 269 | DBG(2, "spurious DMA irq\n"); |
| 270 | |
| 271 | for (bchannel = 0; bchannel < MUSB_HSDMA_CHANNELS; bchannel++) { |
| 272 | musb_channel = (struct musb_dma_channel *) |
| 273 | &(controller->channel[bchannel]); |
| 274 | channel = &musb_channel->channel; |
| 275 | if (channel->status == MUSB_DMA_STATUS_BUSY) { |
| 276 | count = musb_read_hsdma_count(mbase, bchannel); |
| 277 | |
| 278 | if (count == 0) |
| 279 | int_hsdma |= (1 << bchannel); |
| 280 | } |
| 281 | } |
| 282 | |
| 283 | DBG(2, "int_hsdma = 0x%x\n", int_hsdma); |
| 284 | |
| 285 | if (!int_hsdma) |
| 286 | goto done; |
| 287 | } |
| 288 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 289 | for (bchannel = 0; bchannel < MUSB_HSDMA_CHANNELS; bchannel++) { |
| 290 | if (int_hsdma & (1 << bchannel)) { |
| 291 | musb_channel = (struct musb_dma_channel *) |
| 292 | &(controller->channel[bchannel]); |
| 293 | channel = &musb_channel->channel; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 294 | |
| 295 | csr = musb_readw(mbase, |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 296 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 297 | MUSB_HSDMA_CONTROL)); |
| 298 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 299 | if (csr & (1 << MUSB_HSDMA_BUSERROR_SHIFT)) { |
| 300 | musb_channel->channel.status = |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 301 | MUSB_DMA_STATUS_BUS_ABORT; |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 302 | } else { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 303 | u8 devctl; |
| 304 | |
Bryan Wu | 6995eb6 | 2008-12-02 21:33:47 +0200 | [diff] [blame] | 305 | addr = musb_read_hsdma_addr(mbase, |
| 306 | bchannel); |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 307 | channel->actual_len = addr |
| 308 | - musb_channel->start_addr; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 309 | |
Mike Frysinger | 32340d3 | 2009-11-16 16:19:29 +0530 | [diff] [blame] | 310 | DBG(2, "ch %p, 0x%x -> 0x%x (%zu / %d) %s\n", |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 311 | channel, musb_channel->start_addr, |
| 312 | addr, channel->actual_len, |
| 313 | musb_channel->len, |
| 314 | (channel->actual_len |
| 315 | < musb_channel->len) ? |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 316 | "=> reconfig 0" : "=> complete"); |
| 317 | |
| 318 | devctl = musb_readb(mbase, MUSB_DEVCTL); |
| 319 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 320 | channel->status = MUSB_DMA_STATUS_FREE; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 321 | |
| 322 | /* completed */ |
| 323 | if ((devctl & MUSB_DEVCTL_HM) |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 324 | && (musb_channel->transmit) |
| 325 | && ((channel->desired_mode == 0) |
| 326 | || (channel->actual_len & |
| 327 | (musb_channel->max_packet_sz - 1))) |
Sergei Shtylyov | b6e434a | 2009-03-26 18:27:47 -0700 | [diff] [blame] | 328 | ) { |
| 329 | u8 epnum = musb_channel->epnum; |
| 330 | int offset = MUSB_EP_OFFSET(epnum, |
| 331 | MUSB_TXCSR); |
| 332 | u16 txcsr; |
| 333 | |
| 334 | /* |
| 335 | * The programming guide says that we |
| 336 | * must clear DMAENAB before DMAMODE. |
| 337 | */ |
| 338 | musb_ep_select(mbase, epnum); |
| 339 | txcsr = musb_readw(mbase, offset); |
| 340 | txcsr &= ~(MUSB_TXCSR_DMAENAB |
| 341 | | MUSB_TXCSR_AUTOSET); |
| 342 | musb_writew(mbase, offset, txcsr); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 343 | /* Send out the packet */ |
Sergei Shtylyov | b6e434a | 2009-03-26 18:27:47 -0700 | [diff] [blame] | 344 | txcsr &= ~MUSB_TXCSR_DMAMODE; |
| 345 | txcsr |= MUSB_TXCSR_TXPKTRDY; |
| 346 | musb_writew(mbase, offset, txcsr); |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 347 | } |
Sergei Shtylyov | c7bbc05 | 2009-03-26 18:26:40 -0700 | [diff] [blame] | 348 | musb_dma_completion(musb, musb_channel->epnum, |
| 349 | musb_channel->transmit); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 350 | } |
| 351 | } |
| 352 | } |
Bryan Wu | 6995eb6 | 2008-12-02 21:33:47 +0200 | [diff] [blame] | 353 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 354 | retval = IRQ_HANDLED; |
| 355 | done: |
| 356 | spin_unlock_irqrestore(&musb->lock, flags); |
| 357 | return retval; |
| 358 | } |
| 359 | |
| 360 | void dma_controller_destroy(struct dma_controller *c) |
| 361 | { |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 362 | struct musb_dma_controller *controller = container_of(c, |
| 363 | struct musb_dma_controller, controller); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 364 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 365 | if (!controller) |
| 366 | return; |
| 367 | |
| 368 | if (controller->irq) |
| 369 | free_irq(controller->irq, c); |
| 370 | |
| 371 | kfree(controller); |
| 372 | } |
| 373 | |
| 374 | struct dma_controller *__init |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 375 | dma_controller_create(struct musb *musb, void __iomem *base) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 376 | { |
| 377 | struct musb_dma_controller *controller; |
| 378 | struct device *dev = musb->controller; |
| 379 | struct platform_device *pdev = to_platform_device(dev); |
Hema Kalliguddi | fcf173e | 2010-09-29 11:26:39 -0500 | [diff] [blame] | 380 | int irq = platform_get_irq_byname(pdev, "dma"); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 381 | |
| 382 | if (irq == 0) { |
| 383 | dev_err(dev, "No DMA interrupt line!\n"); |
| 384 | return NULL; |
| 385 | } |
| 386 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 387 | controller = kzalloc(sizeof(*controller), GFP_KERNEL); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 388 | if (!controller) |
| 389 | return NULL; |
| 390 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 391 | controller->channel_count = MUSB_HSDMA_CHANNELS; |
| 392 | controller->private_data = musb; |
| 393 | controller->base = base; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 394 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 395 | controller->controller.start = dma_controller_start; |
| 396 | controller->controller.stop = dma_controller_stop; |
| 397 | controller->controller.channel_alloc = dma_channel_allocate; |
| 398 | controller->controller.channel_release = dma_channel_release; |
| 399 | controller->controller.channel_program = dma_channel_program; |
| 400 | controller->controller.channel_abort = dma_channel_abort; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 401 | |
| 402 | if (request_irq(irq, dma_controller_irq, IRQF_DISABLED, |
Kay Sievers | 427c4f3 | 2008-11-07 01:52:53 +0100 | [diff] [blame] | 403 | dev_name(musb->controller), &controller->controller)) { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 404 | dev_err(dev, "request_irq %d failed!\n", irq); |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 405 | dma_controller_destroy(&controller->controller); |
| 406 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 407 | return NULL; |
| 408 | } |
| 409 | |
| 410 | controller->irq = irq; |
| 411 | |
Felipe Balbi | 458e6a5 | 2008-09-11 11:53:24 +0300 | [diff] [blame] | 412 | return &controller->controller; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 413 | } |