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Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05302 * Universal Flash Storage Host controller driver Core
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303 *
4 * This code is based on drivers/scsi/ufs/ufshcd.c
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053011 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053016 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053018 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053024 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030035 *
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053038 */
39
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053040#include <linux/async.h>
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070041#include <scsi/ufs/ioctl.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030042#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020043#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020044#include <linux/of.h>
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -070045#include <linux/blkdev.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053046#include "ufshcd.h"
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070047#include "ufshci.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020048#include "ufs_quirks.h"
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070049#include "ufs-debugfs.h"
50
51#define CREATE_TRACE_POINTS
52#include <trace/events/ufs.h>
53
54#ifdef CONFIG_DEBUG_FS
55
56static int ufshcd_tag_req_type(struct request *rq)
57{
58 int rq_type = TS_WRITE;
59
60 if (!rq || !(rq->cmd_type & REQ_TYPE_FS))
61 rq_type = TS_NOT_SUPPORTED;
62 else if (rq->cmd_flags & REQ_PREFLUSH)
63 rq_type = TS_FLUSH;
64 else if (rq_data_dir(rq) == READ)
65 rq_type = (rq->cmd_flags & REQ_URGENT) ?
66 TS_URGENT_READ : TS_READ;
67 else if (rq->cmd_flags & REQ_URGENT)
68 rq_type = TS_URGENT_WRITE;
69
70 return rq_type;
71}
72
73static void ufshcd_update_error_stats(struct ufs_hba *hba, int type)
74{
75 ufsdbg_set_err_state(hba);
76 if (type < UFS_ERR_MAX)
77 hba->ufs_stats.err_stats[type]++;
78}
79
80static void ufshcd_update_tag_stats(struct ufs_hba *hba, int tag)
81{
82 struct request *rq =
83 hba->lrb[tag].cmd ? hba->lrb[tag].cmd->request : NULL;
84 u64 **tag_stats = hba->ufs_stats.tag_stats;
85 int rq_type;
86
87 if (!hba->ufs_stats.enabled)
88 return;
89
90 tag_stats[tag][TS_TAG]++;
91 if (!rq || !(rq->cmd_type & REQ_TYPE_FS))
92 return;
93
94 WARN_ON(hba->ufs_stats.q_depth > hba->nutrs);
95 rq_type = ufshcd_tag_req_type(rq);
96 if (!(rq_type < 0 || rq_type > TS_NUM_STATS))
97 tag_stats[hba->ufs_stats.q_depth++][rq_type]++;
98}
99
100static void ufshcd_update_tag_stats_completion(struct ufs_hba *hba,
101 struct scsi_cmnd *cmd)
102{
103 struct request *rq = cmd ? cmd->request : NULL;
104
105 if (rq && rq->cmd_type & REQ_TYPE_FS)
106 hba->ufs_stats.q_depth--;
107}
108
109static void update_req_stats(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
110{
111 int rq_type;
112 struct request *rq = lrbp->cmd ? lrbp->cmd->request : NULL;
113 s64 delta = ktime_us_delta(lrbp->complete_time_stamp,
114 lrbp->issue_time_stamp);
115
116 /* update general request statistics */
117 if (hba->ufs_stats.req_stats[TS_TAG].count == 0)
118 hba->ufs_stats.req_stats[TS_TAG].min = delta;
119 hba->ufs_stats.req_stats[TS_TAG].count++;
120 hba->ufs_stats.req_stats[TS_TAG].sum += delta;
121 if (delta > hba->ufs_stats.req_stats[TS_TAG].max)
122 hba->ufs_stats.req_stats[TS_TAG].max = delta;
123 if (delta < hba->ufs_stats.req_stats[TS_TAG].min)
124 hba->ufs_stats.req_stats[TS_TAG].min = delta;
125
126 rq_type = ufshcd_tag_req_type(rq);
127 if (rq_type == TS_NOT_SUPPORTED)
128 return;
129
130 /* update request type specific statistics */
131 if (hba->ufs_stats.req_stats[rq_type].count == 0)
132 hba->ufs_stats.req_stats[rq_type].min = delta;
133 hba->ufs_stats.req_stats[rq_type].count++;
134 hba->ufs_stats.req_stats[rq_type].sum += delta;
135 if (delta > hba->ufs_stats.req_stats[rq_type].max)
136 hba->ufs_stats.req_stats[rq_type].max = delta;
137 if (delta < hba->ufs_stats.req_stats[rq_type].min)
138 hba->ufs_stats.req_stats[rq_type].min = delta;
139}
140
141static void
142ufshcd_update_query_stats(struct ufs_hba *hba, enum query_opcode opcode, u8 idn)
143{
144 if (opcode < UPIU_QUERY_OPCODE_MAX && idn < MAX_QUERY_IDN)
145 hba->ufs_stats.query_stats_arr[opcode][idn]++;
146}
147
148#else
149static inline void ufshcd_update_tag_stats(struct ufs_hba *hba, int tag)
150{
151}
152
153static inline void ufshcd_update_tag_stats_completion(struct ufs_hba *hba,
154 struct scsi_cmnd *cmd)
155{
156}
157
158static inline void ufshcd_update_error_stats(struct ufs_hba *hba, int type)
159{
160}
161
162static inline
163void update_req_stats(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
164{
165}
166
167static inline
168void ufshcd_update_query_stats(struct ufs_hba *hba,
169 enum query_opcode opcode, u8 idn)
170{
171}
172#endif
173
174#define UFSHCD_REQ_SENSE_SIZE 18
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530175
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530176#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
177 UTP_TASK_REQ_COMPL |\
178 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +0530179/* UIC command timeout, unit: ms */
180#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530181
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530182/* NOP OUT retries waiting for NOP IN response */
183#define NOP_OUT_RETRIES 10
184/* Timeout after 30 msecs if NOP OUT hangs without response */
185#define NOP_OUT_TIMEOUT 30 /* msecs */
186
Dolev Raviv68078d52013-07-30 00:35:58 +0530187/* Query request retries */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700188#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +0530189/* Query request timeout */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700190#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +0530191
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530192/* Task management command timeout */
193#define TM_CMD_TIMEOUT 100 /* msecs */
194
Yaniv Gardi64238fb2016-02-01 15:02:43 +0200195/* maximum number of retries for a general UIC command */
196#define UFS_UIC_COMMAND_RETRIES 3
197
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300198/* maximum number of link-startup retries */
199#define DME_LINKSTARTUP_RETRIES 3
200
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +0200201/* Maximum retries for Hibern8 enter */
202#define UIC_HIBERN8_ENTER_RETRIES 3
203
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300204/* maximum number of reset retries before giving up */
205#define MAX_HOST_RESET_RETRIES 5
206
Dolev Raviv68078d52013-07-30 00:35:58 +0530207/* Expose the flag value from utp_upiu_query.value */
208#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
209
Seungwon Jeon7d568652013-08-31 21:40:20 +0530210/* Interrupt aggregation default timeout, unit: 40us */
211#define INT_AGGR_DEF_TO 0x02
212
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700213/* default value of auto suspend is 3 seconds */
214#define UFSHCD_AUTO_SUSPEND_DELAY_MS 3000 /* millisecs */
215
216#define UFSHCD_CLK_GATING_DELAY_MS_PWR_SAVE 10
217#define UFSHCD_CLK_GATING_DELAY_MS_PERF 50
218
219/* IOCTL opcode for command - ufs set device read only */
220#define UFS_IOCTL_BLKROSET BLKROSET
221
222#define UFSHCD_DEFAULT_LANES_PER_DIRECTION 2
223
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +0300224#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
225 ({ \
226 int _ret; \
227 if (_on) \
228 _ret = ufshcd_enable_vreg(_dev, _vreg); \
229 else \
230 _ret = ufshcd_disable_vreg(_dev, _vreg); \
231 _ret; \
232 })
233
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700234#define ufshcd_hex_dump(prefix_str, buf, len) \
235print_hex_dump(KERN_ERR, prefix_str, DUMP_PREFIX_OFFSET, 16, 4, buf, len, false)
236
Subhash Jadavanida461ce2014-09-25 15:32:25 +0300237static u32 ufs_query_desc_max_size[] = {
238 QUERY_DESC_DEVICE_MAX_SIZE,
239 QUERY_DESC_CONFIGURAION_MAX_SIZE,
240 QUERY_DESC_UNIT_MAX_SIZE,
241 QUERY_DESC_RFU_MAX_SIZE,
242 QUERY_DESC_INTERCONNECT_MAX_SIZE,
243 QUERY_DESC_STRING_MAX_SIZE,
244 QUERY_DESC_RFU_MAX_SIZE,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700245 QUERY_DESC_GEOMETRY_MAZ_SIZE,
Subhash Jadavanida461ce2014-09-25 15:32:25 +0300246 QUERY_DESC_POWER_MAX_SIZE,
247 QUERY_DESC_RFU_MAX_SIZE,
248};
249
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530250enum {
251 UFSHCD_MAX_CHANNEL = 0,
252 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530253 UFSHCD_CMD_PER_LUN = 32,
254 UFSHCD_CAN_QUEUE = 32,
255};
256
257/* UFSHCD states */
258enum {
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530259 UFSHCD_STATE_RESET,
260 UFSHCD_STATE_ERROR,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530261 UFSHCD_STATE_OPERATIONAL,
262};
263
264/* UFSHCD error handling flags */
265enum {
266 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530267};
268
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530269/* UFSHCD UIC layer error flags */
270enum {
271 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200272 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
273 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
274 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
275 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
276 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530277};
278
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530279/* Interrupt configuration options */
280enum {
281 UFSHCD_INT_DISABLE,
282 UFSHCD_INT_ENABLE,
283 UFSHCD_INT_CLEAR,
284};
285
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700286#define DEFAULT_UFSHCD_DBG_PRINT_EN UFSHCD_DBG_PRINT_ALL
287
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530288#define ufshcd_set_eh_in_progress(h) \
289 (h->eh_flags |= UFSHCD_EH_IN_PROGRESS)
290#define ufshcd_eh_in_progress(h) \
291 (h->eh_flags & UFSHCD_EH_IN_PROGRESS)
292#define ufshcd_clear_eh_in_progress(h) \
293 (h->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
294
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300295#define ufshcd_set_ufs_dev_active(h) \
296 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
297#define ufshcd_set_ufs_dev_sleep(h) \
298 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
299#define ufshcd_set_ufs_dev_poweroff(h) \
300 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
301#define ufshcd_is_ufs_dev_active(h) \
302 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
303#define ufshcd_is_ufs_dev_sleep(h) \
304 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
305#define ufshcd_is_ufs_dev_poweroff(h) \
306 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
307
308static struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
309 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
310 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
311 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
312 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
313 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
314 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
315};
316
317static inline enum ufs_dev_pwr_mode
318ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
319{
320 return ufs_pm_lvl_states[lvl].dev_state;
321}
322
323static inline enum uic_link_state
324ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
325{
326 return ufs_pm_lvl_states[lvl].link_state;
327}
328
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700329static inline enum ufs_pm_level
330ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
331 enum uic_link_state link_state)
332{
333 enum ufs_pm_level lvl;
334
335 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
336 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
337 (ufs_pm_lvl_states[lvl].link_state == link_state))
338 return lvl;
339 }
340
341 /* if no match found, return the level 0 */
342 return UFS_PM_LVL_0;
343}
344
345static inline bool ufshcd_is_valid_pm_lvl(int lvl)
346{
347 if (lvl >= 0 && lvl < ARRAY_SIZE(ufs_pm_lvl_states))
348 return true;
349 else
350 return false;
351}
352
353static irqreturn_t ufshcd_intr(int irq, void *__hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530354static void ufshcd_tmc_handler(struct ufs_hba *hba);
355static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530356static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700357static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530358static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300359static void ufshcd_hba_exit(struct ufs_hba *hba);
360static int ufshcd_probe_hba(struct ufs_hba *hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700361static int ufshcd_enable_clocks(struct ufs_hba *hba);
362static int ufshcd_disable_clocks(struct ufs_hba *hba,
363 bool is_gating_context);
364static int ufshcd_disable_clocks_skip_ref_clk(struct ufs_hba *hba,
365 bool is_gating_context);
Yaniv Gardi60f01872016-03-10 17:37:11 +0200366static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300367static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700368static inline void ufshcd_save_tstamp_of_last_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300369static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700370static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
371static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
372static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
373static void ufshcd_release_all(struct ufs_hba *hba);
374static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba);
375static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba);
376
Yaniv Gardi14497322016-02-01 15:02:39 +0200377static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
378{
379 return tag >= 0 && tag < hba->nutrs;
380}
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300381
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700382static inline void ufshcd_enable_irq(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300383{
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300384 if (!hba->is_irq_enabled) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700385 enable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300386 hba->is_irq_enabled = true;
387 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300388}
389
390static inline void ufshcd_disable_irq(struct ufs_hba *hba)
391{
392 if (hba->is_irq_enabled) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700393 disable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300394 hba->is_irq_enabled = false;
395 }
396}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530397
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700398void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
399{
400 unsigned long flags;
401 bool unblock = false;
402
403 spin_lock_irqsave(hba->host->host_lock, flags);
404 hba->scsi_block_reqs_cnt--;
405 unblock = !hba->scsi_block_reqs_cnt;
406 spin_unlock_irqrestore(hba->host->host_lock, flags);
407 if (unblock)
408 scsi_unblock_requests(hba->host);
409}
410EXPORT_SYMBOL(ufshcd_scsi_unblock_requests);
411
412static inline void __ufshcd_scsi_block_requests(struct ufs_hba *hba)
413{
414 if (!hba->scsi_block_reqs_cnt++)
415 scsi_block_requests(hba->host);
416}
417
418void ufshcd_scsi_block_requests(struct ufs_hba *hba)
419{
420 unsigned long flags;
421
422 spin_lock_irqsave(hba->host->host_lock, flags);
423 __ufshcd_scsi_block_requests(hba);
424 spin_unlock_irqrestore(hba->host->host_lock, flags);
425}
426EXPORT_SYMBOL(ufshcd_scsi_block_requests);
427
Yaniv Gardib573d482016-03-10 17:37:09 +0200428/* replace non-printable or non-ASCII characters with spaces */
429static inline void ufshcd_remove_non_printable(char *val)
430{
431 if (!val)
432 return;
433
434 if (*val < 0x20 || *val > 0x7e)
435 *val = ' ';
436}
437
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700438#ifdef CONFIG_TRACEPOINTS
439static void ufshcd_add_command_trace(struct ufs_hba *hba,
440 unsigned int tag, const char *str)
441{
442 sector_t lba = -1;
443 u8 opcode = 0;
444 u32 intr, doorbell;
445 struct ufshcd_lrb *lrbp;
446 int transfer_len = -1;
447
448 lrbp = &hba->lrb[tag];
449
450 if (lrbp->cmd) { /* data phase exists */
451 opcode = (u8)(*lrbp->cmd->cmnd);
452 if ((opcode == READ_10) || (opcode == WRITE_10)) {
453 /*
454 * Currently we only fully trace read(10) and write(10)
455 * commands
456 */
457 if (lrbp->cmd->request && lrbp->cmd->request->bio)
458 lba =
459 lrbp->cmd->request->bio->bi_iter.bi_sector;
460 transfer_len = be32_to_cpu(
461 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
462 }
463 }
464
465 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
466 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
467 trace_ufshcd_command(dev_name(hba->dev), str, tag,
468 doorbell, transfer_len, intr, lba, opcode);
469}
470
471static inline void ufshcd_cond_add_cmd_trace(struct ufs_hba *hba,
472 unsigned int tag, const char *str)
473{
474 if (trace_ufshcd_command_enabled())
475 ufshcd_add_command_trace(hba, tag, str);
476}
477#else
478static inline void ufshcd_cond_add_cmd_trace(struct ufs_hba *hba,
479 unsigned int tag, const char *str)
480{
481}
482#endif
483
484static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
485{
486 struct ufs_clk_info *clki;
487 struct list_head *head = &hba->clk_list_head;
488
489 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_CLK_FREQ_EN))
490 return;
491
492 if (!head || list_empty(head))
493 return;
494
495 list_for_each_entry(clki, head, list) {
496 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
497 clki->max_freq)
498 dev_err(hba->dev, "clk: %s, rate: %u\n",
499 clki->name, clki->curr_freq);
500 }
501}
502
503static void ufshcd_print_uic_err_hist(struct ufs_hba *hba,
504 struct ufs_uic_err_reg_hist *err_hist, char *err_name)
505{
506 int i;
507
508 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_UIC_ERR_HIST_EN))
509 return;
510
511 for (i = 0; i < UIC_ERR_REG_HIST_LENGTH; i++) {
512 int p = (i + err_hist->pos - 1) % UIC_ERR_REG_HIST_LENGTH;
513
514 if (err_hist->reg[p] == 0)
515 continue;
516 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us", err_name, i,
517 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
518 }
519}
520
521static void ufshcd_print_host_regs(struct ufs_hba *hba)
522{
523 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_HOST_REGS_EN))
524 return;
525
526 /*
527 * hex_dump reads its data without the readl macro. This might
528 * cause inconsistency issues on some platform, as the printed
529 * values may be from cache and not the most recent value.
530 * To know whether you are looking at an un-cached version verify
531 * that IORESOURCE_MEM flag is on when xxx_get_resource() is invoked
532 * during platform/pci probe function.
533 */
534 ufshcd_hex_dump("host regs: ", hba->mmio_base, UFSHCI_REG_SPACE_SIZE);
535 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x",
536 hba->ufs_version, hba->capabilities);
537 dev_err(hba->dev,
538 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x",
539 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
540 dev_err(hba->dev,
541 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d",
542 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
543 hba->ufs_stats.hibern8_exit_cnt);
544
545 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
546 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
547 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
548 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
549 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
550
551 ufshcd_print_clk_freqs(hba);
552
553 ufshcd_vops_dbg_register_dump(hba);
554}
555
556static
557void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
558{
559 struct ufshcd_lrb *lrbp;
560 int prdt_length;
561 int tag;
562
563 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_TRS_EN))
564 return;
565
566 for_each_set_bit(tag, &bitmap, hba->nutrs) {
567 lrbp = &hba->lrb[tag];
568
569 dev_err(hba->dev, "UPIU[%d] - issue time %lld us",
570 tag, ktime_to_us(lrbp->issue_time_stamp));
571 dev_err(hba->dev,
572 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx",
573 tag, (u64)lrbp->utrd_dma_addr);
574 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
575 sizeof(struct utp_transfer_req_desc));
576 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx", tag,
577 (u64)lrbp->ucd_req_dma_addr);
578 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
579 sizeof(struct utp_upiu_req));
580 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx", tag,
581 (u64)lrbp->ucd_rsp_dma_addr);
582 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
583 sizeof(struct utp_upiu_rsp));
584 prdt_length =
585 le16_to_cpu(lrbp->utr_descriptor_ptr->prd_table_length);
586 dev_err(hba->dev, "UPIU[%d] - PRDT - %d entries phys@0x%llx",
587 tag, prdt_length, (u64)lrbp->ucd_prdt_dma_addr);
588 if (pr_prdt)
589 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
590 sizeof(struct ufshcd_sg_entry) * prdt_length);
591 }
592}
593
594static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
595{
596 struct utp_task_req_desc *tmrdp;
597 int tag;
598
599 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_TMRS_EN))
600 return;
601
602 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
603 tmrdp = &hba->utmrdl_base_addr[tag];
604 dev_err(hba->dev, "TM[%d] - Task Management Header", tag);
605 ufshcd_hex_dump("TM TRD: ", &tmrdp->header,
606 sizeof(struct request_desc_header));
607 dev_err(hba->dev, "TM[%d] - Task Management Request UPIU",
608 tag);
609 ufshcd_hex_dump("TM REQ: ", tmrdp->task_req_upiu,
610 sizeof(struct utp_upiu_req));
611 dev_err(hba->dev, "TM[%d] - Task Management Response UPIU",
612 tag);
613 ufshcd_hex_dump("TM RSP: ", tmrdp->task_rsp_upiu,
614 sizeof(struct utp_task_req_desc));
615 }
616}
617
618static void ufshcd_print_host_state(struct ufs_hba *hba)
619{
620 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_HOST_STATE_EN))
621 return;
622
623 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
624 dev_err(hba->dev, "lrb in use=0x%lx, outstanding reqs=0x%lx tasks=0x%lx\n",
625 hba->lrb_in_use, hba->outstanding_tasks, hba->outstanding_reqs);
626 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x, saved_ce_err=0x%x\n",
627 hba->saved_err, hba->saved_uic_err, hba->saved_ce_err);
628 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
629 hba->curr_dev_pwr_mode, hba->uic_link_state);
630 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
631 hba->pm_op_in_progress, hba->is_sys_suspended);
632 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
633 hba->auto_bkops_enabled, hba->host->host_self_blocked);
634 dev_err(hba->dev, "Clk gate=%d, hibern8 on idle=%d\n",
635 hba->clk_gating.state, hba->hibern8_on_idle.state);
636 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
637 hba->eh_flags, hba->req_abort_count);
638 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
639 hba->capabilities, hba->caps);
640 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
641 hba->dev_quirks);
642}
643
644/**
645 * ufshcd_print_pwr_info - print power params as saved in hba
646 * power info
647 * @hba: per-adapter instance
648 */
649static void ufshcd_print_pwr_info(struct ufs_hba *hba)
650{
651 char *names[] = {
652 "INVALID MODE",
653 "FAST MODE",
654 "SLOW_MODE",
655 "INVALID MODE",
656 "FASTAUTO_MODE",
657 "SLOWAUTO_MODE",
658 "INVALID MODE",
659 };
660
661 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_PWR_EN))
662 return;
663
664 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
665 __func__,
666 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
667 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
668 names[hba->pwr_info.pwr_rx],
669 names[hba->pwr_info.pwr_tx],
670 hba->pwr_info.hs_rate);
671}
672
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530673/*
674 * ufshcd_wait_for_register - wait for register value to change
675 * @hba - per-adapter interface
676 * @reg - mmio register offset
677 * @mask - mask to apply to read register value
678 * @val - wait condition
679 * @interval_us - polling interval in microsecs
680 * @timeout_ms - timeout in millisecs
Yaniv Gardi596585a2016-03-10 17:37:08 +0200681 * @can_sleep - perform sleep or just spin
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530682 * Returns -ETIMEDOUT on error, zero on success
683 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200684int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
685 u32 val, unsigned long interval_us,
686 unsigned long timeout_ms, bool can_sleep)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530687{
688 int err = 0;
689 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
690
691 /* ignore bits that we don't intend to wait on */
692 val = val & mask;
693
694 while ((ufshcd_readl(hba, reg) & mask) != val) {
Yaniv Gardi596585a2016-03-10 17:37:08 +0200695 if (can_sleep)
696 usleep_range(interval_us, interval_us + 50);
697 else
698 udelay(interval_us);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530699 if (time_after(jiffies, timeout)) {
700 if ((ufshcd_readl(hba, reg) & mask) != val)
701 err = -ETIMEDOUT;
702 break;
703 }
704 }
705
706 return err;
707}
708
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530709/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530710 * ufshcd_get_intr_mask - Get the interrupt bit mask
711 * @hba - Pointer to adapter instance
712 *
713 * Returns interrupt bit mask per version
714 */
715static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
716{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700717 u32 intr_mask = 0;
718
719 switch (hba->ufs_version) {
720 case UFSHCI_VERSION_10:
721 intr_mask = INTERRUPT_MASK_ALL_VER_10;
722 break;
723 /* allow fall through */
724 case UFSHCI_VERSION_11:
725 case UFSHCI_VERSION_20:
726 intr_mask = INTERRUPT_MASK_ALL_VER_11;
727 break;
728 /* allow fall through */
729 case UFSHCI_VERSION_21:
730 default:
731 intr_mask = INTERRUPT_MASK_ALL_VER_21;
732 }
733
734 if (!ufshcd_is_crypto_supported(hba))
735 intr_mask &= ~CRYPTO_ENGINE_FATAL_ERROR;
736
737 return intr_mask;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530738}
739
740/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530741 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
742 * @hba - Pointer to adapter instance
743 *
744 * Returns UFSHCI version supported by the controller
745 */
746static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
747{
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200748 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
749 return ufshcd_vops_get_ufs_hci_version(hba);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300750
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530751 return ufshcd_readl(hba, REG_UFS_VERSION);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530752}
753
754/**
755 * ufshcd_is_device_present - Check if any device connected to
756 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300757 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530758 *
Venkatraman S73ec5132012-07-10 19:39:23 +0530759 * Returns 1 if device present, 0 if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530760 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300761static inline int ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530762{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300763 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
764 DEVICE_PRESENT) ? 1 : 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530765}
766
767/**
768 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
769 * @lrb: pointer to local command reference block
770 *
771 * This function is used to get the OCS field from UTRD
772 * Returns the OCS field in the UTRD
773 */
774static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
775{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530776 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530777}
778
779/**
780 * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
781 * @task_req_descp: pointer to utp_task_req_desc structure
782 *
783 * This function is used to get the OCS field from UTMRD
784 * Returns the OCS field in the UTMRD
785 */
786static inline int
787ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp)
788{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530789 return le32_to_cpu(task_req_descp->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530790}
791
792/**
793 * ufshcd_get_tm_free_slot - get a free slot for task management request
794 * @hba: per adapter instance
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530795 * @free_slot: pointer to variable with available slot value
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530796 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530797 * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
798 * Returns 0 if free slot is not available, else return 1 with tag value
799 * in @free_slot.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530800 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530801static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530802{
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530803 int tag;
804 bool ret = false;
805
806 if (!free_slot)
807 goto out;
808
809 do {
810 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
811 if (tag >= hba->nutmrs)
812 goto out;
813 } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
814
815 *free_slot = tag;
816 ret = true;
817out:
818 return ret;
819}
820
821static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
822{
823 clear_bit_unlock(slot, &hba->tm_slots_in_use);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530824}
825
826/**
827 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
828 * @hba: per adapter instance
829 * @pos: position of the bit to be cleared
830 */
831static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
832{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530833 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530834}
835
836/**
Yaniv Gardia48353f2016-02-01 15:02:40 +0200837 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
838 * @hba: per adapter instance
839 * @tag: position of the bit to be cleared
840 */
841static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
842{
843 __clear_bit(tag, &hba->outstanding_reqs);
844}
845
846/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530847 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
848 * @reg: Register value of host controller status
849 *
850 * Returns integer, 0 on Success and positive value if failed
851 */
852static inline int ufshcd_get_lists_status(u32 reg)
853{
854 /*
855 * The mask 0xFF is for the following HCS register bits
856 * Bit Description
857 * 0 Device Present
858 * 1 UTRLRDY
859 * 2 UTMRLRDY
860 * 3 UCRDY
Yaniv Gardi897efe62016-02-01 15:02:48 +0200861 * 4-7 reserved
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530862 */
Yaniv Gardi897efe62016-02-01 15:02:48 +0200863 return ((reg & 0xFF) >> 1) ^ 0x07;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530864}
865
866/**
867 * ufshcd_get_uic_cmd_result - Get the UIC command result
868 * @hba: Pointer to adapter instance
869 *
870 * This function gets the result of UIC command completion
871 * Returns 0 on success, non zero value on error
872 */
873static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
874{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530875 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530876 MASK_UIC_COMMAND_RESULT;
877}
878
879/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530880 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
881 * @hba: Pointer to adapter instance
882 *
883 * This function gets UIC command argument3
884 * Returns 0 on success, non zero value on error
885 */
886static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
887{
888 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
889}
890
891/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530892 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530893 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530894 */
895static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530896ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530897{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530898 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530899}
900
901/**
902 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
903 * @ucd_rsp_ptr: pointer to response UPIU
904 *
905 * This function gets the response status and scsi_status from response UPIU
906 * Returns the response result code.
907 */
908static inline int
909ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
910{
911 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
912}
913
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530914/*
915 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
916 * from response UPIU
917 * @ucd_rsp_ptr: pointer to response UPIU
918 *
919 * Return the data segment length.
920 */
921static inline unsigned int
922ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
923{
924 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
925 MASK_RSP_UPIU_DATA_SEG_LEN;
926}
927
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530928/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530929 * ufshcd_is_exception_event - Check if the device raised an exception event
930 * @ucd_rsp_ptr: pointer to response UPIU
931 *
932 * The function checks if the device raised an exception event indicated in
933 * the Device Information field of response UPIU.
934 *
935 * Returns true if exception is raised, false otherwise.
936 */
937static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
938{
939 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
940 MASK_RSP_EXCEPTION_EVENT ? true : false;
941}
942
943/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530944 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530945 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530946 */
947static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530948ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530949{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530950 ufshcd_writel(hba, INT_AGGR_ENABLE |
951 INT_AGGR_COUNTER_AND_TIMER_RESET,
952 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
953}
954
955/**
956 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
957 * @hba: per adapter instance
958 * @cnt: Interrupt aggregation counter threshold
959 * @tmout: Interrupt aggregation timeout value
960 */
961static inline void
962ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
963{
964 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
965 INT_AGGR_COUNTER_THLD_VAL(cnt) |
966 INT_AGGR_TIMEOUT_VAL(tmout),
967 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530968}
969
970/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300971 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
972 * @hba: per adapter instance
973 */
974static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
975{
976 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
977}
978
979/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530980 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
981 * When run-stop registers are set to 1, it indicates the
982 * host controller that it can process the requests
983 * @hba: per adapter instance
984 */
985static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
986{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530987 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
988 REG_UTP_TASK_REQ_LIST_RUN_STOP);
989 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
990 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530991}
992
993/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530994 * ufshcd_hba_start - Start controller initialization sequence
995 * @hba: per adapter instance
996 */
997static inline void ufshcd_hba_start(struct ufs_hba *hba)
998{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700999 u32 val = CONTROLLER_ENABLE;
1000
1001 if (ufshcd_is_crypto_supported(hba))
1002 val |= CRYPTO_GENERAL_ENABLE;
1003 ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301004}
1005
1006/**
1007 * ufshcd_is_hba_active - Get controller state
1008 * @hba: per adapter instance
1009 *
1010 * Returns zero if controller is active, 1 otherwise
1011 */
1012static inline int ufshcd_is_hba_active(struct ufs_hba *hba)
1013{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301014 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & 0x1) ? 0 : 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301015}
1016
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001017static const char *ufschd_uic_link_state_to_string(
1018 enum uic_link_state state)
1019{
1020 switch (state) {
1021 case UIC_LINK_OFF_STATE: return "OFF";
1022 case UIC_LINK_ACTIVE_STATE: return "ACTIVE";
1023 case UIC_LINK_HIBERN8_STATE: return "HIBERN8";
1024 default: return "UNKNOWN";
1025 }
1026}
1027
1028static const char *ufschd_ufs_dev_pwr_mode_to_string(
1029 enum ufs_dev_pwr_mode state)
1030{
1031 switch (state) {
1032 case UFS_ACTIVE_PWR_MODE: return "ACTIVE";
1033 case UFS_SLEEP_PWR_MODE: return "SLEEP";
1034 case UFS_POWERDOWN_PWR_MODE: return "POWERDOWN";
1035 default: return "UNKNOWN";
1036 }
1037}
1038
Yaniv Gardi37113102016-03-10 17:37:16 +02001039u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
1040{
1041 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
1042 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
1043 (hba->ufs_version == UFSHCI_VERSION_11))
1044 return UFS_UNIPRO_VER_1_41;
1045 else
1046 return UFS_UNIPRO_VER_1_6;
1047}
1048EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
1049
1050static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
1051{
1052 /*
1053 * If both host and device support UniPro ver1.6 or later, PA layer
1054 * parameters tuning happens during link startup itself.
1055 *
1056 * We can manually tune PA layer parameters if either host or device
1057 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
1058 * logic simple, we will only do manual tuning if local unipro version
1059 * doesn't support ver1.6 or later.
1060 */
1061 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
1062 return true;
1063 else
1064 return false;
1065}
1066
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001067/**
1068 * ufshcd_set_clk_freq - set UFS controller clock frequencies
1069 * @hba: per adapter instance
1070 * @scale_up: If True, set max possible frequency othewise set low frequency
1071 *
1072 * Returns 0 if successful
1073 * Returns < 0 for any other errors
1074 */
1075static int ufshcd_set_clk_freq(struct ufs_hba *hba, bool scale_up)
1076{
1077 int ret = 0;
1078 struct ufs_clk_info *clki;
1079 struct list_head *head = &hba->clk_list_head;
1080
1081 if (!head || list_empty(head))
1082 goto out;
1083
1084 list_for_each_entry(clki, head, list) {
1085 if (!IS_ERR_OR_NULL(clki->clk)) {
1086 if (scale_up && clki->max_freq) {
1087 if (clki->curr_freq == clki->max_freq)
1088 continue;
1089
1090 ret = clk_set_rate(clki->clk, clki->max_freq);
1091 if (ret) {
1092 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
1093 __func__, clki->name,
1094 clki->max_freq, ret);
1095 break;
1096 }
1097 trace_ufshcd_clk_scaling(dev_name(hba->dev),
1098 "scaled up", clki->name,
1099 clki->curr_freq,
1100 clki->max_freq);
1101 clki->curr_freq = clki->max_freq;
1102
1103 } else if (!scale_up && clki->min_freq) {
1104 if (clki->curr_freq == clki->min_freq)
1105 continue;
1106
1107 ret = clk_set_rate(clki->clk, clki->min_freq);
1108 if (ret) {
1109 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
1110 __func__, clki->name,
1111 clki->min_freq, ret);
1112 break;
1113 }
1114 trace_ufshcd_clk_scaling(dev_name(hba->dev),
1115 "scaled down", clki->name,
1116 clki->curr_freq,
1117 clki->min_freq);
1118 clki->curr_freq = clki->min_freq;
1119 }
1120 }
1121 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
1122 clki->name, clk_get_rate(clki->clk));
1123 }
1124
1125out:
1126 return ret;
1127}
1128
1129/**
1130 * ufshcd_scale_clks - scale up or scale down UFS controller clocks
1131 * @hba: per adapter instance
1132 * @scale_up: True if scaling up and false if scaling down
1133 *
1134 * Returns 0 if successful
1135 * Returns < 0 for any other errors
1136 */
1137static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
1138{
1139 int ret = 0;
1140
1141 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
1142 if (ret)
1143 return ret;
1144
1145 ret = ufshcd_set_clk_freq(hba, scale_up);
1146 if (ret)
1147 return ret;
1148
1149 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1150 if (ret) {
1151 ufshcd_set_clk_freq(hba, !scale_up);
1152 return ret;
1153 }
1154
1155 return ret;
1156}
1157
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001158static void ufshcd_ungate_work(struct work_struct *work)
1159{
1160 int ret;
1161 unsigned long flags;
1162 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1163 clk_gating.ungate_work);
1164
1165 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1166
1167 spin_lock_irqsave(hba->host->host_lock, flags);
1168 if (hba->clk_gating.state == CLKS_ON) {
1169 spin_unlock_irqrestore(hba->host->host_lock, flags);
1170 goto unblock_reqs;
1171 }
1172
1173 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001174 ufshcd_hba_vreg_set_hpm(hba);
1175 ufshcd_enable_clocks(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001176
1177 /* Exit from hibern8 */
1178 if (ufshcd_can_hibern8_during_gating(hba)) {
1179 /* Prevent gating in this path */
1180 hba->clk_gating.is_suspended = true;
1181 if (ufshcd_is_link_hibern8(hba)) {
1182 ret = ufshcd_uic_hibern8_exit(hba);
1183 if (ret)
1184 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1185 __func__, ret);
1186 else
1187 ufshcd_set_link_active(hba);
1188 }
1189 hba->clk_gating.is_suspended = false;
1190 }
1191unblock_reqs:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001192 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001193}
1194
1195/**
1196 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1197 * Also, exit from hibern8 mode and set the link as active.
1198 * @hba: per adapter instance
1199 * @async: This indicates whether caller should ungate clocks asynchronously.
1200 */
1201int ufshcd_hold(struct ufs_hba *hba, bool async)
1202{
1203 int rc = 0;
1204 unsigned long flags;
1205
1206 if (!ufshcd_is_clkgating_allowed(hba))
1207 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001208 spin_lock_irqsave(hba->host->host_lock, flags);
1209 hba->clk_gating.active_reqs++;
1210
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001211 if (ufshcd_eh_in_progress(hba)) {
1212 spin_unlock_irqrestore(hba->host->host_lock, flags);
1213 return 0;
1214 }
1215
Sahitya Tummala856b3482014-09-25 15:32:34 +03001216start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001217 switch (hba->clk_gating.state) {
1218 case CLKS_ON:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001219 /*
1220 * Wait for the ungate work to complete if in progress.
1221 * Though the clocks may be in ON state, the link could
1222 * still be in hibner8 state if hibern8 is allowed
1223 * during clock gating.
1224 * Make sure we exit hibern8 state also in addition to
1225 * clocks being ON.
1226 */
1227 if (ufshcd_can_hibern8_during_gating(hba) &&
1228 ufshcd_is_link_hibern8(hba)) {
1229 spin_unlock_irqrestore(hba->host->host_lock, flags);
1230 flush_work(&hba->clk_gating.ungate_work);
1231 spin_lock_irqsave(hba->host->host_lock, flags);
1232 goto start;
1233 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001234 break;
1235 case REQ_CLKS_OFF:
1236 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1237 hba->clk_gating.state = CLKS_ON;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001238 trace_ufshcd_clk_gating(dev_name(hba->dev),
1239 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001240 break;
1241 }
1242 /*
1243 * If we here, it means gating work is either done or
1244 * currently running. Hence, fall through to cancel gating
1245 * work and to enable clocks.
1246 */
1247 case CLKS_OFF:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001248 __ufshcd_scsi_block_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001249 hba->clk_gating.state = REQ_CLKS_ON;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001250 trace_ufshcd_clk_gating(dev_name(hba->dev),
1251 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001252 schedule_work(&hba->clk_gating.ungate_work);
1253 /*
1254 * fall through to check if we should wait for this
1255 * work to be done or not.
1256 */
1257 case REQ_CLKS_ON:
1258 if (async) {
1259 rc = -EAGAIN;
1260 hba->clk_gating.active_reqs--;
1261 break;
1262 }
1263
1264 spin_unlock_irqrestore(hba->host->host_lock, flags);
1265 flush_work(&hba->clk_gating.ungate_work);
1266 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001267 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001268 goto start;
1269 default:
1270 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1271 __func__, hba->clk_gating.state);
1272 break;
1273 }
1274 spin_unlock_irqrestore(hba->host->host_lock, flags);
1275out:
1276 return rc;
1277}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001278EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001279
1280static void ufshcd_gate_work(struct work_struct *work)
1281{
1282 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1283 clk_gating.gate_work.work);
1284 unsigned long flags;
1285
1286 spin_lock_irqsave(hba->host->host_lock, flags);
1287 if (hba->clk_gating.is_suspended) {
1288 hba->clk_gating.state = CLKS_ON;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001289 trace_ufshcd_clk_gating(dev_name(hba->dev),
1290 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001291 goto rel_lock;
1292 }
1293
1294 if (hba->clk_gating.active_reqs
1295 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1296 || hba->lrb_in_use || hba->outstanding_tasks
1297 || hba->active_uic_cmd || hba->uic_async_done)
1298 goto rel_lock;
1299
1300 spin_unlock_irqrestore(hba->host->host_lock, flags);
1301
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001302 if (ufshcd_is_hibern8_on_idle_allowed(hba) &&
1303 hba->hibern8_on_idle.is_enabled)
1304 /*
1305 * Hibern8 enter work (on Idle) needs clocks to be ON hence
1306 * make sure that it is flushed before turning off the clocks.
1307 */
1308 flush_delayed_work(&hba->hibern8_on_idle.enter_work);
1309
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001310 /* put the link into hibern8 mode before turning off clocks */
1311 if (ufshcd_can_hibern8_during_gating(hba)) {
1312 if (ufshcd_uic_hibern8_enter(hba)) {
1313 hba->clk_gating.state = CLKS_ON;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001314 trace_ufshcd_clk_gating(dev_name(hba->dev),
1315 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001316 goto out;
1317 }
1318 ufshcd_set_link_hibern8(hba);
1319 }
1320
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001321 if (!ufshcd_is_link_active(hba) && !hba->no_ref_clk_gating)
1322 ufshcd_disable_clocks(hba, true);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001323 else
1324 /* If link is active, device ref_clk can't be switched off */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001325 ufshcd_disable_clocks_skip_ref_clk(hba, true);
1326
1327 /* Put the host controller in low power mode if possible */
1328 ufshcd_hba_vreg_set_lpm(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001329
1330 /*
1331 * In case you are here to cancel this work the gating state
1332 * would be marked as REQ_CLKS_ON. In this case keep the state
1333 * as REQ_CLKS_ON which would anyway imply that clocks are off
1334 * and a request to turn them on is pending. By doing this way,
1335 * we keep the state machine in tact and this would ultimately
1336 * prevent from doing cancel work multiple times when there are
1337 * new requests arriving before the current cancel work is done.
1338 */
1339 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001340 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001341 hba->clk_gating.state = CLKS_OFF;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001342 trace_ufshcd_clk_gating(dev_name(hba->dev),
1343 hba->clk_gating.state);
1344 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001345rel_lock:
1346 spin_unlock_irqrestore(hba->host->host_lock, flags);
1347out:
1348 return;
1349}
1350
1351/* host lock must be held before calling this variant */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001352static void __ufshcd_release(struct ufs_hba *hba, bool no_sched)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001353{
1354 if (!ufshcd_is_clkgating_allowed(hba))
1355 return;
1356
1357 hba->clk_gating.active_reqs--;
1358
1359 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1360 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1361 || hba->lrb_in_use || hba->outstanding_tasks
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001362 || hba->active_uic_cmd || hba->uic_async_done
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001363 || ufshcd_eh_in_progress(hba) || no_sched)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001364 return;
1365
1366 hba->clk_gating.state = REQ_CLKS_OFF;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001367 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
1368
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001369 schedule_delayed_work(&hba->clk_gating.gate_work,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001370 msecs_to_jiffies(hba->clk_gating.delay_ms));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001371}
1372
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001373void ufshcd_release(struct ufs_hba *hba, bool no_sched)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001374{
1375 unsigned long flags;
1376
1377 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001378 __ufshcd_release(hba, no_sched);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001379 spin_unlock_irqrestore(hba->host->host_lock, flags);
1380}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001381EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001382
1383static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1384 struct device_attribute *attr, char *buf)
1385{
1386 struct ufs_hba *hba = dev_get_drvdata(dev);
1387
1388 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1389}
1390
1391static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1392 struct device_attribute *attr, const char *buf, size_t count)
1393{
1394 struct ufs_hba *hba = dev_get_drvdata(dev);
1395 unsigned long flags, value;
1396
1397 if (kstrtoul(buf, 0, &value))
1398 return -EINVAL;
1399
1400 spin_lock_irqsave(hba->host->host_lock, flags);
1401 hba->clk_gating.delay_ms = value;
1402 spin_unlock_irqrestore(hba->host->host_lock, flags);
1403 return count;
1404}
1405
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001406static ssize_t ufshcd_clkgate_delay_pwr_save_show(struct device *dev,
1407 struct device_attribute *attr, char *buf)
1408{
1409 struct ufs_hba *hba = dev_get_drvdata(dev);
1410
1411 return snprintf(buf, PAGE_SIZE, "%lu\n",
1412 hba->clk_gating.delay_ms_pwr_save);
1413}
1414
1415static ssize_t ufshcd_clkgate_delay_pwr_save_store(struct device *dev,
1416 struct device_attribute *attr, const char *buf, size_t count)
1417{
1418 struct ufs_hba *hba = dev_get_drvdata(dev);
1419 unsigned long flags, value;
1420
1421 if (kstrtoul(buf, 0, &value))
1422 return -EINVAL;
1423
1424 spin_lock_irqsave(hba->host->host_lock, flags);
1425
1426 hba->clk_gating.delay_ms_pwr_save = value;
1427 if (ufshcd_is_clkscaling_supported(hba) &&
1428 !hba->clk_scaling.is_scaled_up)
1429 hba->clk_gating.delay_ms = hba->clk_gating.delay_ms_pwr_save;
1430
1431 spin_unlock_irqrestore(hba->host->host_lock, flags);
1432 return count;
1433}
1434
1435static ssize_t ufshcd_clkgate_delay_perf_show(struct device *dev,
1436 struct device_attribute *attr, char *buf)
1437{
1438 struct ufs_hba *hba = dev_get_drvdata(dev);
1439
1440 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms_perf);
1441}
1442
1443static ssize_t ufshcd_clkgate_delay_perf_store(struct device *dev,
1444 struct device_attribute *attr, const char *buf, size_t count)
1445{
1446 struct ufs_hba *hba = dev_get_drvdata(dev);
1447 unsigned long flags, value;
1448
1449 if (kstrtoul(buf, 0, &value))
1450 return -EINVAL;
1451
1452 spin_lock_irqsave(hba->host->host_lock, flags);
1453
1454 hba->clk_gating.delay_ms_perf = value;
1455 if (ufshcd_is_clkscaling_supported(hba) &&
1456 hba->clk_scaling.is_scaled_up)
1457 hba->clk_gating.delay_ms = hba->clk_gating.delay_ms_perf;
1458
1459 spin_unlock_irqrestore(hba->host->host_lock, flags);
1460 return count;
1461}
1462
1463static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1464 struct device_attribute *attr, char *buf)
1465{
1466 struct ufs_hba *hba = dev_get_drvdata(dev);
1467
1468 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1469}
1470
1471static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1472 struct device_attribute *attr, const char *buf, size_t count)
1473{
1474 struct ufs_hba *hba = dev_get_drvdata(dev);
1475 unsigned long flags;
1476 u32 value;
1477
1478 if (kstrtou32(buf, 0, &value))
1479 return -EINVAL;
1480
1481 value = !!value;
1482 if (value == hba->clk_gating.is_enabled)
1483 goto out;
1484
1485 if (value) {
1486 ufshcd_release(hba, false);
1487 } else {
1488 spin_lock_irqsave(hba->host->host_lock, flags);
1489 hba->clk_gating.active_reqs++;
1490 spin_unlock_irqrestore(hba->host->host_lock, flags);
1491 }
1492
1493 hba->clk_gating.is_enabled = value;
1494out:
1495 return count;
1496}
1497
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001498static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1499{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001500 struct ufs_clk_gating *gating = &hba->clk_gating;
1501
1502 hba->clk_gating.state = CLKS_ON;
1503
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001504 if (!ufshcd_is_clkgating_allowed(hba))
1505 return;
1506
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001507 INIT_DELAYED_WORK(&gating->gate_work, ufshcd_gate_work);
1508 INIT_WORK(&gating->ungate_work, ufshcd_ungate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001509
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001510 gating->is_enabled = true;
1511
1512 /*
1513 * Scheduling the delayed work after 1 jiffies will make the work to
1514 * get schedule any time from 0ms to 1000/HZ ms which is not desirable
1515 * for hibern8 enter work as it may impact the performance if it gets
1516 * scheduled almost immediately. Hence make sure that hibern8 enter
1517 * work gets scheduled atleast after 2 jiffies (any time between
1518 * 1000/HZ ms to 2000/HZ ms).
1519 */
1520 gating->delay_ms_pwr_save = jiffies_to_msecs(
1521 max_t(unsigned long,
1522 msecs_to_jiffies(UFSHCD_CLK_GATING_DELAY_MS_PWR_SAVE),
1523 2));
1524 gating->delay_ms_perf = jiffies_to_msecs(
1525 max_t(unsigned long,
1526 msecs_to_jiffies(UFSHCD_CLK_GATING_DELAY_MS_PERF),
1527 2));
1528
1529 /* start with performance mode */
1530 gating->delay_ms = gating->delay_ms_perf;
1531
1532 if (!ufshcd_is_clkscaling_supported(hba))
1533 goto scaling_not_supported;
1534
1535 gating->delay_pwr_save_attr.show = ufshcd_clkgate_delay_pwr_save_show;
1536 gating->delay_pwr_save_attr.store = ufshcd_clkgate_delay_pwr_save_store;
1537 sysfs_attr_init(&gating->delay_pwr_save_attr.attr);
1538 gating->delay_pwr_save_attr.attr.name = "clkgate_delay_ms_pwr_save";
1539 gating->delay_pwr_save_attr.attr.mode = S_IRUGO | S_IWUSR;
1540 if (device_create_file(hba->dev, &gating->delay_pwr_save_attr))
1541 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay_ms_pwr_save\n");
1542
1543 gating->delay_perf_attr.show = ufshcd_clkgate_delay_perf_show;
1544 gating->delay_perf_attr.store = ufshcd_clkgate_delay_perf_store;
1545 sysfs_attr_init(&gating->delay_perf_attr.attr);
1546 gating->delay_perf_attr.attr.name = "clkgate_delay_ms_perf";
1547 gating->delay_perf_attr.attr.mode = S_IRUGO | S_IWUSR;
1548 if (device_create_file(hba->dev, &gating->delay_perf_attr))
1549 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay_ms_perf\n");
1550
1551 goto add_clkgate_enable;
1552
1553scaling_not_supported:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001554 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1555 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1556 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1557 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1558 hba->clk_gating.delay_attr.attr.mode = S_IRUGO | S_IWUSR;
1559 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1560 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001561
1562add_clkgate_enable:
1563 gating->enable_attr.show = ufshcd_clkgate_enable_show;
1564 gating->enable_attr.store = ufshcd_clkgate_enable_store;
1565 sysfs_attr_init(&gating->enable_attr.attr);
1566 gating->enable_attr.attr.name = "clkgate_enable";
1567 gating->enable_attr.attr.mode = S_IRUGO | S_IWUSR;
1568 if (device_create_file(hba->dev, &gating->enable_attr))
1569 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001570}
1571
1572static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1573{
1574 if (!ufshcd_is_clkgating_allowed(hba))
1575 return;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001576 if (ufshcd_is_clkscaling_supported(hba)) {
1577 device_remove_file(hba->dev,
1578 &hba->clk_gating.delay_pwr_save_attr);
1579 device_remove_file(hba->dev, &hba->clk_gating.delay_perf_attr);
1580 } else {
1581 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1582 }
1583 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001584 cancel_work_sync(&hba->clk_gating.ungate_work);
1585 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001586}
1587
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001588static void ufshcd_set_auto_hibern8_timer(struct ufs_hba *hba, u32 delay)
1589{
1590 ufshcd_rmwl(hba, AUTO_HIBERN8_TIMER_SCALE_MASK |
1591 AUTO_HIBERN8_IDLE_TIMER_MASK,
1592 AUTO_HIBERN8_TIMER_SCALE_1_MS | delay,
1593 REG_AUTO_HIBERN8_IDLE_TIMER);
1594 /* Make sure the timer gets applied before further operations */
1595 mb();
1596}
1597
1598/**
1599 * ufshcd_hibern8_hold - Make sure that link is not in hibern8.
1600 *
1601 * @hba: per adapter instance
1602 * @async: This indicates whether caller wants to exit hibern8 asynchronously.
1603 *
1604 * Exit from hibern8 mode and set the link as active.
1605 *
1606 * Return 0 on success, non-zero on failure.
1607 */
1608static int ufshcd_hibern8_hold(struct ufs_hba *hba, bool async)
1609{
1610 int rc = 0;
1611 unsigned long flags;
1612
1613 if (!ufshcd_is_hibern8_on_idle_allowed(hba))
1614 goto out;
1615
1616 spin_lock_irqsave(hba->host->host_lock, flags);
1617 hba->hibern8_on_idle.active_reqs++;
1618
1619 if (ufshcd_eh_in_progress(hba)) {
1620 spin_unlock_irqrestore(hba->host->host_lock, flags);
1621 return 0;
1622 }
1623
1624start:
1625 switch (hba->hibern8_on_idle.state) {
1626 case HIBERN8_EXITED:
1627 break;
1628 case REQ_HIBERN8_ENTER:
1629 if (cancel_delayed_work(&hba->hibern8_on_idle.enter_work)) {
1630 hba->hibern8_on_idle.state = HIBERN8_EXITED;
1631 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
1632 hba->hibern8_on_idle.state);
1633 break;
1634 }
1635 /*
1636 * If we here, it means Hibern8 enter work is either done or
1637 * currently running. Hence, fall through to cancel hibern8
1638 * work and exit hibern8.
1639 */
1640 case HIBERN8_ENTERED:
1641 __ufshcd_scsi_block_requests(hba);
1642 hba->hibern8_on_idle.state = REQ_HIBERN8_EXIT;
1643 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
1644 hba->hibern8_on_idle.state);
1645 schedule_work(&hba->hibern8_on_idle.exit_work);
1646 /*
1647 * fall through to check if we should wait for this
1648 * work to be done or not.
1649 */
1650 case REQ_HIBERN8_EXIT:
1651 if (async) {
1652 rc = -EAGAIN;
1653 hba->hibern8_on_idle.active_reqs--;
1654 break;
1655 } else {
1656 spin_unlock_irqrestore(hba->host->host_lock, flags);
1657 flush_work(&hba->hibern8_on_idle.exit_work);
1658 /* Make sure state is HIBERN8_EXITED before returning */
1659 spin_lock_irqsave(hba->host->host_lock, flags);
1660 goto start;
1661 }
1662 default:
1663 dev_err(hba->dev, "%s: H8 is in invalid state %d\n",
1664 __func__, hba->hibern8_on_idle.state);
1665 break;
1666 }
1667 spin_unlock_irqrestore(hba->host->host_lock, flags);
1668out:
1669 return rc;
1670}
1671
1672/* host lock must be held before calling this variant */
1673static void __ufshcd_hibern8_release(struct ufs_hba *hba, bool no_sched)
1674{
1675 unsigned long delay_in_jiffies;
1676
1677 if (!ufshcd_is_hibern8_on_idle_allowed(hba))
1678 return;
1679
1680 hba->hibern8_on_idle.active_reqs--;
1681 BUG_ON(hba->hibern8_on_idle.active_reqs < 0);
1682
1683 if (hba->hibern8_on_idle.active_reqs
1684 || hba->hibern8_on_idle.is_suspended
1685 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1686 || hba->lrb_in_use || hba->outstanding_tasks
1687 || hba->active_uic_cmd || hba->uic_async_done
1688 || ufshcd_eh_in_progress(hba) || no_sched)
1689 return;
1690
1691 hba->hibern8_on_idle.state = REQ_HIBERN8_ENTER;
1692 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
1693 hba->hibern8_on_idle.state);
1694 /*
1695 * Scheduling the delayed work after 1 jiffies will make the work to
1696 * get schedule any time from 0ms to 1000/HZ ms which is not desirable
1697 * for hibern8 enter work as it may impact the performance if it gets
1698 * scheduled almost immediately. Hence make sure that hibern8 enter
1699 * work gets scheduled atleast after 2 jiffies (any time between
1700 * 1000/HZ ms to 2000/HZ ms).
1701 */
1702 delay_in_jiffies = msecs_to_jiffies(hba->hibern8_on_idle.delay_ms);
1703 if (delay_in_jiffies == 1)
1704 delay_in_jiffies++;
1705
1706 schedule_delayed_work(&hba->hibern8_on_idle.enter_work,
1707 delay_in_jiffies);
1708}
1709
1710static void ufshcd_hibern8_release(struct ufs_hba *hba, bool no_sched)
1711{
1712 unsigned long flags;
1713
1714 spin_lock_irqsave(hba->host->host_lock, flags);
1715 __ufshcd_hibern8_release(hba, no_sched);
1716 spin_unlock_irqrestore(hba->host->host_lock, flags);
1717}
1718
1719static void ufshcd_hibern8_enter_work(struct work_struct *work)
1720{
1721 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1722 hibern8_on_idle.enter_work.work);
1723 unsigned long flags;
1724
1725 spin_lock_irqsave(hba->host->host_lock, flags);
1726 if (hba->hibern8_on_idle.is_suspended) {
1727 hba->hibern8_on_idle.state = HIBERN8_EXITED;
1728 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
1729 hba->hibern8_on_idle.state);
1730 goto rel_lock;
1731 }
1732
1733 if (hba->hibern8_on_idle.active_reqs
1734 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1735 || hba->lrb_in_use || hba->outstanding_tasks
1736 || hba->active_uic_cmd || hba->uic_async_done)
1737 goto rel_lock;
1738
1739 spin_unlock_irqrestore(hba->host->host_lock, flags);
1740
1741 if (ufshcd_is_link_active(hba) && ufshcd_uic_hibern8_enter(hba)) {
1742 /* Enter failed */
1743 hba->hibern8_on_idle.state = HIBERN8_EXITED;
1744 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
1745 hba->hibern8_on_idle.state);
1746 goto out;
1747 }
1748 ufshcd_set_link_hibern8(hba);
1749
1750 /*
1751 * In case you are here to cancel this work the hibern8_on_idle.state
1752 * would be marked as REQ_HIBERN8_EXIT. In this case keep the state
1753 * as REQ_HIBERN8_EXIT which would anyway imply that we are in hibern8
1754 * and a request to exit from it is pending. By doing this way,
1755 * we keep the state machine in tact and this would ultimately
1756 * prevent from doing cancel work multiple times when there are
1757 * new requests arriving before the current cancel work is done.
1758 */
1759 spin_lock_irqsave(hba->host->host_lock, flags);
1760 if (hba->hibern8_on_idle.state == REQ_HIBERN8_ENTER) {
1761 hba->hibern8_on_idle.state = HIBERN8_ENTERED;
1762 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
1763 hba->hibern8_on_idle.state);
1764 }
1765rel_lock:
1766 spin_unlock_irqrestore(hba->host->host_lock, flags);
1767out:
1768 return;
1769}
1770
1771static void ufshcd_hibern8_exit_work(struct work_struct *work)
1772{
1773 int ret;
1774 unsigned long flags;
1775 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1776 hibern8_on_idle.exit_work);
1777
1778 cancel_delayed_work_sync(&hba->hibern8_on_idle.enter_work);
1779
1780 spin_lock_irqsave(hba->host->host_lock, flags);
1781 if ((hba->hibern8_on_idle.state == HIBERN8_EXITED)
1782 || ufshcd_is_link_active(hba)) {
1783 hba->hibern8_on_idle.state = HIBERN8_EXITED;
1784 spin_unlock_irqrestore(hba->host->host_lock, flags);
1785 goto unblock_reqs;
1786 }
1787 spin_unlock_irqrestore(hba->host->host_lock, flags);
1788
1789 /* Exit from hibern8 */
1790 if (ufshcd_is_link_hibern8(hba)) {
1791 ufshcd_hold(hba, false);
1792 ret = ufshcd_uic_hibern8_exit(hba);
1793 ufshcd_release(hba, false);
1794 if (!ret) {
1795 spin_lock_irqsave(hba->host->host_lock, flags);
1796 ufshcd_set_link_active(hba);
1797 hba->hibern8_on_idle.state = HIBERN8_EXITED;
1798 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
1799 hba->hibern8_on_idle.state);
1800 spin_unlock_irqrestore(hba->host->host_lock, flags);
1801 }
1802 }
1803unblock_reqs:
1804 ufshcd_scsi_unblock_requests(hba);
1805}
1806
1807static ssize_t ufshcd_hibern8_on_idle_delay_show(struct device *dev,
1808 struct device_attribute *attr, char *buf)
1809{
1810 struct ufs_hba *hba = dev_get_drvdata(dev);
1811
1812 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->hibern8_on_idle.delay_ms);
1813}
1814
1815static ssize_t ufshcd_hibern8_on_idle_delay_store(struct device *dev,
1816 struct device_attribute *attr, const char *buf, size_t count)
1817{
1818 struct ufs_hba *hba = dev_get_drvdata(dev);
1819 unsigned long flags, value;
1820
1821 if (kstrtoul(buf, 0, &value))
1822 return -EINVAL;
1823
1824 spin_lock_irqsave(hba->host->host_lock, flags);
1825 hba->hibern8_on_idle.delay_ms = value;
1826 spin_unlock_irqrestore(hba->host->host_lock, flags);
1827
1828 /* Update auto hibern8 timer value if supported */
1829 if (ufshcd_is_auto_hibern8_supported(hba) &&
1830 hba->hibern8_on_idle.is_enabled)
1831 ufshcd_set_auto_hibern8_timer(hba,
1832 hba->hibern8_on_idle.delay_ms);
1833
1834 return count;
1835}
1836
1837static ssize_t ufshcd_hibern8_on_idle_enable_show(struct device *dev,
1838 struct device_attribute *attr, char *buf)
1839{
1840 struct ufs_hba *hba = dev_get_drvdata(dev);
1841
1842 return snprintf(buf, PAGE_SIZE, "%d\n",
1843 hba->hibern8_on_idle.is_enabled);
1844}
1845
1846static ssize_t ufshcd_hibern8_on_idle_enable_store(struct device *dev,
1847 struct device_attribute *attr, const char *buf, size_t count)
1848{
1849 struct ufs_hba *hba = dev_get_drvdata(dev);
1850 unsigned long flags;
1851 u32 value;
1852
1853 if (kstrtou32(buf, 0, &value))
1854 return -EINVAL;
1855
1856 value = !!value;
1857 if (value == hba->hibern8_on_idle.is_enabled)
1858 goto out;
1859
1860 /* Update auto hibern8 timer value if supported */
1861 if (ufshcd_is_auto_hibern8_supported(hba)) {
1862 ufshcd_set_auto_hibern8_timer(hba,
1863 value ? hba->hibern8_on_idle.delay_ms : value);
1864 goto update;
1865 }
1866
1867 if (value) {
1868 /*
1869 * As clock gating work would wait for the hibern8 enter work
1870 * to finish, clocks would remain on during hibern8 enter work.
1871 */
1872 ufshcd_hold(hba, false);
1873 ufshcd_release_all(hba);
1874 } else {
1875 spin_lock_irqsave(hba->host->host_lock, flags);
1876 hba->hibern8_on_idle.active_reqs++;
1877 spin_unlock_irqrestore(hba->host->host_lock, flags);
1878 }
1879
1880update:
1881 hba->hibern8_on_idle.is_enabled = value;
1882out:
1883 return count;
1884}
1885
1886static void ufshcd_init_hibern8_on_idle(struct ufs_hba *hba)
1887{
1888 /* initialize the state variable here */
1889 hba->hibern8_on_idle.state = HIBERN8_EXITED;
1890
1891 if (!ufshcd_is_hibern8_on_idle_allowed(hba) &&
1892 !ufshcd_is_auto_hibern8_supported(hba))
1893 return;
1894
1895 if (ufshcd_is_auto_hibern8_supported(hba)) {
1896 hba->hibern8_on_idle.state = AUTO_HIBERN8;
1897 /*
1898 * Disable SW hibern8 enter on idle in case
1899 * auto hibern8 is supported
1900 */
1901 hba->caps &= ~UFSHCD_CAP_HIBERN8_ENTER_ON_IDLE;
1902 } else {
1903 INIT_DELAYED_WORK(&hba->hibern8_on_idle.enter_work,
1904 ufshcd_hibern8_enter_work);
1905 INIT_WORK(&hba->hibern8_on_idle.exit_work,
1906 ufshcd_hibern8_exit_work);
1907 }
1908
1909 hba->hibern8_on_idle.delay_ms = 10;
1910 hba->hibern8_on_idle.is_enabled = true;
1911
1912 hba->hibern8_on_idle.delay_attr.show =
1913 ufshcd_hibern8_on_idle_delay_show;
1914 hba->hibern8_on_idle.delay_attr.store =
1915 ufshcd_hibern8_on_idle_delay_store;
1916 sysfs_attr_init(&hba->hibern8_on_idle.delay_attr.attr);
1917 hba->hibern8_on_idle.delay_attr.attr.name = "hibern8_on_idle_delay_ms";
1918 hba->hibern8_on_idle.delay_attr.attr.mode = S_IRUGO | S_IWUSR;
1919 if (device_create_file(hba->dev, &hba->hibern8_on_idle.delay_attr))
1920 dev_err(hba->dev, "Failed to create sysfs for hibern8_on_idle_delay\n");
1921
1922 hba->hibern8_on_idle.enable_attr.show =
1923 ufshcd_hibern8_on_idle_enable_show;
1924 hba->hibern8_on_idle.enable_attr.store =
1925 ufshcd_hibern8_on_idle_enable_store;
1926 sysfs_attr_init(&hba->hibern8_on_idle.enable_attr.attr);
1927 hba->hibern8_on_idle.enable_attr.attr.name = "hibern8_on_idle_enable";
1928 hba->hibern8_on_idle.enable_attr.attr.mode = S_IRUGO | S_IWUSR;
1929 if (device_create_file(hba->dev, &hba->hibern8_on_idle.enable_attr))
1930 dev_err(hba->dev, "Failed to create sysfs for hibern8_on_idle_enable\n");
1931}
1932
1933static void ufshcd_exit_hibern8_on_idle(struct ufs_hba *hba)
1934{
1935 if (!ufshcd_is_hibern8_on_idle_allowed(hba) &&
1936 !ufshcd_is_auto_hibern8_supported(hba))
1937 return;
1938 device_remove_file(hba->dev, &hba->hibern8_on_idle.delay_attr);
1939 device_remove_file(hba->dev, &hba->hibern8_on_idle.enable_attr);
1940}
1941
1942static void ufshcd_hold_all(struct ufs_hba *hba)
1943{
1944 ufshcd_hold(hba, false);
1945 ufshcd_hibern8_hold(hba, false);
1946}
1947
1948static void ufshcd_release_all(struct ufs_hba *hba)
1949{
1950 ufshcd_hibern8_release(hba, false);
1951 ufshcd_release(hba, false);
1952}
1953
Sahitya Tummala856b3482014-09-25 15:32:34 +03001954/* Must be called with host lock acquired */
1955static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1956{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001957 bool queue_resume_work = false;
1958
1959 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001960 return;
1961
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001962 if (!hba->clk_scaling.active_reqs++)
1963 queue_resume_work = true;
1964
1965 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1966 return;
1967
1968 if (queue_resume_work)
1969 queue_work(hba->clk_scaling.workq,
1970 &hba->clk_scaling.resume_work);
1971
1972 if (!hba->clk_scaling.window_start_t) {
1973 hba->clk_scaling.window_start_t = jiffies;
1974 hba->clk_scaling.tot_busy_t = 0;
1975 hba->clk_scaling.is_busy_started = false;
1976 }
1977
Sahitya Tummala856b3482014-09-25 15:32:34 +03001978 if (!hba->clk_scaling.is_busy_started) {
1979 hba->clk_scaling.busy_start_t = ktime_get();
1980 hba->clk_scaling.is_busy_started = true;
1981 }
1982}
1983
1984static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1985{
1986 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1987
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001988 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001989 return;
1990
1991 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1992 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1993 scaling->busy_start_t));
1994 scaling->busy_start_t = ktime_set(0, 0);
1995 scaling->is_busy_started = false;
1996 }
1997}
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001998
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301999/**
2000 * ufshcd_send_command - Send SCSI or device management commands
2001 * @hba: per adapter instance
2002 * @task_tag: Task tag of the command
2003 */
2004static inline
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002005int ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302006{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002007 int ret = 0;
2008
2009 hba->lrb[task_tag].issue_time_stamp = ktime_get();
2010 hba->lrb[task_tag].complete_time_stamp = ktime_set(0, 0);
Sahitya Tummala856b3482014-09-25 15:32:34 +03002011 ufshcd_clk_scaling_start_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302012 __set_bit(task_tag, &hba->outstanding_reqs);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302013 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002014 /* Make sure that doorbell is committed immediately */
2015 wmb();
2016 ufshcd_cond_add_cmd_trace(hba, task_tag, "send");
2017 ufshcd_update_tag_stats(hba, task_tag);
2018 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302019}
2020
2021/**
2022 * ufshcd_copy_sense_data - Copy sense data in case of check condition
2023 * @lrb - pointer to local reference block
2024 */
2025static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
2026{
2027 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05302028 if (lrbp->sense_buffer &&
2029 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002030 int len_to_copy;
2031
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302032 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002033 len_to_copy = min_t(int, RESPONSE_UPIU_SENSE_DATA_LENGTH, len);
2034
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302035 memcpy(lrbp->sense_buffer,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302036 lrbp->ucd_rsp_ptr->sr.sense_data,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002037 min_t(int, len_to_copy, UFSHCD_REQ_SENSE_SIZE));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302038 }
2039}
2040
2041/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302042 * ufshcd_copy_query_response() - Copy the Query Response and the data
2043 * descriptor
2044 * @hba: per adapter instance
2045 * @lrb - pointer to local reference block
2046 */
2047static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002048int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05302049{
2050 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2051
Dolev Raviv68078d52013-07-30 00:35:58 +05302052 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302053
Dolev Raviv68078d52013-07-30 00:35:58 +05302054 /* Get the descriptor */
2055 if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002056 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05302057 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002058 u16 resp_len;
2059 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05302060
2061 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002062 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302063 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002064 buf_len = be16_to_cpu(
2065 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002066 if (likely(buf_len >= resp_len)) {
2067 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
2068 } else {
2069 dev_warn(hba->dev,
2070 "%s: Response size is bigger than buffer",
2071 __func__);
2072 return -EINVAL;
2073 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302074 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002075
2076 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302077}
2078
2079/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302080 * ufshcd_hba_capabilities - Read controller capabilities
2081 * @hba: per adapter instance
2082 */
2083static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
2084{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302085 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302086
2087 /* nutrs and nutmrs are 0 based values */
2088 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
2089 hba->nutmrs =
2090 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
2091}
2092
2093/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302094 * ufshcd_ready_for_uic_cmd - Check if controller is ready
2095 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302096 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302097 * Return true on success, else false
2098 */
2099static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
2100{
2101 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
2102 return true;
2103 else
2104 return false;
2105}
2106
2107/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05302108 * ufshcd_get_upmcrs - Get the power mode change request status
2109 * @hba: Pointer to adapter instance
2110 *
2111 * This function gets the UPMCRS field of HCS register
2112 * Returns value of UPMCRS field
2113 */
2114static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
2115{
2116 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
2117}
2118
2119/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302120 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
2121 * @hba: per adapter instance
2122 * @uic_cmd: UIC command
2123 *
2124 * Mutex must be held.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302125 */
2126static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302127ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302128{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302129 WARN_ON(hba->active_uic_cmd);
2130
2131 hba->active_uic_cmd = uic_cmd;
2132
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302133 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302134 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2135 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2136 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302137
2138 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302139 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302140 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302141}
2142
2143/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302144 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2145 * @hba: per adapter instance
2146 * @uic_command: UIC command
2147 *
2148 * Must be called with mutex held.
2149 * Returns 0 only if success.
2150 */
2151static int
2152ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2153{
2154 int ret;
2155 unsigned long flags;
2156
2157 if (wait_for_completion_timeout(&uic_cmd->done,
2158 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2159 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2160 else
2161 ret = -ETIMEDOUT;
2162
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002163 if (ret)
2164 ufsdbg_set_err_state(hba);
2165
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302166 spin_lock_irqsave(hba->host->host_lock, flags);
2167 hba->active_uic_cmd = NULL;
2168 spin_unlock_irqrestore(hba->host->host_lock, flags);
2169
2170 return ret;
2171}
2172
2173/**
2174 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2175 * @hba: per adapter instance
2176 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002177 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302178 *
2179 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002180 * with mutex held and host_lock locked.
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302181 * Returns 0 only if success.
2182 */
2183static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002184__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2185 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302186{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302187 if (!ufshcd_ready_for_uic_cmd(hba)) {
2188 dev_err(hba->dev,
2189 "Controller not ready to accept UIC commands\n");
2190 return -EIO;
2191 }
2192
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002193 if (completion)
2194 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302195
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302196 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302197
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002198 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302199}
2200
2201/**
2202 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2203 * @hba: per adapter instance
2204 * @uic_cmd: UIC command
2205 *
2206 * Returns 0 only if success.
2207 */
2208static int
2209ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2210{
2211 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002212 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302213
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002214 ufshcd_hold_all(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302215 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03002216 ufshcd_add_delay_before_dme_cmd(hba);
2217
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002218 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002219 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002220 spin_unlock_irqrestore(hba->host->host_lock, flags);
2221 if (!ret)
2222 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2223
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002224 ufshcd_save_tstamp_of_last_dme_cmd(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302225 mutex_unlock(&hba->uic_cmd_mutex);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002226 ufshcd_release_all(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302227
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002228 ufsdbg_error_inject_dispatcher(hba,
2229 ERR_INJECT_UIC, 0, &ret);
2230
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302231 return ret;
2232}
2233
2234/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302235 * ufshcd_map_sg - Map scatter-gather list to prdt
2236 * @lrbp - pointer to local reference block
2237 *
2238 * Returns 0 in case of success, non-zero value in case of failure
2239 */
2240static int ufshcd_map_sg(struct ufshcd_lrb *lrbp)
2241{
2242 struct ufshcd_sg_entry *prd_table;
2243 struct scatterlist *sg;
2244 struct scsi_cmnd *cmd;
2245 int sg_segments;
2246 int i;
2247
2248 cmd = lrbp->cmd;
2249 sg_segments = scsi_dma_map(cmd);
2250 if (sg_segments < 0)
2251 return sg_segments;
2252
2253 if (sg_segments) {
2254 lrbp->utr_descriptor_ptr->prd_table_length =
2255 cpu_to_le16((u16) (sg_segments));
2256
2257 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2258
2259 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2260 prd_table[i].size =
2261 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2262 prd_table[i].base_addr =
2263 cpu_to_le32(lower_32_bits(sg->dma_address));
2264 prd_table[i].upper_addr =
2265 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002266 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302267 }
2268 } else {
2269 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2270 }
2271
2272 return 0;
2273}
2274
2275/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302276 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302277 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302278 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302279 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302280static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302281{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302282 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2283
2284 if (hba->ufs_version == UFSHCI_VERSION_10) {
2285 u32 rw;
2286 rw = set & INTERRUPT_MASK_RW_VER_10;
2287 set = rw | ((set ^ intrs) & intrs);
2288 } else {
2289 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302290 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302291
2292 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2293}
2294
2295/**
2296 * ufshcd_disable_intr - disable interrupts
2297 * @hba: per adapter instance
2298 * @intrs: interrupt bits
2299 */
2300static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2301{
2302 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2303
2304 if (hba->ufs_version == UFSHCI_VERSION_10) {
2305 u32 rw;
2306 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2307 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2308 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2309
2310 } else {
2311 set &= ~intrs;
2312 }
2313
2314 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302315}
2316
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002317static int ufshcd_prepare_crypto_utrd(struct ufs_hba *hba,
2318 struct ufshcd_lrb *lrbp)
2319{
2320 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2321 u8 cc_index = 0;
2322 bool enable = false;
2323 u64 dun = 0;
2324 int ret;
2325
2326 /*
2327 * Call vendor specific code to get crypto info for this request:
2328 * enable, crypto config. index, DUN.
2329 * If bypass is set, don't bother setting the other fields.
2330 */
2331 ret = ufshcd_vops_crypto_req_setup(hba, lrbp, &cc_index, &enable, &dun);
2332 if (ret) {
2333 if (ret != -EAGAIN) {
2334 dev_err(hba->dev,
2335 "%s: failed to setup crypto request (%d)\n",
2336 __func__, ret);
2337 }
2338
2339 return ret;
2340 }
2341
2342 if (!enable)
2343 goto out;
2344
2345 req_desc->header.dword_0 |= cc_index | UTRD_CRYPTO_ENABLE;
2346 if (lrbp->cmd->request && lrbp->cmd->request->bio)
2347 dun = lrbp->cmd->request->bio->bi_iter.bi_sector;
2348
2349 req_desc->header.dword_1 = (u32)(dun & 0xFFFFFFFF);
2350 req_desc->header.dword_3 = (u32)((dun >> 32) & 0xFFFFFFFF);
2351out:
2352 return 0;
2353}
2354
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302355/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302356 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2357 * descriptor according to request
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002358 * @hba: per adapter instance
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302359 * @lrbp: pointer to local reference block
2360 * @upiu_flags: flags required in the header
2361 * @cmd_dir: requests data direction
2362 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002363static int ufshcd_prepare_req_desc_hdr(struct ufs_hba *hba,
2364 struct ufshcd_lrb *lrbp, u32 *upiu_flags,
2365 enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302366{
2367 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2368 u32 data_direction;
2369 u32 dword_0;
2370
2371 if (cmd_dir == DMA_FROM_DEVICE) {
2372 data_direction = UTP_DEVICE_TO_HOST;
2373 *upiu_flags = UPIU_CMD_FLAGS_READ;
2374 } else if (cmd_dir == DMA_TO_DEVICE) {
2375 data_direction = UTP_HOST_TO_DEVICE;
2376 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2377 } else {
2378 data_direction = UTP_NO_DATA_TRANSFER;
2379 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2380 }
2381
2382 dword_0 = data_direction | (lrbp->command_type
2383 << UPIU_COMMAND_TYPE_OFFSET);
2384 if (lrbp->intr_cmd)
2385 dword_0 |= UTP_REQ_DESC_INT_CMD;
2386
2387 /* Transfer request descriptor header fields */
2388 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002389 /* dword_1 is reserved, hence it is set to 0 */
2390 req_desc->header.dword_1 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302391 /*
2392 * assigning invalid value for command status. Controller
2393 * updates OCS on command completion, with the command
2394 * status
2395 */
2396 req_desc->header.dword_2 =
2397 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002398 /* dword_3 is reserved, hence it is set to 0 */
2399 req_desc->header.dword_3 = 0;
Yaniv Gardi51047262016-02-01 15:02:38 +02002400
2401 req_desc->prd_table_length = 0;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002402
2403 if (ufshcd_is_crypto_supported(hba))
2404 return ufshcd_prepare_crypto_utrd(hba, lrbp);
2405
2406 return 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302407}
2408
2409/**
2410 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2411 * for scsi commands
2412 * @lrbp - local reference block pointer
2413 * @upiu_flags - flags
2414 */
2415static
2416void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2417{
2418 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002419 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302420
2421 /* command descriptor fields */
2422 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2423 UPIU_TRANSACTION_COMMAND, upiu_flags,
2424 lrbp->lun, lrbp->task_tag);
2425 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2426 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2427
2428 /* Total EHS length and Data segment length will be zero */
2429 ucd_req_ptr->header.dword_2 = 0;
2430
2431 ucd_req_ptr->sc.exp_data_transfer_len =
2432 cpu_to_be32(lrbp->cmd->sdb.length);
2433
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002434 cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, MAX_CDB_SIZE);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002435 memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002436 if (cdb_len < MAX_CDB_SIZE)
2437 memset(ucd_req_ptr->sc.cdb + cdb_len, 0,
2438 (MAX_CDB_SIZE - cdb_len));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002439 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302440}
2441
Dolev Raviv68078d52013-07-30 00:35:58 +05302442/**
2443 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2444 * for query requsts
2445 * @hba: UFS hba
2446 * @lrbp: local reference block pointer
2447 * @upiu_flags: flags
2448 */
2449static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2450 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2451{
2452 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2453 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302454 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302455 u8 *descp = (u8 *)lrbp->ucd_req_ptr + GENERAL_UPIU_REQUEST_SIZE;
2456
2457 /* Query request header */
2458 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2459 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2460 lrbp->lun, lrbp->task_tag);
2461 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2462 0, query->request.query_func, 0, 0);
2463
Zang Leigang68612852016-08-25 17:39:19 +08002464 /* Data segment length only need for WRITE_DESC */
2465 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2466 ucd_req_ptr->header.dword_2 =
2467 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2468 else
2469 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302470
2471 /* Copy the Query Request buffer as is */
2472 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2473 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302474
2475 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002476 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2477 memcpy(descp, query->descriptor, len);
2478
Yaniv Gardi51047262016-02-01 15:02:38 +02002479 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302480}
2481
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302482static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2483{
2484 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2485
2486 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2487
2488 /* command descriptor fields */
2489 ucd_req_ptr->header.dword_0 =
2490 UPIU_HEADER_DWORD(
2491 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002492 /* clear rest of the fields of basic header */
2493 ucd_req_ptr->header.dword_1 = 0;
2494 ucd_req_ptr->header.dword_2 = 0;
2495
2496 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302497}
2498
2499/**
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002500 * ufshcd_compose_upiu - form UFS Protocol Information Unit(UPIU)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302501 * @hba - per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302502 * @lrb - pointer to local reference block
2503 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002504static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302505{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302506 u32 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302507 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302508
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002509 switch (lrbp->command_type) {
2510 case UTP_CMD_TYPE_SCSI:
2511 if (likely(lrbp->cmd)) {
2512 ret = ufshcd_prepare_req_desc_hdr(hba, lrbp,
2513 &upiu_flags, lrbp->cmd->sc_data_direction);
2514 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2515 } else {
2516 ret = -EINVAL;
2517 }
2518 break;
2519 case UTP_CMD_TYPE_DEV_MANAGE:
2520 ret = ufshcd_prepare_req_desc_hdr(hba, lrbp, &upiu_flags,
2521 DMA_NONE);
2522 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2523 ufshcd_prepare_utp_query_req_upiu(
2524 hba, lrbp, upiu_flags);
2525 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2526 ufshcd_prepare_utp_nop_upiu(lrbp);
2527 else
2528 ret = -EINVAL;
2529 break;
2530 case UTP_CMD_TYPE_UFS:
2531 /* For UFS native command implementation */
2532 ret = -ENOTSUPP;
2533 dev_err(hba->dev, "%s: UFS native command are not supported\n",
2534 __func__);
2535 break;
2536 default:
2537 ret = -ENOTSUPP;
2538 dev_err(hba->dev, "%s: unknown command type: 0x%x\n",
2539 __func__, lrbp->command_type);
2540 break;
2541 } /* end of switch */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302542
2543 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302544}
2545
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002546/*
2547 * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
2548 * @scsi_lun: scsi LUN id
2549 *
2550 * Returns UPIU LUN id
2551 */
2552static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
2553{
2554 if (scsi_is_wlun(scsi_lun))
2555 return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
2556 | UFS_UPIU_WLUN_ID;
2557 else
2558 return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
2559}
2560
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302561/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002562 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2563 * @scsi_lun: UPIU W-LUN id
2564 *
2565 * Returns SCSI W-LUN id
2566 */
2567static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2568{
2569 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2570}
2571
2572/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302573 * ufshcd_queuecommand - main entry point for SCSI requests
2574 * @cmd: command from SCSI Midlayer
2575 * @done: call back function
2576 *
2577 * Returns 0 for success, non-zero in case of failure
2578 */
2579static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2580{
2581 struct ufshcd_lrb *lrbp;
2582 struct ufs_hba *hba;
2583 unsigned long flags;
2584 int tag;
2585 int err = 0;
2586
2587 hba = shost_priv(host);
2588
2589 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02002590 if (!ufshcd_valid_tag(hba, tag)) {
2591 dev_err(hba->dev,
2592 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2593 __func__, tag, cmd, cmd->request);
2594 BUG();
2595 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302596
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002597 if (!down_read_trylock(&hba->clk_scaling_lock))
2598 return SCSI_MLQUEUE_HOST_BUSY;
2599
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302600 spin_lock_irqsave(hba->host->host_lock, flags);
2601 switch (hba->ufshcd_state) {
2602 case UFSHCD_STATE_OPERATIONAL:
2603 break;
2604 case UFSHCD_STATE_RESET:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302605 err = SCSI_MLQUEUE_HOST_BUSY;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302606 goto out_unlock;
2607 case UFSHCD_STATE_ERROR:
2608 set_host_byte(cmd, DID_ERROR);
2609 cmd->scsi_done(cmd);
2610 goto out_unlock;
2611 default:
2612 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2613 __func__, hba->ufshcd_state);
2614 set_host_byte(cmd, DID_BAD_TARGET);
2615 cmd->scsi_done(cmd);
2616 goto out_unlock;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302617 }
Yaniv Gardi53c12d02016-02-01 15:02:45 +02002618
2619 /* if error handling is in progress, don't issue commands */
2620 if (ufshcd_eh_in_progress(hba)) {
2621 set_host_byte(cmd, DID_ERROR);
2622 cmd->scsi_done(cmd);
2623 goto out_unlock;
2624 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302625 spin_unlock_irqrestore(hba->host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302626
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002627 hba->req_abort_count = 0;
2628
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302629 /* acquire the tag to make sure device cmds don't use it */
2630 if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
2631 /*
2632 * Dev manage command in progress, requeue the command.
2633 * Requeuing the command helps in cases where the request *may*
2634 * find different tag instead of waiting for dev manage command
2635 * completion.
2636 */
2637 err = SCSI_MLQUEUE_HOST_BUSY;
2638 goto out;
2639 }
2640
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002641 err = ufshcd_hold(hba, true);
2642 if (err) {
2643 err = SCSI_MLQUEUE_HOST_BUSY;
2644 clear_bit_unlock(tag, &hba->lrb_in_use);
2645 goto out;
2646 }
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -07002647
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002648 if (ufshcd_is_clkgating_allowed(hba))
2649 WARN_ON(hba->clk_gating.state != CLKS_ON);
2650
2651 err = ufshcd_hibern8_hold(hba, true);
2652 if (err) {
2653 clear_bit_unlock(tag, &hba->lrb_in_use);
2654 err = SCSI_MLQUEUE_HOST_BUSY;
2655 ufshcd_release(hba, true);
2656 goto out;
2657 }
2658 if (ufshcd_is_hibern8_on_idle_allowed(hba))
2659 WARN_ON(hba->hibern8_on_idle.state != HIBERN8_EXITED);
2660
2661 /* Vote PM QoS for the request */
2662 ufshcd_vops_pm_qos_req_start(hba, cmd->request);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002663
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -07002664 /* IO svc time latency histogram */
2665 if (hba != NULL && cmd->request != NULL) {
2666 if (hba->latency_hist_enabled &&
2667 (cmd->request->cmd_type == REQ_TYPE_FS)) {
2668 cmd->request->lat_hist_io_start = ktime_get();
2669 cmd->request->lat_hist_enabled = 1;
2670 } else
2671 cmd->request->lat_hist_enabled = 0;
2672 }
2673
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302674 WARN_ON(hba->clk_gating.state != CLKS_ON);
2675
2676 lrbp = &hba->lrb[tag];
2677
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302678 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302679 lrbp->cmd = cmd;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002680 lrbp->sense_bufflen = UFSHCD_REQ_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302681 lrbp->sense_buffer = cmd->sense_buffer;
2682 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002683 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002684 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002685 lrbp->command_type = UTP_CMD_TYPE_SCSI;
2686 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302687
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002688 /* form UPIU before issuing the command */
2689 err = ufshcd_compose_upiu(hba, lrbp);
2690 if (err) {
2691 if (err != -EAGAIN)
2692 dev_err(hba->dev,
2693 "%s: failed to compose upiu %d\n",
2694 __func__, err);
2695
2696 lrbp->cmd = NULL;
2697 clear_bit_unlock(tag, &hba->lrb_in_use);
2698 ufshcd_release_all(hba);
2699 ufshcd_vops_pm_qos_req_end(hba, cmd->request, true);
2700 goto out;
2701 }
Joao Pinto300bb132016-05-11 12:21:27 +01002702
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302703 err = ufshcd_map_sg(lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302704 if (err) {
2705 lrbp->cmd = NULL;
2706 clear_bit_unlock(tag, &hba->lrb_in_use);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002707 ufshcd_release_all(hba);
2708 ufshcd_vops_pm_qos_req_end(hba, cmd->request, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302709 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302710 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302711
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002712 err = ufshcd_vops_crypto_engine_cfg_start(hba, tag);
2713 if (err) {
2714 if (err != -EAGAIN)
2715 dev_err(hba->dev,
2716 "%s: failed to configure crypto engine %d\n",
2717 __func__, err);
2718
2719 scsi_dma_unmap(lrbp->cmd);
2720 lrbp->cmd = NULL;
2721 clear_bit_unlock(tag, &hba->lrb_in_use);
2722 ufshcd_release_all(hba);
2723 ufshcd_vops_pm_qos_req_end(hba, cmd->request, true);
2724
2725 goto out;
2726 }
2727
2728 /* Make sure descriptors are ready before ringing the doorbell */
2729 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302730 /* issue command to the controller */
2731 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002732
2733 err = ufshcd_send_command(hba, tag);
2734 if (err) {
2735 spin_unlock_irqrestore(hba->host->host_lock, flags);
2736 scsi_dma_unmap(lrbp->cmd);
2737 lrbp->cmd = NULL;
2738 clear_bit_unlock(tag, &hba->lrb_in_use);
2739 ufshcd_release_all(hba);
2740 ufshcd_vops_pm_qos_req_end(hba, cmd->request, true);
2741 ufshcd_vops_crypto_engine_cfg_end(hba, lrbp, cmd->request);
2742 dev_err(hba->dev, "%s: failed sending command, %d\n",
2743 __func__, err);
2744 err = DID_ERROR;
2745 goto out;
2746 }
2747
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302748out_unlock:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302749 spin_unlock_irqrestore(hba->host->host_lock, flags);
2750out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002751 up_read(&hba->clk_scaling_lock);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302752 return err;
2753}
2754
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302755static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2756 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2757{
2758 lrbp->cmd = NULL;
2759 lrbp->sense_bufflen = 0;
2760 lrbp->sense_buffer = NULL;
2761 lrbp->task_tag = tag;
2762 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002763 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302764 lrbp->intr_cmd = true; /* No interrupt aggregation */
2765 hba->dev_cmd.type = cmd_type;
2766
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002767 return ufshcd_compose_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302768}
2769
2770static int
2771ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2772{
2773 int err = 0;
2774 unsigned long flags;
2775 u32 mask = 1 << tag;
2776
2777 /* clear outstanding transaction before retry */
2778 spin_lock_irqsave(hba->host->host_lock, flags);
2779 ufshcd_utrl_clear(hba, tag);
2780 spin_unlock_irqrestore(hba->host->host_lock, flags);
2781
2782 /*
2783 * wait for for h/w to clear corresponding bit in door-bell.
2784 * max. wait is 1 sec.
2785 */
2786 err = ufshcd_wait_for_register(hba,
2787 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02002788 mask, ~mask, 1000, 1000, true);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302789
2790 return err;
2791}
2792
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002793static int
2794ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2795{
2796 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2797
2798 /* Get the UPIU response */
2799 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2800 UPIU_RSP_CODE_OFFSET;
2801 return query_res->response;
2802}
2803
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302804/**
2805 * ufshcd_dev_cmd_completion() - handles device management command responses
2806 * @hba: per adapter instance
2807 * @lrbp: pointer to local reference block
2808 */
2809static int
2810ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2811{
2812 int resp;
2813 int err = 0;
2814
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002815 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302816 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2817
2818 switch (resp) {
2819 case UPIU_TRANSACTION_NOP_IN:
2820 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2821 err = -EINVAL;
2822 dev_err(hba->dev, "%s: unexpected response %x\n",
2823 __func__, resp);
2824 }
2825 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302826 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002827 err = ufshcd_check_query_response(hba, lrbp);
2828 if (!err)
2829 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302830 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302831 case UPIU_TRANSACTION_REJECT_UPIU:
2832 /* TODO: handle Reject UPIU Response */
2833 err = -EPERM;
2834 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2835 __func__);
2836 break;
2837 default:
2838 err = -EINVAL;
2839 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2840 __func__, resp);
2841 break;
2842 }
2843
2844 return err;
2845}
2846
2847static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2848 struct ufshcd_lrb *lrbp, int max_timeout)
2849{
2850 int err = 0;
2851 unsigned long time_left;
2852 unsigned long flags;
2853
2854 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2855 msecs_to_jiffies(max_timeout));
2856
2857 spin_lock_irqsave(hba->host->host_lock, flags);
2858 hba->dev_cmd.complete = NULL;
2859 if (likely(time_left)) {
2860 err = ufshcd_get_tr_ocs(lrbp);
2861 if (!err)
2862 err = ufshcd_dev_cmd_completion(hba, lrbp);
2863 }
2864 spin_unlock_irqrestore(hba->host->host_lock, flags);
2865
2866 if (!time_left) {
2867 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002868 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2869 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302870 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002871 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302872 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002873 /*
2874 * in case of an error, after clearing the doorbell,
2875 * we also need to clear the outstanding_request
2876 * field in hba
2877 */
2878 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302879 }
2880
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002881 if (err)
2882 ufsdbg_set_err_state(hba);
2883
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302884 return err;
2885}
2886
2887/**
2888 * ufshcd_get_dev_cmd_tag - Get device management command tag
2889 * @hba: per-adapter instance
2890 * @tag: pointer to variable with available slot value
2891 *
2892 * Get a free slot and lock it until device management command
2893 * completes.
2894 *
2895 * Returns false if free slot is unavailable for locking, else
2896 * return true with tag value in @tag.
2897 */
2898static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
2899{
2900 int tag;
2901 bool ret = false;
2902 unsigned long tmp;
2903
2904 if (!tag_out)
2905 goto out;
2906
2907 do {
2908 tmp = ~hba->lrb_in_use;
2909 tag = find_last_bit(&tmp, hba->nutrs);
2910 if (tag >= hba->nutrs)
2911 goto out;
2912 } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
2913
2914 *tag_out = tag;
2915 ret = true;
2916out:
2917 return ret;
2918}
2919
2920static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
2921{
2922 clear_bit_unlock(tag, &hba->lrb_in_use);
2923}
2924
2925/**
2926 * ufshcd_exec_dev_cmd - API for sending device management requests
2927 * @hba - UFS hba
2928 * @cmd_type - specifies the type (NOP, Query...)
2929 * @timeout - time in seconds
2930 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302931 * NOTE: Since there is only one available tag for device management commands,
2932 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302933 */
2934static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2935 enum dev_cmd_type cmd_type, int timeout)
2936{
2937 struct ufshcd_lrb *lrbp;
2938 int err;
2939 int tag;
2940 struct completion wait;
2941 unsigned long flags;
2942
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002943 down_read(&hba->clk_scaling_lock);
2944
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302945 /*
2946 * Get free slot, sleep if slots are unavailable.
2947 * Even though we use wait_event() which sleeps indefinitely,
2948 * the maximum wait time is bounded by SCSI request timeout.
2949 */
2950 wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
2951
2952 init_completion(&wait);
2953 lrbp = &hba->lrb[tag];
2954 WARN_ON(lrbp->cmd);
2955 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2956 if (unlikely(err))
2957 goto out_put_tag;
2958
2959 hba->dev_cmd.complete = &wait;
2960
Yaniv Gardie3dfdc52016-02-01 15:02:49 +02002961 /* Make sure descriptors are ready before ringing the doorbell */
2962 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302963 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002964 err = ufshcd_send_command(hba, tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302965 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002966 if (err) {
2967 dev_err(hba->dev, "%s: failed sending command, %d\n",
2968 __func__, err);
2969 goto out_put_tag;
2970 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302971 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2972
2973out_put_tag:
2974 ufshcd_put_dev_cmd_tag(hba, tag);
2975 wake_up(&hba->dev_cmd.tag_wq);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002976 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302977 return err;
2978}
2979
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302980/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002981 * ufshcd_init_query() - init the query response and request parameters
2982 * @hba: per-adapter instance
2983 * @request: address of the request pointer to be initialized
2984 * @response: address of the response pointer to be initialized
2985 * @opcode: operation to perform
2986 * @idn: flag idn to access
2987 * @index: LU number to access
2988 * @selector: query/flag/descriptor further identification
2989 */
2990static inline void ufshcd_init_query(struct ufs_hba *hba,
2991 struct ufs_query_req **request, struct ufs_query_res **response,
2992 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2993{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002994 int idn_t = (int)idn;
2995
2996 ufsdbg_error_inject_dispatcher(hba,
2997 ERR_INJECT_QUERY, idn_t, (int *)&idn_t);
2998 idn = idn_t;
2999
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003000 *request = &hba->dev_cmd.query.request;
3001 *response = &hba->dev_cmd.query.response;
3002 memset(*request, 0, sizeof(struct ufs_query_req));
3003 memset(*response, 0, sizeof(struct ufs_query_res));
3004 (*request)->upiu_req.opcode = opcode;
3005 (*request)->upiu_req.idn = idn;
3006 (*request)->upiu_req.index = index;
3007 (*request)->upiu_req.selector = selector;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003008
3009 ufshcd_update_query_stats(hba, opcode, idn);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003010}
3011
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02003012static int ufshcd_query_flag_retry(struct ufs_hba *hba,
3013 enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
3014{
3015 int ret;
3016 int retries;
3017
3018 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
3019 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
3020 if (ret)
3021 dev_dbg(hba->dev,
3022 "%s: failed with error %d, retries %d\n",
3023 __func__, ret, retries);
3024 else
3025 break;
3026 }
3027
3028 if (ret)
3029 dev_err(hba->dev,
3030 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
3031 __func__, opcode, idn, ret, retries);
3032 return ret;
3033}
3034
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003035/**
Dolev Raviv68078d52013-07-30 00:35:58 +05303036 * ufshcd_query_flag() - API function for sending flag query requests
3037 * hba: per-adapter instance
3038 * query_opcode: flag query to perform
3039 * idn: flag idn to access
3040 * flag_res: the flag value after the query request completes
3041 *
3042 * Returns 0 for success, non-zero in case of failure
3043 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02003044int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Dolev Raviv68078d52013-07-30 00:35:58 +05303045 enum flag_idn idn, bool *flag_res)
3046{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003047 struct ufs_query_req *request = NULL;
3048 struct ufs_query_res *response = NULL;
3049 int err, index = 0, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02003050 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05303051
3052 BUG_ON(!hba);
3053
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003054 ufshcd_hold_all(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05303055 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003056 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3057 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05303058
3059 switch (opcode) {
3060 case UPIU_QUERY_OPCODE_SET_FLAG:
3061 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
3062 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
3063 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3064 break;
3065 case UPIU_QUERY_OPCODE_READ_FLAG:
3066 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3067 if (!flag_res) {
3068 /* No dummy reads */
3069 dev_err(hba->dev, "%s: Invalid argument for read request\n",
3070 __func__);
3071 err = -EINVAL;
3072 goto out_unlock;
3073 }
3074 break;
3075 default:
3076 dev_err(hba->dev,
3077 "%s: Expected query flag opcode but got = %d\n",
3078 __func__, opcode);
3079 err = -EINVAL;
3080 goto out_unlock;
3081 }
Dolev Raviv68078d52013-07-30 00:35:58 +05303082
Yaniv Gardie5ad4062016-02-01 15:02:41 +02003083 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05303084
3085 if (err) {
3086 dev_err(hba->dev,
3087 "%s: Sending flag query for idn %d failed, err = %d\n",
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003088 __func__, request->upiu_req.idn, err);
Dolev Raviv68078d52013-07-30 00:35:58 +05303089 goto out_unlock;
3090 }
3091
3092 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303093 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05303094 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
3095
3096out_unlock:
3097 mutex_unlock(&hba->dev_cmd.lock);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003098 ufshcd_release_all(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05303099 return err;
3100}
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003101EXPORT_SYMBOL(ufshcd_query_flag);
Dolev Raviv68078d52013-07-30 00:35:58 +05303102
3103/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303104 * ufshcd_query_attr - API function for sending attribute requests
3105 * hba: per-adapter instance
3106 * opcode: attribute opcode
3107 * idn: attribute idn to access
3108 * index: index field
3109 * selector: selector field
3110 * attr_val: the attribute value after the query request completes
3111 *
3112 * Returns 0 for success, non-zero in case of failure
3113*/
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003114int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303115 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
3116{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003117 struct ufs_query_req *request = NULL;
3118 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303119 int err;
3120
3121 BUG_ON(!hba);
3122
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003123 ufshcd_hold_all(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303124 if (!attr_val) {
3125 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
3126 __func__, opcode);
3127 err = -EINVAL;
3128 goto out;
3129 }
3130
3131 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003132 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3133 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303134
3135 switch (opcode) {
3136 case UPIU_QUERY_OPCODE_WRITE_ATTR:
3137 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303138 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303139 break;
3140 case UPIU_QUERY_OPCODE_READ_ATTR:
3141 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3142 break;
3143 default:
3144 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
3145 __func__, opcode);
3146 err = -EINVAL;
3147 goto out_unlock;
3148 }
3149
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003150 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303151
3152 if (err) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003153 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3154 __func__, opcode,
3155 request->upiu_req.idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303156 goto out_unlock;
3157 }
3158
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303159 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303160
3161out_unlock:
3162 mutex_unlock(&hba->dev_cmd.lock);
3163out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003164 ufshcd_release_all(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303165 return err;
3166}
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003167EXPORT_SYMBOL(ufshcd_query_attr);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303168
3169/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02003170 * ufshcd_query_attr_retry() - API function for sending query
3171 * attribute with retries
3172 * @hba: per-adapter instance
3173 * @opcode: attribute opcode
3174 * @idn: attribute idn to access
3175 * @index: index field
3176 * @selector: selector field
3177 * @attr_val: the attribute value after the query request
3178 * completes
3179 *
3180 * Returns 0 for success, non-zero in case of failure
3181*/
3182static int ufshcd_query_attr_retry(struct ufs_hba *hba,
3183 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
3184 u32 *attr_val)
3185{
3186 int ret = 0;
3187 u32 retries;
3188
3189 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3190 ret = ufshcd_query_attr(hba, opcode, idn, index,
3191 selector, attr_val);
3192 if (ret)
3193 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
3194 __func__, ret, retries);
3195 else
3196 break;
3197 }
3198
3199 if (ret)
3200 dev_err(hba->dev,
3201 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003202 __func__, idn, ret, retries);
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02003203 return ret;
3204}
3205
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003206static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003207 enum query_opcode opcode, enum desc_idn idn, u8 index,
3208 u8 selector, u8 *desc_buf, int *buf_len)
3209{
3210 struct ufs_query_req *request = NULL;
3211 struct ufs_query_res *response = NULL;
3212 int err;
3213
3214 BUG_ON(!hba);
3215
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003216 ufshcd_hold_all(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003217 if (!desc_buf) {
3218 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
3219 __func__, opcode);
3220 err = -EINVAL;
3221 goto out;
3222 }
3223
3224 if (*buf_len <= QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
3225 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
3226 __func__, *buf_len);
3227 err = -EINVAL;
3228 goto out;
3229 }
3230
3231 mutex_lock(&hba->dev_cmd.lock);
3232 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3233 selector);
3234 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03003235 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003236
3237 switch (opcode) {
3238 case UPIU_QUERY_OPCODE_WRITE_DESC:
3239 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3240 break;
3241 case UPIU_QUERY_OPCODE_READ_DESC:
3242 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3243 break;
3244 default:
3245 dev_err(hba->dev,
3246 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
3247 __func__, opcode);
3248 err = -EINVAL;
3249 goto out_unlock;
3250 }
3251
3252 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3253
3254 if (err) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003255 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3256 __func__, opcode,
3257 request->upiu_req.idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003258 goto out_unlock;
3259 }
3260
3261 hba->dev_cmd.query.descriptor = NULL;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03003262 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003263
3264out_unlock:
3265 mutex_unlock(&hba->dev_cmd.lock);
3266out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003267 ufshcd_release_all(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003268 return err;
3269}
3270
3271/**
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003272 * ufshcd_query_descriptor - API function for sending descriptor requests
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003273 * hba: per-adapter instance
3274 * opcode: attribute opcode
3275 * idn: attribute idn to access
3276 * index: index field
3277 * selector: selector field
3278 * desc_buf: the buffer that contains the descriptor
3279 * buf_len: length parameter passed to the device
3280 *
3281 * Returns 0 for success, non-zero in case of failure.
3282 * The buf_len parameter will contain, on return, the length parameter
3283 * received on the response.
3284 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003285int ufshcd_query_descriptor(struct ufs_hba *hba,
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003286 enum query_opcode opcode, enum desc_idn idn, u8 index,
3287 u8 selector, u8 *desc_buf, int *buf_len)
3288{
3289 int err;
3290 int retries;
3291
3292 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3293 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3294 selector, desc_buf, buf_len);
3295 if (!err || err == -EINVAL)
3296 break;
3297 }
3298
3299 return err;
3300}
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003301EXPORT_SYMBOL(ufshcd_query_descriptor);
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003302
3303/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003304 * ufshcd_read_desc_param - read the specified descriptor parameter
3305 * @hba: Pointer to adapter instance
3306 * @desc_id: descriptor idn value
3307 * @desc_index: descriptor index
3308 * @param_offset: offset of the parameter to read
3309 * @param_read_buf: pointer to buffer where parameter would be read
3310 * @param_size: sizeof(param_read_buf)
3311 *
3312 * Return 0 in case of success, non-zero otherwise
3313 */
3314static int ufshcd_read_desc_param(struct ufs_hba *hba,
3315 enum desc_idn desc_id,
3316 int desc_index,
3317 u32 param_offset,
3318 u8 *param_read_buf,
3319 u32 param_size)
3320{
3321 int ret;
3322 u8 *desc_buf;
3323 u32 buff_len;
3324 bool is_kmalloc = true;
3325
3326 /* safety checks */
3327 if (desc_id >= QUERY_DESC_IDN_MAX)
3328 return -EINVAL;
3329
3330 buff_len = ufs_query_desc_max_size[desc_id];
3331 if ((param_offset + param_size) > buff_len)
3332 return -EINVAL;
3333
3334 if (!param_offset && (param_size == buff_len)) {
3335 /* memory space already available to hold full descriptor */
3336 desc_buf = param_read_buf;
3337 is_kmalloc = false;
3338 } else {
3339 /* allocate memory to hold full descriptor */
3340 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3341 if (!desc_buf)
3342 return -ENOMEM;
3343 }
3344
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003345 ret = ufshcd_query_descriptor(hba, UPIU_QUERY_OPCODE_READ_DESC,
3346 desc_id, desc_index, 0, desc_buf,
3347 &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003348
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003349 if (ret) {
3350 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3351 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003352
3353 goto out;
3354 }
3355
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003356 /* Sanity check */
3357 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3358 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3359 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3360 ret = -EINVAL;
3361 goto out;
3362 }
3363
3364 /*
3365 * While reading variable size descriptors (like string descriptor),
3366 * some UFS devices may report the "LENGTH" (field in "Transaction
3367 * Specific fields" of Query Response UPIU) same as what was requested
3368 * in Query Request UPIU instead of reporting the actual size of the
3369 * variable size descriptor.
3370 * Although it's safe to ignore the "LENGTH" field for variable size
3371 * descriptors as we can always derive the length of the descriptor from
3372 * the descriptor header fields. Hence this change impose the length
3373 * match check only for fixed size descriptors (for which we always
3374 * request the correct size as part of Query Request UPIU).
3375 */
3376 if ((desc_id != QUERY_DESC_IDN_STRING) &&
3377 (buff_len != desc_buf[QUERY_DESC_LENGTH_OFFSET])) {
3378 dev_err(hba->dev, "%s: desc_buf length mismatch: buff_len %d, buff_len(desc_header) %d",
3379 __func__, buff_len, desc_buf[QUERY_DESC_LENGTH_OFFSET]);
3380 ret = -EINVAL;
3381 goto out;
3382 }
3383
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003384 if (is_kmalloc)
3385 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3386out:
3387 if (is_kmalloc)
3388 kfree(desc_buf);
3389 return ret;
3390}
3391
3392static inline int ufshcd_read_desc(struct ufs_hba *hba,
3393 enum desc_idn desc_id,
3394 int desc_index,
3395 u8 *buf,
3396 u32 size)
3397{
3398 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3399}
3400
3401static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3402 u8 *buf,
3403 u32 size)
3404{
3405 return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
3406}
3407
Yaniv Gardib573d482016-03-10 17:37:09 +02003408int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
3409{
3410 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3411}
Yaniv Gardib573d482016-03-10 17:37:09 +02003412
3413/**
3414 * ufshcd_read_string_desc - read string descriptor
3415 * @hba: pointer to adapter instance
3416 * @desc_index: descriptor index
3417 * @buf: pointer to buffer where descriptor would be read
3418 * @size: size of buf
3419 * @ascii: if true convert from unicode to ascii characters
3420 *
3421 * Return 0 in case of success, non-zero otherwise
3422 */
3423int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index, u8 *buf,
3424 u32 size, bool ascii)
3425{
3426 int err = 0;
3427
3428 err = ufshcd_read_desc(hba,
3429 QUERY_DESC_IDN_STRING, desc_index, buf, size);
3430
3431 if (err) {
3432 dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n",
3433 __func__, QUERY_REQ_RETRIES, err);
3434 goto out;
3435 }
3436
3437 if (ascii) {
3438 int desc_len;
3439 int ascii_len;
3440 int i;
3441 char *buff_ascii;
3442
3443 desc_len = buf[0];
3444 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3445 ascii_len = (desc_len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3446 if (size < ascii_len + QUERY_DESC_HDR_SIZE) {
3447 dev_err(hba->dev, "%s: buffer allocated size is too small\n",
3448 __func__);
3449 err = -ENOMEM;
3450 goto out;
3451 }
3452
3453 buff_ascii = kmalloc(ascii_len, GFP_KERNEL);
3454 if (!buff_ascii) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003455 dev_err(hba->dev, "%s: Failed allocating %d bytes\n",
3456 __func__, ascii_len);
Yaniv Gardib573d482016-03-10 17:37:09 +02003457 err = -ENOMEM;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003458 goto out_free_buff;
Yaniv Gardib573d482016-03-10 17:37:09 +02003459 }
3460
3461 /*
3462 * the descriptor contains string in UTF16 format
3463 * we need to convert to utf-8 so it can be displayed
3464 */
3465 utf16s_to_utf8s((wchar_t *)&buf[QUERY_DESC_HDR_SIZE],
3466 desc_len - QUERY_DESC_HDR_SIZE,
3467 UTF16_BIG_ENDIAN, buff_ascii, ascii_len);
3468
3469 /* replace non-printable or non-ASCII characters with spaces */
3470 for (i = 0; i < ascii_len; i++)
3471 ufshcd_remove_non_printable(&buff_ascii[i]);
3472
3473 memset(buf + QUERY_DESC_HDR_SIZE, 0,
3474 size - QUERY_DESC_HDR_SIZE);
3475 memcpy(buf + QUERY_DESC_HDR_SIZE, buff_ascii, ascii_len);
3476 buf[QUERY_DESC_LENGTH_OFFSET] = ascii_len + QUERY_DESC_HDR_SIZE;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003477out_free_buff:
Yaniv Gardib573d482016-03-10 17:37:09 +02003478 kfree(buff_ascii);
3479 }
3480out:
3481 return err;
3482}
Yaniv Gardib573d482016-03-10 17:37:09 +02003483
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003484/**
3485 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3486 * @hba: Pointer to adapter instance
3487 * @lun: lun id
3488 * @param_offset: offset of the parameter to read
3489 * @param_read_buf: pointer to buffer where parameter would be read
3490 * @param_size: sizeof(param_read_buf)
3491 *
3492 * Return 0 in case of success, non-zero otherwise
3493 */
3494static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3495 int lun,
3496 enum unit_desc_param param_offset,
3497 u8 *param_read_buf,
3498 u32 param_size)
3499{
3500 /*
3501 * Unit descriptors are only available for general purpose LUs (LUN id
3502 * from 0 to 7) and RPMB Well known LU.
3503 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003504 if (!ufs_is_valid_unit_desc_lun(lun))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003505 return -EOPNOTSUPP;
3506
3507 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3508 param_offset, param_read_buf, param_size);
3509}
3510
3511/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303512 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3513 * @hba: per adapter instance
3514 *
3515 * 1. Allocate DMA memory for Command Descriptor array
3516 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3517 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3518 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3519 * (UTMRDL)
3520 * 4. Allocate memory for local reference block(lrb).
3521 *
3522 * Returns 0 for success, non-zero in case of failure
3523 */
3524static int ufshcd_memory_alloc(struct ufs_hba *hba)
3525{
3526 size_t utmrdl_size, utrdl_size, ucdl_size;
3527
3528 /* Allocate memory for UTP command descriptors */
3529 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003530 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3531 ucdl_size,
3532 &hba->ucdl_dma_addr,
3533 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303534
3535 /*
3536 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3537 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3538 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3539 * be aligned to 128 bytes as well
3540 */
3541 if (!hba->ucdl_base_addr ||
3542 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303543 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303544 "Command Descriptor Memory allocation failed\n");
3545 goto out;
3546 }
3547
3548 /*
3549 * Allocate memory for UTP Transfer descriptors
3550 * UFSHCI requires 1024 byte alignment of UTRD
3551 */
3552 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003553 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3554 utrdl_size,
3555 &hba->utrdl_dma_addr,
3556 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303557 if (!hba->utrdl_base_addr ||
3558 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303559 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303560 "Transfer Descriptor Memory allocation failed\n");
3561 goto out;
3562 }
3563
3564 /*
3565 * Allocate memory for UTP Task Management descriptors
3566 * UFSHCI requires 1024 byte alignment of UTMRD
3567 */
3568 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003569 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3570 utmrdl_size,
3571 &hba->utmrdl_dma_addr,
3572 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303573 if (!hba->utmrdl_base_addr ||
3574 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303575 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303576 "Task Management Descriptor Memory allocation failed\n");
3577 goto out;
3578 }
3579
3580 /* Allocate memory for local reference block */
Seungwon Jeon2953f852013-06-27 13:31:54 +09003581 hba->lrb = devm_kzalloc(hba->dev,
3582 hba->nutrs * sizeof(struct ufshcd_lrb),
3583 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303584 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303585 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303586 goto out;
3587 }
3588 return 0;
3589out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303590 return -ENOMEM;
3591}
3592
3593/**
3594 * ufshcd_host_memory_configure - configure local reference block with
3595 * memory offsets
3596 * @hba: per adapter instance
3597 *
3598 * Configure Host memory space
3599 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3600 * address.
3601 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3602 * and PRDT offset.
3603 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3604 * into local reference block.
3605 */
3606static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3607{
3608 struct utp_transfer_cmd_desc *cmd_descp;
3609 struct utp_transfer_req_desc *utrdlp;
3610 dma_addr_t cmd_desc_dma_addr;
3611 dma_addr_t cmd_desc_element_addr;
3612 u16 response_offset;
3613 u16 prdt_offset;
3614 int cmd_desc_size;
3615 int i;
3616
3617 utrdlp = hba->utrdl_base_addr;
3618 cmd_descp = hba->ucdl_base_addr;
3619
3620 response_offset =
3621 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3622 prdt_offset =
3623 offsetof(struct utp_transfer_cmd_desc, prd_table);
3624
3625 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3626 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3627
3628 for (i = 0; i < hba->nutrs; i++) {
3629 /* Configure UTRD with command descriptor base address */
3630 cmd_desc_element_addr =
3631 (cmd_desc_dma_addr + (cmd_desc_size * i));
3632 utrdlp[i].command_desc_base_addr_lo =
3633 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3634 utrdlp[i].command_desc_base_addr_hi =
3635 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3636
3637 /* Response upiu and prdt offset should be in double words */
3638 utrdlp[i].response_upiu_offset =
3639 cpu_to_le16((response_offset >> 2));
3640 utrdlp[i].prd_table_offset =
3641 cpu_to_le16((prdt_offset >> 2));
3642 utrdlp[i].response_upiu_length =
Sujit Reddy Thumma3ca316c2013-06-26 22:39:30 +05303643 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303644
3645 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003646 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3647 (i * sizeof(struct utp_transfer_req_desc));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303648 hba->lrb[i].ucd_req_ptr =
3649 (struct utp_upiu_req *)(cmd_descp + i);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003650 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303651 hba->lrb[i].ucd_rsp_ptr =
3652 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003653 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3654 response_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303655 hba->lrb[i].ucd_prdt_ptr =
3656 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003657 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3658 prdt_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303659 }
3660}
3661
3662/**
3663 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3664 * @hba: per adapter instance
3665 *
3666 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3667 * in order to initialize the Unipro link startup procedure.
3668 * Once the Unipro links are up, the device connected to the controller
3669 * is detected.
3670 *
3671 * Returns 0 on success, non-zero value on failure
3672 */
3673static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3674{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303675 struct uic_command uic_cmd = {0};
3676 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303677
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303678 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3679
3680 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3681 if (ret)
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003682 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303683 "dme-link-startup: error code %d\n", ret);
3684 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303685}
3686
Yaniv Gardicad2e032015-03-31 17:37:14 +03003687static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3688{
3689 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3690 unsigned long min_sleep_time_us;
3691
3692 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3693 return;
3694
3695 /*
3696 * last_dme_cmd_tstamp will be 0 only for 1st call to
3697 * this function
3698 */
3699 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3700 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3701 } else {
3702 unsigned long delta =
3703 (unsigned long) ktime_to_us(
3704 ktime_sub(ktime_get(),
3705 hba->last_dme_cmd_tstamp));
3706
3707 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3708 min_sleep_time_us =
3709 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3710 else
3711 return; /* no more delay required */
3712 }
3713
3714 /* allow sleep for extra 50us if needed */
3715 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3716}
3717
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003718static inline void ufshcd_save_tstamp_of_last_dme_cmd(
3719 struct ufs_hba *hba)
3720{
3721 if (hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS)
3722 hba->last_dme_cmd_tstamp = ktime_get();
3723}
3724
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303725/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303726 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3727 * @hba: per adapter instance
3728 * @attr_sel: uic command argument1
3729 * @attr_set: attribute set type as uic command argument2
3730 * @mib_val: setting value as uic command argument3
3731 * @peer: indicate whether peer or local
3732 *
3733 * Returns 0 on success, non-zero value on failure
3734 */
3735int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3736 u8 attr_set, u32 mib_val, u8 peer)
3737{
3738 struct uic_command uic_cmd = {0};
3739 static const char *const action[] = {
3740 "dme-set",
3741 "dme-peer-set"
3742 };
3743 const char *set = action[!!peer];
3744 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003745 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303746
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003747 ufsdbg_error_inject_dispatcher(hba,
3748 ERR_INJECT_DME_ATTR, attr_sel, &attr_sel);
3749
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303750 uic_cmd.command = peer ?
3751 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3752 uic_cmd.argument1 = attr_sel;
3753 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3754 uic_cmd.argument3 = mib_val;
3755
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003756 do {
3757 /* for peer attributes we retry upon failure */
3758 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3759 if (ret)
3760 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3761 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3762 } while (ret && peer && --retries);
3763
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003764 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003765 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003766 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3767 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303768
3769 return ret;
3770}
3771EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3772
3773/**
3774 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3775 * @hba: per adapter instance
3776 * @attr_sel: uic command argument1
3777 * @mib_val: the value of the attribute as returned by the UIC command
3778 * @peer: indicate whether peer or local
3779 *
3780 * Returns 0 on success, non-zero value on failure
3781 */
3782int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3783 u32 *mib_val, u8 peer)
3784{
3785 struct uic_command uic_cmd = {0};
3786 static const char *const action[] = {
3787 "dme-get",
3788 "dme-peer-get"
3789 };
3790 const char *get = action[!!peer];
3791 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003792 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003793 struct ufs_pa_layer_attr orig_pwr_info;
3794 struct ufs_pa_layer_attr temp_pwr_info;
3795 bool pwr_mode_change = false;
3796
3797 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3798 orig_pwr_info = hba->pwr_info;
3799 temp_pwr_info = orig_pwr_info;
3800
3801 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3802 orig_pwr_info.pwr_rx == FAST_MODE) {
3803 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3804 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3805 pwr_mode_change = true;
3806 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3807 orig_pwr_info.pwr_rx == SLOW_MODE) {
3808 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3809 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3810 pwr_mode_change = true;
3811 }
3812 if (pwr_mode_change) {
3813 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3814 if (ret)
3815 goto out;
3816 }
3817 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303818
3819 uic_cmd.command = peer ?
3820 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003821
3822 ufsdbg_error_inject_dispatcher(hba,
3823 ERR_INJECT_DME_ATTR, attr_sel, &attr_sel);
3824
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303825 uic_cmd.argument1 = attr_sel;
3826
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003827 do {
3828 /* for peer attributes we retry upon failure */
3829 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3830 if (ret)
3831 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3832 get, UIC_GET_ATTR_ID(attr_sel), ret);
3833 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303834
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003835 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003836 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003837 get, UIC_GET_ATTR_ID(attr_sel),
3838 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003839
3840 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303841 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003842
3843 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3844 && pwr_mode_change)
3845 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303846out:
3847 return ret;
3848}
3849EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3850
3851/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003852 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3853 * state) and waits for it to take effect.
3854 *
3855 * @hba: per adapter instance
3856 * @cmd: UIC command to execute
3857 *
3858 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3859 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3860 * and device UniPro link and hence it's final completion would be indicated by
3861 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3862 * addition to normal UIC command completion Status (UCCS). This function only
3863 * returns after the relevant status bits indicate the completion.
3864 *
3865 * Returns 0 on success, non-zero value on failure
3866 */
3867static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3868{
3869 struct completion uic_async_done;
3870 unsigned long flags;
3871 u8 status;
3872 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003873 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003874
3875 mutex_lock(&hba->uic_cmd_mutex);
3876 init_completion(&uic_async_done);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003877 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003878
3879 spin_lock_irqsave(hba->host->host_lock, flags);
3880 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003881 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3882 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3883 /*
3884 * Make sure UIC command completion interrupt is disabled before
3885 * issuing UIC command.
3886 */
3887 wmb();
3888 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003889 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003890 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3891 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003892 if (ret) {
3893 dev_err(hba->dev,
3894 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3895 cmd->command, cmd->argument3, ret);
3896 goto out;
3897 }
3898
3899 if (!wait_for_completion_timeout(hba->uic_async_done,
3900 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3901 dev_err(hba->dev,
3902 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3903 cmd->command, cmd->argument3);
3904 ret = -ETIMEDOUT;
3905 goto out;
3906 }
3907
3908 status = ufshcd_get_upmcrs(hba);
3909 if (status != PWR_LOCAL) {
3910 dev_err(hba->dev,
Kiwoong Kim73615422016-09-08 16:50:02 +09003911 "pwr ctrl cmd 0x%0x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003912 cmd->command, status);
3913 ret = (status != PWR_OK) ? status : -1;
3914 }
3915out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003916 if (ret)
3917 ufsdbg_set_err_state(hba);
3918
3919 ufshcd_save_tstamp_of_last_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003920 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003921 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003922 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003923 if (reenable_intr)
3924 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003925 spin_unlock_irqrestore(hba->host->host_lock, flags);
3926 mutex_unlock(&hba->uic_cmd_mutex);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003927 return ret;
3928}
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003929
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003930int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba, u64 wait_timeout_us)
3931{
3932 unsigned long flags;
3933 int ret = 0;
3934 u32 tm_doorbell;
3935 u32 tr_doorbell;
3936 bool timeout = false, do_last_check = false;
3937 ktime_t start;
3938
3939 ufshcd_hold_all(hba);
3940 spin_lock_irqsave(hba->host->host_lock, flags);
3941 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
3942 ret = -EBUSY;
3943 goto out;
3944 }
3945
3946 /*
3947 * Wait for all the outstanding tasks/transfer requests.
3948 * Verify by checking the doorbell registers are clear.
3949 */
3950 start = ktime_get();
3951 do {
3952 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
3953 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
3954 if (!tm_doorbell && !tr_doorbell) {
3955 timeout = false;
3956 break;
3957 } else if (do_last_check) {
3958 break;
3959 }
3960
3961 spin_unlock_irqrestore(hba->host->host_lock, flags);
3962 schedule();
3963 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
3964 wait_timeout_us) {
3965 timeout = true;
3966 /*
3967 * We might have scheduled out for long time so make
3968 * sure to check if doorbells are cleared by this time
3969 * or not.
3970 */
3971 do_last_check = true;
3972 }
3973 spin_lock_irqsave(hba->host->host_lock, flags);
3974 } while (tm_doorbell || tr_doorbell);
3975
3976 if (timeout) {
3977 dev_err(hba->dev,
3978 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
3979 __func__, tm_doorbell, tr_doorbell);
3980 ret = -EBUSY;
3981 }
3982out:
3983 spin_unlock_irqrestore(hba->host->host_lock, flags);
3984 ufshcd_release_all(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003985 return ret;
3986}
3987
3988/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303989 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3990 * using DME_SET primitives.
3991 * @hba: per adapter instance
3992 * @mode: powr mode value
3993 *
3994 * Returns 0 on success, non-zero value on failure
3995 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05303996static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303997{
3998 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003999 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304000
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03004001 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
4002 ret = ufshcd_dme_set(hba,
4003 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
4004 if (ret) {
4005 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
4006 __func__, ret);
4007 goto out;
4008 }
4009 }
4010
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304011 uic_cmd.command = UIC_CMD_DME_SET;
4012 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
4013 uic_cmd.argument3 = mode;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004014 ufshcd_hold_all(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004015 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004016 ufshcd_release_all(hba);
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03004017out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004018 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004019}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304020
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004021static int ufshcd_link_recovery(struct ufs_hba *hba)
4022{
4023 int ret;
4024 unsigned long flags;
4025
4026 spin_lock_irqsave(hba->host->host_lock, flags);
4027 hba->ufshcd_state = UFSHCD_STATE_RESET;
4028 ufshcd_set_eh_in_progress(hba);
4029 spin_unlock_irqrestore(hba->host->host_lock, flags);
4030
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004031 ret = ufshcd_vops_full_reset(hba);
4032 if (ret)
4033 dev_warn(hba->dev,
4034 "full reset returned %d, trying to recover the link\n",
4035 ret);
4036
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004037 ret = ufshcd_host_reset_and_restore(hba);
4038
4039 spin_lock_irqsave(hba->host->host_lock, flags);
4040 if (ret)
4041 hba->ufshcd_state = UFSHCD_STATE_ERROR;
4042 ufshcd_clear_eh_in_progress(hba);
4043 spin_unlock_irqrestore(hba->host->host_lock, flags);
4044
4045 if (ret)
4046 dev_err(hba->dev, "%s: link recovery failed, err %d",
4047 __func__, ret);
4048
4049 return ret;
4050}
4051
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004052static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004053{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004054 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004055 struct uic_command uic_cmd = {0};
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004056 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004057
4058 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004059 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004060 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
4061 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004062
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004063 if (ret) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004064 ufshcd_update_error_stats(hba, UFS_ERR_HIBERN8_ENTER);
4065 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d",
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004066 __func__, ret);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004067 /*
4068 * If link recovery fails then return error so that caller
4069 * don't retry the hibern8 enter again.
4070 */
4071 if (ufshcd_link_recovery(hba))
4072 ret = -ENOLINK;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004073 } else {
4074 dev_dbg(hba->dev, "%s: Hibern8 Enter at %lld us", __func__,
4075 ktime_to_us(ktime_get()));
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004076 }
4077
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004078 return ret;
4079}
4080
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004081int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004082{
4083 int ret = 0, retries;
4084
4085 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
4086 ret = __ufshcd_uic_hibern8_enter(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004087 if (!ret)
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004088 goto out;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004089 /* Unable to recover the link, so no point proceeding */
4090 if (ret == -ENOLINK)
4091 BUG();
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004092 }
4093out:
4094 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004095}
4096
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004097int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004098{
4099 struct uic_command uic_cmd = {0};
4100 int ret;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004101 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004102
4103 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
4104 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004105 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
4106 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
4107
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304108 if (ret) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004109 ufshcd_update_error_stats(hba, UFS_ERR_HIBERN8_EXIT);
4110 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d",
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004111 __func__, ret);
4112 ret = ufshcd_link_recovery(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004113 /* Unable to recover the link, so no point proceeding */
4114 if (ret)
4115 BUG();
4116 } else {
4117 dev_dbg(hba->dev, "%s: Hibern8 Exit at %lld us", __func__,
4118 ktime_to_us(ktime_get()));
4119 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
4120 hba->ufs_stats.hibern8_exit_cnt++;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304121 }
4122
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304123 return ret;
4124}
4125
Yaniv Gardi50646362014-10-23 13:25:13 +03004126 /**
4127 * ufshcd_init_pwr_info - setting the POR (power on reset)
4128 * values in hba power info
4129 * @hba: per-adapter instance
4130 */
4131static void ufshcd_init_pwr_info(struct ufs_hba *hba)
4132{
4133 hba->pwr_info.gear_rx = UFS_PWM_G1;
4134 hba->pwr_info.gear_tx = UFS_PWM_G1;
4135 hba->pwr_info.lane_rx = 1;
4136 hba->pwr_info.lane_tx = 1;
4137 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
4138 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
4139 hba->pwr_info.hs_rate = 0;
4140}
4141
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304142/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004143 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
4144 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304145 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004146static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304147{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004148 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
4149
4150 if (hba->max_pwr_info.is_valid)
4151 return 0;
4152
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004153 pwr_info->pwr_tx = FAST_MODE;
4154 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004155 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304156
4157 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004158 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
4159 &pwr_info->lane_rx);
4160 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4161 &pwr_info->lane_tx);
4162
4163 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
4164 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
4165 __func__,
4166 pwr_info->lane_rx,
4167 pwr_info->lane_tx);
4168 return -EINVAL;
4169 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304170
4171 /*
4172 * First, get the maximum gears of HS speed.
4173 * If a zero value, it means there is no HSGEAR capability.
4174 * Then, get the maximum gears of PWM speed.
4175 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004176 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
4177 if (!pwr_info->gear_rx) {
4178 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4179 &pwr_info->gear_rx);
4180 if (!pwr_info->gear_rx) {
4181 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
4182 __func__, pwr_info->gear_rx);
4183 return -EINVAL;
Subhash Jadavani5e45e702016-08-09 18:43:10 -07004184 } else {
4185 if (hba->limit_rx_pwm_gear > 0 &&
4186 (hba->limit_rx_pwm_gear < pwr_info->gear_rx))
4187 pwr_info->gear_rx = hba->limit_rx_pwm_gear;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004188 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004189 pwr_info->pwr_rx = SLOW_MODE;
Subhash Jadavani5e45e702016-08-09 18:43:10 -07004190 } else {
4191 if (hba->limit_rx_hs_gear > 0 &&
4192 (hba->limit_rx_hs_gear < pwr_info->gear_rx))
4193 pwr_info->gear_rx = hba->limit_rx_hs_gear;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304194 }
4195
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004196 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
4197 &pwr_info->gear_tx);
4198 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304199 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004200 &pwr_info->gear_tx);
4201 if (!pwr_info->gear_tx) {
4202 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
4203 __func__, pwr_info->gear_tx);
4204 return -EINVAL;
Subhash Jadavani5e45e702016-08-09 18:43:10 -07004205 } else {
4206 if (hba->limit_tx_pwm_gear > 0 &&
4207 (hba->limit_tx_pwm_gear < pwr_info->gear_tx))
4208 pwr_info->gear_tx = hba->limit_tx_pwm_gear;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004209 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004210 pwr_info->pwr_tx = SLOW_MODE;
Subhash Jadavani5e45e702016-08-09 18:43:10 -07004211 } else {
4212 if (hba->limit_tx_hs_gear > 0 &&
4213 (hba->limit_tx_hs_gear < pwr_info->gear_tx))
4214 pwr_info->gear_tx = hba->limit_tx_hs_gear;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004215 }
4216
4217 hba->max_pwr_info.is_valid = true;
4218 return 0;
4219}
4220
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004221int ufshcd_change_power_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004222 struct ufs_pa_layer_attr *pwr_mode)
4223{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004224 int ret = 0;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004225
4226 /* if already configured to the requested pwr_mode */
4227 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4228 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4229 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4230 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4231 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4232 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4233 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4234 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4235 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304236 }
4237
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004238 ufsdbg_error_inject_dispatcher(hba, ERR_INJECT_PWR_CHANGE, 0, &ret);
4239 if (ret)
4240 return ret;
4241
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304242 /*
4243 * Configure attributes for power mode change with below.
4244 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4245 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4246 * - PA_HSSERIES
4247 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004248 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4249 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4250 pwr_mode->lane_rx);
4251 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4252 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304253 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004254 else
4255 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304256
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004257 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4258 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4259 pwr_mode->lane_tx);
4260 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4261 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304262 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004263 else
4264 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304265
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004266 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4267 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4268 pwr_mode->pwr_rx == FAST_MODE ||
4269 pwr_mode->pwr_tx == FAST_MODE)
4270 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4271 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304272
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004273 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
4274 DL_FC0ProtectionTimeOutVal_Default);
4275 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
4276 DL_TC0ReplayTimeOutVal_Default);
4277 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
4278 DL_AFC0ReqTimeOutVal_Default);
4279
4280 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
4281 DL_FC0ProtectionTimeOutVal_Default);
4282 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
4283 DL_TC0ReplayTimeOutVal_Default);
4284 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
4285 DL_AFC0ReqTimeOutVal_Default);
4286
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004287 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4288 | pwr_mode->pwr_tx);
4289
4290 if (ret) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004291 ufshcd_update_error_stats(hba, UFS_ERR_POWER_MODE_CHANGE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304292 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004293 "%s: power mode change failed %d\n", __func__, ret);
4294 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004295 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4296 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004297
4298 memcpy(&hba->pwr_info, pwr_mode,
4299 sizeof(struct ufs_pa_layer_attr));
4300 }
4301
4302 return ret;
4303}
4304
4305/**
4306 * ufshcd_config_pwr_mode - configure a new power mode
4307 * @hba: per-adapter instance
4308 * @desired_pwr_mode: desired power configuration
4309 */
4310static int ufshcd_config_pwr_mode(struct ufs_hba *hba,
4311 struct ufs_pa_layer_attr *desired_pwr_mode)
4312{
4313 struct ufs_pa_layer_attr final_params = { 0 };
4314 int ret;
4315
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004316 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4317 desired_pwr_mode, &final_params);
4318
4319 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004320 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4321
4322 ret = ufshcd_change_power_mode(hba, &final_params);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004323 if (!ret)
4324 ufshcd_print_pwr_info(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304325
4326 return ret;
4327}
4328
4329/**
Dolev Raviv68078d52013-07-30 00:35:58 +05304330 * ufshcd_complete_dev_init() - checks device readiness
4331 * hba: per-adapter instance
4332 *
4333 * Set fDeviceInit flag and poll until device toggles it.
4334 */
4335static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4336{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004337 int i;
4338 int err;
Dolev Raviv68078d52013-07-30 00:35:58 +05304339 bool flag_res = 1;
4340
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004341 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4342 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05304343 if (err) {
4344 dev_err(hba->dev,
4345 "%s setting fDeviceInit flag failed with error %d\n",
4346 __func__, err);
4347 goto out;
4348 }
4349
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004350 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4351 for (i = 0; i < 1000 && !err && flag_res; i++)
4352 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4353 QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4354
Dolev Raviv68078d52013-07-30 00:35:58 +05304355 if (err)
4356 dev_err(hba->dev,
4357 "%s reading fDeviceInit flag failed with error %d\n",
4358 __func__, err);
4359 else if (flag_res)
4360 dev_err(hba->dev,
4361 "%s fDeviceInit was not cleared by the device\n",
4362 __func__);
4363
4364out:
4365 return err;
4366}
4367
4368/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304369 * ufshcd_make_hba_operational - Make UFS controller operational
4370 * @hba: per adapter instance
4371 *
4372 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004373 * 1. Enable required interrupts
4374 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004375 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004376 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304377 *
4378 * Returns 0 on success, non-zero value on failure
4379 */
4380static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4381{
4382 int err = 0;
4383 u32 reg;
4384
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304385 /* Enable required interrupts */
4386 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4387
4388 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004389 if (ufshcd_is_intr_aggr_allowed(hba))
4390 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4391 else
4392 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304393
4394 /* Configure UTRL and UTMRL base address registers */
4395 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4396 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4397 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4398 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4399 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4400 REG_UTP_TASK_REQ_LIST_BASE_L);
4401 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4402 REG_UTP_TASK_REQ_LIST_BASE_H);
4403
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304404 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004405 * Make sure base address and interrupt setup are updated before
4406 * enabling the run/stop registers below.
4407 */
4408 wmb();
4409
4410 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304411 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304412 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004413 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304414 if (!(ufshcd_get_lists_status(reg))) {
4415 ufshcd_enable_run_stop_reg(hba);
4416 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304417 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304418 "Host controller not ready to process requests");
4419 err = -EIO;
4420 goto out;
4421 }
4422
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304423out:
4424 return err;
4425}
4426
4427/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02004428 * ufshcd_hba_stop - Send controller to reset state
4429 * @hba: per adapter instance
4430 * @can_sleep: perform sleep or just spin
4431 */
4432static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4433{
4434 int err;
4435
4436 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4437 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4438 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4439 10, 1, can_sleep);
4440 if (err)
4441 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4442}
4443
4444/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304445 * ufshcd_hba_enable - initialize the controller
4446 * @hba: per adapter instance
4447 *
4448 * The controller resets itself and controller firmware initialization
4449 * sequence kicks off. When controller is ready it will set
4450 * the Host Controller Enable bit to 1.
4451 *
4452 * Returns 0 on success, non-zero value on failure
4453 */
4454static int ufshcd_hba_enable(struct ufs_hba *hba)
4455{
4456 int retry;
4457
4458 /*
4459 * msleep of 1 and 5 used in this function might result in msleep(20),
4460 * but it was necessary to send the UFS FPGA to reset mode during
4461 * development and testing of this driver. msleep can be changed to
4462 * mdelay and retry count can be reduced based on the controller.
4463 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004464 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304465 /* change controller state to "reset state" */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004466 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304467
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004468 /* UniPro link is disabled at this point */
4469 ufshcd_set_link_off(hba);
4470
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004471 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004472
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304473 /* start controller initialization sequence */
4474 ufshcd_hba_start(hba);
4475
4476 /*
4477 * To initialize a UFS host controller HCE bit must be set to 1.
4478 * During initialization the HCE bit value changes from 1->0->1.
4479 * When the host controller completes initialization sequence
4480 * it sets the value of HCE bit to 1. The same HCE bit is read back
4481 * to check if the controller has completed initialization sequence.
4482 * So without this delay the value HCE = 1, set in the previous
4483 * instruction might be read back.
4484 * This delay can be changed based on the controller.
4485 */
4486 msleep(1);
4487
4488 /* wait for the host controller to complete initialization */
4489 retry = 10;
4490 while (ufshcd_is_hba_active(hba)) {
4491 if (retry) {
4492 retry--;
4493 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304494 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304495 "Controller enable failed\n");
4496 return -EIO;
4497 }
4498 msleep(5);
4499 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004500
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004501 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004502 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004503
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004504 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004505
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304506 return 0;
4507}
4508
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004509static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4510{
4511 int tx_lanes, i, err = 0;
4512
4513 if (!peer)
4514 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4515 &tx_lanes);
4516 else
4517 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4518 &tx_lanes);
4519 for (i = 0; i < tx_lanes; i++) {
4520 if (!peer)
4521 err = ufshcd_dme_set(hba,
4522 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4523 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4524 0);
4525 else
4526 err = ufshcd_dme_peer_set(hba,
4527 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4528 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4529 0);
4530 if (err) {
4531 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4532 __func__, peer, i, err);
4533 break;
4534 }
4535 }
4536
4537 return err;
4538}
4539
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004540static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
4541{
4542 return ufshcd_disable_tx_lcc(hba, false);
4543}
4544
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004545static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4546{
4547 return ufshcd_disable_tx_lcc(hba, true);
4548}
4549
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304550/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304551 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304552 * @hba: per adapter instance
4553 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304554 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304555 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304556static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304557{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304558 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004559 int retries = DME_LINKSTARTUP_RETRIES;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004560 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304561
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004562 /*
4563 * If UFS device isn't active then we will have to issue link startup
4564 * 2 times to make sure the device state move to active.
4565 */
4566 if (!ufshcd_is_ufs_dev_active(hba))
4567 link_startup_again = true;
4568
4569link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004570 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004571 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304572
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004573 ret = ufshcd_dme_link_startup(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004574 if (ret)
4575 ufshcd_update_error_stats(hba, UFS_ERR_LINKSTARTUP);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004576
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004577 /* check if device is detected by inter-connect layer */
4578 if (!ret && !ufshcd_is_device_present(hba)) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004579 ufshcd_update_error_stats(hba, UFS_ERR_LINKSTARTUP);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004580 dev_err(hba->dev, "%s: Device not present\n", __func__);
4581 ret = -ENXIO;
4582 goto out;
4583 }
4584
4585 /*
4586 * DME link lost indication is only received when link is up,
4587 * but we can't be sure if the link is up until link startup
4588 * succeeds. So reset the local Uni-Pro and try again.
4589 */
4590 if (ret && ufshcd_hba_enable(hba))
4591 goto out;
4592 } while (ret && retries--);
4593
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304594 if (ret)
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004595 /* failed to get the link up... retire */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304596 goto out;
4597
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004598 if (link_startup_again) {
4599 link_startup_again = false;
4600 retries = DME_LINKSTARTUP_RETRIES;
4601 goto link_startup;
4602 }
4603
4604 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4605 ufshcd_init_pwr_info(hba);
4606 ufshcd_print_pwr_info(hba);
4607
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004608 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4609 ret = ufshcd_disable_device_tx_lcc(hba);
4610 if (ret)
4611 goto out;
4612 }
4613
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004614 if (hba->dev_quirks & UFS_DEVICE_QUIRK_BROKEN_LCC) {
4615 ret = ufshcd_disable_host_tx_lcc(hba);
4616 if (ret)
4617 goto out;
4618 }
4619
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004620 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004621 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4622 if (ret)
4623 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004624
4625 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304626out:
4627 if (ret)
4628 dev_err(hba->dev, "link startup failed %d\n", ret);
4629 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304630}
4631
4632/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304633 * ufshcd_verify_dev_init() - Verify device initialization
4634 * @hba: per-adapter instance
4635 *
4636 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4637 * device Transport Protocol (UTP) layer is ready after a reset.
4638 * If the UTP layer at the device side is not initialized, it may
4639 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4640 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4641 */
4642static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4643{
4644 int err = 0;
4645 int retries;
4646
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004647 ufshcd_hold_all(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304648 mutex_lock(&hba->dev_cmd.lock);
4649 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4650 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4651 NOP_OUT_TIMEOUT);
4652
4653 if (!err || err == -ETIMEDOUT)
4654 break;
4655
4656 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4657 }
4658 mutex_unlock(&hba->dev_cmd.lock);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004659 ufshcd_release_all(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304660
4661 if (err)
4662 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4663 return err;
4664}
4665
4666/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004667 * ufshcd_set_queue_depth - set lun queue depth
4668 * @sdev: pointer to SCSI device
4669 *
4670 * Read bLUQueueDepth value and activate scsi tagged command
4671 * queueing. For WLUN, queue depth is set to 1. For best-effort
4672 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4673 * value that host can queue.
4674 */
4675static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4676{
4677 int ret = 0;
4678 u8 lun_qdepth;
4679 struct ufs_hba *hba;
4680
4681 hba = shost_priv(sdev->host);
4682
4683 lun_qdepth = hba->nutrs;
4684 ret = ufshcd_read_unit_desc_param(hba,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004685 ufshcd_scsi_to_upiu_lun(sdev->lun),
4686 UNIT_DESC_PARAM_LU_Q_DEPTH,
4687 &lun_qdepth,
4688 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004689
4690 /* Some WLUN doesn't support unit descriptor */
4691 if (ret == -EOPNOTSUPP)
4692 lun_qdepth = 1;
4693 else if (!lun_qdepth)
4694 /* eventually, we can figure out the real queue depth */
4695 lun_qdepth = hba->nutrs;
4696 else
4697 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4698
4699 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4700 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004701 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004702}
4703
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004704/*
4705 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4706 * @hba: per-adapter instance
4707 * @lun: UFS device lun id
4708 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4709 *
4710 * Returns 0 in case of success and b_lu_write_protect status would be returned
4711 * @b_lu_write_protect parameter.
4712 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4713 * Returns -EINVAL in case of invalid parameters passed to this function.
4714 */
4715static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4716 u8 lun,
4717 u8 *b_lu_write_protect)
4718{
4719 int ret;
4720
4721 if (!b_lu_write_protect)
4722 ret = -EINVAL;
4723 /*
4724 * According to UFS device spec, RPMB LU can't be write
4725 * protected so skip reading bLUWriteProtect parameter for
4726 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4727 */
4728 else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4729 ret = -ENOTSUPP;
4730 else
4731 ret = ufshcd_read_unit_desc_param(hba,
4732 lun,
4733 UNIT_DESC_PARAM_LU_WR_PROTECT,
4734 b_lu_write_protect,
4735 sizeof(*b_lu_write_protect));
4736 return ret;
4737}
4738
4739/**
4740 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4741 * status
4742 * @hba: per-adapter instance
4743 * @sdev: pointer to SCSI device
4744 *
4745 */
4746static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4747 struct scsi_device *sdev)
4748{
4749 if (hba->dev_info.f_power_on_wp_en &&
4750 !hba->dev_info.is_lu_power_on_wp) {
4751 u8 b_lu_write_protect;
4752
4753 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4754 &b_lu_write_protect) &&
4755 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4756 hba->dev_info.is_lu_power_on_wp = true;
4757 }
4758}
4759
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004760/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304761 * ufshcd_slave_alloc - handle initial SCSI device configurations
4762 * @sdev: pointer to SCSI device
4763 *
4764 * Returns success
4765 */
4766static int ufshcd_slave_alloc(struct scsi_device *sdev)
4767{
4768 struct ufs_hba *hba;
4769
4770 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304771
4772 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4773 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304774
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304775 /* allow SCSI layer to restart the device in case of errors */
4776 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004777
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004778 /* REPORT SUPPORTED OPERATION CODES is not supported */
4779 sdev->no_report_opcodes = 1;
4780
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004781 /* WRITE_SAME command is not supported*/
4782 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004783
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004784 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004785
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004786 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4787
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004788 return 0;
4789}
4790
4791/**
4792 * ufshcd_change_queue_depth - change queue depth
4793 * @sdev: pointer to SCSI device
4794 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004795 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004796 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004797 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004798static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004799{
4800 struct ufs_hba *hba = shost_priv(sdev->host);
4801
4802 if (depth > hba->nutrs)
4803 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004804 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304805}
4806
4807/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004808 * ufshcd_slave_configure - adjust SCSI device configurations
4809 * @sdev: pointer to SCSI device
4810 */
4811static int ufshcd_slave_configure(struct scsi_device *sdev)
4812{
4813 struct request_queue *q = sdev->request_queue;
Subhash Jadavani5ea586f2016-08-17 19:08:09 -07004814 struct ufs_hba *hba = shost_priv(sdev->host);
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004815
4816 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
4817 blk_queue_max_segment_size(q, PRDT_DATA_BYTE_COUNT_MAX);
4818
Subhash Jadavani5ea586f2016-08-17 19:08:09 -07004819 if (hba->scsi_cmd_timeout) {
4820 blk_queue_rq_timeout(q, hba->scsi_cmd_timeout * HZ);
4821 scsi_set_cmd_timeout_override(sdev, hba->scsi_cmd_timeout * HZ);
4822 }
4823
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004824 sdev->autosuspend_delay = UFSHCD_AUTO_SUSPEND_DELAY_MS;
4825 sdev->use_rpm_auto = 1;
4826
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004827 return 0;
4828}
4829
4830/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304831 * ufshcd_slave_destroy - remove SCSI device configurations
4832 * @sdev: pointer to SCSI device
4833 */
4834static void ufshcd_slave_destroy(struct scsi_device *sdev)
4835{
4836 struct ufs_hba *hba;
4837
4838 hba = shost_priv(sdev->host);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004839 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004840 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4841 unsigned long flags;
4842
4843 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004844 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004845 spin_unlock_irqrestore(hba->host->host_lock, flags);
4846 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304847}
4848
4849/**
4850 * ufshcd_task_req_compl - handle task management request completion
4851 * @hba: per adapter instance
4852 * @index: index of the completed request
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304853 * @resp: task management service response
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304854 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304855 * Returns non-zero value on error, zero on success
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304856 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304857static int ufshcd_task_req_compl(struct ufs_hba *hba, u32 index, u8 *resp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304858{
4859 struct utp_task_req_desc *task_req_descp;
4860 struct utp_upiu_task_rsp *task_rsp_upiup;
4861 unsigned long flags;
4862 int ocs_value;
4863 int task_result;
4864
4865 spin_lock_irqsave(hba->host->host_lock, flags);
4866
4867 /* Clear completed tasks from outstanding_tasks */
4868 __clear_bit(index, &hba->outstanding_tasks);
4869
4870 task_req_descp = hba->utmrdl_base_addr;
4871 ocs_value = ufshcd_get_tmr_ocs(&task_req_descp[index]);
4872
4873 if (ocs_value == OCS_SUCCESS) {
4874 task_rsp_upiup = (struct utp_upiu_task_rsp *)
4875 task_req_descp[index].task_rsp_upiu;
Kiwoong Kim8794ee02016-09-09 08:22:22 +09004876 task_result = be32_to_cpu(task_rsp_upiup->output_param1);
4877 task_result = task_result & MASK_TM_SERVICE_RESP;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304878 if (resp)
4879 *resp = (u8)task_result;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304880 } else {
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304881 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
4882 __func__, ocs_value);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304883 }
4884 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304885
4886 return ocs_value;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304887}
4888
4889/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304890 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
4891 * @lrb: pointer to local reference block of completed command
4892 * @scsi_status: SCSI command status
4893 *
4894 * Returns value base on SCSI command status
4895 */
4896static inline int
4897ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4898{
4899 int result = 0;
4900
4901 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304902 case SAM_STAT_CHECK_CONDITION:
4903 ufshcd_copy_sense_data(lrbp);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304904 case SAM_STAT_GOOD:
4905 result |= DID_OK << 16 |
4906 COMMAND_COMPLETE << 8 |
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304907 scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304908 break;
4909 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304910 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304911 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304912 ufshcd_copy_sense_data(lrbp);
4913 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304914 break;
4915 default:
4916 result |= DID_ERROR << 16;
4917 break;
4918 } /* end of switch */
4919
4920 return result;
4921}
4922
4923/**
4924 * ufshcd_transfer_rsp_status - Get overall status of the response
4925 * @hba: per adapter instance
4926 * @lrb: pointer to local reference block of completed command
4927 *
4928 * Returns result of the command to notify SCSI midlayer
4929 */
4930static inline int
4931ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4932{
4933 int result = 0;
4934 int scsi_status;
4935 int ocs;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004936 bool print_prdt;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304937
4938 /* overall command status of utrd */
4939 ocs = ufshcd_get_tr_ocs(lrbp);
4940
4941 switch (ocs) {
4942 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304943 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004944 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304945 switch (result) {
4946 case UPIU_TRANSACTION_RESPONSE:
4947 /*
4948 * get the response UPIU result to extract
4949 * the SCSI command status
4950 */
4951 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4952
4953 /*
4954 * get the result based on SCSI status response
4955 * to notify the SCSI midlayer of the command status
4956 */
4957 scsi_status = result & MASK_SCSI_STATUS;
4958 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304959
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02004960 /*
4961 * Currently we are only supporting BKOPs exception
4962 * events hence we can ignore BKOPs exception event
4963 * during power management callbacks. BKOPs exception
4964 * event is not expected to be raised in runtime suspend
4965 * callback as it allows the urgent bkops.
4966 * During system suspend, we are anyway forcefully
4967 * disabling the bkops and if urgent bkops is needed
4968 * it will be enabled on system resume. Long term
4969 * solution could be to abort the system suspend if
4970 * UFS device needs urgent BKOPs.
4971 */
4972 if (!hba->pm_op_in_progress &&
4973 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304974 schedule_work(&hba->eeh_work);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304975 break;
4976 case UPIU_TRANSACTION_REJECT_UPIU:
4977 /* TODO: handle Reject UPIU Response */
4978 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304979 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304980 "Reject UPIU not fully implemented\n");
4981 break;
4982 default:
4983 result = DID_ERROR << 16;
4984 dev_err(hba->dev,
4985 "Unexpected request response code = %x\n",
4986 result);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304987 break;
4988 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304989 break;
4990 case OCS_ABORTED:
4991 result |= DID_ABORT << 16;
4992 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304993 case OCS_INVALID_COMMAND_STATUS:
4994 result |= DID_REQUEUE << 16;
4995 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304996 case OCS_INVALID_CMD_TABLE_ATTR:
4997 case OCS_INVALID_PRDT_ATTR:
4998 case OCS_MISMATCH_DATA_BUF_SIZE:
4999 case OCS_MISMATCH_RESP_UPIU_SIZE:
5000 case OCS_PEER_COMM_FAILURE:
5001 case OCS_FATAL_ERROR:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005002 case OCS_DEVICE_FATAL_ERROR:
5003 case OCS_INVALID_CRYPTO_CONFIG:
5004 case OCS_GENERAL_CRYPTO_ERROR:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305005 default:
5006 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305007 dev_err(hba->dev,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005008 "OCS error from controller = %x for tag %d\n",
5009 ocs, lrbp->task_tag);
5010 ufshcd_print_host_regs(hba);
5011 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305012 break;
5013 } /* end of switch */
5014
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005015 if ((host_byte(result) != DID_OK) && !hba->silence_err_logs) {
5016 print_prdt = (ocs == OCS_INVALID_PRDT_ATTR ||
5017 ocs == OCS_MISMATCH_DATA_BUF_SIZE);
5018 ufshcd_print_trs(hba, 1 << lrbp->task_tag, print_prdt);
5019 }
5020
5021 if ((host_byte(result) == DID_ERROR) ||
5022 (host_byte(result) == DID_ABORT))
5023 ufsdbg_set_err_state(hba);
5024
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305025 return result;
5026}
5027
5028/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305029 * ufshcd_uic_cmd_compl - handle completion of uic command
5030 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305031 * @intr_status: interrupt status generated by the controller
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305032 */
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305033static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305034{
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305035 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305036 hba->active_uic_cmd->argument2 |=
5037 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05305038 hba->active_uic_cmd->argument3 =
5039 ufshcd_get_dme_attr_val(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305040 complete(&hba->active_uic_cmd->done);
5041 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305042
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005043 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done)
5044 complete(hba->uic_async_done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305045}
5046
5047/**
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005048 * ufshcd_abort_outstanding_requests - abort all outstanding transfer requests.
5049 * @hba: per adapter instance
5050 * @result: error result to inform scsi layer about
5051 */
5052void ufshcd_abort_outstanding_transfer_requests(struct ufs_hba *hba, int result)
5053{
5054 u8 index;
5055 struct ufshcd_lrb *lrbp;
5056 struct scsi_cmnd *cmd;
5057
5058 if (!hba->outstanding_reqs)
5059 return;
5060
5061 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
5062 lrbp = &hba->lrb[index];
5063 cmd = lrbp->cmd;
5064 if (cmd) {
5065 ufshcd_cond_add_cmd_trace(hba, index, "failed");
5066 ufshcd_update_error_stats(hba,
5067 UFS_ERR_INT_FATAL_ERRORS);
5068 scsi_dma_unmap(cmd);
5069 cmd->result = result;
5070 /* Clear pending transfer requests */
5071 ufshcd_clear_cmd(hba, index);
5072 ufshcd_outstanding_req_clear(hba, index);
5073 clear_bit_unlock(index, &hba->lrb_in_use);
5074 lrbp->complete_time_stamp = ktime_get();
5075 update_req_stats(hba, lrbp);
5076 /* Mark completed command as NULL in LRB */
5077 lrbp->cmd = NULL;
5078 ufshcd_release_all(hba);
5079 if (cmd->request) {
5080 /*
5081 * As we are accessing the "request" structure,
5082 * this must be called before calling
5083 * ->scsi_done() callback.
5084 */
5085 ufshcd_vops_pm_qos_req_end(hba, cmd->request,
5086 true);
5087 ufshcd_vops_crypto_engine_cfg_end(hba,
5088 lrbp, cmd->request);
5089 }
5090 /* Do not touch lrbp after scsi done */
5091 cmd->scsi_done(cmd);
5092 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) {
5093 if (hba->dev_cmd.complete) {
5094 ufshcd_cond_add_cmd_trace(hba, index,
5095 "dev_failed");
5096 ufshcd_outstanding_req_clear(hba, index);
5097 complete(hba->dev_cmd.complete);
5098 }
5099 }
5100 if (ufshcd_is_clkscaling_supported(hba))
5101 hba->clk_scaling.active_reqs--;
5102 }
5103}
5104
5105/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005106 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305107 * @hba: per adapter instance
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005108 * @completed_reqs: requests to complete
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305109 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005110static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
5111 unsigned long completed_reqs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305112{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305113 struct ufshcd_lrb *lrbp;
5114 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305115 int result;
5116 int index;
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -07005117 struct request *req;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005118
Dolev Ravive9d501b2014-07-01 12:22:37 +03005119 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
5120 lrbp = &hba->lrb[index];
5121 cmd = lrbp->cmd;
5122 if (cmd) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005123 ufshcd_cond_add_cmd_trace(hba, index, "complete");
5124 ufshcd_update_tag_stats_completion(hba, cmd);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005125 result = ufshcd_transfer_rsp_status(hba, lrbp);
5126 scsi_dma_unmap(cmd);
5127 cmd->result = result;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005128 clear_bit_unlock(index, &hba->lrb_in_use);
5129 lrbp->complete_time_stamp = ktime_get();
5130 update_req_stats(hba, lrbp);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005131 /* Mark completed command as NULL in LRB */
5132 lrbp->cmd = NULL;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005133 __ufshcd_release(hba, false);
5134 __ufshcd_hibern8_release(hba, false);
5135 if (cmd->request) {
5136 /*
5137 * As we are accessing the "request" structure,
5138 * this must be called before calling
5139 * ->scsi_done() callback.
5140 */
5141 ufshcd_vops_pm_qos_req_end(hba, cmd->request,
5142 false);
5143 ufshcd_vops_crypto_engine_cfg_end(hba,
5144 lrbp, cmd->request);
5145 }
5146
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -07005147 req = cmd->request;
5148 if (req) {
5149 /* Update IO svc time latency histogram */
5150 if (req->lat_hist_enabled) {
5151 ktime_t completion;
5152 u_int64_t delta_us;
5153
5154 completion = ktime_get();
5155 delta_us = ktime_us_delta(completion,
5156 req->lat_hist_io_start);
5157 /* rq_data_dir() => true if WRITE */
5158 blk_update_latency_hist(&hba->io_lat_s,
5159 (rq_data_dir(req) == READ),
5160 delta_us);
5161 }
5162 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03005163 /* Do not touch lrbp after scsi done */
5164 cmd->scsi_done(cmd);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005165 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) {
5166 if (hba->dev_cmd.complete) {
5167 ufshcd_cond_add_cmd_trace(hba, index,
5168 "dev_complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03005169 complete(hba->dev_cmd.complete);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005170 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03005171 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005172 if (ufshcd_is_clkscaling_supported(hba))
5173 hba->clk_scaling.active_reqs--;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005174 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305175
5176 /* clear corresponding bits of completed commands */
5177 hba->outstanding_reqs ^= completed_reqs;
5178
Sahitya Tummala856b3482014-09-25 15:32:34 +03005179 ufshcd_clk_scaling_update_busy(hba);
5180
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305181 /* we might have free'd some tags above */
5182 wake_up(&hba->dev_cmd.tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305183}
5184
5185/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005186 * ufshcd_transfer_req_compl - handle SCSI and query command completion
5187 * @hba: per adapter instance
5188 */
5189static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
5190{
5191 unsigned long completed_reqs;
5192 u32 tr_doorbell;
5193
5194 /* Resetting interrupt aggregation counters first and reading the
5195 * DOOR_BELL afterward allows us to handle all the completed requests.
5196 * In order to prevent other interrupts starvation the DB is read once
5197 * after reset. The down side of this solution is the possibility of
5198 * false interrupt if device completes another request after resetting
5199 * aggregation and before reading the DB.
5200 */
5201 if (ufshcd_is_intr_aggr_allowed(hba))
5202 ufshcd_reset_intr_aggr(hba);
5203
5204 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
5205 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
5206
5207 __ufshcd_transfer_req_compl(hba, completed_reqs);
5208}
5209
5210/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305211 * ufshcd_disable_ee - disable exception event
5212 * @hba: per-adapter instance
5213 * @mask: exception event to disable
5214 *
5215 * Disables exception event in the device so that the EVENT_ALERT
5216 * bit is not set.
5217 *
5218 * Returns zero on success, non-zero error value on failure.
5219 */
5220static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
5221{
5222 int err = 0;
5223 u32 val;
5224
5225 if (!(hba->ee_ctrl_mask & mask))
5226 goto out;
5227
5228 val = hba->ee_ctrl_mask & ~mask;
5229 val &= 0xFFFF; /* 2 bytes */
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005230 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305231 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
5232 if (!err)
5233 hba->ee_ctrl_mask &= ~mask;
5234out:
5235 return err;
5236}
5237
5238/**
5239 * ufshcd_enable_ee - enable exception event
5240 * @hba: per-adapter instance
5241 * @mask: exception event to enable
5242 *
5243 * Enable corresponding exception event in the device to allow
5244 * device to alert host in critical scenarios.
5245 *
5246 * Returns zero on success, non-zero error value on failure.
5247 */
5248static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
5249{
5250 int err = 0;
5251 u32 val;
5252
5253 if (hba->ee_ctrl_mask & mask)
5254 goto out;
5255
5256 val = hba->ee_ctrl_mask | mask;
5257 val &= 0xFFFF; /* 2 bytes */
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005258 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305259 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
5260 if (!err)
5261 hba->ee_ctrl_mask |= mask;
5262out:
5263 return err;
5264}
5265
5266/**
5267 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
5268 * @hba: per-adapter instance
5269 *
5270 * Allow device to manage background operations on its own. Enabling
5271 * this might lead to inconsistent latencies during normal data transfers
5272 * as the device is allowed to manage its own way of handling background
5273 * operations.
5274 *
5275 * Returns zero on success, non-zero on failure.
5276 */
5277static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
5278{
5279 int err = 0;
5280
5281 if (hba->auto_bkops_enabled)
5282 goto out;
5283
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005284 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305285 QUERY_FLAG_IDN_BKOPS_EN, NULL);
5286 if (err) {
5287 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
5288 __func__, err);
5289 goto out;
5290 }
5291
5292 hba->auto_bkops_enabled = true;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005293 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), 1);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305294
5295 /* No need of URGENT_BKOPS exception from the device */
5296 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5297 if (err)
5298 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
5299 __func__, err);
5300out:
5301 return err;
5302}
5303
5304/**
5305 * ufshcd_disable_auto_bkops - block device in doing background operations
5306 * @hba: per-adapter instance
5307 *
5308 * Disabling background operations improves command response latency but
5309 * has drawback of device moving into critical state where the device is
5310 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
5311 * host is idle so that BKOPS are managed effectively without any negative
5312 * impacts.
5313 *
5314 * Returns zero on success, non-zero on failure.
5315 */
5316static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5317{
5318 int err = 0;
5319
5320 if (!hba->auto_bkops_enabled)
5321 goto out;
5322
5323 /*
5324 * If host assisted BKOPs is to be enabled, make sure
5325 * urgent bkops exception is allowed.
5326 */
5327 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5328 if (err) {
5329 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5330 __func__, err);
5331 goto out;
5332 }
5333
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005334 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305335 QUERY_FLAG_IDN_BKOPS_EN, NULL);
5336 if (err) {
5337 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5338 __func__, err);
5339 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5340 goto out;
5341 }
5342
5343 hba->auto_bkops_enabled = false;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005344 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), 0);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305345out:
5346 return err;
5347}
5348
5349/**
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005350 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305351 * @hba: per adapter instance
5352 *
5353 * After a device reset the device may toggle the BKOPS_EN flag
5354 * to default value. The s/w tracking variables should be updated
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005355 * as well. This function would change the auto-bkops state based on
5356 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305357 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005358static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305359{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005360 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5361 hba->auto_bkops_enabled = false;
5362 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5363 ufshcd_enable_auto_bkops(hba);
5364 } else {
5365 hba->auto_bkops_enabled = true;
5366 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5367 ufshcd_disable_auto_bkops(hba);
5368 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305369}
5370
5371static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5372{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005373 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305374 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5375}
5376
5377/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005378 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5379 * @hba: per-adapter instance
5380 * @status: bkops_status value
5381 *
5382 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5383 * flag in the device to permit background operations if the device
5384 * bkops_status is greater than or equal to "status" argument passed to
5385 * this function, disable otherwise.
5386 *
5387 * Returns 0 for success, non-zero in case of failure.
5388 *
5389 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5390 * to know whether auto bkops is enabled or disabled after this function
5391 * returns control to it.
5392 */
5393static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5394 enum bkops_status status)
5395{
5396 int err;
5397 u32 curr_status = 0;
5398
5399 err = ufshcd_get_bkops_status(hba, &curr_status);
5400 if (err) {
5401 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5402 __func__, err);
5403 goto out;
5404 } else if (curr_status > BKOPS_STATUS_MAX) {
5405 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5406 __func__, curr_status);
5407 err = -EINVAL;
5408 goto out;
5409 }
5410
5411 if (curr_status >= status)
5412 err = ufshcd_enable_auto_bkops(hba);
5413 else
5414 err = ufshcd_disable_auto_bkops(hba);
5415out:
5416 return err;
5417}
5418
5419/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305420 * ufshcd_urgent_bkops - handle urgent bkops exception event
5421 * @hba: per-adapter instance
5422 *
5423 * Enable fBackgroundOpsEn flag in the device to permit background
5424 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005425 *
5426 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5427 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305428 */
5429static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5430{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005431 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305432}
5433
5434static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5435{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005436 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305437 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5438}
5439
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005440static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5441{
5442 int err;
5443 u32 curr_status = 0;
5444
5445 if (hba->is_urgent_bkops_lvl_checked)
5446 goto enable_auto_bkops;
5447
5448 err = ufshcd_get_bkops_status(hba, &curr_status);
5449 if (err) {
5450 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5451 __func__, err);
5452 goto out;
5453 }
5454
5455 /*
5456 * We are seeing that some devices are raising the urgent bkops
5457 * exception events even when BKOPS status doesn't indicate performace
5458 * impacted or critical. Handle these device by determining their urgent
5459 * bkops status at runtime.
5460 */
5461 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5462 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5463 __func__, curr_status);
5464 /* update the current status as the urgent bkops level */
5465 hba->urgent_bkops_lvl = curr_status;
5466 hba->is_urgent_bkops_lvl_checked = true;
5467 }
5468
5469enable_auto_bkops:
5470 err = ufshcd_enable_auto_bkops(hba);
5471out:
5472 if (err < 0)
5473 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5474 __func__, err);
5475}
5476
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305477/**
5478 * ufshcd_exception_event_handler - handle exceptions raised by device
5479 * @work: pointer to work data
5480 *
5481 * Read bExceptionEventStatus attribute from the device and handle the
5482 * exception event accordingly.
5483 */
5484static void ufshcd_exception_event_handler(struct work_struct *work)
5485{
5486 struct ufs_hba *hba;
5487 int err;
5488 u32 status = 0;
5489 hba = container_of(work, struct ufs_hba, eeh_work);
5490
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305491 pm_runtime_get_sync(hba->dev);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005492 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305493 err = ufshcd_get_ee_status(hba, &status);
5494 if (err) {
5495 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5496 __func__, err);
5497 goto out;
5498 }
5499
5500 status &= hba->ee_ctrl_mask;
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005501
5502 if (status & MASK_EE_URGENT_BKOPS)
5503 ufshcd_bkops_exception_event_handler(hba);
5504
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305505out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005506 ufshcd_scsi_unblock_requests(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305507 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305508 return;
5509}
5510
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005511/* Complete requests that have door-bell cleared */
5512static void ufshcd_complete_requests(struct ufs_hba *hba)
5513{
5514 ufshcd_transfer_req_compl(hba);
5515 ufshcd_tmc_handler(hba);
5516}
5517
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305518/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02005519 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5520 * to recover from the DL NAC errors or not.
5521 * @hba: per-adapter instance
5522 *
5523 * Returns true if error handling is required, false otherwise
5524 */
5525static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5526{
5527 unsigned long flags;
5528 bool err_handling = true;
5529
5530 spin_lock_irqsave(hba->host->host_lock, flags);
5531 /*
5532 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5533 * device fatal error and/or DL NAC & REPLAY timeout errors.
5534 */
5535 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5536 goto out;
5537
5538 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5539 ((hba->saved_err & UIC_ERROR) &&
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005540 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR))) {
5541 /*
5542 * we have to do error recovery but atleast silence the error
5543 * logs.
5544 */
5545 hba->silence_err_logs = true;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005546 goto out;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005547 }
Yaniv Gardi583fa622016-03-10 17:37:13 +02005548
5549 if ((hba->saved_err & UIC_ERROR) &&
5550 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5551 int err;
5552 /*
5553 * wait for 50ms to see if we can get any other errors or not.
5554 */
5555 spin_unlock_irqrestore(hba->host->host_lock, flags);
5556 msleep(50);
5557 spin_lock_irqsave(hba->host->host_lock, flags);
5558
5559 /*
5560 * now check if we have got any other severe errors other than
5561 * DL NAC error?
5562 */
5563 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5564 ((hba->saved_err & UIC_ERROR) &&
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005565 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR))) {
5566 if (((hba->saved_err & INT_FATAL_ERRORS) ==
5567 DEVICE_FATAL_ERROR) || (hba->saved_uic_err &
5568 ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR))
5569 hba->silence_err_logs = true;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005570 goto out;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005571 }
Yaniv Gardi583fa622016-03-10 17:37:13 +02005572
5573 /*
5574 * As DL NAC is the only error received so far, send out NOP
5575 * command to confirm if link is still active or not.
5576 * - If we don't get any response then do error recovery.
5577 * - If we get response then clear the DL NAC error bit.
5578 */
5579
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005580 /* silence the error logs from NOP command */
5581 hba->silence_err_logs = true;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005582 spin_unlock_irqrestore(hba->host->host_lock, flags);
5583 err = ufshcd_verify_dev_init(hba);
5584 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005585 hba->silence_err_logs = false;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005586
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005587 if (err) {
5588 hba->silence_err_logs = true;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005589 goto out;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005590 }
Yaniv Gardi583fa622016-03-10 17:37:13 +02005591
5592 /* Link seems to be alive hence ignore the DL NAC errors */
5593 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5594 hba->saved_err &= ~UIC_ERROR;
5595 /* clear NAC error */
5596 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5597 if (!hba->saved_uic_err) {
5598 err_handling = false;
5599 goto out;
5600 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005601 /*
5602 * there seems to be some errors other than NAC, so do error
5603 * recovery
5604 */
5605 hba->silence_err_logs = true;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005606 }
5607out:
5608 spin_unlock_irqrestore(hba->host->host_lock, flags);
5609 return err_handling;
5610}
5611
5612/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305613 * ufshcd_err_handler - handle UFS errors that require s/w attention
5614 * @work: pointer to work structure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305615 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305616static void ufshcd_err_handler(struct work_struct *work)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305617{
5618 struct ufs_hba *hba;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305619 unsigned long flags;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005620 bool err_xfer = false, err_tm = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305621 int err = 0;
5622 int tag;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005623 bool needs_reset = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305624
5625 hba = container_of(work, struct ufs_hba, eh_work);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305626
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005627 ufsdbg_set_err_state(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305628 pm_runtime_get_sync(hba->dev);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005629 ufshcd_hold_all(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305630
5631 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005632 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305633 goto out;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305634
5635 hba->ufshcd_state = UFSHCD_STATE_RESET;
5636 ufshcd_set_eh_in_progress(hba);
5637
5638 /* Complete requests that have door-bell cleared by h/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005639 ufshcd_complete_requests(hba);
Yaniv Gardi583fa622016-03-10 17:37:13 +02005640
5641 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5642 bool ret;
5643
5644 spin_unlock_irqrestore(hba->host->host_lock, flags);
5645 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5646 ret = ufshcd_quirk_dl_nac_errors(hba);
5647 spin_lock_irqsave(hba->host->host_lock, flags);
5648 if (!ret)
5649 goto skip_err_handling;
5650 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005651
5652 /*
5653 * Dump controller state before resetting. Transfer requests state
5654 * will be dump as part of the request completion.
5655 */
5656 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5657 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x",
5658 __func__, hba->saved_err, hba->saved_uic_err);
5659 if (!hba->silence_err_logs) {
5660 ufshcd_print_host_regs(hba);
5661 ufshcd_print_host_state(hba);
5662 ufshcd_print_pwr_info(hba);
5663 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5664 }
5665 }
5666
5667 if ((hba->saved_err & INT_FATAL_ERRORS) || hba->saved_ce_err ||
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005668 ((hba->saved_err & UIC_ERROR) &&
5669 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5670 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5671 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5672 needs_reset = true;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305673
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005674 /*
5675 * if host reset is required then skip clearing the pending
5676 * transfers forcefully because they will automatically get
5677 * cleared after link startup.
5678 */
5679 if (needs_reset)
5680 goto skip_pending_xfer_clear;
5681
5682 /* release lock as clear command might sleep */
5683 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305684 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005685 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5686 if (ufshcd_clear_cmd(hba, tag)) {
5687 err_xfer = true;
5688 goto lock_skip_pending_xfer_clear;
5689 }
5690 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305691
5692 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005693 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5694 if (ufshcd_clear_tm_cmd(hba, tag)) {
5695 err_tm = true;
5696 goto lock_skip_pending_xfer_clear;
5697 }
5698 }
5699
5700lock_skip_pending_xfer_clear:
5701 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305702
5703 /* Complete the requests that are cleared by s/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005704 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305705
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005706 if (err_xfer || err_tm)
5707 needs_reset = true;
5708
5709skip_pending_xfer_clear:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305710 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005711 if (needs_reset) {
5712 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5713
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005714 if (hba->saved_err & INT_FATAL_ERRORS)
5715 ufshcd_update_error_stats(hba,
5716 UFS_ERR_INT_FATAL_ERRORS);
5717 if (hba->saved_ce_err)
5718 ufshcd_update_error_stats(hba, UFS_ERR_CRYPTO_ENGINE);
5719
5720 if (hba->saved_err & UIC_ERROR)
5721 ufshcd_update_error_stats(hba,
5722 UFS_ERR_INT_UIC_ERROR);
5723
5724 if (err_xfer || err_tm)
5725 ufshcd_update_error_stats(hba,
5726 UFS_ERR_CLEAR_PEND_XFER_TM);
5727
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005728 /*
5729 * ufshcd_reset_and_restore() does the link reinitialization
5730 * which will need atleast one empty doorbell slot to send the
5731 * device management commands (NOP and query commands).
5732 * If there is no slot empty at this moment then free up last
5733 * slot forcefully.
5734 */
5735 if (hba->outstanding_reqs == max_doorbells)
5736 __ufshcd_transfer_req_compl(hba,
5737 (1UL << (hba->nutrs - 1)));
5738
5739 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305740 err = ufshcd_reset_and_restore(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005741 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305742 if (err) {
5743 dev_err(hba->dev, "%s: reset and restore failed\n",
5744 __func__);
5745 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5746 }
5747 /*
5748 * Inform scsi mid-layer that we did reset and allow to handle
5749 * Unit Attention properly.
5750 */
5751 scsi_report_bus_reset(hba->host, 0);
5752 hba->saved_err = 0;
5753 hba->saved_uic_err = 0;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005754 hba->saved_ce_err = 0;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305755 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005756
Yaniv Gardi583fa622016-03-10 17:37:13 +02005757skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005758 if (!needs_reset) {
5759 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5760 if (hba->saved_err || hba->saved_uic_err)
5761 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5762 __func__, hba->saved_err, hba->saved_uic_err);
5763 }
5764
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005765 hba->silence_err_logs = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305766 ufshcd_clear_eh_in_progress(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305767out:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005768 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005769 ufshcd_scsi_unblock_requests(hba);
5770 ufshcd_release_all(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305771 pm_runtime_put_sync(hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305772}
5773
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005774static void ufshcd_update_uic_reg_hist(struct ufs_uic_err_reg_hist *reg_hist,
5775 u32 reg)
5776{
5777 reg_hist->reg[reg_hist->pos] = reg;
5778 reg_hist->tstamp[reg_hist->pos] = ktime_get();
5779 reg_hist->pos = (reg_hist->pos + 1) % UIC_ERR_REG_HIST_LENGTH;
5780}
5781
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305782/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305783 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5784 * @hba: per-adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305785 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305786static void ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305787{
5788 u32 reg;
5789
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005790 /* PHY layer lane error */
5791 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5792 /* Ignore LINERESET indication, as this is not an error */
5793 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
5794 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
5795 /*
5796 * To know whether this error is fatal or not, DB timeout
5797 * must be checked but this error is handled separately.
5798 */
5799 dev_dbg(hba->dev, "%s: UIC Lane error reported, reg 0x%x\n",
5800 __func__, reg);
5801 ufshcd_update_uic_reg_hist(&hba->ufs_stats.pa_err, reg);
5802 }
5803
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305804 /* PA_INIT_ERROR is fatal and needs UIC reset */
5805 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005806 if (reg)
5807 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dl_err, reg);
5808
5809 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305810 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005811 } else if (hba->dev_quirks &
Yaniv Gardi583fa622016-03-10 17:37:13 +02005812 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5813 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5814 hba->uic_error |=
5815 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5816 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5817 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5818 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305819
5820 /* UIC NL/TL/DME errors needs software retry */
5821 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005822 if (reg) {
5823 ufshcd_update_uic_reg_hist(&hba->ufs_stats.nl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305824 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005825 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305826
5827 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005828 if (reg) {
5829 ufshcd_update_uic_reg_hist(&hba->ufs_stats.tl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305830 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005831 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305832
5833 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005834 if (reg) {
5835 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dme_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305836 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005837 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305838
5839 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5840 __func__, hba->uic_error);
5841}
5842
5843/**
5844 * ufshcd_check_errors - Check for errors that need s/w attention
5845 * @hba: per-adapter instance
5846 */
5847static void ufshcd_check_errors(struct ufs_hba *hba)
5848{
5849 bool queue_eh_work = false;
5850
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005851 if (hba->errors & INT_FATAL_ERRORS || hba->ce_error)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305852 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305853
5854 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305855 hba->uic_error = 0;
5856 ufshcd_update_uic_error(hba);
5857 if (hba->uic_error)
5858 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305859 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305860
5861 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005862 /*
5863 * update the transfer error masks to sticky bits, let's do this
5864 * irrespective of current ufshcd_state.
5865 */
5866 hba->saved_err |= hba->errors;
5867 hba->saved_uic_err |= hba->uic_error;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005868 hba->saved_ce_err |= hba->ce_error;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005869
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305870 /* handle fatal errors only when link is functional */
5871 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5872 /* block commands from scsi mid-layer */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005873 __ufshcd_scsi_block_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305874
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305875 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5876 schedule_work(&hba->eh_work);
5877 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305878 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305879 /*
5880 * if (!queue_eh_work) -
5881 * Other errors are either non-fatal where host recovers
5882 * itself without s/w intervention or errors that will be
5883 * handled by the SCSI core layer.
5884 */
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305885}
5886
5887/**
5888 * ufshcd_tmc_handler - handle task management function completion
5889 * @hba: per adapter instance
5890 */
5891static void ufshcd_tmc_handler(struct ufs_hba *hba)
5892{
5893 u32 tm_doorbell;
5894
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305895 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305896 hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305897 wake_up(&hba->tm_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305898}
5899
5900/**
5901 * ufshcd_sl_intr - Interrupt service routine
5902 * @hba: per adapter instance
5903 * @intr_status: contains interrupts generated by the controller
5904 */
5905static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
5906{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005907 ufsdbg_error_inject_dispatcher(hba,
5908 ERR_INJECT_INTR, intr_status, &intr_status);
5909
5910 ufshcd_vops_crypto_engine_get_status(hba, &hba->ce_error);
5911
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305912 hba->errors = UFSHCD_ERROR_MASK & intr_status;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005913 if (hba->errors || hba->ce_error)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305914 ufshcd_check_errors(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305915
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305916 if (intr_status & UFSHCD_UIC_MASK)
5917 ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305918
5919 if (intr_status & UTP_TASK_REQ_COMPL)
5920 ufshcd_tmc_handler(hba);
5921
5922 if (intr_status & UTP_TRANSFER_REQ_COMPL)
5923 ufshcd_transfer_req_compl(hba);
5924}
5925
5926/**
5927 * ufshcd_intr - Main interrupt service routine
5928 * @irq: irq number
5929 * @__hba: pointer to adapter instance
5930 *
5931 * Returns IRQ_HANDLED - If interrupt is valid
5932 * IRQ_NONE - If invalid interrupt
5933 */
5934static irqreturn_t ufshcd_intr(int irq, void *__hba)
5935{
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005936 u32 intr_status, enabled_intr_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305937 irqreturn_t retval = IRQ_NONE;
5938 struct ufs_hba *hba = __hba;
5939
5940 spin_lock(hba->host->host_lock);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305941 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005942 enabled_intr_status =
5943 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305944
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005945 if (intr_status)
Seungwon Jeon261ea452013-06-26 22:39:28 +05305946 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005947
5948 if (enabled_intr_status) {
5949 ufshcd_sl_intr(hba, enabled_intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305950 retval = IRQ_HANDLED;
5951 }
5952 spin_unlock(hba->host->host_lock);
5953 return retval;
5954}
5955
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305956static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5957{
5958 int err = 0;
5959 u32 mask = 1 << tag;
5960 unsigned long flags;
5961
5962 if (!test_bit(tag, &hba->outstanding_tasks))
5963 goto out;
5964
5965 spin_lock_irqsave(hba->host->host_lock, flags);
5966 ufshcd_writel(hba, ~(1 << tag), REG_UTP_TASK_REQ_LIST_CLEAR);
5967 spin_unlock_irqrestore(hba->host->host_lock, flags);
5968
5969 /* poll for max. 1 sec to clear door bell register by h/w */
5970 err = ufshcd_wait_for_register(hba,
5971 REG_UTP_TASK_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02005972 mask, 0, 1000, 1000, true);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305973out:
5974 return err;
5975}
5976
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305977/**
5978 * ufshcd_issue_tm_cmd - issues task management commands to controller
5979 * @hba: per adapter instance
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305980 * @lun_id: LUN ID to which TM command is sent
5981 * @task_id: task ID to which the TM command is applicable
5982 * @tm_function: task management function opcode
5983 * @tm_response: task management service response return value
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305984 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305985 * Returns non-zero value on error, zero on success.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305986 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305987static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5988 u8 tm_function, u8 *tm_response)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305989{
5990 struct utp_task_req_desc *task_req_descp;
5991 struct utp_upiu_task_req *task_req_upiup;
5992 struct Scsi_Host *host;
5993 unsigned long flags;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305994 int free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305995 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305996 int task_tag;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305997
5998 host = hba->host;
5999
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306000 /*
6001 * Get free slot, sleep if slots are unavailable.
6002 * Even though we use wait_event() which sleeps indefinitely,
6003 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
6004 */
6005 wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006006 ufshcd_hold_all(hba);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306007
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306008 spin_lock_irqsave(host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306009 task_req_descp = hba->utmrdl_base_addr;
6010 task_req_descp += free_slot;
6011
6012 /* Configure task request descriptor */
6013 task_req_descp->header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6014 task_req_descp->header.dword_2 =
6015 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6016
6017 /* Configure task request UPIU */
6018 task_req_upiup =
6019 (struct utp_upiu_task_req *) task_req_descp->task_req_upiu;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306020 task_tag = hba->nutrs + free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306021 task_req_upiup->header.dword_0 =
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306022 UPIU_HEADER_DWORD(UPIU_TRANSACTION_TASK_REQ, 0,
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306023 lun_id, task_tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306024 task_req_upiup->header.dword_1 =
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306025 UPIU_HEADER_DWORD(0, tm_function, 0, 0);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03006026 /*
6027 * The host shall provide the same value for LUN field in the basic
6028 * header and for Input Parameter.
6029 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306030 task_req_upiup->input_param1 = cpu_to_be32(lun_id);
6031 task_req_upiup->input_param2 = cpu_to_be32(task_id);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306032
6033 /* send command to the controller */
6034 __set_bit(free_slot, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02006035
6036 /* Make sure descriptors are ready before ringing the task doorbell */
6037 wmb();
6038
Seungwon Jeonb873a2752013-06-26 22:39:26 +05306039 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006040 /* Make sure that doorbell is committed immediately */
6041 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306042
6043 spin_unlock_irqrestore(host->host_lock, flags);
6044
6045 /* wait until the task management command is completed */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306046 err = wait_event_timeout(hba->tm_wq,
6047 test_bit(free_slot, &hba->tm_condition),
6048 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306049 if (!err) {
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306050 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
6051 __func__, tm_function);
6052 if (ufshcd_clear_tm_cmd(hba, free_slot))
6053 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
6054 __func__, free_slot);
6055 err = -ETIMEDOUT;
6056 } else {
6057 err = ufshcd_task_req_compl(hba, free_slot, tm_response);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306058 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306059
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306060 clear_bit(free_slot, &hba->tm_condition);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306061 ufshcd_put_tm_slot(hba, free_slot);
6062 wake_up(&hba->tm_tag_wq);
6063
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006064 ufshcd_release_all(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306065 return err;
6066}
6067
6068/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306069 * ufshcd_eh_device_reset_handler - device reset handler registered to
6070 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306071 * @cmd: SCSI command pointer
6072 *
6073 * Returns SUCCESS/FAILED
6074 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306075static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306076{
6077 struct Scsi_Host *host;
6078 struct ufs_hba *hba;
6079 unsigned int tag;
6080 u32 pos;
6081 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306082 u8 resp = 0xF;
6083 struct ufshcd_lrb *lrbp;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306084 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306085
6086 host = cmd->device->host;
6087 hba = shost_priv(host);
6088 tag = cmd->request->tag;
6089
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306090 lrbp = &hba->lrb[tag];
6091 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
6092 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306093 if (!err)
6094 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306095 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306096 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306097
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306098 /* clear the commands that were pending for corresponding LUN */
6099 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6100 if (hba->lrb[pos].lun == lrbp->lun) {
6101 err = ufshcd_clear_cmd(hba, pos);
6102 if (err)
6103 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306104 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306105 }
6106 spin_lock_irqsave(host->host_lock, flags);
6107 ufshcd_transfer_req_compl(hba);
6108 spin_unlock_irqrestore(host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006109
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306110out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006111 hba->req_abort_count = 0;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306112 if (!err) {
6113 err = SUCCESS;
6114 } else {
6115 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6116 err = FAILED;
6117 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306118 return err;
6119}
6120
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006121static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6122{
6123 struct ufshcd_lrb *lrbp;
6124 int tag;
6125
6126 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6127 lrbp = &hba->lrb[tag];
6128 lrbp->req_abort_skip = true;
6129 }
6130}
6131
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306132/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306133 * ufshcd_abort - abort a specific command
6134 * @cmd: SCSI command pointer
6135 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306136 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6137 * command, and in host controller by clearing the door-bell register. There can
6138 * be race between controller sending the command to the device while abort is
6139 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6140 * really issued and then try to abort it.
6141 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306142 * Returns SUCCESS/FAILED
6143 */
6144static int ufshcd_abort(struct scsi_cmnd *cmd)
6145{
6146 struct Scsi_Host *host;
6147 struct ufs_hba *hba;
6148 unsigned long flags;
6149 unsigned int tag;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306150 int err = 0;
6151 int poll_cnt;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306152 u8 resp = 0xF;
6153 struct ufshcd_lrb *lrbp;
Dolev Ravive9d501b2014-07-01 12:22:37 +03006154 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306155
6156 host = cmd->device->host;
6157 hba = shost_priv(host);
6158 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02006159 if (!ufshcd_valid_tag(hba, tag)) {
6160 dev_err(hba->dev,
6161 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
6162 __func__, tag, cmd, cmd->request);
6163 BUG();
6164 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306165
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006166 lrbp = &hba->lrb[tag];
6167
6168 ufshcd_update_error_stats(hba, UFS_ERR_TASK_ABORT);
6169
6170 /*
6171 * Task abort to the device W-LUN is illegal. When this command
6172 * will fail, due to spec violation, scsi err handling next step
6173 * will be to send LU reset which, again, is a spec violation.
6174 * To avoid these unnecessary/illegal step we skip to the last error
6175 * handling stage: reset and restore.
6176 */
6177 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
6178 return ufshcd_eh_host_reset_handler(cmd);
6179
6180 ufshcd_hold_all(hba);
Dolev Ravive9d501b2014-07-01 12:22:37 +03006181 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Yaniv Gardi14497322016-02-01 15:02:39 +02006182 /* If command is already aborted/completed, return SUCCESS */
6183 if (!(test_bit(tag, &hba->outstanding_reqs))) {
6184 dev_err(hba->dev,
6185 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
6186 __func__, tag, hba->outstanding_reqs, reg);
6187 goto out;
6188 }
6189
Dolev Ravive9d501b2014-07-01 12:22:37 +03006190 if (!(reg & (1 << tag))) {
6191 dev_err(hba->dev,
6192 "%s: cmd was completed, but without a notifying intr, tag = %d",
6193 __func__, tag);
6194 }
6195
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006196 /* Print Transfer Request of aborted task */
6197 dev_err(hba->dev, "%s: Device abort task at tag %d", __func__, tag);
6198
6199 /*
6200 * Print detailed info about aborted request.
6201 * As more than one request might get aborted at the same time,
6202 * print full information only for the first aborted request in order
6203 * to reduce repeated printouts. For other aborted requests only print
6204 * basic details.
6205 */
6206 scsi_print_command(cmd);
6207 if (!hba->req_abort_count) {
6208 ufshcd_print_host_regs(hba);
6209 ufshcd_print_host_state(hba);
6210 ufshcd_print_pwr_info(hba);
6211 ufshcd_print_trs(hba, 1 << tag, true);
6212 } else {
6213 ufshcd_print_trs(hba, 1 << tag, false);
6214 }
6215 hba->req_abort_count++;
6216
6217
6218 /* Skip task abort in case previous aborts failed and report failure */
6219 if (lrbp->req_abort_skip) {
6220 err = -EIO;
6221 goto out;
6222 }
6223
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306224 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6225 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6226 UFS_QUERY_TASK, &resp);
6227 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6228 /* cmd pending in the device */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006229 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d",
6230 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306231 break;
6232 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306233 /*
6234 * cmd not pending in the device, check if it is
6235 * in transition.
6236 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006237 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.",
6238 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306239 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6240 if (reg & (1 << tag)) {
6241 /* sleep for max. 200us to stabilize */
6242 usleep_range(100, 200);
6243 continue;
6244 }
6245 /* command completed already */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006246 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.",
6247 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306248 goto out;
6249 } else {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006250 dev_err(hba->dev,
6251 "%s: no response from device. tag = %d, err %d",
6252 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306253 if (!err)
6254 err = resp; /* service response error */
6255 goto out;
6256 }
6257 }
6258
6259 if (!poll_cnt) {
6260 err = -EBUSY;
6261 goto out;
6262 }
6263
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306264 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6265 UFS_ABORT_TASK, &resp);
6266 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006267 if (!err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306268 err = resp; /* service response error */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006269 dev_err(hba->dev, "%s: issued. tag = %d, err %d",
6270 __func__, tag, err);
6271 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306272 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306273 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306274
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306275 err = ufshcd_clear_cmd(hba, tag);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006276 if (err) {
6277 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d",
6278 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306279 goto out;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006280 }
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306281
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306282 scsi_dma_unmap(cmd);
6283
6284 spin_lock_irqsave(host->host_lock, flags);
Yaniv Gardia48353f2016-02-01 15:02:40 +02006285 ufshcd_outstanding_req_clear(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306286 hba->lrb[tag].cmd = NULL;
6287 spin_unlock_irqrestore(host->host_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306288
6289 clear_bit_unlock(tag, &hba->lrb_in_use);
6290 wake_up(&hba->dev_cmd.tag_wq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006291
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306292out:
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306293 if (!err) {
6294 err = SUCCESS;
6295 } else {
6296 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006297 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306298 err = FAILED;
6299 }
6300
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006301 /*
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006302 * This ufshcd_release_all() corresponds to the original scsi cmd that
6303 * got aborted here (as we won't get any IRQ for it).
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006304 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006305 ufshcd_release_all(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306306 return err;
6307}
6308
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306309/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306310 * ufshcd_host_reset_and_restore - reset and restore host controller
6311 * @hba: per-adapter instance
6312 *
6313 * Note that host controller reset may issue DME_RESET to
6314 * local and remote (device) Uni-Pro stack and the attributes
6315 * are reset to default state.
6316 *
6317 * Returns zero on success, non-zero on failure
6318 */
6319static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6320{
6321 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306322 unsigned long flags;
6323
6324 /* Reset the host controller */
6325 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02006326 ufshcd_hba_stop(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306327 spin_unlock_irqrestore(hba->host->host_lock, flags);
6328
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006329 /* scale up clocks to max frequency before full reinitialization */
6330 ufshcd_set_clk_freq(hba, true);
6331
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306332 err = ufshcd_hba_enable(hba);
6333 if (err)
6334 goto out;
6335
6336 /* Establish the link again and restore the device */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006337 err = ufshcd_probe_hba(hba);
6338
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006339 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL)) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306340 err = -EIO;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006341 goto out;
6342 }
6343
6344 if (!err) {
6345 err = ufshcd_vops_crypto_engine_reset(hba);
6346 if (err) {
6347 dev_err(hba->dev,
6348 "%s: failed to reset crypto engine %d\n",
6349 __func__, err);
6350 goto out;
6351 }
6352 }
6353
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306354out:
6355 if (err)
6356 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
6357
6358 return err;
6359}
6360
6361/**
6362 * ufshcd_reset_and_restore - reset and re-initialize host/device
6363 * @hba: per-adapter instance
6364 *
6365 * Reset and recover device, host and re-establish link. This
6366 * is helpful to recover the communication in fatal error conditions.
6367 *
6368 * Returns zero on success, non-zero on failure
6369 */
6370static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6371{
6372 int err = 0;
6373 unsigned long flags;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006374 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306375
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006376 do {
6377 err = ufshcd_host_reset_and_restore(hba);
6378 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306379
6380 /*
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006381 * There is no point proceeding even after failing
6382 * to recover after multiple retries.
6383 */
6384 if (err)
6385 BUG();
6386 /*
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306387 * After reset the door-bell might be cleared, complete
6388 * outstanding requests in s/w here.
6389 */
6390 spin_lock_irqsave(hba->host->host_lock, flags);
6391 ufshcd_transfer_req_compl(hba);
6392 ufshcd_tmc_handler(hba);
6393 spin_unlock_irqrestore(hba->host->host_lock, flags);
6394
6395 return err;
6396}
6397
6398/**
6399 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
6400 * @cmd - SCSI command pointer
6401 *
6402 * Returns SUCCESS/FAILED
6403 */
6404static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6405{
6406 int err;
6407 unsigned long flags;
6408 struct ufs_hba *hba;
6409
6410 hba = shost_priv(cmd->device->host);
6411
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006412 ufshcd_hold_all(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306413 /*
6414 * Check if there is any race with fatal error handling.
6415 * If so, wait for it to complete. Even though fatal error
6416 * handling does reset and restore in some cases, don't assume
6417 * anything out of it. We are just avoiding race here.
6418 */
6419 do {
6420 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306421 if (!(work_pending(&hba->eh_work) ||
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306422 hba->ufshcd_state == UFSHCD_STATE_RESET))
6423 break;
6424 spin_unlock_irqrestore(hba->host->host_lock, flags);
6425 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306426 flush_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306427 } while (1);
6428
6429 hba->ufshcd_state = UFSHCD_STATE_RESET;
6430 ufshcd_set_eh_in_progress(hba);
6431 spin_unlock_irqrestore(hba->host->host_lock, flags);
6432
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006433 ufshcd_update_error_stats(hba, UFS_ERR_EH);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306434 err = ufshcd_reset_and_restore(hba);
6435
6436 spin_lock_irqsave(hba->host->host_lock, flags);
6437 if (!err) {
6438 err = SUCCESS;
6439 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6440 } else {
6441 err = FAILED;
6442 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6443 }
6444 ufshcd_clear_eh_in_progress(hba);
6445 spin_unlock_irqrestore(hba->host->host_lock, flags);
6446
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006447 ufshcd_release_all(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306448 return err;
6449}
6450
6451/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006452 * ufshcd_get_max_icc_level - calculate the ICC level
6453 * @sup_curr_uA: max. current supported by the regulator
6454 * @start_scan: row at the desc table to start scan from
6455 * @buff: power descriptor buffer
6456 *
6457 * Returns calculated max ICC level for specific regulator
6458 */
6459static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6460{
6461 int i;
6462 int curr_uA;
6463 u16 data;
6464 u16 unit;
6465
6466 for (i = start_scan; i >= 0; i--) {
6467 data = be16_to_cpu(*((u16 *)(buff + 2*i)));
6468 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6469 ATTR_ICC_LVL_UNIT_OFFSET;
6470 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6471 switch (unit) {
6472 case UFSHCD_NANO_AMP:
6473 curr_uA = curr_uA / 1000;
6474 break;
6475 case UFSHCD_MILI_AMP:
6476 curr_uA = curr_uA * 1000;
6477 break;
6478 case UFSHCD_AMP:
6479 curr_uA = curr_uA * 1000 * 1000;
6480 break;
6481 case UFSHCD_MICRO_AMP:
6482 default:
6483 break;
6484 }
6485 if (sup_curr_uA >= curr_uA)
6486 break;
6487 }
6488 if (i < 0) {
6489 i = 0;
6490 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6491 }
6492
6493 return (u32)i;
6494}
6495
6496/**
6497 * ufshcd_calc_icc_level - calculate the max ICC level
6498 * In case regulators are not initialized we'll return 0
6499 * @hba: per-adapter instance
6500 * @desc_buf: power descriptor buffer to extract ICC levels from.
6501 * @len: length of desc_buff
6502 *
6503 * Returns calculated ICC level
6504 */
6505static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6506 u8 *desc_buf, int len)
6507{
6508 u32 icc_level = 0;
6509
6510 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6511 !hba->vreg_info.vccq2) {
6512 dev_err(hba->dev,
6513 "%s: Regulator capability was not set, actvIccLevel=%d",
6514 __func__, icc_level);
6515 goto out;
6516 }
6517
6518 if (hba->vreg_info.vcc)
6519 icc_level = ufshcd_get_max_icc_level(
6520 hba->vreg_info.vcc->max_uA,
6521 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6522 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6523
6524 if (hba->vreg_info.vccq)
6525 icc_level = ufshcd_get_max_icc_level(
6526 hba->vreg_info.vccq->max_uA,
6527 icc_level,
6528 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6529
6530 if (hba->vreg_info.vccq2)
6531 icc_level = ufshcd_get_max_icc_level(
6532 hba->vreg_info.vccq2->max_uA,
6533 icc_level,
6534 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6535out:
6536 return icc_level;
6537}
6538
Subhash Jadavani8a93dbd2016-12-12 17:59:44 -08006539static void ufshcd_set_active_icc_lvl(struct ufs_hba *hba)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006540{
6541 int ret;
6542 int buff_len = QUERY_DESC_POWER_MAX_SIZE;
6543 u8 desc_buf[QUERY_DESC_POWER_MAX_SIZE];
Subhash Jadavani35732e52016-12-09 16:09:42 -08006544 u32 icc_level;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006545
6546 ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6547 if (ret) {
6548 dev_err(hba->dev,
6549 "%s: Failed reading power descriptor.len = %d ret = %d",
6550 __func__, buff_len, ret);
6551 return;
6552 }
6553
Subhash Jadavani35732e52016-12-09 16:09:42 -08006554 icc_level = ufshcd_find_max_sup_active_icc_level(hba, desc_buf,
6555 buff_len);
6556 dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006557
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02006558 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Subhash Jadavani35732e52016-12-09 16:09:42 -08006559 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, &icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006560
6561 if (ret)
6562 dev_err(hba->dev,
6563 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
Subhash Jadavani35732e52016-12-09 16:09:42 -08006564 __func__, icc_level, ret);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006565}
6566
6567/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006568 * ufshcd_scsi_add_wlus - Adds required W-LUs
6569 * @hba: per-adapter instance
6570 *
6571 * UFS device specification requires the UFS devices to support 4 well known
6572 * logical units:
6573 * "REPORT_LUNS" (address: 01h)
6574 * "UFS Device" (address: 50h)
6575 * "RPMB" (address: 44h)
6576 * "BOOT" (address: 30h)
6577 * UFS device's power management needs to be controlled by "POWER CONDITION"
6578 * field of SSU (START STOP UNIT) command. But this "power condition" field
6579 * will take effect only when its sent to "UFS device" well known logical unit
6580 * hence we require the scsi_device instance to represent this logical unit in
6581 * order for the UFS host driver to send the SSU command for power management.
6582
6583 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6584 * Block) LU so user space process can control this LU. User space may also
6585 * want to have access to BOOT LU.
6586
6587 * This function adds scsi device instances for each of all well known LUs
6588 * (except "REPORT LUNS" LU).
6589 *
6590 * Returns zero on success (all required W-LUs are added successfully),
6591 * non-zero error value on failure (if failed to add any of the required W-LU).
6592 */
6593static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6594{
6595 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006596 struct scsi_device *sdev_rpmb;
6597 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006598
6599 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6600 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6601 if (IS_ERR(hba->sdev_ufs_device)) {
6602 ret = PTR_ERR(hba->sdev_ufs_device);
6603 hba->sdev_ufs_device = NULL;
6604 goto out;
6605 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006606 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006607
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006608 sdev_boot = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006609 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006610 if (IS_ERR(sdev_boot)) {
6611 ret = PTR_ERR(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006612 goto remove_sdev_ufs_device;
6613 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006614 scsi_device_put(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006615
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006616 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006617 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006618 if (IS_ERR(sdev_rpmb)) {
6619 ret = PTR_ERR(sdev_rpmb);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006620 goto remove_sdev_boot;
6621 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006622 scsi_device_put(sdev_rpmb);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006623 goto out;
6624
6625remove_sdev_boot:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006626 scsi_remove_device(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006627remove_sdev_ufs_device:
6628 scsi_remove_device(hba->sdev_ufs_device);
6629out:
6630 return ret;
6631}
6632
6633/**
Yaniv Gardi37113102016-03-10 17:37:16 +02006634 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6635 * @hba: per-adapter instance
6636 *
6637 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6638 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6639 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6640 * the hibern8 exit latency.
6641 *
6642 * Returns zero on success, non-zero error value on failure.
6643 */
6644static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6645{
6646 int ret = 0;
6647 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6648
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006649 if (!ufshcd_is_unipro_pa_params_tuning_req(hba))
6650 return 0;
6651
Yaniv Gardi37113102016-03-10 17:37:16 +02006652 ret = ufshcd_dme_peer_get(hba,
6653 UIC_ARG_MIB_SEL(
6654 RX_MIN_ACTIVATETIME_CAPABILITY,
6655 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6656 &peer_rx_min_activatetime);
6657 if (ret)
6658 goto out;
6659
6660 /* make sure proper unit conversion is applied */
6661 tuned_pa_tactivate =
6662 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6663 / PA_TACTIVATE_TIME_UNIT_US);
6664 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6665 tuned_pa_tactivate);
6666
6667out:
6668 return ret;
6669}
6670
6671/**
6672 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6673 * @hba: per-adapter instance
6674 *
6675 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6676 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6677 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6678 * This optimal value can help reduce the hibern8 exit latency.
6679 *
6680 * Returns zero on success, non-zero error value on failure.
6681 */
6682static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6683{
6684 int ret = 0;
6685 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6686 u32 max_hibern8_time, tuned_pa_hibern8time;
6687
6688 ret = ufshcd_dme_get(hba,
6689 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6690 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6691 &local_tx_hibern8_time_cap);
6692 if (ret)
6693 goto out;
6694
6695 ret = ufshcd_dme_peer_get(hba,
6696 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6697 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6698 &peer_rx_hibern8_time_cap);
6699 if (ret)
6700 goto out;
6701
6702 max_hibern8_time = max(local_tx_hibern8_time_cap,
6703 peer_rx_hibern8_time_cap);
6704 /* make sure proper unit conversion is applied */
6705 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6706 / PA_HIBERN8_TIME_UNIT_US);
6707 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6708 tuned_pa_hibern8time);
6709out:
6710 return ret;
6711}
6712
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006713/**
6714 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6715 * less than device PA_TACTIVATE time.
6716 * @hba: per-adapter instance
6717 *
6718 * Some UFS devices require host PA_TACTIVATE to be lower than device
6719 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6720 * for such devices.
6721 *
6722 * Returns zero on success, non-zero error value on failure.
6723 */
6724static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6725{
6726 int ret = 0;
6727 u32 granularity, peer_granularity;
6728 u32 pa_tactivate, peer_pa_tactivate;
6729 u32 pa_tactivate_us, peer_pa_tactivate_us;
6730 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6731
6732 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6733 &granularity);
6734 if (ret)
6735 goto out;
6736
6737 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6738 &peer_granularity);
6739 if (ret)
6740 goto out;
6741
6742 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6743 (granularity > PA_GRANULARITY_MAX_VAL)) {
6744 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6745 __func__, granularity);
6746 return -EINVAL;
6747 }
6748
6749 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6750 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6751 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6752 __func__, peer_granularity);
6753 return -EINVAL;
6754 }
6755
6756 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6757 if (ret)
6758 goto out;
6759
6760 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6761 &peer_pa_tactivate);
6762 if (ret)
6763 goto out;
6764
6765 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6766 peer_pa_tactivate_us = peer_pa_tactivate *
6767 gran_to_us_table[peer_granularity - 1];
6768
6769 if (pa_tactivate_us > peer_pa_tactivate_us) {
6770 u32 new_peer_pa_tactivate;
6771
6772 new_peer_pa_tactivate = pa_tactivate_us /
6773 gran_to_us_table[peer_granularity - 1];
6774 new_peer_pa_tactivate++;
6775 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6776 new_peer_pa_tactivate);
6777 }
6778
6779out:
6780 return ret;
6781}
6782
Yaniv Gardi37113102016-03-10 17:37:16 +02006783static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6784{
6785 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6786 ufshcd_tune_pa_tactivate(hba);
6787 ufshcd_tune_pa_hibern8time(hba);
6788 }
6789
6790 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6791 /* set 1ms timeout for PA_TACTIVATE */
6792 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006793
6794 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6795 ufshcd_quirk_tune_host_pa_tactivate(hba);
6796
6797 ufshcd_vops_apply_dev_quirks(hba);
6798}
6799
6800static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6801{
6802 int err_reg_hist_size = sizeof(struct ufs_uic_err_reg_hist);
6803
6804 hba->ufs_stats.hibern8_exit_cnt = 0;
6805 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
6806
6807 memset(&hba->ufs_stats.pa_err, 0, err_reg_hist_size);
6808 memset(&hba->ufs_stats.dl_err, 0, err_reg_hist_size);
6809 memset(&hba->ufs_stats.nl_err, 0, err_reg_hist_size);
6810 memset(&hba->ufs_stats.tl_err, 0, err_reg_hist_size);
6811 memset(&hba->ufs_stats.dme_err, 0, err_reg_hist_size);
6812
6813 hba->req_abort_count = 0;
6814}
6815
6816static void ufshcd_apply_pm_quirks(struct ufs_hba *hba)
6817{
6818 if (hba->dev_quirks & UFS_DEVICE_QUIRK_NO_LINK_OFF) {
6819 if (ufs_get_pm_lvl_to_link_pwr_state(hba->rpm_lvl) ==
6820 UIC_LINK_OFF_STATE) {
6821 hba->rpm_lvl =
6822 ufs_get_desired_pm_lvl_for_dev_link_state(
6823 UFS_SLEEP_PWR_MODE,
6824 UIC_LINK_HIBERN8_STATE);
6825 dev_info(hba->dev, "UFS_DEVICE_QUIRK_NO_LINK_OFF enabled, changed rpm_lvl to %d\n",
6826 hba->rpm_lvl);
6827 }
6828 if (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
6829 UIC_LINK_OFF_STATE) {
6830 hba->spm_lvl =
6831 ufs_get_desired_pm_lvl_for_dev_link_state(
6832 UFS_SLEEP_PWR_MODE,
6833 UIC_LINK_HIBERN8_STATE);
6834 dev_info(hba->dev, "UFS_DEVICE_QUIRK_NO_LINK_OFF enabled, changed spm_lvl to %d\n",
6835 hba->spm_lvl);
6836 }
6837 }
Yaniv Gardi37113102016-03-10 17:37:16 +02006838}
6839
6840/**
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006841 * ufshcd_probe_hba - probe hba to detect device and initialize
6842 * @hba: per-adapter instance
6843 *
6844 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306845 */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006846static int ufshcd_probe_hba(struct ufs_hba *hba)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306847{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306848 int ret;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006849 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306850
6851 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306852 if (ret)
6853 goto out;
6854
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006855 /* Enable auto hibern8 if supported */
6856 if (ufshcd_is_auto_hibern8_supported(hba))
6857 ufshcd_set_auto_hibern8_timer(hba,
6858 hba->hibern8_on_idle.delay_ms);
Yaniv Gardi50646362014-10-23 13:25:13 +03006859
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006860 /* Debug counters initialization */
6861 ufshcd_clear_dbg_ufs_stats(hba);
Yaniv Gardiafdfff52016-03-10 17:37:15 +02006862 /* set the default level for urgent bkops */
6863 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6864 hba->is_urgent_bkops_lvl_checked = false;
6865
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006866 /* UniPro link is active now */
6867 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05306868
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306869 ret = ufshcd_verify_dev_init(hba);
6870 if (ret)
6871 goto out;
6872
Dolev Raviv68078d52013-07-30 00:35:58 +05306873 ret = ufshcd_complete_dev_init(hba);
6874 if (ret)
6875 goto out;
6876
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006877 ufs_advertise_fixup_device(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02006878 ufshcd_tune_unipro_params(hba);
Yaniv Gardi60f01872016-03-10 17:37:11 +02006879
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006880 ufshcd_apply_pm_quirks(hba);
Yaniv Gardi60f01872016-03-10 17:37:11 +02006881 ret = ufshcd_set_vccq_rail_unused(hba,
6882 (hba->dev_quirks & UFS_DEVICE_NO_VCCQ) ? true : false);
6883 if (ret)
6884 goto out;
6885
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006886 /* UFS device is also active now */
6887 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306888 ufshcd_force_reset_auto_bkops(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006889 hba->wlun_dev_clr_ua = true;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306890
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006891 if (ufshcd_get_max_pwr_mode(hba)) {
6892 dev_err(hba->dev,
6893 "%s: Failed getting max supported power mode\n",
6894 __func__);
6895 } else {
6896 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006897 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006898 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6899 __func__, ret);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006900 goto out;
6901 }
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006902 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006903
Subhash Jadavani8a93dbd2016-12-12 17:59:44 -08006904 /*
6905 * bActiveICCLevel is volatile for UFS device (as per latest v2.1 spec)
6906 * and for removable UFS card as well, hence always set the parameter.
6907 * Note: Error handler may issue the device reset hence resetting
6908 * bActiveICCLevel as well so it is always safe to set this here.
6909 */
6910 ufshcd_set_active_icc_lvl(hba);
6911
Yaniv Gardi53c12d02016-02-01 15:02:45 +02006912 /* set the state as operational after switching to desired gear */
6913 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006914 /*
6915 * If we are in error handling context or in power management callbacks
6916 * context, no need to scan the host
6917 */
6918 if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6919 bool flag;
6920
6921 /* clear any previous UFS device information */
6922 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02006923 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
6924 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006925 hba->dev_info.f_power_on_wp_en = flag;
6926
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006927 /* Add required well known logical units to scsi mid layer */
6928 if (ufshcd_scsi_add_wlus(hba))
6929 goto out;
6930
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306931 scsi_scan_host(hba->host);
6932 pm_runtime_put_sync(hba->dev);
6933 }
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006934
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006935 /* Resume devfreq after UFS device is detected */
6936 if (ufshcd_is_clkscaling_supported(hba)) {
6937 memcpy(&hba->clk_scaling.saved_pwr_info.info, &hba->pwr_info,
6938 sizeof(struct ufs_pa_layer_attr));
6939 hba->clk_scaling.saved_pwr_info.is_valid = true;
6940 hba->clk_scaling.is_scaled_up = true;
6941 ufshcd_resume_clkscaling(hba);
6942 hba->clk_scaling.is_allowed = true;
6943 }
6944
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306945out:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006946 /*
6947 * If we failed to initialize the device or the device is not
6948 * present, turn off the power/clocks etc.
6949 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006950 if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6951 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006952 ufshcd_hba_exit(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006953 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006954
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006955 trace_ufshcd_init(dev_name(hba->dev), ret,
6956 ktime_to_us(ktime_sub(ktime_get(), start)),
6957 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006958 return ret;
6959}
6960
6961/**
6962 * ufshcd_async_scan - asynchronous execution for probing hba
6963 * @data: data pointer to pass to this function
6964 * @cookie: cookie data
6965 */
6966static void ufshcd_async_scan(void *data, async_cookie_t cookie)
6967{
6968 struct ufs_hba *hba = (struct ufs_hba *)data;
6969
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006970 /*
6971 * Don't allow clock gating and hibern8 enter for faster device
6972 * detection.
6973 */
6974 ufshcd_hold_all(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006975 ufshcd_probe_hba(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006976 ufshcd_release_all(hba);
6977}
6978
6979/**
6980 * ufshcd_query_ioctl - perform user read queries
6981 * @hba: per-adapter instance
6982 * @lun: used for lun specific queries
6983 * @buffer: user space buffer for reading and submitting query data and params
6984 * @return: 0 for success negative error code otherwise
6985 *
6986 * Expected/Submitted buffer structure is struct ufs_ioctl_query_data.
6987 * It will read the opcode, idn and buf_length parameters, and, put the
6988 * response in the buffer field while updating the used size in buf_length.
6989 */
6990static int ufshcd_query_ioctl(struct ufs_hba *hba, u8 lun, void __user *buffer)
6991{
6992 struct ufs_ioctl_query_data *ioctl_data;
6993 int err = 0;
6994 int length = 0;
6995 void *data_ptr;
6996 bool flag;
6997 u32 att;
6998 u8 index;
6999 u8 *desc = NULL;
7000
7001 ioctl_data = kzalloc(sizeof(struct ufs_ioctl_query_data), GFP_KERNEL);
7002 if (!ioctl_data) {
7003 dev_err(hba->dev, "%s: Failed allocating %zu bytes\n", __func__,
7004 sizeof(struct ufs_ioctl_query_data));
7005 err = -ENOMEM;
7006 goto out;
7007 }
7008
7009 /* extract params from user buffer */
7010 err = copy_from_user(ioctl_data, buffer,
7011 sizeof(struct ufs_ioctl_query_data));
7012 if (err) {
7013 dev_err(hba->dev,
7014 "%s: Failed copying buffer from user, err %d\n",
7015 __func__, err);
7016 goto out_release_mem;
7017 }
7018
7019 /* verify legal parameters & send query */
7020 switch (ioctl_data->opcode) {
7021 case UPIU_QUERY_OPCODE_READ_DESC:
7022 switch (ioctl_data->idn) {
7023 case QUERY_DESC_IDN_DEVICE:
7024 case QUERY_DESC_IDN_CONFIGURAION:
7025 case QUERY_DESC_IDN_INTERCONNECT:
7026 case QUERY_DESC_IDN_GEOMETRY:
7027 case QUERY_DESC_IDN_POWER:
7028 index = 0;
7029 break;
7030 case QUERY_DESC_IDN_UNIT:
7031 if (!ufs_is_valid_unit_desc_lun(lun)) {
7032 dev_err(hba->dev,
7033 "%s: No unit descriptor for lun 0x%x\n",
7034 __func__, lun);
7035 err = -EINVAL;
7036 goto out_release_mem;
7037 }
7038 index = lun;
7039 break;
7040 default:
7041 goto out_einval;
7042 }
7043 length = min_t(int, QUERY_DESC_MAX_SIZE,
7044 ioctl_data->buf_size);
7045 desc = kzalloc(length, GFP_KERNEL);
7046 if (!desc) {
7047 dev_err(hba->dev, "%s: Failed allocating %d bytes\n",
7048 __func__, length);
7049 err = -ENOMEM;
7050 goto out_release_mem;
7051 }
7052 err = ufshcd_query_descriptor(hba, ioctl_data->opcode,
7053 ioctl_data->idn, index, 0, desc, &length);
7054 break;
7055 case UPIU_QUERY_OPCODE_READ_ATTR:
7056 switch (ioctl_data->idn) {
7057 case QUERY_ATTR_IDN_BOOT_LU_EN:
7058 case QUERY_ATTR_IDN_POWER_MODE:
7059 case QUERY_ATTR_IDN_ACTIVE_ICC_LVL:
7060 case QUERY_ATTR_IDN_OOO_DATA_EN:
7061 case QUERY_ATTR_IDN_BKOPS_STATUS:
7062 case QUERY_ATTR_IDN_PURGE_STATUS:
7063 case QUERY_ATTR_IDN_MAX_DATA_IN:
7064 case QUERY_ATTR_IDN_MAX_DATA_OUT:
7065 case QUERY_ATTR_IDN_REF_CLK_FREQ:
7066 case QUERY_ATTR_IDN_CONF_DESC_LOCK:
7067 case QUERY_ATTR_IDN_MAX_NUM_OF_RTT:
7068 case QUERY_ATTR_IDN_EE_CONTROL:
7069 case QUERY_ATTR_IDN_EE_STATUS:
7070 case QUERY_ATTR_IDN_SECONDS_PASSED:
7071 index = 0;
7072 break;
7073 case QUERY_ATTR_IDN_DYN_CAP_NEEDED:
7074 case QUERY_ATTR_IDN_CORR_PRG_BLK_NUM:
7075 index = lun;
7076 break;
7077 default:
7078 goto out_einval;
7079 }
7080 err = ufshcd_query_attr(hba, ioctl_data->opcode, ioctl_data->idn,
7081 index, 0, &att);
7082 break;
7083
7084 case UPIU_QUERY_OPCODE_WRITE_ATTR:
7085 err = copy_from_user(&att,
7086 buffer + sizeof(struct ufs_ioctl_query_data),
7087 sizeof(u32));
7088 if (err) {
7089 dev_err(hba->dev,
7090 "%s: Failed copying buffer from user, err %d\n",
7091 __func__, err);
7092 goto out_release_mem;
7093 }
7094
7095 switch (ioctl_data->idn) {
7096 case QUERY_ATTR_IDN_BOOT_LU_EN:
7097 index = 0;
7098 if (att > QUERY_ATTR_IDN_BOOT_LU_EN_MAX) {
7099 dev_err(hba->dev,
7100 "%s: Illegal ufs query ioctl data, opcode 0x%x, idn 0x%x, att 0x%x\n",
7101 __func__, ioctl_data->opcode,
7102 (unsigned int)ioctl_data->idn, att);
7103 err = -EINVAL;
7104 goto out_release_mem;
7105 }
7106 break;
7107 default:
7108 goto out_einval;
7109 }
7110 err = ufshcd_query_attr(hba, ioctl_data->opcode,
7111 ioctl_data->idn, index, 0, &att);
7112 break;
7113
7114 case UPIU_QUERY_OPCODE_READ_FLAG:
7115 switch (ioctl_data->idn) {
7116 case QUERY_FLAG_IDN_FDEVICEINIT:
7117 case QUERY_FLAG_IDN_PERMANENT_WPE:
7118 case QUERY_FLAG_IDN_PWR_ON_WPE:
7119 case QUERY_FLAG_IDN_BKOPS_EN:
7120 case QUERY_FLAG_IDN_PURGE_ENABLE:
7121 case QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL:
7122 case QUERY_FLAG_IDN_BUSY_RTC:
7123 break;
7124 default:
7125 goto out_einval;
7126 }
7127 err = ufshcd_query_flag_retry(hba, ioctl_data->opcode,
7128 ioctl_data->idn, &flag);
7129 break;
7130 default:
7131 goto out_einval;
7132 }
7133
7134 if (err) {
7135 dev_err(hba->dev, "%s: Query for idn %d failed\n", __func__,
7136 ioctl_data->idn);
7137 goto out_release_mem;
7138 }
7139
7140 /*
7141 * copy response data
7142 * As we might end up reading less data then what is specified in
7143 * "ioctl_data->buf_size". So we are updating "ioctl_data->
7144 * buf_size" to what exactly we have read.
7145 */
7146 switch (ioctl_data->opcode) {
7147 case UPIU_QUERY_OPCODE_READ_DESC:
7148 ioctl_data->buf_size = min_t(int, ioctl_data->buf_size, length);
7149 data_ptr = desc;
7150 break;
7151 case UPIU_QUERY_OPCODE_READ_ATTR:
7152 ioctl_data->buf_size = sizeof(u32);
7153 data_ptr = &att;
7154 break;
7155 case UPIU_QUERY_OPCODE_READ_FLAG:
7156 ioctl_data->buf_size = 1;
7157 data_ptr = &flag;
7158 break;
7159 case UPIU_QUERY_OPCODE_WRITE_ATTR:
7160 goto out_release_mem;
7161 default:
7162 goto out_einval;
7163 }
7164
7165 /* copy to user */
7166 err = copy_to_user(buffer, ioctl_data,
7167 sizeof(struct ufs_ioctl_query_data));
7168 if (err)
7169 dev_err(hba->dev, "%s: Failed copying back to user.\n",
7170 __func__);
7171 err = copy_to_user(buffer + sizeof(struct ufs_ioctl_query_data),
7172 data_ptr, ioctl_data->buf_size);
7173 if (err)
7174 dev_err(hba->dev, "%s: err %d copying back to user.\n",
7175 __func__, err);
7176 goto out_release_mem;
7177
7178out_einval:
7179 dev_err(hba->dev,
7180 "%s: illegal ufs query ioctl data, opcode 0x%x, idn 0x%x\n",
7181 __func__, ioctl_data->opcode, (unsigned int)ioctl_data->idn);
7182 err = -EINVAL;
7183out_release_mem:
7184 kfree(ioctl_data);
7185 kfree(desc);
7186out:
7187 return err;
7188}
7189
7190/**
7191 * ufshcd_ioctl - ufs ioctl callback registered in scsi_host
7192 * @dev: scsi device required for per LUN queries
7193 * @cmd: command opcode
7194 * @buffer: user space buffer for transferring data
7195 *
7196 * Supported commands:
7197 * UFS_IOCTL_QUERY
7198 */
7199static int ufshcd_ioctl(struct scsi_device *dev, int cmd, void __user *buffer)
7200{
7201 struct ufs_hba *hba = shost_priv(dev->host);
7202 int err = 0;
7203
7204 BUG_ON(!hba);
7205 if (!buffer) {
7206 dev_err(hba->dev, "%s: User buffer is NULL!\n", __func__);
7207 return -EINVAL;
7208 }
7209
7210 switch (cmd) {
7211 case UFS_IOCTL_QUERY:
7212 pm_runtime_get_sync(hba->dev);
7213 err = ufshcd_query_ioctl(hba, ufshcd_scsi_to_upiu_lun(dev->lun),
7214 buffer);
7215 pm_runtime_put_sync(hba->dev);
7216 break;
7217 default:
7218 err = -ENOIOCTLCMD;
7219 dev_dbg(hba->dev, "%s: Unsupported ioctl cmd %d\n", __func__,
7220 cmd);
7221 break;
7222 }
7223
7224 return err;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307225}
7226
Yaniv Gardif550c652016-03-10 17:37:07 +02007227static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
7228{
7229 unsigned long flags;
7230 struct Scsi_Host *host;
7231 struct ufs_hba *hba;
7232 int index;
7233 bool found = false;
7234
7235 if (!scmd || !scmd->device || !scmd->device->host)
7236 return BLK_EH_NOT_HANDLED;
7237
7238 host = scmd->device->host;
7239 hba = shost_priv(host);
7240 if (!hba)
7241 return BLK_EH_NOT_HANDLED;
7242
7243 spin_lock_irqsave(host->host_lock, flags);
7244
7245 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
7246 if (hba->lrb[index].cmd == scmd) {
7247 found = true;
7248 break;
7249 }
7250 }
7251
7252 spin_unlock_irqrestore(host->host_lock, flags);
7253
7254 /*
7255 * Bypass SCSI error handling and reset the block layer timer if this
7256 * SCSI command was not actually dispatched to UFS driver, otherwise
7257 * let SCSI layer handle the error as usual.
7258 */
7259 return found ? BLK_EH_NOT_HANDLED : BLK_EH_RESET_TIMER;
7260}
7261
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307262static struct scsi_host_template ufshcd_driver_template = {
7263 .module = THIS_MODULE,
7264 .name = UFSHCD,
7265 .proc_name = UFSHCD,
7266 .queuecommand = ufshcd_queuecommand,
7267 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09007268 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307269 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03007270 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307271 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307272 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
7273 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Yaniv Gardif550c652016-03-10 17:37:07 +02007274 .eh_timed_out = ufshcd_eh_timed_out,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007275 .ioctl = ufshcd_ioctl,
7276#ifdef CONFIG_COMPAT
7277 .compat_ioctl = ufshcd_ioctl,
7278#endif
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307279 .this_id = -1,
7280 .sg_tablesize = SG_ALL,
7281 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
7282 .can_queue = UFSHCD_CAN_QUEUE,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007283 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01007284 .track_queue_depth = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307285};
7286
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007287static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
7288 int ua)
7289{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007290 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007291
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007292 if (!vreg)
7293 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007294
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007295 ret = regulator_set_load(vreg->reg, ua);
7296 if (ret < 0) {
7297 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
7298 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007299 }
7300
7301 return ret;
7302}
7303
7304static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7305 struct ufs_vreg *vreg)
7306{
Yaniv Gardi60f01872016-03-10 17:37:11 +02007307 if (!vreg)
7308 return 0;
7309 else if (vreg->unused)
7310 return 0;
7311 else
7312 return ufshcd_config_vreg_load(hba->dev, vreg,
7313 UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007314}
7315
7316static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7317 struct ufs_vreg *vreg)
7318{
Yaniv Gardi60f01872016-03-10 17:37:11 +02007319 if (!vreg)
7320 return 0;
7321 else if (vreg->unused)
7322 return 0;
7323 else
7324 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007325}
7326
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007327static int ufshcd_config_vreg(struct device *dev,
7328 struct ufs_vreg *vreg, bool on)
7329{
7330 int ret = 0;
7331 struct regulator *reg = vreg->reg;
7332 const char *name = vreg->name;
7333 int min_uV, uA_load;
7334
7335 BUG_ON(!vreg);
7336
7337 if (regulator_count_voltages(reg) > 0) {
7338 min_uV = on ? vreg->min_uV : 0;
7339 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7340 if (ret) {
7341 dev_err(dev, "%s: %s set voltage failed, err=%d\n",
7342 __func__, name, ret);
7343 goto out;
7344 }
7345
7346 uA_load = on ? vreg->max_uA : 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007347 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7348 if (ret)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007349 goto out;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007350 }
7351out:
7352 return ret;
7353}
7354
7355static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7356{
7357 int ret = 0;
7358
Yaniv Gardi60f01872016-03-10 17:37:11 +02007359 if (!vreg)
7360 goto out;
7361 else if (vreg->enabled || vreg->unused)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007362 goto out;
7363
7364 ret = ufshcd_config_vreg(dev, vreg, true);
7365 if (!ret)
7366 ret = regulator_enable(vreg->reg);
7367
7368 if (!ret)
7369 vreg->enabled = true;
7370 else
7371 dev_err(dev, "%s: %s enable failed, err=%d\n",
7372 __func__, vreg->name, ret);
7373out:
7374 return ret;
7375}
7376
7377static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7378{
7379 int ret = 0;
7380
Yaniv Gardi60f01872016-03-10 17:37:11 +02007381 if (!vreg)
7382 goto out;
7383 else if (!vreg->enabled || vreg->unused)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007384 goto out;
7385
7386 ret = regulator_disable(vreg->reg);
7387
7388 if (!ret) {
7389 /* ignore errors on applying disable config */
7390 ufshcd_config_vreg(dev, vreg, false);
7391 vreg->enabled = false;
7392 } else {
7393 dev_err(dev, "%s: %s disable failed, err=%d\n",
7394 __func__, vreg->name, ret);
7395 }
7396out:
7397 return ret;
7398}
7399
7400static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7401{
7402 int ret = 0;
7403 struct device *dev = hba->dev;
7404 struct ufs_vreg_info *info = &hba->vreg_info;
7405
7406 if (!info)
7407 goto out;
7408
7409 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7410 if (ret)
7411 goto out;
7412
7413 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7414 if (ret)
7415 goto out;
7416
7417 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7418 if (ret)
7419 goto out;
7420
7421out:
7422 if (ret) {
7423 ufshcd_toggle_vreg(dev, info->vccq2, false);
7424 ufshcd_toggle_vreg(dev, info->vccq, false);
7425 ufshcd_toggle_vreg(dev, info->vcc, false);
7426 }
7427 return ret;
7428}
7429
Raviv Shvili6a771a62014-09-25 15:32:24 +03007430static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7431{
7432 struct ufs_vreg_info *info = &hba->vreg_info;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007433 int ret = 0;
Raviv Shvili6a771a62014-09-25 15:32:24 +03007434
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007435 if (info->vdd_hba) {
7436 ret = ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007437
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007438 if (!ret)
7439 ufshcd_vops_update_sec_cfg(hba, on);
7440 }
7441
7442 return ret;
Raviv Shvili6a771a62014-09-25 15:32:24 +03007443}
7444
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007445static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7446{
7447 int ret = 0;
7448
7449 if (!vreg)
7450 goto out;
7451
7452 vreg->reg = devm_regulator_get(dev, vreg->name);
7453 if (IS_ERR(vreg->reg)) {
7454 ret = PTR_ERR(vreg->reg);
7455 dev_err(dev, "%s: %s get failed, err=%d\n",
7456 __func__, vreg->name, ret);
7457 }
7458out:
7459 return ret;
7460}
7461
7462static int ufshcd_init_vreg(struct ufs_hba *hba)
7463{
7464 int ret = 0;
7465 struct device *dev = hba->dev;
7466 struct ufs_vreg_info *info = &hba->vreg_info;
7467
7468 if (!info)
7469 goto out;
7470
7471 ret = ufshcd_get_vreg(dev, info->vcc);
7472 if (ret)
7473 goto out;
7474
7475 ret = ufshcd_get_vreg(dev, info->vccq);
7476 if (ret)
7477 goto out;
7478
7479 ret = ufshcd_get_vreg(dev, info->vccq2);
7480out:
7481 return ret;
7482}
7483
Raviv Shvili6a771a62014-09-25 15:32:24 +03007484static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7485{
7486 struct ufs_vreg_info *info = &hba->vreg_info;
7487
7488 if (info)
7489 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7490
7491 return 0;
7492}
7493
Yaniv Gardi60f01872016-03-10 17:37:11 +02007494static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused)
7495{
7496 int ret = 0;
7497 struct ufs_vreg_info *info = &hba->vreg_info;
7498
7499 if (!info)
7500 goto out;
7501 else if (!info->vccq)
7502 goto out;
7503
7504 if (unused) {
7505 /* shut off the rail here */
7506 ret = ufshcd_toggle_vreg(hba->dev, info->vccq, false);
7507 /*
7508 * Mark this rail as no longer used, so it doesn't get enabled
7509 * later by mistake
7510 */
7511 if (!ret)
7512 info->vccq->unused = true;
7513 } else {
7514 /*
7515 * rail should have been already enabled hence just make sure
7516 * that unused flag is cleared.
7517 */
7518 info->vccq->unused = false;
7519 }
7520out:
7521 return ret;
7522}
7523
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007524static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7525 bool skip_ref_clk, bool is_gating_context)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007526{
7527 int ret = 0;
7528 struct ufs_clk_info *clki;
7529 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007530 unsigned long flags;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007531 ktime_t start = ktime_get();
7532 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007533
7534 if (!head || list_empty(head))
7535 goto out;
7536
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007537 /*
7538 * vendor specific setup_clocks ops may depend on clocks managed by
7539 * this standard driver hence call the vendor specific setup_clocks
7540 * before disabling the clocks managed here.
7541 */
7542 if (!on) {
7543 ret = ufshcd_vops_setup_clocks(hba, on, is_gating_context);
7544 if (ret)
7545 return ret;
7546 }
7547
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007548 list_for_each_entry(clki, head, list) {
7549 if (!IS_ERR_OR_NULL(clki->clk)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007550 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7551 continue;
7552
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007553 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007554 if (on && !clki->enabled) {
7555 ret = clk_prepare_enable(clki->clk);
7556 if (ret) {
7557 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7558 __func__, clki->name, ret);
7559 goto out;
7560 }
7561 } else if (!on && clki->enabled) {
7562 clk_disable_unprepare(clki->clk);
7563 }
7564 clki->enabled = on;
7565 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7566 clki->name, on ? "en" : "dis");
7567 }
7568 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007569
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007570 /*
7571 * vendor specific setup_clocks ops may depend on clocks managed by
7572 * this standard driver hence call the vendor specific setup_clocks
7573 * after enabling the clocks managed here.
7574 */
7575 if (on)
7576 ret = ufshcd_vops_setup_clocks(hba, on, is_gating_context);
7577
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007578out:
7579 if (ret) {
7580 list_for_each_entry(clki, head, list) {
7581 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7582 clk_disable_unprepare(clki->clk);
7583 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007584 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007585 spin_lock_irqsave(hba->host->host_lock, flags);
7586 hba->clk_gating.state = CLKS_ON;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007587 trace_ufshcd_clk_gating(dev_name(hba->dev),
7588 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007589 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007590 /* restore the secure configuration as clocks are enabled */
7591 ufshcd_vops_update_sec_cfg(hba, true);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007592 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007593
7594 if (clk_state_changed)
7595 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7596 (on ? "on" : "off"),
7597 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007598 return ret;
7599}
7600
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007601static int ufshcd_enable_clocks(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007602{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007603 return ufshcd_setup_clocks(hba, true, false, false);
7604}
7605
7606static int ufshcd_disable_clocks(struct ufs_hba *hba,
7607 bool is_gating_context)
7608{
7609 return ufshcd_setup_clocks(hba, false, false, is_gating_context);
7610}
7611
7612static int ufshcd_disable_clocks_skip_ref_clk(struct ufs_hba *hba,
7613 bool is_gating_context)
7614{
7615 return ufshcd_setup_clocks(hba, false, true, is_gating_context);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007616}
7617
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007618static int ufshcd_init_clocks(struct ufs_hba *hba)
7619{
7620 int ret = 0;
7621 struct ufs_clk_info *clki;
7622 struct device *dev = hba->dev;
7623 struct list_head *head = &hba->clk_list_head;
7624
7625 if (!head || list_empty(head))
7626 goto out;
7627
7628 list_for_each_entry(clki, head, list) {
7629 if (!clki->name)
7630 continue;
7631
7632 clki->clk = devm_clk_get(dev, clki->name);
7633 if (IS_ERR(clki->clk)) {
7634 ret = PTR_ERR(clki->clk);
7635 dev_err(dev, "%s: %s clk get failed, %d\n",
7636 __func__, clki->name, ret);
7637 goto out;
7638 }
7639
7640 if (clki->max_freq) {
7641 ret = clk_set_rate(clki->clk, clki->max_freq);
7642 if (ret) {
7643 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7644 __func__, clki->name,
7645 clki->max_freq, ret);
7646 goto out;
7647 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03007648 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007649 }
7650 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7651 clki->name, clk_get_rate(clki->clk));
7652 }
7653out:
7654 return ret;
7655}
7656
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007657static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7658{
7659 int err = 0;
7660
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007661 if (!hba->var || !hba->var->vops)
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007662 goto out;
7663
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007664 err = ufshcd_vops_init(hba);
7665 if (err)
7666 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007667
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007668 err = ufshcd_vops_setup_regulators(hba, true);
7669 if (err)
7670 goto out_exit;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007671
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007672 goto out;
7673
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007674out_exit:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007675 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007676out:
7677 if (err)
7678 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007679 __func__, ufshcd_get_var_name(hba), err);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007680 return err;
7681}
7682
7683static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7684{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007685 if (!hba->var || !hba->var->vops)
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007686 return;
7687
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007688 ufshcd_vops_setup_regulators(hba, false);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007689
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007690 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007691}
7692
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007693static int ufshcd_hba_init(struct ufs_hba *hba)
7694{
7695 int err;
7696
Raviv Shvili6a771a62014-09-25 15:32:24 +03007697 /*
7698 * Handle host controller power separately from the UFS device power
7699 * rails as it will help controlling the UFS host controller power
7700 * collapse easily which is different than UFS device power collapse.
7701 * Also, enable the host controller power before we go ahead with rest
7702 * of the initialization here.
7703 */
7704 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007705 if (err)
7706 goto out;
7707
Raviv Shvili6a771a62014-09-25 15:32:24 +03007708 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007709 if (err)
7710 goto out;
7711
Raviv Shvili6a771a62014-09-25 15:32:24 +03007712 err = ufshcd_init_clocks(hba);
7713 if (err)
7714 goto out_disable_hba_vreg;
7715
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007716 err = ufshcd_enable_clocks(hba);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007717 if (err)
7718 goto out_disable_hba_vreg;
7719
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007720 err = ufshcd_init_vreg(hba);
7721 if (err)
7722 goto out_disable_clks;
7723
7724 err = ufshcd_setup_vreg(hba, true);
7725 if (err)
7726 goto out_disable_clks;
7727
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007728 err = ufshcd_variant_hba_init(hba);
7729 if (err)
7730 goto out_disable_vreg;
7731
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007732 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007733 goto out;
7734
7735out_disable_vreg:
7736 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007737out_disable_clks:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007738 ufshcd_disable_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007739out_disable_hba_vreg:
7740 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007741out:
7742 return err;
7743}
7744
7745static void ufshcd_hba_exit(struct ufs_hba *hba)
7746{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007747 if (hba->is_powered) {
7748 ufshcd_variant_hba_exit(hba);
7749 ufshcd_setup_vreg(hba, false);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007750 if (ufshcd_is_clkscaling_supported(hba)) {
7751 ufshcd_suspend_clkscaling(hba);
7752 destroy_workqueue(hba->clk_scaling.workq);
7753 }
7754 ufshcd_disable_clocks(hba, false);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007755 ufshcd_setup_hba_vreg(hba, false);
7756 hba->is_powered = false;
7757 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007758}
7759
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007760static int
7761ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307762{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007763 unsigned char cmd[6] = {REQUEST_SENSE,
7764 0,
7765 0,
7766 0,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007767 UFSHCD_REQ_SENSE_SIZE,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007768 0};
7769 char *buffer;
7770 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307771
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007772 buffer = kzalloc(UFSHCD_REQ_SENSE_SIZE, GFP_KERNEL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007773 if (!buffer) {
7774 ret = -ENOMEM;
7775 goto out;
7776 }
7777
7778 ret = scsi_execute_req_flags(sdp, cmd, DMA_FROM_DEVICE, buffer,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007779 UFSHCD_REQ_SENSE_SIZE, NULL,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007780 msecs_to_jiffies(1000), 3, NULL, REQ_PM);
7781 if (ret)
7782 pr_err("%s: failed with err %d\n", __func__, ret);
7783
7784 kfree(buffer);
7785out:
7786 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307787}
7788
7789/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007790 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7791 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307792 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007793 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307794 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007795 * Returns 0 if requested power mode is set successfully
7796 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307797 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007798static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7799 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307800{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007801 unsigned char cmd[6] = { START_STOP };
7802 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007803 struct scsi_device *sdp;
7804 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007805 int ret;
7806
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007807 spin_lock_irqsave(hba->host->host_lock, flags);
7808 sdp = hba->sdev_ufs_device;
7809 if (sdp) {
7810 ret = scsi_device_get(sdp);
7811 if (!ret && !scsi_device_online(sdp)) {
7812 ret = -ENODEV;
7813 scsi_device_put(sdp);
7814 }
7815 } else {
7816 ret = -ENODEV;
7817 }
7818 spin_unlock_irqrestore(hba->host->host_lock, flags);
7819
7820 if (ret)
7821 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007822
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307823 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007824 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7825 * handling, which would wait for host to be resumed. Since we know
7826 * we are functional while we are here, skip host resume in error
7827 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307828 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007829 hba->host->eh_noresume = 1;
7830 if (hba->wlun_dev_clr_ua) {
7831 ret = ufshcd_send_request_sense(hba, sdp);
7832 if (ret)
7833 goto out;
7834 /* Unit attention condition is cleared now */
7835 hba->wlun_dev_clr_ua = false;
7836 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307837
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007838 cmd[4] = pwr_mode << 4;
7839
7840 /*
7841 * Current function would be generally called from the power management
7842 * callbacks hence set the REQ_PM flag so that it doesn't resume the
7843 * already suspended childs.
7844 */
7845 ret = scsi_execute_req_flags(sdp, cmd, DMA_NONE, NULL, 0, &sshdr,
7846 START_STOP_TIMEOUT, 0, NULL, REQ_PM);
7847 if (ret) {
7848 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02007849 "START_STOP failed for power mode: %d, result %x\n",
7850 pwr_mode, ret);
Hannes Reinecke21045512015-01-08 07:43:46 +01007851 if (driver_byte(ret) & DRIVER_SENSE)
7852 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007853 }
7854
7855 if (!ret)
7856 hba->curr_dev_pwr_mode = pwr_mode;
7857out:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007858 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007859 hba->host->eh_noresume = 0;
7860 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307861}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307862
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007863static int ufshcd_link_state_transition(struct ufs_hba *hba,
7864 enum uic_link_state req_link_state,
7865 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307866{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007867 int ret = 0;
7868
7869 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307870 return 0;
7871
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007872 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7873 ret = ufshcd_uic_hibern8_enter(hba);
7874 if (!ret)
7875 ufshcd_set_link_hibern8(hba);
7876 else
7877 goto out;
7878 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307879 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007880 * If autobkops is enabled, link can't be turned off because
7881 * turning off the link would also turn off the device.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307882 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007883 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
7884 (!check_for_bkops || (check_for_bkops &&
7885 !hba->auto_bkops_enabled))) {
7886 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02007887 * Let's make sure that link is in low power mode, we are doing
7888 * this currently by putting the link in Hibern8. Otherway to
7889 * put the link in low power mode is to send the DME end point
7890 * to device and then send the DME reset command to local
7891 * unipro. But putting the link in hibern8 is much faster.
7892 */
7893 ret = ufshcd_uic_hibern8_enter(hba);
7894 if (ret)
7895 goto out;
7896 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007897 * Change controller state to "reset state" which
7898 * should also put the link in off/reset state
7899 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02007900 ufshcd_hba_stop(hba, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007901 /*
7902 * TODO: Check if we need any delay to make sure that
7903 * controller is reset
7904 */
7905 ufshcd_set_link_off(hba);
7906 }
7907
7908out:
7909 return ret;
7910}
7911
7912static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7913{
7914 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02007915 * It seems some UFS devices may keep drawing more than sleep current
7916 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7917 * To avoid this situation, add 2ms delay before putting these UFS
7918 * rails in LPM mode.
7919 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007920 if (!ufshcd_is_link_active(hba))
Yaniv Gardib799fdf2016-03-10 17:37:18 +02007921 usleep_range(2000, 2100);
7922
7923 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007924 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7925 * power.
7926 *
7927 * If UFS device and link is in OFF state, all power supplies (VCC,
7928 * VCCQ, VCCQ2) can be turned off if power on write protect is not
7929 * required. If UFS link is inactive (Hibern8 or OFF state) and device
7930 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7931 *
7932 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7933 * in low power state which would save some power.
7934 */
7935 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7936 !hba->dev_info.is_lu_power_on_wp) {
7937 ufshcd_setup_vreg(hba, false);
7938 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7939 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7940 if (!ufshcd_is_link_active(hba)) {
7941 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7942 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7943 }
7944 }
7945}
7946
7947static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7948{
7949 int ret = 0;
7950
7951 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7952 !hba->dev_info.is_lu_power_on_wp) {
7953 ret = ufshcd_setup_vreg(hba, true);
7954 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007955 if (!ret && !ufshcd_is_link_active(hba)) {
7956 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7957 if (ret)
7958 goto vcc_disable;
7959 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7960 if (ret)
7961 goto vccq_lpm;
7962 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007963 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007964 }
7965 goto out;
7966
7967vccq_lpm:
7968 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7969vcc_disable:
7970 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7971out:
7972 return ret;
7973}
7974
7975static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7976{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007977 if (ufshcd_is_link_off(hba) ||
7978 (ufshcd_is_link_hibern8(hba)
7979 && ufshcd_is_power_collapse_during_hibern8_allowed(hba)))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007980 ufshcd_setup_hba_vreg(hba, false);
7981}
7982
7983static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7984{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007985 if (ufshcd_is_link_off(hba) ||
7986 (ufshcd_is_link_hibern8(hba)
7987 && ufshcd_is_power_collapse_during_hibern8_allowed(hba)))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007988 ufshcd_setup_hba_vreg(hba, true);
7989}
7990
7991/**
7992 * ufshcd_suspend - helper function for suspend operations
7993 * @hba: per adapter instance
7994 * @pm_op: desired low power operation type
7995 *
7996 * This function will try to put the UFS device and link into low power
7997 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7998 * (System PM level).
7999 *
8000 * If this function is called during shutdown, it will make sure that
8001 * both UFS device and UFS link is powered off.
8002 *
8003 * NOTE: UFS device & link must be active before we enter in this function.
8004 *
8005 * Returns 0 for success and non-zero for failure
8006 */
8007static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8008{
8009 int ret = 0;
8010 enum ufs_pm_level pm_lvl;
8011 enum ufs_dev_pwr_mode req_dev_pwr_mode;
8012 enum uic_link_state req_link_state;
8013
8014 hba->pm_op_in_progress = 1;
8015 if (!ufshcd_is_shutdown_pm(pm_op)) {
8016 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
8017 hba->rpm_lvl : hba->spm_lvl;
8018 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
8019 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
8020 } else {
8021 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
8022 req_link_state = UIC_LINK_OFF_STATE;
8023 }
8024
8025 /*
8026 * If we can't transition into any of the low power modes
8027 * just gate the clocks.
8028 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008029 WARN_ON(hba->hibern8_on_idle.is_enabled &&
8030 hba->hibern8_on_idle.active_reqs);
8031 ufshcd_hold_all(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008032 hba->clk_gating.is_suspended = true;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008033 hba->hibern8_on_idle.is_suspended = true;
8034
8035 if (hba->clk_scaling.is_allowed) {
8036 cancel_work_sync(&hba->clk_scaling.suspend_work);
8037 cancel_work_sync(&hba->clk_scaling.resume_work);
8038 ufshcd_suspend_clkscaling(hba);
8039 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008040
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008041 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
8042 req_link_state == UIC_LINK_ACTIVE_STATE) {
8043 goto disable_clks;
8044 }
8045
8046 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
8047 (req_link_state == hba->uic_link_state))
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008048 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008049
8050 /* UFS device & link must be active before we enter in this function */
8051 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
8052 ret = -EINVAL;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008053 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008054 }
8055
8056 if (ufshcd_is_runtime_pm(pm_op)) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03008057 if (ufshcd_can_autobkops_during_suspend(hba)) {
8058 /*
8059 * The device is idle with no requests in the queue,
8060 * allow background operations if bkops status shows
8061 * that performance might be impacted.
8062 */
8063 ret = ufshcd_urgent_bkops(hba);
8064 if (ret)
8065 goto enable_gating;
8066 } else {
8067 /* make sure that auto bkops is disabled */
8068 ufshcd_disable_auto_bkops(hba);
8069 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008070 }
8071
8072 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
8073 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
8074 !ufshcd_is_runtime_pm(pm_op))) {
8075 /* ensure that bkops is disabled */
8076 ufshcd_disable_auto_bkops(hba);
8077 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
8078 if (ret)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008079 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008080 }
8081
8082 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
8083 if (ret)
8084 goto set_dev_active;
8085
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008086 if (ufshcd_is_link_hibern8(hba) &&
8087 ufshcd_is_hibern8_on_idle_allowed(hba))
8088 hba->hibern8_on_idle.state = HIBERN8_ENTERED;
8089
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008090 ufshcd_vreg_set_lpm(hba);
8091
8092disable_clks:
8093 /*
8094 * Call vendor specific suspend callback. As these callbacks may access
8095 * vendor specific host controller register space call them before the
8096 * host clocks are ON.
8097 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008098 ret = ufshcd_vops_suspend(hba, pm_op);
8099 if (ret)
8100 goto set_link_active;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008101
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008102 if (!ufshcd_is_link_active(hba))
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008103 ret = ufshcd_disable_clocks(hba, false);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008104 else
8105 /* If link is active, device ref_clk can't be switched off */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008106 ret = ufshcd_disable_clocks_skip_ref_clk(hba, false);
8107 if (ret)
8108 goto set_link_active;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008109
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008110 if (ufshcd_is_clkgating_allowed(hba)) {
8111 hba->clk_gating.state = CLKS_OFF;
8112 trace_ufshcd_clk_gating(dev_name(hba->dev),
8113 hba->clk_gating.state);
8114 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008115 /*
8116 * Disable the host irq as host controller as there won't be any
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008117 * host controller transaction expected till resume.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008118 */
8119 ufshcd_disable_irq(hba);
8120 /* Put the host controller in low power mode if possible */
8121 ufshcd_hba_vreg_set_lpm(hba);
8122 goto out;
8123
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008124set_link_active:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008125 if (hba->clk_scaling.is_allowed)
8126 ufshcd_resume_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008127 ufshcd_vreg_set_hpm(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008128 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008129 ufshcd_set_link_active(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008130 } else if (ufshcd_is_link_off(hba)) {
8131 ufshcd_update_error_stats(hba, UFS_ERR_VOPS_SUSPEND);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008132 ufshcd_host_reset_and_restore(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008133 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008134set_dev_active:
8135 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
8136 ufshcd_disable_auto_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008137enable_gating:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008138 if (hba->clk_scaling.is_allowed)
8139 ufshcd_resume_clkscaling(hba);
8140 hba->hibern8_on_idle.is_suspended = false;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008141 hba->clk_gating.is_suspended = false;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008142 ufshcd_release_all(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008143out:
8144 hba->pm_op_in_progress = 0;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008145
8146 if (ret)
8147 ufshcd_update_error_stats(hba, UFS_ERR_SUSPEND);
8148
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008149 return ret;
8150}
8151
8152/**
8153 * ufshcd_resume - helper function for resume operations
8154 * @hba: per adapter instance
8155 * @pm_op: runtime PM or system PM
8156 *
8157 * This function basically brings the UFS device, UniPro link and controller
8158 * to active state.
8159 *
8160 * Returns 0 for success and non-zero for failure
8161 */
8162static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8163{
8164 int ret;
8165 enum uic_link_state old_link_state;
8166
8167 hba->pm_op_in_progress = 1;
8168 old_link_state = hba->uic_link_state;
8169
8170 ufshcd_hba_vreg_set_hpm(hba);
8171 /* Make sure clocks are enabled before accessing controller */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008172 ret = ufshcd_enable_clocks(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008173 if (ret)
8174 goto out;
8175
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008176 /* enable the host irq as host controller would be active soon */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008177 ufshcd_enable_irq(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008178
8179 ret = ufshcd_vreg_set_hpm(hba);
8180 if (ret)
8181 goto disable_irq_and_vops_clks;
8182
8183 /*
8184 * Call vendor specific resume callback. As these callbacks may access
8185 * vendor specific host controller register space call them when the
8186 * host clocks are ON.
8187 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008188 ret = ufshcd_vops_resume(hba, pm_op);
8189 if (ret)
8190 goto disable_vreg;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008191
8192 if (ufshcd_is_link_hibern8(hba)) {
8193 ret = ufshcd_uic_hibern8_exit(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008194 if (!ret) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008195 ufshcd_set_link_active(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008196 if (ufshcd_is_hibern8_on_idle_allowed(hba))
8197 hba->hibern8_on_idle.state = HIBERN8_EXITED;
8198 } else {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008199 goto vendor_suspend;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008200 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008201 } else if (ufshcd_is_link_off(hba)) {
8202 ret = ufshcd_host_reset_and_restore(hba);
8203 /*
8204 * ufshcd_host_reset_and_restore() should have already
8205 * set the link state as active
8206 */
8207 if (ret || !ufshcd_is_link_active(hba))
8208 goto vendor_suspend;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008209 /* mark link state as hibern8 exited */
8210 if (ufshcd_is_hibern8_on_idle_allowed(hba))
8211 hba->hibern8_on_idle.state = HIBERN8_EXITED;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008212 }
8213
8214 if (!ufshcd_is_ufs_dev_active(hba)) {
8215 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
8216 if (ret)
8217 goto set_old_link_state;
8218 }
8219
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008220 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
8221 ufshcd_enable_auto_bkops(hba);
8222 else
8223 /*
8224 * If BKOPs operations are urgently needed at this moment then
8225 * keep auto-bkops enabled or else disable it.
8226 */
8227 ufshcd_urgent_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008228
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008229 hba->clk_gating.is_suspended = false;
8230 hba->hibern8_on_idle.is_suspended = false;
8231
8232 if (hba->clk_scaling.is_allowed)
8233 ufshcd_resume_clkscaling(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03008234
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008235 /* Schedule clock gating in case of no access to UFS device yet */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008236 ufshcd_release_all(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008237 goto out;
8238
8239set_old_link_state:
8240 ufshcd_link_state_transition(hba, old_link_state, 0);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008241 if (ufshcd_is_link_hibern8(hba) &&
8242 ufshcd_is_hibern8_on_idle_allowed(hba))
8243 hba->hibern8_on_idle.state = HIBERN8_ENTERED;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008244vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008245 ufshcd_vops_suspend(hba, pm_op);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008246disable_vreg:
8247 ufshcd_vreg_set_lpm(hba);
8248disable_irq_and_vops_clks:
8249 ufshcd_disable_irq(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008250 if (hba->clk_scaling.is_allowed)
8251 ufshcd_suspend_clkscaling(hba);
8252 ufshcd_disable_clocks(hba, false);
8253 if (ufshcd_is_clkgating_allowed(hba))
8254 hba->clk_gating.state = CLKS_OFF;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008255out:
8256 hba->pm_op_in_progress = 0;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008257
8258 if (ret)
8259 ufshcd_update_error_stats(hba, UFS_ERR_RESUME);
8260
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008261 return ret;
8262}
8263
8264/**
8265 * ufshcd_system_suspend - system suspend routine
8266 * @hba: per adapter instance
8267 * @pm_op: runtime PM or system PM
8268 *
8269 * Check the description of ufshcd_suspend() function for more details.
8270 *
8271 * Returns 0 for success and non-zero for failure
8272 */
8273int ufshcd_system_suspend(struct ufs_hba *hba)
8274{
8275 int ret = 0;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008276 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008277
8278 if (!hba || !hba->is_powered)
Dolev Raviv233b5942014-10-23 13:25:14 +03008279 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008280
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008281 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
8282 hba->curr_dev_pwr_mode) &&
8283 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
8284 hba->uic_link_state))
8285 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008286
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008287 if (pm_runtime_suspended(hba->dev)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008288 /*
8289 * UFS device and/or UFS link low power states during runtime
8290 * suspend seems to be different than what is expected during
8291 * system suspend. Hence runtime resume the devic & link and
8292 * let the system suspend low power states to take effect.
8293 * TODO: If resume takes longer time, we might have optimize
8294 * it in future by not resuming everything if possible.
8295 */
8296 ret = ufshcd_runtime_resume(hba);
8297 if (ret)
8298 goto out;
8299 }
8300
8301 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
8302out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008303 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
8304 ktime_to_us(ktime_sub(ktime_get(), start)),
8305 hba->curr_dev_pwr_mode, hba->uic_link_state);
Dolev Ravive7850602014-09-25 15:32:36 +03008306 if (!ret)
8307 hba->is_sys_suspended = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008308 return ret;
8309}
8310EXPORT_SYMBOL(ufshcd_system_suspend);
8311
8312/**
8313 * ufshcd_system_resume - system resume routine
8314 * @hba: per adapter instance
8315 *
8316 * Returns 0 for success and non-zero for failure
8317 */
8318
8319int ufshcd_system_resume(struct ufs_hba *hba)
8320{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008321 int ret = 0;
8322 ktime_t start = ktime_get();
8323
8324 if (!hba)
8325 return -EINVAL;
8326
8327 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008328 /*
8329 * Let the runtime resume take care of resuming
8330 * if runtime suspended.
8331 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008332 goto out;
8333 else
8334 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
8335out:
8336 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
8337 ktime_to_us(ktime_sub(ktime_get(), start)),
8338 hba->curr_dev_pwr_mode, hba->uic_link_state);
8339 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008340}
8341EXPORT_SYMBOL(ufshcd_system_resume);
8342
8343/**
8344 * ufshcd_runtime_suspend - runtime suspend routine
8345 * @hba: per adapter instance
8346 *
8347 * Check the description of ufshcd_suspend() function for more details.
8348 *
8349 * Returns 0 for success and non-zero for failure
8350 */
8351int ufshcd_runtime_suspend(struct ufs_hba *hba)
8352{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008353 int ret = 0;
8354 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008355
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008356 if (!hba)
8357 return -EINVAL;
8358
8359 if (!hba->is_powered)
8360 goto out;
8361 else
8362 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
8363out:
8364 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
8365 ktime_to_us(ktime_sub(ktime_get(), start)),
8366 hba->curr_dev_pwr_mode,
8367 hba->uic_link_state);
8368 return ret;
8369
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308370}
8371EXPORT_SYMBOL(ufshcd_runtime_suspend);
8372
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008373/**
8374 * ufshcd_runtime_resume - runtime resume routine
8375 * @hba: per adapter instance
8376 *
8377 * This function basically brings the UFS device, UniPro link and controller
8378 * to active state. Following operations are done in this function:
8379 *
8380 * 1. Turn on all the controller related clocks
8381 * 2. Bring the UniPro link out of Hibernate state
8382 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
8383 * to active state.
8384 * 4. If auto-bkops is enabled on the device, disable it.
8385 *
8386 * So following would be the possible power state after this function return
8387 * successfully:
8388 * S1: UFS device in Active state with VCC rail ON
8389 * UniPro link in Active state
8390 * All the UFS/UniPro controller clocks are ON
8391 *
8392 * Returns 0 for success and non-zero for failure
8393 */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308394int ufshcd_runtime_resume(struct ufs_hba *hba)
8395{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008396 int ret = 0;
8397 ktime_t start = ktime_get();
8398
8399 if (!hba)
8400 return -EINVAL;
8401
8402 if (!hba->is_powered)
8403 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008404 else
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008405 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8406out:
8407 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8408 ktime_to_us(ktime_sub(ktime_get(), start)),
8409 hba->curr_dev_pwr_mode,
8410 hba->uic_link_state);
8411 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308412}
8413EXPORT_SYMBOL(ufshcd_runtime_resume);
8414
8415int ufshcd_runtime_idle(struct ufs_hba *hba)
8416{
8417 return 0;
8418}
8419EXPORT_SYMBOL(ufshcd_runtime_idle);
8420
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008421static inline ssize_t ufshcd_pm_lvl_store(struct device *dev,
8422 struct device_attribute *attr,
8423 const char *buf, size_t count,
8424 bool rpm)
8425{
8426 struct ufs_hba *hba = dev_get_drvdata(dev);
8427 unsigned long flags, value;
8428
8429 if (kstrtoul(buf, 0, &value))
8430 return -EINVAL;
8431
8432 if (value >= UFS_PM_LVL_MAX)
8433 return -EINVAL;
8434
8435 spin_lock_irqsave(hba->host->host_lock, flags);
8436 if (rpm)
8437 hba->rpm_lvl = value;
8438 else
8439 hba->spm_lvl = value;
8440 ufshcd_apply_pm_quirks(hba);
8441 spin_unlock_irqrestore(hba->host->host_lock, flags);
8442 return count;
8443}
8444
8445static ssize_t ufshcd_rpm_lvl_show(struct device *dev,
8446 struct device_attribute *attr, char *buf)
8447{
8448 struct ufs_hba *hba = dev_get_drvdata(dev);
8449 int curr_len;
8450 u8 lvl;
8451
8452 curr_len = snprintf(buf, PAGE_SIZE,
8453 "\nCurrent Runtime PM level [%d] => dev_state [%s] link_state [%s]\n",
8454 hba->rpm_lvl,
8455 ufschd_ufs_dev_pwr_mode_to_string(
8456 ufs_pm_lvl_states[hba->rpm_lvl].dev_state),
8457 ufschd_uic_link_state_to_string(
8458 ufs_pm_lvl_states[hba->rpm_lvl].link_state));
8459
8460 curr_len += snprintf((buf + curr_len), (PAGE_SIZE - curr_len),
8461 "\nAll available Runtime PM levels info:\n");
8462 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++)
8463 curr_len += snprintf((buf + curr_len), (PAGE_SIZE - curr_len),
8464 "\tRuntime PM level [%d] => dev_state [%s] link_state [%s]\n",
8465 lvl,
8466 ufschd_ufs_dev_pwr_mode_to_string(
8467 ufs_pm_lvl_states[lvl].dev_state),
8468 ufschd_uic_link_state_to_string(
8469 ufs_pm_lvl_states[lvl].link_state));
8470
8471 return curr_len;
8472}
8473
8474static ssize_t ufshcd_rpm_lvl_store(struct device *dev,
8475 struct device_attribute *attr, const char *buf, size_t count)
8476{
8477 return ufshcd_pm_lvl_store(dev, attr, buf, count, true);
8478}
8479
8480static void ufshcd_add_rpm_lvl_sysfs_nodes(struct ufs_hba *hba)
8481{
8482 hba->rpm_lvl_attr.show = ufshcd_rpm_lvl_show;
8483 hba->rpm_lvl_attr.store = ufshcd_rpm_lvl_store;
8484 sysfs_attr_init(&hba->rpm_lvl_attr.attr);
8485 hba->rpm_lvl_attr.attr.name = "rpm_lvl";
8486 hba->rpm_lvl_attr.attr.mode = S_IRUGO | S_IWUSR;
8487 if (device_create_file(hba->dev, &hba->rpm_lvl_attr))
8488 dev_err(hba->dev, "Failed to create sysfs for rpm_lvl\n");
8489}
8490
8491static ssize_t ufshcd_spm_lvl_show(struct device *dev,
8492 struct device_attribute *attr, char *buf)
8493{
8494 struct ufs_hba *hba = dev_get_drvdata(dev);
8495 int curr_len;
8496 u8 lvl;
8497
8498 curr_len = snprintf(buf, PAGE_SIZE,
8499 "\nCurrent System PM level [%d] => dev_state [%s] link_state [%s]\n",
8500 hba->spm_lvl,
8501 ufschd_ufs_dev_pwr_mode_to_string(
8502 ufs_pm_lvl_states[hba->spm_lvl].dev_state),
8503 ufschd_uic_link_state_to_string(
8504 ufs_pm_lvl_states[hba->spm_lvl].link_state));
8505
8506 curr_len += snprintf((buf + curr_len), (PAGE_SIZE - curr_len),
8507 "\nAll available System PM levels info:\n");
8508 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++)
8509 curr_len += snprintf((buf + curr_len), (PAGE_SIZE - curr_len),
8510 "\tSystem PM level [%d] => dev_state [%s] link_state [%s]\n",
8511 lvl,
8512 ufschd_ufs_dev_pwr_mode_to_string(
8513 ufs_pm_lvl_states[lvl].dev_state),
8514 ufschd_uic_link_state_to_string(
8515 ufs_pm_lvl_states[lvl].link_state));
8516
8517 return curr_len;
8518}
8519
8520static ssize_t ufshcd_spm_lvl_store(struct device *dev,
8521 struct device_attribute *attr, const char *buf, size_t count)
8522{
8523 return ufshcd_pm_lvl_store(dev, attr, buf, count, false);
8524}
8525
8526static void ufshcd_add_spm_lvl_sysfs_nodes(struct ufs_hba *hba)
8527{
8528 hba->spm_lvl_attr.show = ufshcd_spm_lvl_show;
8529 hba->spm_lvl_attr.store = ufshcd_spm_lvl_store;
8530 sysfs_attr_init(&hba->spm_lvl_attr.attr);
8531 hba->spm_lvl_attr.attr.name = "spm_lvl";
8532 hba->spm_lvl_attr.attr.mode = S_IRUGO | S_IWUSR;
8533 if (device_create_file(hba->dev, &hba->spm_lvl_attr))
8534 dev_err(hba->dev, "Failed to create sysfs for spm_lvl\n");
8535}
8536
8537static inline void ufshcd_add_sysfs_nodes(struct ufs_hba *hba)
8538{
8539 ufshcd_add_rpm_lvl_sysfs_nodes(hba);
8540 ufshcd_add_spm_lvl_sysfs_nodes(hba);
8541}
8542
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308543/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008544 * ufshcd_shutdown - shutdown routine
8545 * @hba: per adapter instance
8546 *
8547 * This function would power off both UFS device and UFS link.
8548 *
8549 * Returns 0 always to allow force shutdown even in case of errors.
8550 */
8551int ufshcd_shutdown(struct ufs_hba *hba)
8552{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008553 /*
8554 * TODO: This function should send the power down notification to
8555 * UFS device and then power off the UFS link. But we need to be sure
8556 * that there will not be any new UFS requests issued after this.
8557 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008558 return 0;
8559}
8560EXPORT_SYMBOL(ufshcd_shutdown);
8561
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -07008562/*
8563 * Values permitted 0, 1, 2.
8564 * 0 -> Disable IO latency histograms (default)
8565 * 1 -> Enable IO latency histograms
8566 * 2 -> Zero out IO latency histograms
8567 */
8568static ssize_t
8569latency_hist_store(struct device *dev, struct device_attribute *attr,
8570 const char *buf, size_t count)
8571{
8572 struct ufs_hba *hba = dev_get_drvdata(dev);
8573 long value;
8574
8575 if (kstrtol(buf, 0, &value))
8576 return -EINVAL;
8577 if (value == BLK_IO_LAT_HIST_ZERO)
8578 blk_zero_latency_hist(&hba->io_lat_s);
8579 else if (value == BLK_IO_LAT_HIST_ENABLE ||
8580 value == BLK_IO_LAT_HIST_DISABLE)
8581 hba->latency_hist_enabled = value;
8582 return count;
8583}
8584
8585ssize_t
8586latency_hist_show(struct device *dev, struct device_attribute *attr,
8587 char *buf)
8588{
8589 struct ufs_hba *hba = dev_get_drvdata(dev);
8590
8591 return blk_latency_hist_show(&hba->io_lat_s, buf);
8592}
8593
8594static DEVICE_ATTR(latency_hist, S_IRUGO | S_IWUSR,
8595 latency_hist_show, latency_hist_store);
8596
8597static void
8598ufshcd_init_latency_hist(struct ufs_hba *hba)
8599{
8600 if (device_create_file(hba->dev, &dev_attr_latency_hist))
8601 dev_err(hba->dev, "Failed to create latency_hist sysfs entry\n");
8602}
8603
8604static void
8605ufshcd_exit_latency_hist(struct ufs_hba *hba)
8606{
8607 device_create_file(hba->dev, &dev_attr_latency_hist);
8608}
8609
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008610/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308611 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308612 * data structure memory
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308613 * @hba - per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308614 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308615void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308616{
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05308617 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308618 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308619 ufshcd_disable_intr(hba, hba->intr_mask);
Yaniv Gardi596585a2016-03-10 17:37:08 +02008620 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308621
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008622 ufshcd_exit_clk_gating(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008623 ufshcd_exit_hibern8_on_idle(hba);
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -07008624 ufshcd_exit_latency_hist(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008625 if (ufshcd_is_clkscaling_supported(hba)) {
8626 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
Kyle Yan65be4a52016-10-31 15:05:00 -07008627 if (hba->devfreq)
8628 devfreq_remove_device(hba->devfreq);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008629 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008630 ufshcd_hba_exit(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008631 ufsdbg_remove_debugfs(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308632}
8633EXPORT_SYMBOL_GPL(ufshcd_remove);
8634
8635/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02008636 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8637 * @hba: pointer to Host Bus Adapter (HBA)
8638 */
8639void ufshcd_dealloc_host(struct ufs_hba *hba)
8640{
8641 scsi_host_put(hba->host);
8642}
8643EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8644
8645/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008646 * ufshcd_set_dma_mask - Set dma mask based on the controller
8647 * addressing capability
8648 * @hba: per adapter instance
8649 *
8650 * Returns 0 for success, non-zero for failure
8651 */
8652static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8653{
8654 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8655 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8656 return 0;
8657 }
8658 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8659}
8660
8661/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008662 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308663 * @dev: pointer to device handle
8664 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308665 * Returns 0 on success, non-zero value on failure
8666 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008667int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308668{
8669 struct Scsi_Host *host;
8670 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008671 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308672
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308673 if (!dev) {
8674 dev_err(dev,
8675 "Invalid memory reference for dev is NULL\n");
8676 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308677 goto out_error;
8678 }
8679
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308680 host = scsi_host_alloc(&ufshcd_driver_template,
8681 sizeof(struct ufs_hba));
8682 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308683 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308684 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308685 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308686 }
8687 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308688 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308689 hba->dev = dev;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008690 *hba_handle = hba;
8691
8692out_error:
8693 return err;
8694}
8695EXPORT_SYMBOL(ufshcd_alloc_host);
8696
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008697/**
8698 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
8699 * @hba: per adapter instance
8700 * @scale_up: True if scaling up and false if scaling down
8701 *
8702 * Returns true if scaling is required, false otherwise.
8703 */
8704static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
8705 bool scale_up)
Sahitya Tummala856b3482014-09-25 15:32:34 +03008706{
Sahitya Tummala856b3482014-09-25 15:32:34 +03008707 struct ufs_clk_info *clki;
8708 struct list_head *head = &hba->clk_list_head;
8709
8710 if (!head || list_empty(head))
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008711 return false;
Yaniv Gardif06fcc72015-10-28 13:15:51 +02008712
Sahitya Tummala856b3482014-09-25 15:32:34 +03008713 list_for_each_entry(clki, head, list) {
8714 if (!IS_ERR_OR_NULL(clki->clk)) {
8715 if (scale_up && clki->max_freq) {
8716 if (clki->curr_freq == clki->max_freq)
8717 continue;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008718 return true;
Sahitya Tummala856b3482014-09-25 15:32:34 +03008719 } else if (!scale_up && clki->min_freq) {
8720 if (clki->curr_freq == clki->min_freq)
8721 continue;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008722 return true;
Sahitya Tummala856b3482014-09-25 15:32:34 +03008723 }
8724 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03008725 }
Yaniv Gardif06fcc72015-10-28 13:15:51 +02008726
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008727 return false;
8728}
Yaniv Gardif06fcc72015-10-28 13:15:51 +02008729
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008730/**
8731 * ufshcd_scale_gear - scale up/down UFS gear
8732 * @hba: per adapter instance
8733 * @scale_up: True for scaling up gear and false for scaling down
8734 *
8735 * Returns 0 for success,
8736 * Returns -EBUSY if scaling can't happen at this time
8737 * Returns non-zero for any other errors
8738 */
8739static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
8740{
8741 int ret = 0;
8742 struct ufs_pa_layer_attr new_pwr_info;
8743 u32 scale_down_gear = ufshcd_vops_get_scale_down_gear(hba);
8744
8745 BUG_ON(!hba->clk_scaling.saved_pwr_info.is_valid);
8746
8747 if (scale_up) {
8748 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
8749 sizeof(struct ufs_pa_layer_attr));
8750 } else {
8751 memcpy(&new_pwr_info, &hba->pwr_info,
8752 sizeof(struct ufs_pa_layer_attr));
8753
8754 if (hba->pwr_info.gear_tx > scale_down_gear
8755 || hba->pwr_info.gear_rx > scale_down_gear) {
8756 /* save the current power mode */
8757 memcpy(&hba->clk_scaling.saved_pwr_info.info,
8758 &hba->pwr_info,
8759 sizeof(struct ufs_pa_layer_attr));
8760
8761 /* scale down gear */
8762 new_pwr_info.gear_tx = scale_down_gear;
8763 new_pwr_info.gear_rx = scale_down_gear;
8764 if (!(hba->dev_quirks & UFS_DEVICE_NO_FASTAUTO)) {
8765 new_pwr_info.pwr_tx = FASTAUTO_MODE;
8766 new_pwr_info.pwr_rx = FASTAUTO_MODE;
8767 }
8768 }
8769 }
8770
8771 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
8772
8773 if (ret)
8774 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d), scale_up = %d",
8775 __func__, ret,
8776 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
8777 new_pwr_info.gear_tx, new_pwr_info.gear_rx,
8778 scale_up);
8779
Sahitya Tummala856b3482014-09-25 15:32:34 +03008780 return ret;
8781}
8782
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008783static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
8784{
8785 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
8786 int ret = 0;
8787 /*
8788 * make sure that there are no outstanding requests when
8789 * clock scaling is in progress
8790 */
8791 ufshcd_scsi_block_requests(hba);
8792 down_write(&hba->clk_scaling_lock);
8793 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
8794 ret = -EBUSY;
8795 up_write(&hba->clk_scaling_lock);
8796 ufshcd_scsi_unblock_requests(hba);
8797 }
8798
8799 return ret;
8800}
8801
8802static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
8803{
8804 up_write(&hba->clk_scaling_lock);
8805 ufshcd_scsi_unblock_requests(hba);
8806}
8807
8808/**
8809 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
8810 * @hba: per adapter instance
8811 * @scale_up: True for scaling up and false for scalin down
8812 *
8813 * Returns 0 for success,
8814 * Returns -EBUSY if scaling can't happen at this time
8815 * Returns non-zero for any other errors
8816 */
8817static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
8818{
8819 int ret = 0;
8820
8821 /* let's not get into low power until clock scaling is completed */
8822 ufshcd_hold_all(hba);
8823
8824 ret = ufshcd_clock_scaling_prepare(hba);
8825 if (ret)
8826 goto out;
8827
8828 /* scale down the gear before scaling down clocks */
8829 if (!scale_up) {
8830 ret = ufshcd_scale_gear(hba, false);
8831 if (ret)
8832 goto clk_scaling_unprepare;
8833 }
8834
8835 ret = ufshcd_scale_clks(hba, scale_up);
8836 if (ret)
8837 goto scale_up_gear;
8838
8839 /* scale up the gear after scaling up clocks */
8840 if (scale_up) {
8841 ret = ufshcd_scale_gear(hba, true);
8842 if (ret) {
8843 ufshcd_scale_clks(hba, false);
8844 goto clk_scaling_unprepare;
8845 }
8846 }
8847
8848 if (!ret) {
8849 hba->clk_scaling.is_scaled_up = scale_up;
8850 if (scale_up)
8851 hba->clk_gating.delay_ms =
8852 hba->clk_gating.delay_ms_perf;
8853 else
8854 hba->clk_gating.delay_ms =
8855 hba->clk_gating.delay_ms_pwr_save;
8856 }
8857
8858 goto clk_scaling_unprepare;
8859
8860scale_up_gear:
8861 if (!scale_up)
8862 ufshcd_scale_gear(hba, true);
8863clk_scaling_unprepare:
8864 ufshcd_clock_scaling_unprepare(hba);
8865out:
8866 ufshcd_release_all(hba);
8867 return ret;
8868}
8869
8870static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
8871{
8872 unsigned long flags;
8873
8874 devfreq_suspend_device(hba->devfreq);
8875 spin_lock_irqsave(hba->host->host_lock, flags);
8876 hba->clk_scaling.window_start_t = 0;
8877 spin_unlock_irqrestore(hba->host->host_lock, flags);
8878}
8879
8880static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
8881{
8882 unsigned long flags;
8883 bool suspend = false;
8884
8885 if (!ufshcd_is_clkscaling_supported(hba))
8886 return;
8887
8888 spin_lock_irqsave(hba->host->host_lock, flags);
8889 if (!hba->clk_scaling.is_suspended) {
8890 suspend = true;
8891 hba->clk_scaling.is_suspended = true;
8892 }
8893 spin_unlock_irqrestore(hba->host->host_lock, flags);
8894
8895 if (suspend)
8896 __ufshcd_suspend_clkscaling(hba);
8897}
8898
8899static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
8900{
8901 unsigned long flags;
8902 bool resume = false;
8903
8904 if (!ufshcd_is_clkscaling_supported(hba))
8905 return;
8906
8907 spin_lock_irqsave(hba->host->host_lock, flags);
8908 if (hba->clk_scaling.is_suspended) {
8909 resume = true;
8910 hba->clk_scaling.is_suspended = false;
8911 }
8912 spin_unlock_irqrestore(hba->host->host_lock, flags);
8913
8914 if (resume)
8915 devfreq_resume_device(hba->devfreq);
8916}
8917
8918static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
8919 struct device_attribute *attr, char *buf)
8920{
8921 struct ufs_hba *hba = dev_get_drvdata(dev);
8922
8923 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
8924}
8925
8926static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
8927 struct device_attribute *attr, const char *buf, size_t count)
8928{
8929 struct ufs_hba *hba = dev_get_drvdata(dev);
8930 u32 value;
8931 int err;
8932
8933 if (kstrtou32(buf, 0, &value))
8934 return -EINVAL;
8935
8936 value = !!value;
8937 if (value == hba->clk_scaling.is_allowed)
8938 goto out;
8939
8940 pm_runtime_get_sync(hba->dev);
8941 ufshcd_hold(hba, false);
8942
8943 cancel_work_sync(&hba->clk_scaling.suspend_work);
8944 cancel_work_sync(&hba->clk_scaling.resume_work);
8945
8946 hba->clk_scaling.is_allowed = value;
8947
8948 if (value) {
8949 ufshcd_resume_clkscaling(hba);
8950 } else {
8951 ufshcd_suspend_clkscaling(hba);
8952 err = ufshcd_devfreq_scale(hba, true);
8953 if (err)
8954 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
8955 __func__, err);
8956 }
8957
8958 ufshcd_release(hba, false);
8959 pm_runtime_put_sync(hba->dev);
8960out:
8961 return count;
8962}
8963
8964static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
8965{
8966 struct ufs_hba *hba = container_of(work, struct ufs_hba,
8967 clk_scaling.suspend_work);
8968 unsigned long irq_flags;
8969
8970 spin_lock_irqsave(hba->host->host_lock, irq_flags);
8971 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
8972 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
8973 return;
8974 }
8975 hba->clk_scaling.is_suspended = true;
8976 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
8977
8978 __ufshcd_suspend_clkscaling(hba);
8979}
8980
8981static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
8982{
8983 struct ufs_hba *hba = container_of(work, struct ufs_hba,
8984 clk_scaling.resume_work);
8985 unsigned long irq_flags;
8986
8987 spin_lock_irqsave(hba->host->host_lock, irq_flags);
8988 if (!hba->clk_scaling.is_suspended) {
8989 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
8990 return;
8991 }
8992 hba->clk_scaling.is_suspended = false;
8993 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
8994
8995 devfreq_resume_device(hba->devfreq);
8996}
8997
Sahitya Tummala856b3482014-09-25 15:32:34 +03008998static int ufshcd_devfreq_target(struct device *dev,
8999 unsigned long *freq, u32 flags)
9000{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009001 int ret = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03009002 struct ufs_hba *hba = dev_get_drvdata(dev);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009003 unsigned long irq_flags;
9004 ktime_t start;
9005 bool scale_up, sched_clk_scaling_suspend_work = false;
Sahitya Tummala856b3482014-09-25 15:32:34 +03009006
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009007 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03009008 return -EINVAL;
9009
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009010 if ((*freq > 0) && (*freq < UINT_MAX)) {
9011 dev_err(hba->dev, "%s: invalid freq = %lu\n", __func__, *freq);
9012 return -EINVAL;
9013 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03009014
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009015 spin_lock_irqsave(hba->host->host_lock, irq_flags);
9016 if (ufshcd_eh_in_progress(hba)) {
9017 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
9018 return 0;
9019 }
9020
9021 if (!hba->clk_scaling.active_reqs)
9022 sched_clk_scaling_suspend_work = true;
9023
9024 scale_up = (*freq == UINT_MAX) ? true : false;
9025 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
9026 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
9027 ret = 0;
9028 goto out; /* no state change required */
9029 }
9030 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
9031
9032 start = ktime_get();
9033 ret = ufshcd_devfreq_scale(hba, scale_up);
9034 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
9035 (scale_up ? "up" : "down"),
9036 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
9037
9038out:
9039 if (sched_clk_scaling_suspend_work)
9040 queue_work(hba->clk_scaling.workq,
9041 &hba->clk_scaling.suspend_work);
9042
9043 return ret;
Sahitya Tummala856b3482014-09-25 15:32:34 +03009044}
9045
9046static int ufshcd_devfreq_get_dev_status(struct device *dev,
9047 struct devfreq_dev_status *stat)
9048{
9049 struct ufs_hba *hba = dev_get_drvdata(dev);
9050 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
9051 unsigned long flags;
9052
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009053 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03009054 return -EINVAL;
9055
9056 memset(stat, 0, sizeof(*stat));
9057
9058 spin_lock_irqsave(hba->host->host_lock, flags);
9059 if (!scaling->window_start_t)
9060 goto start_window;
9061
9062 if (scaling->is_busy_started)
9063 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
9064 scaling->busy_start_t));
9065
9066 stat->total_time = jiffies_to_usecs((long)jiffies -
9067 (long)scaling->window_start_t);
9068 stat->busy_time = scaling->tot_busy_t;
9069start_window:
9070 scaling->window_start_t = jiffies;
9071 scaling->tot_busy_t = 0;
9072
9073 if (hba->outstanding_reqs) {
9074 scaling->busy_start_t = ktime_get();
9075 scaling->is_busy_started = true;
9076 } else {
9077 scaling->busy_start_t = ktime_set(0, 0);
9078 scaling->is_busy_started = false;
9079 }
9080 spin_unlock_irqrestore(hba->host->host_lock, flags);
9081 return 0;
9082}
9083
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009084#if IS_ENABLED(CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND)
9085static struct devfreq_simple_ondemand_data ufshcd_ondemand_data = {
9086 .upthreshold = 35,
9087 .downdifferential = 30,
9088 .simple_scaling = 1,
9089};
9090
9091static void *gov_data = &ufshcd_ondemand_data;
9092#else
9093static void *gov_data;
9094#endif
9095
Sahitya Tummala856b3482014-09-25 15:32:34 +03009096static struct devfreq_dev_profile ufs_devfreq_profile = {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009097 .polling_ms = 40,
Sahitya Tummala856b3482014-09-25 15:32:34 +03009098 .target = ufshcd_devfreq_target,
9099 .get_dev_status = ufshcd_devfreq_get_dev_status,
9100};
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009101static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
9102{
9103 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
9104 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
9105 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
9106 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
9107 hba->clk_scaling.enable_attr.attr.mode = S_IRUGO | S_IWUSR;
9108 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
9109 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
9110}
Sahitya Tummala856b3482014-09-25 15:32:34 +03009111
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009112static void ufshcd_init_lanes_per_dir(struct ufs_hba *hba)
9113{
9114 struct device *dev = hba->dev;
9115 int ret;
9116
9117 ret = of_property_read_u32(dev->of_node, "lanes-per-direction",
9118 &hba->lanes_per_direction);
9119 if (ret) {
9120 dev_dbg(hba->dev,
9121 "%s: failed to read lanes-per-direction, ret=%d\n",
9122 __func__, ret);
9123 hba->lanes_per_direction = UFSHCD_DEFAULT_LANES_PER_DIRECTION;
9124 }
9125}
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009126/**
9127 * ufshcd_init - Driver initialization routine
9128 * @hba: per-adapter instance
9129 * @mmio_base: base register address
9130 * @irq: Interrupt line of device
9131 * Returns 0 on success, non-zero value on failure
9132 */
9133int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
9134{
9135 int err;
9136 struct Scsi_Host *host = hba->host;
9137 struct device *dev = hba->dev;
9138
9139 if (!mmio_base) {
9140 dev_err(hba->dev,
9141 "Invalid memory reference for mmio_base is NULL\n");
9142 err = -ENODEV;
9143 goto out_error;
9144 }
9145
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309146 hba->mmio_base = mmio_base;
9147 hba->irq = irq;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309148
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009149 ufshcd_init_lanes_per_dir(hba);
9150
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03009151 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009152 if (err)
9153 goto out_error;
9154
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309155 /* Read capabilities registers */
9156 ufshcd_hba_capabilities(hba);
9157
9158 /* Get UFS version supported by the controller */
9159 hba->ufs_version = ufshcd_get_ufs_version(hba);
9160
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009161 /* print error message if ufs_version is not valid */
9162 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
9163 (hba->ufs_version != UFSHCI_VERSION_11) &&
9164 (hba->ufs_version != UFSHCI_VERSION_20) &&
9165 (hba->ufs_version != UFSHCI_VERSION_21))
9166 dev_err(hba->dev, "invalid UFS version 0x%x\n",
9167 hba->ufs_version);
9168
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05309169 /* Get Interrupt bit mask per version */
9170 hba->intr_mask = ufshcd_get_intr_mask(hba);
9171
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009172 /* Enable debug prints */
9173 hba->ufshcd_dbg_print = DEFAULT_UFSHCD_DBG_PRINT_EN;
9174
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09009175 err = ufshcd_set_dma_mask(hba);
9176 if (err) {
9177 dev_err(hba->dev, "set dma mask failed\n");
9178 goto out_disable;
9179 }
9180
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309181 /* Allocate memory for host memory space */
9182 err = ufshcd_memory_alloc(hba);
9183 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309184 dev_err(hba->dev, "Memory allocation failed\n");
9185 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309186 }
9187
9188 /* Configure LRB */
9189 ufshcd_host_memory_configure(hba);
9190
9191 host->can_queue = hba->nutrs;
9192 host->cmd_per_lun = hba->nutrs;
9193 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03009194 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309195 host->max_channel = UFSHCD_MAX_CHANNEL;
9196 host->unique_id = host->host_no;
9197 host->max_cmd_len = MAX_CDB_SIZE;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009198 host->set_dbd_for_caching = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309199
Dolev Raviv7eb584d2014-09-25 15:32:31 +03009200 hba->max_pwr_info.is_valid = false;
9201
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309202 /* Initailize wait queue for task management */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05309203 init_waitqueue_head(&hba->tm_wq);
9204 init_waitqueue_head(&hba->tm_tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309205
9206 /* Initialize work queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05309207 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309208 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309209
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309210 /* Initialize UIC command mutex */
9211 mutex_init(&hba->uic_cmd_mutex);
9212
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05309213 /* Initialize mutex for device management commands */
9214 mutex_init(&hba->dev_cmd.lock);
9215
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009216 init_rwsem(&hba->clk_scaling_lock);
9217
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05309218 /* Initialize device management tag acquire wait queue */
9219 init_waitqueue_head(&hba->dev_cmd.tag_wq);
9220
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009221 ufshcd_init_clk_gating(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009222 ufshcd_init_hibern8_on_idle(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02009223
9224 /*
9225 * In order to avoid any spurious interrupt immediately after
9226 * registering UFS controller interrupt handler, clear any pending UFS
9227 * interrupt status and disable all the UFS interrupts.
9228 */
9229 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
9230 REG_INTERRUPT_STATUS);
9231 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
9232 /*
9233 * Make sure that UFS interrupts are disabled and any pending interrupt
9234 * status is cleared before registering UFS interrupt handler.
9235 */
9236 mb();
9237
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309238 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09009239 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309240 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309241 dev_err(hba->dev, "request irq failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009242 goto exit_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009243 } else {
9244 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309245 }
9246
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309247 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309248 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309249 dev_err(hba->dev, "scsi_add_host failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009250 goto exit_gating;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309251 }
9252
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309253 /* Host controller enable */
9254 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309255 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309256 dev_err(hba->dev, "Host controller enable failed\n");
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009257 ufshcd_print_host_regs(hba);
9258 ufshcd_print_host_state(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309259 goto out_remove_scsi_host;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309260 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309261
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009262 if (ufshcd_is_clkscaling_supported(hba)) {
9263 char wq_name[sizeof("ufs_clkscaling_00")];
9264
Sahitya Tummala856b3482014-09-25 15:32:34 +03009265 hba->devfreq = devfreq_add_device(dev, &ufs_devfreq_profile,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009266 "simple_ondemand", gov_data);
Sahitya Tummala856b3482014-09-25 15:32:34 +03009267 if (IS_ERR(hba->devfreq)) {
9268 dev_err(hba->dev, "Unable to register with devfreq %ld\n",
9269 PTR_ERR(hba->devfreq));
Wei Yongjun73811c92016-09-28 14:49:42 +00009270 err = PTR_ERR(hba->devfreq);
Sahitya Tummala856b3482014-09-25 15:32:34 +03009271 goto out_remove_scsi_host;
9272 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009273 hba->clk_scaling.is_suspended = false;
9274
9275 INIT_WORK(&hba->clk_scaling.suspend_work,
9276 ufshcd_clk_scaling_suspend_work);
9277 INIT_WORK(&hba->clk_scaling.resume_work,
9278 ufshcd_clk_scaling_resume_work);
9279
9280 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clkscaling_%d",
9281 host->host_no);
9282 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
9283
Sahitya Tummala856b3482014-09-25 15:32:34 +03009284 /* Suspend devfreq until the UFS device is detected */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009285 ufshcd_suspend_clkscaling(hba);
9286 ufshcd_clkscaling_init_sysfs(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03009287 }
9288
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009289 /*
9290 * If rpm_lvl and and spm_lvl are not already set to valid levels,
9291 * set the default power management level for UFS runtime and system
9292 * suspend. Default power saving mode selected is keeping UFS link in
9293 * Hibern8 state and UFS device in sleep.
9294 */
9295 if (!ufshcd_is_valid_pm_lvl(hba->rpm_lvl))
9296 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9297 UFS_SLEEP_PWR_MODE,
9298 UIC_LINK_HIBERN8_STATE);
9299 if (!ufshcd_is_valid_pm_lvl(hba->spm_lvl))
9300 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9301 UFS_SLEEP_PWR_MODE,
9302 UIC_LINK_HIBERN8_STATE);
9303
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05309304 /* Hold auto suspend until async scan completes */
9305 pm_runtime_get_sync(dev);
9306
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -07009307 ufshcd_init_latency_hist(hba);
9308
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009309 /*
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009310 * We are assuming that device wasn't put in sleep/power-down
9311 * state exclusively during the boot stage before kernel.
9312 * This assumption helps avoid doing link startup twice during
9313 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009314 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009315 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009316
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309317 async_schedule(ufshcd_async_scan, hba);
9318
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009319 ufsdbg_add_debugfs(hba);
9320
9321 ufshcd_add_sysfs_nodes(hba);
9322
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309323 return 0;
9324
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309325out_remove_scsi_host:
9326 scsi_remove_host(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009327exit_gating:
9328 ufshcd_exit_clk_gating(hba);
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -07009329 ufshcd_exit_latency_hist(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309330out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009331 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03009332 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309333out_error:
9334 return err;
9335}
9336EXPORT_SYMBOL_GPL(ufshcd_init);
9337
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309338MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
9339MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05309340MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309341MODULE_LICENSE("GPL");
9342MODULE_VERSION(UFSHCD_DRIVER_VERSION);