Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 1 | /* |
Michal Simek | 968674b | 2013-08-27 10:48:29 +0200 | [diff] [blame] | 2 | * Copyright (C) 2007-2013 Michal Simek <monstr@monstr.eu> |
| 3 | * Copyright (C) 2012-2013 Xilinx, Inc. |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 4 | * Copyright (C) 2007-2009 PetaLogix |
| 5 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 6 | * |
| 7 | * This file is subject to the terms and conditions of the GNU General Public |
| 8 | * License. See the file "COPYING" in the main directory of this archive |
| 9 | * for more details. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/init.h> |
Grant Likely | 2462bac | 2012-01-26 14:10:13 -0700 | [diff] [blame] | 13 | #include <linux/irqdomain.h> |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 14 | #include <linux/irq.h> |
| 15 | #include <asm/page.h> |
| 16 | #include <linux/io.h> |
John Williams | 892ee92 | 2009-07-29 22:08:40 +1000 | [diff] [blame] | 17 | #include <linux/bug.h> |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 18 | |
| 19 | #include <asm/prom.h> |
| 20 | #include <asm/irq.h> |
Michal Simek | 8a9e90a | 2013-08-27 10:49:00 +0200 | [diff] [blame^] | 21 | #include "../../drivers/irqchip/irqchip.h" |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 22 | |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 23 | static unsigned int intc_baseaddr; |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 24 | |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 25 | /* No one else should require these constants, so define them locally here. */ |
| 26 | #define ISR 0x00 /* Interrupt Status Register */ |
| 27 | #define IPR 0x04 /* Interrupt Pending Register */ |
| 28 | #define IER 0x08 /* Interrupt Enable Register */ |
| 29 | #define IAR 0x0c /* Interrupt Acknowledge Register */ |
| 30 | #define SIE 0x10 /* Set Interrupt Enable bits */ |
| 31 | #define CIE 0x14 /* Clear Interrupt Enable bits */ |
| 32 | #define IVR 0x18 /* Interrupt Vector Register */ |
| 33 | #define MER 0x1c /* Master Enable Register */ |
| 34 | |
| 35 | #define MER_ME (1<<0) |
| 36 | #define MER_HIE (1<<1) |
| 37 | |
Thomas Gleixner | 6f205a4 | 2011-02-06 19:36:30 +0000 | [diff] [blame] | 38 | static void intc_enable_or_unmask(struct irq_data *d) |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 39 | { |
Michal Simek | 6c7a267 | 2011-12-09 10:45:20 +0100 | [diff] [blame] | 40 | unsigned long mask = 1 << d->hwirq; |
| 41 | |
| 42 | pr_debug("enable_or_unmask: %ld\n", d->hwirq); |
steve@digidescorp.com | 33d9ff5 | 2009-11-17 08:43:39 -0600 | [diff] [blame] | 43 | |
| 44 | /* ack level irqs because they can't be acked during |
| 45 | * ack function since the handle_level_irq function |
| 46 | * acks the irq before calling the interrupt handler |
| 47 | */ |
Thomas Gleixner | 4adc192 | 2011-03-24 14:52:04 +0100 | [diff] [blame] | 48 | if (irqd_is_level_type(d)) |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame] | 49 | out_be32(intc_baseaddr + IAR, mask); |
Michal Simek | 7958a68 | 2012-11-05 11:51:13 +0100 | [diff] [blame] | 50 | |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame] | 51 | out_be32(intc_baseaddr + SIE, mask); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 52 | } |
| 53 | |
Thomas Gleixner | 6f205a4 | 2011-02-06 19:36:30 +0000 | [diff] [blame] | 54 | static void intc_disable_or_mask(struct irq_data *d) |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 55 | { |
Michal Simek | 6c7a267 | 2011-12-09 10:45:20 +0100 | [diff] [blame] | 56 | pr_debug("disable: %ld\n", d->hwirq); |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame] | 57 | out_be32(intc_baseaddr + CIE, 1 << d->hwirq); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 58 | } |
| 59 | |
Thomas Gleixner | 6f205a4 | 2011-02-06 19:36:30 +0000 | [diff] [blame] | 60 | static void intc_ack(struct irq_data *d) |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 61 | { |
Michal Simek | 6c7a267 | 2011-12-09 10:45:20 +0100 | [diff] [blame] | 62 | pr_debug("ack: %ld\n", d->hwirq); |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame] | 63 | out_be32(intc_baseaddr + IAR, 1 << d->hwirq); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 64 | } |
| 65 | |
Thomas Gleixner | 6f205a4 | 2011-02-06 19:36:30 +0000 | [diff] [blame] | 66 | static void intc_mask_ack(struct irq_data *d) |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 67 | { |
Michal Simek | 6c7a267 | 2011-12-09 10:45:20 +0100 | [diff] [blame] | 68 | unsigned long mask = 1 << d->hwirq; |
| 69 | |
| 70 | pr_debug("disable_and_ack: %ld\n", d->hwirq); |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame] | 71 | out_be32(intc_baseaddr + CIE, mask); |
| 72 | out_be32(intc_baseaddr + IAR, mask); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 73 | } |
| 74 | |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 75 | static struct irq_chip intc_dev = { |
| 76 | .name = "Xilinx INTC", |
Thomas Gleixner | 6f205a4 | 2011-02-06 19:36:30 +0000 | [diff] [blame] | 77 | .irq_unmask = intc_enable_or_unmask, |
| 78 | .irq_mask = intc_disable_or_mask, |
| 79 | .irq_ack = intc_ack, |
| 80 | .irq_mask_ack = intc_mask_ack, |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 81 | }; |
| 82 | |
Grant Likely | 2462bac | 2012-01-26 14:10:13 -0700 | [diff] [blame] | 83 | static struct irq_domain *root_domain; |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 84 | |
Grant Likely | 2462bac | 2012-01-26 14:10:13 -0700 | [diff] [blame] | 85 | unsigned int get_irq(void) |
| 86 | { |
| 87 | unsigned int hwirq, irq = -1; |
| 88 | |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame] | 89 | hwirq = in_be32(intc_baseaddr + IVR); |
Grant Likely | 2462bac | 2012-01-26 14:10:13 -0700 | [diff] [blame] | 90 | if (hwirq != -1U) |
| 91 | irq = irq_find_mapping(root_domain, hwirq); |
| 92 | |
| 93 | pr_debug("get_irq: hwirq=%d, irq=%d\n", hwirq, irq); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 94 | |
| 95 | return irq; |
| 96 | } |
| 97 | |
Michal Simek | c0d997f | 2012-12-13 17:30:05 +0100 | [diff] [blame] | 98 | static int xintc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw) |
Grant Likely | 2462bac | 2012-01-26 14:10:13 -0700 | [diff] [blame] | 99 | { |
| 100 | u32 intr_mask = (u32)d->host_data; |
| 101 | |
| 102 | if (intr_mask & (1 << hw)) { |
| 103 | irq_set_chip_and_handler_name(irq, &intc_dev, |
| 104 | handle_edge_irq, "edge"); |
| 105 | irq_clear_status_flags(irq, IRQ_LEVEL); |
| 106 | } else { |
| 107 | irq_set_chip_and_handler_name(irq, &intc_dev, |
| 108 | handle_level_irq, "level"); |
| 109 | irq_set_status_flags(irq, IRQ_LEVEL); |
| 110 | } |
| 111 | return 0; |
| 112 | } |
| 113 | |
| 114 | static const struct irq_domain_ops xintc_irq_domain_ops = { |
| 115 | .xlate = irq_domain_xlate_onetwocell, |
| 116 | .map = xintc_map, |
| 117 | }; |
| 118 | |
Michal Simek | 8a9e90a | 2013-08-27 10:49:00 +0200 | [diff] [blame^] | 119 | static int __init xilinx_intc_of_init(struct device_node *intc, |
| 120 | struct device_node *parent) |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 121 | { |
Grant Likely | 2462bac | 2012-01-26 14:10:13 -0700 | [diff] [blame] | 122 | u32 nr_irq, intr_mask; |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 123 | |
Michal Simek | 6c7a267 | 2011-12-09 10:45:20 +0100 | [diff] [blame] | 124 | intc_baseaddr = be32_to_cpup(of_get_property(intc, "reg", NULL)); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 125 | intc_baseaddr = (unsigned long) ioremap(intc_baseaddr, PAGE_SIZE); |
Michal Simek | 02b0804 | 2010-09-28 16:04:14 +1000 | [diff] [blame] | 126 | nr_irq = be32_to_cpup(of_get_property(intc, |
| 127 | "xlnx,num-intr-inputs", NULL)); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 128 | |
Michal Simek | 2ecb899 | 2011-12-09 12:26:55 +0100 | [diff] [blame] | 129 | intr_mask = |
| 130 | be32_to_cpup(of_get_property(intc, "xlnx,kind-of-intr", NULL)); |
| 131 | if (intr_mask > (u32)((1ULL << nr_irq) - 1)) |
Michal Simek | 6bd55f0 | 2012-12-27 10:40:38 +0100 | [diff] [blame] | 132 | pr_info(" ERROR: Mismatch in kind-of-intr param\n"); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 133 | |
Michal Simek | 6bd55f0 | 2012-12-27 10:40:38 +0100 | [diff] [blame] | 134 | pr_info("%s #0 at 0x%08x, num_irq=%d, edge=0x%x\n", |
Michal Simek | cc5647a | 2011-11-07 13:42:12 +0100 | [diff] [blame] | 135 | intc->name, intc_baseaddr, nr_irq, intr_mask); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 136 | |
| 137 | /* |
| 138 | * Disable all external interrupts until they are |
| 139 | * explicity requested. |
| 140 | */ |
| 141 | out_be32(intc_baseaddr + IER, 0); |
| 142 | |
| 143 | /* Acknowledge any pending interrupts just in case. */ |
| 144 | out_be32(intc_baseaddr + IAR, 0xffffffff); |
| 145 | |
| 146 | /* Turn on the Master Enable. */ |
| 147 | out_be32(intc_baseaddr + MER, MER_HIE | MER_ME); |
| 148 | |
Grant Likely | 2462bac | 2012-01-26 14:10:13 -0700 | [diff] [blame] | 149 | /* Yeah, okay, casting the intr_mask to a void* is butt-ugly, but I'm |
| 150 | * lazy and Michal can clean it up to something nicer when he tests |
| 151 | * and commits this patch. ~~gcl */ |
| 152 | root_domain = irq_domain_add_linear(intc, nr_irq, &xintc_irq_domain_ops, |
| 153 | (void *)intr_mask); |
Dan Christensen | 7c2c851 | 2013-03-17 04:48:56 -0500 | [diff] [blame] | 154 | |
| 155 | irq_set_default_host(root_domain); |
Michal Simek | 8a9e90a | 2013-08-27 10:49:00 +0200 | [diff] [blame^] | 156 | |
| 157 | return 0; |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 158 | } |
Michal Simek | 8a9e90a | 2013-08-27 10:49:00 +0200 | [diff] [blame^] | 159 | |
| 160 | IRQCHIP_DECLARE(xilinx_intc, "xlnx,xps-intc-1.00.a", xilinx_intc_of_init); |