blob: 1243c7404356c704db5b06e3de8b0f40072b9dfd [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010051#include <linux/list.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020052#include <linux/dcbnl.h>
Jiri Pirkoc4745502016-02-26 17:32:26 +010053#include <net/devlink.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020054#include <net/switchdev.h>
55#include <generated/utsrelease.h>
56
57#include "spectrum.h"
58#include "core.h"
59#include "reg.h"
60#include "port.h"
61#include "trap.h"
62#include "txheader.h"
63
64static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
65static const char mlxsw_sp_driver_version[] = "1.0";
66
67/* tx_hdr_version
68 * Tx header version.
69 * Must be set to 1.
70 */
71MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
72
73/* tx_hdr_ctl
74 * Packet control type.
75 * 0 - Ethernet control (e.g. EMADs, LACP)
76 * 1 - Ethernet data
77 */
78MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
79
80/* tx_hdr_proto
81 * Packet protocol type. Must be set to 1 (Ethernet).
82 */
83MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
84
85/* tx_hdr_rx_is_router
86 * Packet is sent from the router. Valid for data packets only.
87 */
88MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
89
90/* tx_hdr_fid_valid
91 * Indicates if the 'fid' field is valid and should be used for
92 * forwarding lookup. Valid for data packets only.
93 */
94MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
95
96/* tx_hdr_swid
97 * Switch partition ID. Must be set to 0.
98 */
99MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
100
101/* tx_hdr_control_tclass
102 * Indicates if the packet should use the control TClass and not one
103 * of the data TClasses.
104 */
105MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
106
107/* tx_hdr_etclass
108 * Egress TClass to be used on the egress device on the egress port.
109 */
110MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
111
112/* tx_hdr_port_mid
113 * Destination local port for unicast packets.
114 * Destination multicast ID for multicast packets.
115 *
116 * Control packets are directed to a specific egress port, while data
117 * packets are transmitted through the CPU port (0) into the switch partition,
118 * where forwarding rules are applied.
119 */
120MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
121
122/* tx_hdr_fid
123 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
124 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
125 * Valid for data packets only.
126 */
127MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
128
129/* tx_hdr_type
130 * 0 - Data packets
131 * 6 - Control packets
132 */
133MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
134
135static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
136 const struct mlxsw_tx_info *tx_info)
137{
138 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
139
140 memset(txhdr, 0, MLXSW_TXHDR_LEN);
141
142 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
143 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
144 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
145 mlxsw_tx_hdr_swid_set(txhdr, 0);
146 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
147 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
148 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
149}
150
151static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
152{
153 char spad_pl[MLXSW_REG_SPAD_LEN];
154 int err;
155
156 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
157 if (err)
158 return err;
159 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
160 return 0;
161}
162
163static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
164 bool is_up)
165{
166 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
167 char paos_pl[MLXSW_REG_PAOS_LEN];
168
169 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
170 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
171 MLXSW_PORT_ADMIN_STATUS_DOWN);
172 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
173}
174
175static int mlxsw_sp_port_oper_status_get(struct mlxsw_sp_port *mlxsw_sp_port,
176 bool *p_is_up)
177{
178 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
179 char paos_pl[MLXSW_REG_PAOS_LEN];
180 u8 oper_status;
181 int err;
182
183 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port, 0);
184 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
185 if (err)
186 return err;
187 oper_status = mlxsw_reg_paos_oper_status_get(paos_pl);
188 *p_is_up = oper_status == MLXSW_PORT_ADMIN_STATUS_UP ? true : false;
189 return 0;
190}
191
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200192static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
193 unsigned char *addr)
194{
195 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
196 char ppad_pl[MLXSW_REG_PPAD_LEN];
197
198 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
199 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
200 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
201}
202
203static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
204{
205 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
206 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
207
208 ether_addr_copy(addr, mlxsw_sp->base_mac);
209 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
210 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
211}
212
213static int mlxsw_sp_port_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
214 u16 vid, enum mlxsw_reg_spms_state state)
215{
216 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
217 char *spms_pl;
218 int err;
219
220 spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
221 if (!spms_pl)
222 return -ENOMEM;
223 mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
224 mlxsw_reg_spms_vid_pack(spms_pl, vid, state);
225 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
226 kfree(spms_pl);
227 return err;
228}
229
230static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
231{
232 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
233 char pmtu_pl[MLXSW_REG_PMTU_LEN];
234 int max_mtu;
235 int err;
236
237 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
238 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
239 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
240 if (err)
241 return err;
242 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
243
244 if (mtu > max_mtu)
245 return -EINVAL;
246
247 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
248 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
249}
250
251static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
252{
253 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
254 char pspa_pl[MLXSW_REG_PSPA_LEN];
255
256 mlxsw_reg_pspa_pack(pspa_pl, swid, mlxsw_sp_port->local_port);
257 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
258}
259
260static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
261 bool enable)
262{
263 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
264 char svpe_pl[MLXSW_REG_SVPE_LEN];
265
266 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
267 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
268}
269
270int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
271 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
272 u16 vid)
273{
274 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
275 char svfa_pl[MLXSW_REG_SVFA_LEN];
276
277 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
278 fid, vid);
279 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
280}
281
282static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
283 u16 vid, bool learn_enable)
284{
285 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
286 char *spvmlr_pl;
287 int err;
288
289 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
290 if (!spvmlr_pl)
291 return -ENOMEM;
292 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid,
293 learn_enable);
294 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
295 kfree(spvmlr_pl);
296 return err;
297}
298
299static int
300mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
301{
302 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
303 char sspr_pl[MLXSW_REG_SSPR_LEN];
304
305 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
306 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
307}
308
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200309static int __mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
310 u8 local_port, u8 *p_module,
311 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200312{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200313 char pmlp_pl[MLXSW_REG_PMLP_LEN];
314 int err;
315
Ido Schimmel558c2d52016-02-26 17:32:29 +0100316 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200317 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
318 if (err)
319 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100320 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
321 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200322 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200323 return 0;
324}
325
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200326static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
327 u8 local_port, u8 *p_module,
328 u8 *p_width)
329{
330 u8 lane;
331
332 return __mlxsw_sp_port_module_info_get(mlxsw_sp, local_port, p_module,
333 p_width, &lane);
334}
335
Ido Schimmel18f1e702016-02-26 17:32:31 +0100336static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
337 u8 module, u8 width, u8 lane)
338{
339 char pmlp_pl[MLXSW_REG_PMLP_LEN];
340 int i;
341
342 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
343 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
344 for (i = 0; i < width; i++) {
345 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
346 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
347 }
348
349 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
350}
351
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100352static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
353{
354 char pmlp_pl[MLXSW_REG_PMLP_LEN];
355
356 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
357 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
358 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
359}
360
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200361static int mlxsw_sp_port_open(struct net_device *dev)
362{
363 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
364 int err;
365
366 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
367 if (err)
368 return err;
369 netif_start_queue(dev);
370 return 0;
371}
372
373static int mlxsw_sp_port_stop(struct net_device *dev)
374{
375 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
376
377 netif_stop_queue(dev);
378 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
379}
380
381static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
382 struct net_device *dev)
383{
384 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
385 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
386 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
387 const struct mlxsw_tx_info tx_info = {
388 .local_port = mlxsw_sp_port->local_port,
389 .is_emad = false,
390 };
391 u64 len;
392 int err;
393
394 if (mlxsw_core_skb_transmit_busy(mlxsw_sp, &tx_info))
395 return NETDEV_TX_BUSY;
396
397 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
398 struct sk_buff *skb_orig = skb;
399
400 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
401 if (!skb) {
402 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
403 dev_kfree_skb_any(skb_orig);
404 return NETDEV_TX_OK;
405 }
406 }
407
408 if (eth_skb_pad(skb)) {
409 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
410 return NETDEV_TX_OK;
411 }
412
413 mlxsw_sp_txhdr_construct(skb, &tx_info);
414 len = skb->len;
415 /* Due to a race we might fail here because of a full queue. In that
416 * unlikely case we simply drop the packet.
417 */
418 err = mlxsw_core_skb_transmit(mlxsw_sp, skb, &tx_info);
419
420 if (!err) {
421 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
422 u64_stats_update_begin(&pcpu_stats->syncp);
423 pcpu_stats->tx_packets++;
424 pcpu_stats->tx_bytes += len;
425 u64_stats_update_end(&pcpu_stats->syncp);
426 } else {
427 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
428 dev_kfree_skb_any(skb);
429 }
430 return NETDEV_TX_OK;
431}
432
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100433static void mlxsw_sp_set_rx_mode(struct net_device *dev)
434{
435}
436
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200437static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
438{
439 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
440 struct sockaddr *addr = p;
441 int err;
442
443 if (!is_valid_ether_addr(addr->sa_data))
444 return -EADDRNOTAVAIL;
445
446 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
447 if (err)
448 return err;
449 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
450 return 0;
451}
452
Ido Schimmelff6551e2016-04-06 17:10:03 +0200453static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
454 int mtu)
455{
456 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
457 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
458 char pbmc_pl[MLXSW_REG_PBMC_LEN];
459 int err;
460
461 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
462 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
463 if (err)
464 return err;
465 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, 0, pg_size);
466 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
467}
468
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200469static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
470{
471 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
472 int err;
473
Ido Schimmelff6551e2016-04-06 17:10:03 +0200474 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200475 if (err)
476 return err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200477 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
478 if (err)
479 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200480 dev->mtu = mtu;
481 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200482
483err_port_mtu_set:
484 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu);
485 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200486}
487
488static struct rtnl_link_stats64 *
489mlxsw_sp_port_get_stats64(struct net_device *dev,
490 struct rtnl_link_stats64 *stats)
491{
492 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
493 struct mlxsw_sp_port_pcpu_stats *p;
494 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
495 u32 tx_dropped = 0;
496 unsigned int start;
497 int i;
498
499 for_each_possible_cpu(i) {
500 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
501 do {
502 start = u64_stats_fetch_begin_irq(&p->syncp);
503 rx_packets = p->rx_packets;
504 rx_bytes = p->rx_bytes;
505 tx_packets = p->tx_packets;
506 tx_bytes = p->tx_bytes;
507 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
508
509 stats->rx_packets += rx_packets;
510 stats->rx_bytes += rx_bytes;
511 stats->tx_packets += tx_packets;
512 stats->tx_bytes += tx_bytes;
513 /* tx_dropped is u32, updated without syncp protection. */
514 tx_dropped += p->tx_dropped;
515 }
516 stats->tx_dropped = tx_dropped;
517 return stats;
518}
519
520int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
521 u16 vid_end, bool is_member, bool untagged)
522{
523 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
524 char *spvm_pl;
525 int err;
526
527 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
528 if (!spvm_pl)
529 return -ENOMEM;
530
531 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
532 vid_end, is_member, untagged);
533 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
534 kfree(spvm_pl);
535 return err;
536}
537
538static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
539{
540 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
541 u16 vid, last_visited_vid;
542 int err;
543
544 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
545 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
546 vid);
547 if (err) {
548 last_visited_vid = vid;
549 goto err_port_vid_to_fid_set;
550 }
551 }
552
553 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
554 if (err) {
555 last_visited_vid = VLAN_N_VID;
556 goto err_port_vid_to_fid_set;
557 }
558
559 return 0;
560
561err_port_vid_to_fid_set:
562 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
563 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
564 vid);
565 return err;
566}
567
568static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
569{
570 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
571 u16 vid;
572 int err;
573
574 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
575 if (err)
576 return err;
577
578 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
579 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
580 vid, vid);
581 if (err)
582 return err;
583 }
584
585 return 0;
586}
587
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100588static struct mlxsw_sp_vfid *
589mlxsw_sp_vfid_find(const struct mlxsw_sp *mlxsw_sp, u16 vid)
590{
591 struct mlxsw_sp_vfid *vfid;
592
593 list_for_each_entry(vfid, &mlxsw_sp->port_vfids.list, list) {
594 if (vfid->vid == vid)
595 return vfid;
596 }
597
598 return NULL;
599}
600
601static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
602{
603 return find_first_zero_bit(mlxsw_sp->port_vfids.mapped,
604 MLXSW_SP_VFID_PORT_MAX);
605}
606
607static int __mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp, u16 vfid)
608{
609 u16 fid = mlxsw_sp_vfid_to_fid(vfid);
610 char sfmr_pl[MLXSW_REG_SFMR_LEN];
611
612 mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_CREATE_FID, fid, 0);
613 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
614}
615
616static void __mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp, u16 vfid)
617{
618 u16 fid = mlxsw_sp_vfid_to_fid(vfid);
619 char sfmr_pl[MLXSW_REG_SFMR_LEN];
620
621 mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_DESTROY_FID, fid, 0);
622 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
623}
624
625static struct mlxsw_sp_vfid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
626 u16 vid)
627{
628 struct device *dev = mlxsw_sp->bus_info->dev;
629 struct mlxsw_sp_vfid *vfid;
630 u16 n_vfid;
631 int err;
632
633 n_vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
634 if (n_vfid == MLXSW_SP_VFID_PORT_MAX) {
635 dev_err(dev, "No available vFIDs\n");
636 return ERR_PTR(-ERANGE);
637 }
638
639 err = __mlxsw_sp_vfid_create(mlxsw_sp, n_vfid);
640 if (err) {
641 dev_err(dev, "Failed to create vFID=%d\n", n_vfid);
642 return ERR_PTR(err);
643 }
644
645 vfid = kzalloc(sizeof(*vfid), GFP_KERNEL);
646 if (!vfid)
647 goto err_allocate_vfid;
648
649 vfid->vfid = n_vfid;
650 vfid->vid = vid;
651
652 list_add(&vfid->list, &mlxsw_sp->port_vfids.list);
653 set_bit(n_vfid, mlxsw_sp->port_vfids.mapped);
654
655 return vfid;
656
657err_allocate_vfid:
658 __mlxsw_sp_vfid_destroy(mlxsw_sp, n_vfid);
659 return ERR_PTR(-ENOMEM);
660}
661
662static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
663 struct mlxsw_sp_vfid *vfid)
664{
665 clear_bit(vfid->vfid, mlxsw_sp->port_vfids.mapped);
666 list_del(&vfid->list);
667
668 __mlxsw_sp_vfid_destroy(mlxsw_sp, vfid->vfid);
669
670 kfree(vfid);
671}
672
673static struct mlxsw_sp_port *
674mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port,
675 struct mlxsw_sp_vfid *vfid)
676{
677 struct mlxsw_sp_port *mlxsw_sp_vport;
678
679 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
680 if (!mlxsw_sp_vport)
681 return NULL;
682
683 /* dev will be set correctly after the VLAN device is linked
684 * with the real device. In case of bridge SELF invocation, dev
685 * will remain as is.
686 */
687 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
688 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
689 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
690 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +0100691 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
692 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100693 mlxsw_sp_vport->vport.vfid = vfid;
694 mlxsw_sp_vport->vport.vid = vfid->vid;
695
696 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
697
698 return mlxsw_sp_vport;
699}
700
701static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
702{
703 list_del(&mlxsw_sp_vport->vport.list);
704 kfree(mlxsw_sp_vport);
705}
706
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200707int mlxsw_sp_port_add_vid(struct net_device *dev, __be16 __always_unused proto,
708 u16 vid)
709{
710 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
711 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100712 struct mlxsw_sp_port *mlxsw_sp_vport;
713 struct mlxsw_sp_vfid *vfid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200714 int err;
715
716 /* VLAN 0 is added to HW filter when device goes up, but it is
717 * reserved in our case, so simply return.
718 */
719 if (!vid)
720 return 0;
721
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100722 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200723 netdev_warn(dev, "VID=%d already configured\n", vid);
724 return 0;
725 }
726
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100727 vfid = mlxsw_sp_vfid_find(mlxsw_sp, vid);
728 if (!vfid) {
729 vfid = mlxsw_sp_vfid_create(mlxsw_sp, vid);
730 if (IS_ERR(vfid)) {
731 netdev_err(dev, "Failed to create vFID for VID=%d\n",
732 vid);
733 return PTR_ERR(vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200734 }
735 }
736
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100737 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vfid);
738 if (!mlxsw_sp_vport) {
739 netdev_err(dev, "Failed to create vPort for VID=%d\n", vid);
740 err = -ENOMEM;
741 goto err_port_vport_create;
742 }
743
744 if (!vfid->nr_vports) {
745 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid,
Ido Schimmel19ae6122015-12-15 16:03:39 +0100746 true, false);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100747 if (err) {
748 netdev_err(dev, "Failed to setup flooding for vFID=%d\n",
749 vfid->vfid);
750 goto err_vport_flood_set;
751 }
752 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200753
754 /* When adding the first VLAN interface on a bridged port we need to
755 * transition all the active 802.1Q bridge VLANs to use explicit
756 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
757 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100758 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200759 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
760 if (err) {
761 netdev_err(dev, "Failed to set to Virtual mode\n");
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100762 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200763 }
764 }
765
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100766 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200767 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100768 true,
769 mlxsw_sp_vfid_to_fid(vfid->vfid),
770 vid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200771 if (err) {
772 netdev_err(dev, "Failed to map {Port, VID=%d} to vFID=%d\n",
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100773 vid, vfid->vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200774 goto err_port_vid_to_fid_set;
775 }
776
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100777 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200778 if (err) {
779 netdev_err(dev, "Failed to disable learning for VID=%d\n", vid);
780 goto err_port_vid_learning_set;
781 }
782
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100783 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200784 if (err) {
785 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
786 vid);
787 goto err_port_add_vid;
788 }
789
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100790 err = mlxsw_sp_port_stp_state_set(mlxsw_sp_vport, vid,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200791 MLXSW_REG_SPMS_STATE_FORWARDING);
792 if (err) {
793 netdev_err(dev, "Failed to set STP state for VID=%d\n", vid);
794 goto err_port_stp_state_set;
795 }
796
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100797 vfid->nr_vports++;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200798
799 return 0;
800
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200801err_port_stp_state_set:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100802 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200803err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100804 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200805err_port_vid_learning_set:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100806 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200807 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID, false,
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100808 mlxsw_sp_vfid_to_fid(vfid->vfid), vid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200809err_port_vid_to_fid_set:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100810 if (list_is_singular(&mlxsw_sp_port->vports_list))
811 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
812err_port_vp_mode_trans:
813 if (!vfid->nr_vports)
Ido Schimmel19ae6122015-12-15 16:03:39 +0100814 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid, false,
815 false);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100816err_vport_flood_set:
817 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
818err_port_vport_create:
819 if (!vfid->nr_vports)
820 mlxsw_sp_vfid_destroy(mlxsw_sp, vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200821 return err;
822}
823
824int mlxsw_sp_port_kill_vid(struct net_device *dev,
825 __be16 __always_unused proto, u16 vid)
826{
827 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100828 struct mlxsw_sp_port *mlxsw_sp_vport;
829 struct mlxsw_sp_vfid *vfid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200830 int err;
831
832 /* VLAN 0 is removed from HW filter when device goes down, but
833 * it is reserved in our case, so simply return.
834 */
835 if (!vid)
836 return 0;
837
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100838 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
839 if (!mlxsw_sp_vport) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200840 netdev_warn(dev, "VID=%d does not exist\n", vid);
841 return 0;
842 }
843
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100844 vfid = mlxsw_sp_vport->vport.vfid;
845
846 err = mlxsw_sp_port_stp_state_set(mlxsw_sp_vport, vid,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200847 MLXSW_REG_SPMS_STATE_DISCARDING);
848 if (err) {
849 netdev_err(dev, "Failed to set STP state for VID=%d\n", vid);
850 return err;
851 }
852
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100853 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200854 if (err) {
855 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
856 vid);
857 return err;
858 }
859
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100860 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200861 if (err) {
862 netdev_err(dev, "Failed to enable learning for VID=%d\n", vid);
863 return err;
864 }
865
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100866 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200867 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100868 false,
869 mlxsw_sp_vfid_to_fid(vfid->vfid),
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200870 vid);
871 if (err) {
872 netdev_err(dev, "Failed to invalidate {Port, VID=%d} to vFID=%d mapping\n",
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100873 vid, vfid->vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200874 return err;
875 }
876
877 /* When removing the last VLAN interface on a bridged port we need to
878 * transition all active 802.1Q bridge VLANs to use VID to FID
879 * mappings and set port's mode to VLAN mode.
880 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100881 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200882 err = mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
883 if (err) {
884 netdev_err(dev, "Failed to set to VLAN mode\n");
885 return err;
886 }
887 }
888
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100889 vfid->nr_vports--;
890 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
891
892 /* Destroy the vFID if no vPorts are assigned to it anymore. */
893 if (!vfid->nr_vports)
894 mlxsw_sp_vfid_destroy(mlxsw_sp_port->mlxsw_sp, vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200895
896 return 0;
897}
898
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200899static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
900 size_t len)
901{
902 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
903 u8 module, width, lane;
904 int err;
905
906 err = __mlxsw_sp_port_module_info_get(mlxsw_sp_port->mlxsw_sp,
907 mlxsw_sp_port->local_port,
908 &module, &width, &lane);
909 if (err) {
910 netdev_err(dev, "Failed to retrieve module information\n");
911 return err;
912 }
913
914 if (!mlxsw_sp_port->split)
915 err = snprintf(name, len, "p%d", module + 1);
916 else
917 err = snprintf(name, len, "p%ds%d", module + 1,
918 lane / width);
919
920 if (err >= len)
921 return -EINVAL;
922
923 return 0;
924}
925
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200926static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
927 .ndo_open = mlxsw_sp_port_open,
928 .ndo_stop = mlxsw_sp_port_stop,
929 .ndo_start_xmit = mlxsw_sp_port_xmit,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100930 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200931 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
932 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
933 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
934 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
935 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
936 .ndo_fdb_add = switchdev_port_fdb_add,
937 .ndo_fdb_del = switchdev_port_fdb_del,
938 .ndo_fdb_dump = switchdev_port_fdb_dump,
939 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
940 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
941 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200942 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200943};
944
945static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
946 struct ethtool_drvinfo *drvinfo)
947{
948 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
949 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
950
951 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
952 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
953 sizeof(drvinfo->version));
954 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
955 "%d.%d.%d",
956 mlxsw_sp->bus_info->fw_rev.major,
957 mlxsw_sp->bus_info->fw_rev.minor,
958 mlxsw_sp->bus_info->fw_rev.subminor);
959 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
960 sizeof(drvinfo->bus_info));
961}
962
963struct mlxsw_sp_port_hw_stats {
964 char str[ETH_GSTRING_LEN];
965 u64 (*getter)(char *payload);
966};
967
968static const struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
969 {
970 .str = "a_frames_transmitted_ok",
971 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
972 },
973 {
974 .str = "a_frames_received_ok",
975 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
976 },
977 {
978 .str = "a_frame_check_sequence_errors",
979 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
980 },
981 {
982 .str = "a_alignment_errors",
983 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
984 },
985 {
986 .str = "a_octets_transmitted_ok",
987 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
988 },
989 {
990 .str = "a_octets_received_ok",
991 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
992 },
993 {
994 .str = "a_multicast_frames_xmitted_ok",
995 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
996 },
997 {
998 .str = "a_broadcast_frames_xmitted_ok",
999 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1000 },
1001 {
1002 .str = "a_multicast_frames_received_ok",
1003 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1004 },
1005 {
1006 .str = "a_broadcast_frames_received_ok",
1007 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1008 },
1009 {
1010 .str = "a_in_range_length_errors",
1011 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1012 },
1013 {
1014 .str = "a_out_of_range_length_field",
1015 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1016 },
1017 {
1018 .str = "a_frame_too_long_errors",
1019 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1020 },
1021 {
1022 .str = "a_symbol_error_during_carrier",
1023 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1024 },
1025 {
1026 .str = "a_mac_control_frames_transmitted",
1027 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1028 },
1029 {
1030 .str = "a_mac_control_frames_received",
1031 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1032 },
1033 {
1034 .str = "a_unsupported_opcodes_received",
1035 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1036 },
1037 {
1038 .str = "a_pause_mac_ctrl_frames_received",
1039 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1040 },
1041 {
1042 .str = "a_pause_mac_ctrl_frames_xmitted",
1043 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1044 },
1045};
1046
1047#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1048
1049static void mlxsw_sp_port_get_strings(struct net_device *dev,
1050 u32 stringset, u8 *data)
1051{
1052 u8 *p = data;
1053 int i;
1054
1055 switch (stringset) {
1056 case ETH_SS_STATS:
1057 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1058 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1059 ETH_GSTRING_LEN);
1060 p += ETH_GSTRING_LEN;
1061 }
1062 break;
1063 }
1064}
1065
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001066static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1067 enum ethtool_phys_id_state state)
1068{
1069 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1070 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1071 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1072 bool active;
1073
1074 switch (state) {
1075 case ETHTOOL_ID_ACTIVE:
1076 active = true;
1077 break;
1078 case ETHTOOL_ID_INACTIVE:
1079 active = false;
1080 break;
1081 default:
1082 return -EOPNOTSUPP;
1083 }
1084
1085 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1086 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1087}
1088
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001089static void mlxsw_sp_port_get_stats(struct net_device *dev,
1090 struct ethtool_stats *stats, u64 *data)
1091{
1092 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1093 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1094 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
1095 int i;
1096 int err;
1097
1098 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port);
1099 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
1100 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++)
1101 data[i] = !err ? mlxsw_sp_port_hw_stats[i].getter(ppcnt_pl) : 0;
1102}
1103
1104static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1105{
1106 switch (sset) {
1107 case ETH_SS_STATS:
1108 return MLXSW_SP_PORT_HW_STATS_LEN;
1109 default:
1110 return -EOPNOTSUPP;
1111 }
1112}
1113
1114struct mlxsw_sp_port_link_mode {
1115 u32 mask;
1116 u32 supported;
1117 u32 advertised;
1118 u32 speed;
1119};
1120
1121static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1122 {
1123 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1124 .supported = SUPPORTED_100baseT_Full,
1125 .advertised = ADVERTISED_100baseT_Full,
1126 .speed = 100,
1127 },
1128 {
1129 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
1130 .speed = 100,
1131 },
1132 {
1133 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1134 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1135 .supported = SUPPORTED_1000baseKX_Full,
1136 .advertised = ADVERTISED_1000baseKX_Full,
1137 .speed = 1000,
1138 },
1139 {
1140 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1141 .supported = SUPPORTED_10000baseT_Full,
1142 .advertised = ADVERTISED_10000baseT_Full,
1143 .speed = 10000,
1144 },
1145 {
1146 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1147 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1148 .supported = SUPPORTED_10000baseKX4_Full,
1149 .advertised = ADVERTISED_10000baseKX4_Full,
1150 .speed = 10000,
1151 },
1152 {
1153 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1154 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1155 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1156 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1157 .supported = SUPPORTED_10000baseKR_Full,
1158 .advertised = ADVERTISED_10000baseKR_Full,
1159 .speed = 10000,
1160 },
1161 {
1162 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1163 .supported = SUPPORTED_20000baseKR2_Full,
1164 .advertised = ADVERTISED_20000baseKR2_Full,
1165 .speed = 20000,
1166 },
1167 {
1168 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1169 .supported = SUPPORTED_40000baseCR4_Full,
1170 .advertised = ADVERTISED_40000baseCR4_Full,
1171 .speed = 40000,
1172 },
1173 {
1174 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1175 .supported = SUPPORTED_40000baseKR4_Full,
1176 .advertised = ADVERTISED_40000baseKR4_Full,
1177 .speed = 40000,
1178 },
1179 {
1180 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1181 .supported = SUPPORTED_40000baseSR4_Full,
1182 .advertised = ADVERTISED_40000baseSR4_Full,
1183 .speed = 40000,
1184 },
1185 {
1186 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1187 .supported = SUPPORTED_40000baseLR4_Full,
1188 .advertised = ADVERTISED_40000baseLR4_Full,
1189 .speed = 40000,
1190 },
1191 {
1192 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
1193 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
1194 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1195 .speed = 25000,
1196 },
1197 {
1198 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
1199 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
1200 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1201 .speed = 50000,
1202 },
1203 {
1204 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1205 .supported = SUPPORTED_56000baseKR4_Full,
1206 .advertised = ADVERTISED_56000baseKR4_Full,
1207 .speed = 56000,
1208 },
1209 {
1210 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
1211 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1212 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1213 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1214 .speed = 100000,
1215 },
1216};
1217
1218#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1219
1220static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
1221{
1222 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1223 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1224 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1225 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1226 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1227 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1228 return SUPPORTED_FIBRE;
1229
1230 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1231 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1232 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1233 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1234 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1235 return SUPPORTED_Backplane;
1236 return 0;
1237}
1238
1239static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1240{
1241 u32 modes = 0;
1242 int i;
1243
1244 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1245 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1246 modes |= mlxsw_sp_port_link_mode[i].supported;
1247 }
1248 return modes;
1249}
1250
1251static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1252{
1253 u32 modes = 0;
1254 int i;
1255
1256 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1257 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1258 modes |= mlxsw_sp_port_link_mode[i].advertised;
1259 }
1260 return modes;
1261}
1262
1263static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1264 struct ethtool_cmd *cmd)
1265{
1266 u32 speed = SPEED_UNKNOWN;
1267 u8 duplex = DUPLEX_UNKNOWN;
1268 int i;
1269
1270 if (!carrier_ok)
1271 goto out;
1272
1273 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1274 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1275 speed = mlxsw_sp_port_link_mode[i].speed;
1276 duplex = DUPLEX_FULL;
1277 break;
1278 }
1279 }
1280out:
1281 ethtool_cmd_speed_set(cmd, speed);
1282 cmd->duplex = duplex;
1283}
1284
1285static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1286{
1287 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1288 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1289 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1290 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1291 return PORT_FIBRE;
1292
1293 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1294 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1295 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1296 return PORT_DA;
1297
1298 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1299 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1300 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1301 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1302 return PORT_NONE;
1303
1304 return PORT_OTHER;
1305}
1306
1307static int mlxsw_sp_port_get_settings(struct net_device *dev,
1308 struct ethtool_cmd *cmd)
1309{
1310 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1311 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1312 char ptys_pl[MLXSW_REG_PTYS_LEN];
1313 u32 eth_proto_cap;
1314 u32 eth_proto_admin;
1315 u32 eth_proto_oper;
1316 int err;
1317
1318 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1319 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1320 if (err) {
1321 netdev_err(dev, "Failed to get proto");
1322 return err;
1323 }
1324 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap,
1325 &eth_proto_admin, &eth_proto_oper);
1326
1327 cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1328 mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
1329 SUPPORTED_Pause | SUPPORTED_Asym_Pause;
1330 cmd->advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1331 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1332 eth_proto_oper, cmd);
1333
1334 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1335 cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
1336 cmd->lp_advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_oper);
1337
1338 cmd->transceiver = XCVR_INTERNAL;
1339 return 0;
1340}
1341
1342static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1343{
1344 u32 ptys_proto = 0;
1345 int i;
1346
1347 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1348 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1349 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1350 }
1351 return ptys_proto;
1352}
1353
1354static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1355{
1356 u32 ptys_proto = 0;
1357 int i;
1358
1359 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1360 if (speed == mlxsw_sp_port_link_mode[i].speed)
1361 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1362 }
1363 return ptys_proto;
1364}
1365
Ido Schimmel18f1e702016-02-26 17:32:31 +01001366static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1367{
1368 u32 ptys_proto = 0;
1369 int i;
1370
1371 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1372 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1373 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1374 }
1375 return ptys_proto;
1376}
1377
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001378static int mlxsw_sp_port_set_settings(struct net_device *dev,
1379 struct ethtool_cmd *cmd)
1380{
1381 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1382 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1383 char ptys_pl[MLXSW_REG_PTYS_LEN];
1384 u32 speed;
1385 u32 eth_proto_new;
1386 u32 eth_proto_cap;
1387 u32 eth_proto_admin;
1388 bool is_up;
1389 int err;
1390
1391 speed = ethtool_cmd_speed(cmd);
1392
1393 eth_proto_new = cmd->autoneg == AUTONEG_ENABLE ?
1394 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1395 mlxsw_sp_to_ptys_speed(speed);
1396
1397 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1398 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1399 if (err) {
1400 netdev_err(dev, "Failed to get proto");
1401 return err;
1402 }
1403 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin, NULL);
1404
1405 eth_proto_new = eth_proto_new & eth_proto_cap;
1406 if (!eth_proto_new) {
1407 netdev_err(dev, "Not supported proto admin requested");
1408 return -EINVAL;
1409 }
1410 if (eth_proto_new == eth_proto_admin)
1411 return 0;
1412
1413 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1414 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1415 if (err) {
1416 netdev_err(dev, "Failed to set proto admin");
1417 return err;
1418 }
1419
1420 err = mlxsw_sp_port_oper_status_get(mlxsw_sp_port, &is_up);
1421 if (err) {
1422 netdev_err(dev, "Failed to get oper status");
1423 return err;
1424 }
1425 if (!is_up)
1426 return 0;
1427
1428 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1429 if (err) {
1430 netdev_err(dev, "Failed to set admin status");
1431 return err;
1432 }
1433
1434 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1435 if (err) {
1436 netdev_err(dev, "Failed to set admin status");
1437 return err;
1438 }
1439
1440 return 0;
1441}
1442
1443static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1444 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
1445 .get_link = ethtool_op_get_link,
1446 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001447 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001448 .get_ethtool_stats = mlxsw_sp_port_get_stats,
1449 .get_sset_count = mlxsw_sp_port_get_sset_count,
1450 .get_settings = mlxsw_sp_port_get_settings,
1451 .set_settings = mlxsw_sp_port_set_settings,
1452};
1453
Ido Schimmel18f1e702016-02-26 17:32:31 +01001454static int
1455mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
1456{
1457 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1458 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
1459 char ptys_pl[MLXSW_REG_PTYS_LEN];
1460 u32 eth_proto_admin;
1461
1462 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
1463 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
1464 eth_proto_admin);
1465 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1466}
1467
Ido Schimmel90183b92016-04-06 17:10:08 +02001468static int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
1469 enum mlxsw_reg_qeec_hr hr, u8 index,
1470 u8 next_index, bool dwrr, u8 dwrr_weight)
1471{
1472 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1473 char qeec_pl[MLXSW_REG_QEEC_LEN];
1474
1475 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1476 next_index);
1477 mlxsw_reg_qeec_de_set(qeec_pl, true);
1478 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
1479 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
1480 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1481}
1482
1483static int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
1484 enum mlxsw_reg_qeec_hr hr, u8 index,
1485 u8 next_index, u32 maxrate)
1486{
1487 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1488 char qeec_pl[MLXSW_REG_QEEC_LEN];
1489
1490 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1491 next_index);
1492 mlxsw_reg_qeec_mase_set(qeec_pl, true);
1493 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
1494 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1495}
1496
1497static int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
1498 u8 switch_prio, u8 tclass)
1499{
1500 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1501 char qtct_pl[MLXSW_REG_QTCT_LEN];
1502
1503 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
1504 tclass);
1505 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
1506}
1507
1508static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
1509{
1510 int err, i;
1511
1512 /* Setup the elements hierarcy, so that each TC is linked to
1513 * one subgroup, which are all member in the same group.
1514 */
1515 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
1516 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
1517 0);
1518 if (err)
1519 return err;
1520 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1521 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
1522 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
1523 0, false, 0);
1524 if (err)
1525 return err;
1526 }
1527 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1528 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
1529 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
1530 false, 0);
1531 if (err)
1532 return err;
1533 }
1534
1535 /* Make sure the max shaper is disabled in all hierarcies that
1536 * support it.
1537 */
1538 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
1539 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
1540 MLXSW_REG_QEEC_MAS_DIS);
1541 if (err)
1542 return err;
1543 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1544 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
1545 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
1546 i, 0,
1547 MLXSW_REG_QEEC_MAS_DIS);
1548 if (err)
1549 return err;
1550 }
1551 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1552 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
1553 MLXSW_REG_QEEC_HIERARCY_TC,
1554 i, i,
1555 MLXSW_REG_QEEC_MAS_DIS);
1556 if (err)
1557 return err;
1558 }
1559
1560 /* Map all priorities to traffic class 0. */
1561 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1562 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
1563 if (err)
1564 return err;
1565 }
1566
1567 return 0;
1568}
1569
Ido Schimmel18f1e702016-02-26 17:32:31 +01001570static int __mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
1571 bool split, u8 module, u8 width)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001572{
Jiri Pirkoc4745502016-02-26 17:32:26 +01001573 struct devlink *devlink = priv_to_devlink(mlxsw_sp->core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001574 struct mlxsw_sp_port *mlxsw_sp_port;
Jiri Pirkoc4745502016-02-26 17:32:26 +01001575 struct devlink_port *devlink_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001576 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001577 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001578 int err;
1579
1580 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
1581 if (!dev)
1582 return -ENOMEM;
1583 mlxsw_sp_port = netdev_priv(dev);
1584 mlxsw_sp_port->dev = dev;
1585 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
1586 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01001587 mlxsw_sp_port->split = split;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001588 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
1589 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
1590 if (!mlxsw_sp_port->active_vlans) {
1591 err = -ENOMEM;
1592 goto err_port_active_vlans_alloc;
1593 }
Elad Razfc1273a2016-01-06 13:01:11 +01001594 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
1595 if (!mlxsw_sp_port->untagged_vlans) {
1596 err = -ENOMEM;
1597 goto err_port_untagged_vlans_alloc;
1598 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001599 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001600
1601 mlxsw_sp_port->pcpu_stats =
1602 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
1603 if (!mlxsw_sp_port->pcpu_stats) {
1604 err = -ENOMEM;
1605 goto err_alloc_stats;
1606 }
1607
1608 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
1609 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
1610
1611 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
1612 if (err) {
1613 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
1614 mlxsw_sp_port->local_port);
1615 goto err_dev_addr_init;
1616 }
1617
1618 netif_carrier_off(dev);
1619
1620 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
1621 NETIF_F_HW_VLAN_CTAG_FILTER;
1622
1623 /* Each packet needs to have a Tx header (metadata) on top all other
1624 * headers.
1625 */
1626 dev->hard_header_len += MLXSW_TXHDR_LEN;
1627
Jiri Pirkoc4745502016-02-26 17:32:26 +01001628 devlink_port = &mlxsw_sp_port->devlink_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01001629 if (mlxsw_sp_port->split)
1630 devlink_port_split_set(devlink_port, module);
Jiri Pirkoc4745502016-02-26 17:32:26 +01001631 err = devlink_port_register(devlink, devlink_port, local_port);
1632 if (err) {
1633 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register devlink port\n",
1634 mlxsw_sp_port->local_port);
1635 goto err_devlink_port_register;
1636 }
1637
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001638 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
1639 if (err) {
1640 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
1641 mlxsw_sp_port->local_port);
1642 goto err_port_system_port_mapping_set;
1643 }
1644
1645 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
1646 if (err) {
1647 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
1648 mlxsw_sp_port->local_port);
1649 goto err_port_swid_set;
1650 }
1651
Ido Schimmel18f1e702016-02-26 17:32:31 +01001652 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
1653 if (err) {
1654 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
1655 mlxsw_sp_port->local_port);
1656 goto err_port_speed_by_width_set;
1657 }
1658
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001659 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
1660 if (err) {
1661 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
1662 mlxsw_sp_port->local_port);
1663 goto err_port_mtu_set;
1664 }
1665
1666 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1667 if (err)
1668 goto err_port_admin_status_set;
1669
1670 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
1671 if (err) {
1672 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
1673 mlxsw_sp_port->local_port);
1674 goto err_port_buffers_init;
1675 }
1676
Ido Schimmel90183b92016-04-06 17:10:08 +02001677 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
1678 if (err) {
1679 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
1680 mlxsw_sp_port->local_port);
1681 goto err_port_ets_init;
1682 }
1683
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001684 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
1685 err = register_netdev(dev);
1686 if (err) {
1687 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
1688 mlxsw_sp_port->local_port);
1689 goto err_register_netdev;
1690 }
1691
Jiri Pirkoc4745502016-02-26 17:32:26 +01001692 devlink_port_type_eth_set(devlink_port, dev);
1693
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001694 err = mlxsw_sp_port_vlan_init(mlxsw_sp_port);
1695 if (err)
1696 goto err_port_vlan_init;
1697
1698 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
1699 return 0;
1700
1701err_port_vlan_init:
1702 unregister_netdev(dev);
1703err_register_netdev:
Ido Schimmel90183b92016-04-06 17:10:08 +02001704err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001705err_port_buffers_init:
1706err_port_admin_status_set:
1707err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01001708err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001709err_port_swid_set:
1710err_port_system_port_mapping_set:
Jiri Pirkoc4745502016-02-26 17:32:26 +01001711 devlink_port_unregister(&mlxsw_sp_port->devlink_port);
1712err_devlink_port_register:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001713err_dev_addr_init:
1714 free_percpu(mlxsw_sp_port->pcpu_stats);
1715err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01001716 kfree(mlxsw_sp_port->untagged_vlans);
1717err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001718 kfree(mlxsw_sp_port->active_vlans);
1719err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001720 free_netdev(dev);
1721 return err;
1722}
1723
Ido Schimmel18f1e702016-02-26 17:32:31 +01001724static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
1725 bool split, u8 module, u8 width, u8 lane)
1726{
1727 int err;
1728
1729 err = mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
1730 lane);
1731 if (err)
1732 return err;
1733
1734 err = __mlxsw_sp_port_create(mlxsw_sp, local_port, split, module,
1735 width);
1736 if (err)
1737 goto err_port_create;
1738
1739 return 0;
1740
1741err_port_create:
1742 mlxsw_sp_port_module_unmap(mlxsw_sp, local_port);
1743 return err;
1744}
1745
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001746static void mlxsw_sp_port_vports_fini(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001747{
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001748 struct net_device *dev = mlxsw_sp_port->dev;
1749 struct mlxsw_sp_port *mlxsw_sp_vport, *tmp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001750
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001751 list_for_each_entry_safe(mlxsw_sp_vport, tmp,
1752 &mlxsw_sp_port->vports_list, vport.list) {
1753 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
1754
1755 /* vPorts created for VLAN devices should already be gone
1756 * by now, since we unregistered the port netdev.
1757 */
1758 WARN_ON(is_vlan_dev(mlxsw_sp_vport->dev));
1759 mlxsw_sp_port_kill_vid(dev, 0, vid);
1760 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001761}
1762
1763static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
1764{
1765 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
Jiri Pirkoc4745502016-02-26 17:32:26 +01001766 struct devlink_port *devlink_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001767
1768 if (!mlxsw_sp_port)
1769 return;
Ido Schimmela1333182016-02-26 17:32:30 +01001770 mlxsw_sp->ports[local_port] = NULL;
Jiri Pirkoc4745502016-02-26 17:32:26 +01001771 devlink_port = &mlxsw_sp_port->devlink_port;
1772 devlink_port_type_clear(devlink_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001773 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Jiri Pirkoc4745502016-02-26 17:32:26 +01001774 devlink_port_unregister(devlink_port);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001775 mlxsw_sp_port_vports_fini(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001776 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01001777 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
1778 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001779 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01001780 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001781 kfree(mlxsw_sp_port->active_vlans);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001782 free_netdev(mlxsw_sp_port->dev);
1783}
1784
1785static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
1786{
1787 int i;
1788
1789 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
1790 mlxsw_sp_port_remove(mlxsw_sp, i);
1791 kfree(mlxsw_sp->ports);
1792}
1793
1794static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
1795{
1796 size_t alloc_size;
Ido Schimmel558c2d52016-02-26 17:32:29 +01001797 u8 module, width;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001798 int i;
1799 int err;
1800
1801 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
1802 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
1803 if (!mlxsw_sp->ports)
1804 return -ENOMEM;
1805
1806 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01001807 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
1808 &width);
1809 if (err)
1810 goto err_port_module_info_get;
1811 if (!width)
1812 continue;
1813 mlxsw_sp->port_to_module[i] = module;
Ido Schimmel18f1e702016-02-26 17:32:31 +01001814 err = __mlxsw_sp_port_create(mlxsw_sp, i, false, module, width);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001815 if (err)
1816 goto err_port_create;
1817 }
1818 return 0;
1819
1820err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01001821err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001822 for (i--; i >= 1; i--)
1823 mlxsw_sp_port_remove(mlxsw_sp, i);
1824 kfree(mlxsw_sp->ports);
1825 return err;
1826}
1827
Ido Schimmel18f1e702016-02-26 17:32:31 +01001828static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
1829{
1830 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
1831
1832 return local_port - offset;
1833}
1834
1835static int mlxsw_sp_port_split(void *priv, u8 local_port, unsigned int count)
1836{
1837 struct mlxsw_sp *mlxsw_sp = priv;
1838 struct mlxsw_sp_port *mlxsw_sp_port;
1839 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
1840 u8 module, cur_width, base_port;
1841 int i;
1842 int err;
1843
1844 mlxsw_sp_port = mlxsw_sp->ports[local_port];
1845 if (!mlxsw_sp_port) {
1846 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
1847 local_port);
1848 return -EINVAL;
1849 }
1850
1851 if (count != 2 && count != 4) {
1852 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
1853 return -EINVAL;
1854 }
1855
1856 err = mlxsw_sp_port_module_info_get(mlxsw_sp, local_port, &module,
1857 &cur_width);
1858 if (err) {
1859 netdev_err(mlxsw_sp_port->dev, "Failed to get port's width\n");
1860 return err;
1861 }
1862
1863 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
1864 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
1865 return -EINVAL;
1866 }
1867
1868 /* Make sure we have enough slave (even) ports for the split. */
1869 if (count == 2) {
1870 base_port = local_port;
1871 if (mlxsw_sp->ports[base_port + 1]) {
1872 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
1873 return -EINVAL;
1874 }
1875 } else {
1876 base_port = mlxsw_sp_cluster_base_port_get(local_port);
1877 if (mlxsw_sp->ports[base_port + 1] ||
1878 mlxsw_sp->ports[base_port + 3]) {
1879 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
1880 return -EINVAL;
1881 }
1882 }
1883
1884 for (i = 0; i < count; i++)
1885 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
1886
1887 for (i = 0; i < count; i++) {
1888 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
1889 module, width, i * width);
1890 if (err) {
1891 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split port\n");
1892 goto err_port_create;
1893 }
1894 }
1895
1896 return 0;
1897
1898err_port_create:
1899 for (i--; i >= 0; i--)
1900 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
1901 for (i = 0; i < count / 2; i++) {
1902 module = mlxsw_sp->port_to_module[base_port + i * 2];
1903 mlxsw_sp_port_create(mlxsw_sp, base_port + i * 2, false,
1904 module, MLXSW_PORT_MODULE_MAX_WIDTH, 0);
1905 }
1906 return err;
1907}
1908
1909static int mlxsw_sp_port_unsplit(void *priv, u8 local_port)
1910{
1911 struct mlxsw_sp *mlxsw_sp = priv;
1912 struct mlxsw_sp_port *mlxsw_sp_port;
1913 u8 module, cur_width, base_port;
1914 unsigned int count;
1915 int i;
1916 int err;
1917
1918 mlxsw_sp_port = mlxsw_sp->ports[local_port];
1919 if (!mlxsw_sp_port) {
1920 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
1921 local_port);
1922 return -EINVAL;
1923 }
1924
1925 if (!mlxsw_sp_port->split) {
1926 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
1927 return -EINVAL;
1928 }
1929
1930 err = mlxsw_sp_port_module_info_get(mlxsw_sp, local_port, &module,
1931 &cur_width);
1932 if (err) {
1933 netdev_err(mlxsw_sp_port->dev, "Failed to get port's width\n");
1934 return err;
1935 }
1936 count = cur_width == 1 ? 4 : 2;
1937
1938 base_port = mlxsw_sp_cluster_base_port_get(local_port);
1939
1940 /* Determine which ports to remove. */
1941 if (count == 2 && local_port >= base_port + 2)
1942 base_port = base_port + 2;
1943
1944 for (i = 0; i < count; i++)
1945 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
1946
1947 for (i = 0; i < count / 2; i++) {
1948 module = mlxsw_sp->port_to_module[base_port + i * 2];
1949 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i * 2, false,
1950 module, MLXSW_PORT_MODULE_MAX_WIDTH,
1951 0);
1952 if (err)
1953 dev_err(mlxsw_sp->bus_info->dev, "Failed to reinstantiate port\n");
1954 }
1955
1956 return 0;
1957}
1958
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001959static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
1960 char *pude_pl, void *priv)
1961{
1962 struct mlxsw_sp *mlxsw_sp = priv;
1963 struct mlxsw_sp_port *mlxsw_sp_port;
1964 enum mlxsw_reg_pude_oper_status status;
1965 u8 local_port;
1966
1967 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
1968 mlxsw_sp_port = mlxsw_sp->ports[local_port];
1969 if (!mlxsw_sp_port) {
1970 dev_warn(mlxsw_sp->bus_info->dev, "Port %d: Link event received for non-existent port\n",
1971 local_port);
1972 return;
1973 }
1974
1975 status = mlxsw_reg_pude_oper_status_get(pude_pl);
1976 if (status == MLXSW_PORT_OPER_STATUS_UP) {
1977 netdev_info(mlxsw_sp_port->dev, "link up\n");
1978 netif_carrier_on(mlxsw_sp_port->dev);
1979 } else {
1980 netdev_info(mlxsw_sp_port->dev, "link down\n");
1981 netif_carrier_off(mlxsw_sp_port->dev);
1982 }
1983}
1984
1985static struct mlxsw_event_listener mlxsw_sp_pude_event = {
1986 .func = mlxsw_sp_pude_event_func,
1987 .trap_id = MLXSW_TRAP_ID_PUDE,
1988};
1989
1990static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
1991 enum mlxsw_event_trap_id trap_id)
1992{
1993 struct mlxsw_event_listener *el;
1994 char hpkt_pl[MLXSW_REG_HPKT_LEN];
1995 int err;
1996
1997 switch (trap_id) {
1998 case MLXSW_TRAP_ID_PUDE:
1999 el = &mlxsw_sp_pude_event;
2000 break;
2001 }
2002 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2003 if (err)
2004 return err;
2005
2006 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2007 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2008 if (err)
2009 goto err_event_trap_set;
2010
2011 return 0;
2012
2013err_event_trap_set:
2014 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2015 return err;
2016}
2017
2018static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2019 enum mlxsw_event_trap_id trap_id)
2020{
2021 struct mlxsw_event_listener *el;
2022
2023 switch (trap_id) {
2024 case MLXSW_TRAP_ID_PUDE:
2025 el = &mlxsw_sp_pude_event;
2026 break;
2027 }
2028 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2029}
2030
2031static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2032 void *priv)
2033{
2034 struct mlxsw_sp *mlxsw_sp = priv;
2035 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2036 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2037
2038 if (unlikely(!mlxsw_sp_port)) {
2039 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2040 local_port);
2041 return;
2042 }
2043
2044 skb->dev = mlxsw_sp_port->dev;
2045
2046 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2047 u64_stats_update_begin(&pcpu_stats->syncp);
2048 pcpu_stats->rx_packets++;
2049 pcpu_stats->rx_bytes += skb->len;
2050 u64_stats_update_end(&pcpu_stats->syncp);
2051
2052 skb->protocol = eth_type_trans(skb, skb->dev);
2053 netif_receive_skb(skb);
2054}
2055
2056static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
2057 {
2058 .func = mlxsw_sp_rx_listener_func,
2059 .local_port = MLXSW_PORT_DONT_CARE,
2060 .trap_id = MLXSW_TRAP_ID_FDB_MC,
2061 },
2062 /* Traps for specific L2 packet types, not trapped as FDB MC */
2063 {
2064 .func = mlxsw_sp_rx_listener_func,
2065 .local_port = MLXSW_PORT_DONT_CARE,
2066 .trap_id = MLXSW_TRAP_ID_STP,
2067 },
2068 {
2069 .func = mlxsw_sp_rx_listener_func,
2070 .local_port = MLXSW_PORT_DONT_CARE,
2071 .trap_id = MLXSW_TRAP_ID_LACP,
2072 },
2073 {
2074 .func = mlxsw_sp_rx_listener_func,
2075 .local_port = MLXSW_PORT_DONT_CARE,
2076 .trap_id = MLXSW_TRAP_ID_EAPOL,
2077 },
2078 {
2079 .func = mlxsw_sp_rx_listener_func,
2080 .local_port = MLXSW_PORT_DONT_CARE,
2081 .trap_id = MLXSW_TRAP_ID_LLDP,
2082 },
2083 {
2084 .func = mlxsw_sp_rx_listener_func,
2085 .local_port = MLXSW_PORT_DONT_CARE,
2086 .trap_id = MLXSW_TRAP_ID_MMRP,
2087 },
2088 {
2089 .func = mlxsw_sp_rx_listener_func,
2090 .local_port = MLXSW_PORT_DONT_CARE,
2091 .trap_id = MLXSW_TRAP_ID_MVRP,
2092 },
2093 {
2094 .func = mlxsw_sp_rx_listener_func,
2095 .local_port = MLXSW_PORT_DONT_CARE,
2096 .trap_id = MLXSW_TRAP_ID_RPVST,
2097 },
2098 {
2099 .func = mlxsw_sp_rx_listener_func,
2100 .local_port = MLXSW_PORT_DONT_CARE,
2101 .trap_id = MLXSW_TRAP_ID_DHCP,
2102 },
2103 {
2104 .func = mlxsw_sp_rx_listener_func,
2105 .local_port = MLXSW_PORT_DONT_CARE,
2106 .trap_id = MLXSW_TRAP_ID_IGMP_QUERY,
2107 },
2108 {
2109 .func = mlxsw_sp_rx_listener_func,
2110 .local_port = MLXSW_PORT_DONT_CARE,
2111 .trap_id = MLXSW_TRAP_ID_IGMP_V1_REPORT,
2112 },
2113 {
2114 .func = mlxsw_sp_rx_listener_func,
2115 .local_port = MLXSW_PORT_DONT_CARE,
2116 .trap_id = MLXSW_TRAP_ID_IGMP_V2_REPORT,
2117 },
2118 {
2119 .func = mlxsw_sp_rx_listener_func,
2120 .local_port = MLXSW_PORT_DONT_CARE,
2121 .trap_id = MLXSW_TRAP_ID_IGMP_V2_LEAVE,
2122 },
2123 {
2124 .func = mlxsw_sp_rx_listener_func,
2125 .local_port = MLXSW_PORT_DONT_CARE,
2126 .trap_id = MLXSW_TRAP_ID_IGMP_V3_REPORT,
2127 },
2128};
2129
2130static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2131{
2132 char htgt_pl[MLXSW_REG_HTGT_LEN];
2133 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2134 int i;
2135 int err;
2136
2137 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2138 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2139 if (err)
2140 return err;
2141
2142 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2143 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2144 if (err)
2145 return err;
2146
2147 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2148 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2149 &mlxsw_sp_rx_listener[i],
2150 mlxsw_sp);
2151 if (err)
2152 goto err_rx_listener_register;
2153
2154 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,
2155 mlxsw_sp_rx_listener[i].trap_id);
2156 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2157 if (err)
2158 goto err_rx_trap_set;
2159 }
2160 return 0;
2161
2162err_rx_trap_set:
2163 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2164 &mlxsw_sp_rx_listener[i],
2165 mlxsw_sp);
2166err_rx_listener_register:
2167 for (i--; i >= 0; i--) {
2168 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD,
2169 mlxsw_sp_rx_listener[i].trap_id);
2170 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2171
2172 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2173 &mlxsw_sp_rx_listener[i],
2174 mlxsw_sp);
2175 }
2176 return err;
2177}
2178
2179static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2180{
2181 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2182 int i;
2183
2184 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2185 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD,
2186 mlxsw_sp_rx_listener[i].trap_id);
2187 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2188
2189 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2190 &mlxsw_sp_rx_listener[i],
2191 mlxsw_sp);
2192 }
2193}
2194
2195static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2196 enum mlxsw_reg_sfgc_type type,
2197 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2198{
2199 enum mlxsw_flood_table_type table_type;
2200 enum mlxsw_sp_flood_table flood_table;
2201 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2202
Ido Schimmel19ae6122015-12-15 16:03:39 +01002203 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002204 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002205 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002206 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002207
2208 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2209 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2210 else
2211 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002212
2213 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2214 flood_table);
2215 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2216}
2217
2218static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2219{
2220 int type, err;
2221
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002222 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2223 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2224 continue;
2225
2226 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2227 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2228 if (err)
2229 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002230
2231 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2232 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2233 if (err)
2234 return err;
2235 }
2236
2237 return 0;
2238}
2239
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002240static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2241{
2242 char slcr_pl[MLXSW_REG_SLCR_LEN];
2243
2244 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2245 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2246 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2247 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2248 MLXSW_REG_SLCR_LAG_HASH_SIP |
2249 MLXSW_REG_SLCR_LAG_HASH_DIP |
2250 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2251 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2252 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
2253 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2254}
2255
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002256static int mlxsw_sp_init(void *priv, struct mlxsw_core *mlxsw_core,
2257 const struct mlxsw_bus_info *mlxsw_bus_info)
2258{
2259 struct mlxsw_sp *mlxsw_sp = priv;
2260 int err;
2261
2262 mlxsw_sp->core = mlxsw_core;
2263 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002264 INIT_LIST_HEAD(&mlxsw_sp->port_vfids.list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01002265 INIT_LIST_HEAD(&mlxsw_sp->br_vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01002266 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002267
2268 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2269 if (err) {
2270 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2271 return err;
2272 }
2273
2274 err = mlxsw_sp_ports_create(mlxsw_sp);
2275 if (err) {
2276 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002277 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002278 }
2279
2280 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2281 if (err) {
2282 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
2283 goto err_event_register;
2284 }
2285
2286 err = mlxsw_sp_traps_init(mlxsw_sp);
2287 if (err) {
2288 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2289 goto err_rx_listener_register;
2290 }
2291
2292 err = mlxsw_sp_flood_init(mlxsw_sp);
2293 if (err) {
2294 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2295 goto err_flood_init;
2296 }
2297
2298 err = mlxsw_sp_buffers_init(mlxsw_sp);
2299 if (err) {
2300 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2301 goto err_buffers_init;
2302 }
2303
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002304 err = mlxsw_sp_lag_init(mlxsw_sp);
2305 if (err) {
2306 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2307 goto err_lag_init;
2308 }
2309
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002310 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2311 if (err) {
2312 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2313 goto err_switchdev_init;
2314 }
2315
2316 return 0;
2317
2318err_switchdev_init:
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002319err_lag_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002320err_buffers_init:
2321err_flood_init:
2322 mlxsw_sp_traps_fini(mlxsw_sp);
2323err_rx_listener_register:
2324 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2325err_event_register:
2326 mlxsw_sp_ports_remove(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002327 return err;
2328}
2329
2330static void mlxsw_sp_fini(void *priv)
2331{
2332 struct mlxsw_sp *mlxsw_sp = priv;
2333
2334 mlxsw_sp_switchdev_fini(mlxsw_sp);
2335 mlxsw_sp_traps_fini(mlxsw_sp);
2336 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2337 mlxsw_sp_ports_remove(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002338}
2339
2340static struct mlxsw_config_profile mlxsw_sp_config_profile = {
2341 .used_max_vepa_channels = 1,
2342 .max_vepa_channels = 0,
2343 .used_max_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002344 .max_lag = MLXSW_SP_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002345 .used_max_port_per_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002346 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002347 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01002348 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002349 .used_max_pgt = 1,
2350 .max_pgt = 0,
2351 .used_max_system_port = 1,
2352 .max_system_port = 64,
2353 .used_max_vlan_groups = 1,
2354 .max_vlan_groups = 127,
2355 .used_max_regions = 1,
2356 .max_regions = 400,
2357 .used_flood_tables = 1,
2358 .used_flood_mode = 1,
2359 .flood_mode = 3,
2360 .max_fid_offset_flood_tables = 2,
2361 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01002362 .max_fid_flood_tables = 2,
2363 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002364 .used_max_ib_mc = 1,
2365 .max_ib_mc = 0,
2366 .used_max_pkey = 1,
2367 .max_pkey = 0,
2368 .swid_config = {
2369 {
2370 .used_type = 1,
2371 .type = MLXSW_PORT_SWID_TYPE_ETH,
2372 }
2373 },
2374};
2375
2376static struct mlxsw_driver mlxsw_sp_driver = {
2377 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
2378 .owner = THIS_MODULE,
2379 .priv_size = sizeof(struct mlxsw_sp),
2380 .init = mlxsw_sp_init,
2381 .fini = mlxsw_sp_fini,
Ido Schimmel18f1e702016-02-26 17:32:31 +01002382 .port_split = mlxsw_sp_port_split,
2383 .port_unsplit = mlxsw_sp_port_unsplit,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002384 .txhdr_construct = mlxsw_sp_txhdr_construct,
2385 .txhdr_len = MLXSW_TXHDR_LEN,
2386 .profile = &mlxsw_sp_config_profile,
2387};
2388
Ido Schimmel039c49a2016-01-27 15:20:18 +01002389static int
2390mlxsw_sp_port_fdb_flush_by_port(const struct mlxsw_sp_port *mlxsw_sp_port)
2391{
2392 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2393 char sfdf_pl[MLXSW_REG_SFDF_LEN];
2394
2395 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT);
2396 mlxsw_reg_sfdf_system_port_set(sfdf_pl, mlxsw_sp_port->local_port);
2397
2398 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
2399}
2400
2401static int
2402mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
2403 u16 fid)
2404{
2405 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2406 char sfdf_pl[MLXSW_REG_SFDF_LEN];
2407
2408 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
2409 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
2410 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
2411 mlxsw_sp_port->local_port);
2412
2413 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
2414}
2415
2416static int
2417mlxsw_sp_port_fdb_flush_by_lag_id(const struct mlxsw_sp_port *mlxsw_sp_port)
2418{
2419 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2420 char sfdf_pl[MLXSW_REG_SFDF_LEN];
2421
2422 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG);
2423 mlxsw_reg_sfdf_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
2424
2425 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
2426}
2427
2428static int
2429mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
2430 u16 fid)
2431{
2432 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2433 char sfdf_pl[MLXSW_REG_SFDF_LEN];
2434
2435 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
2436 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
2437 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
2438
2439 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
2440}
2441
2442static int
2443__mlxsw_sp_port_fdb_flush(const struct mlxsw_sp_port *mlxsw_sp_port)
2444{
2445 int err, last_err = 0;
2446 u16 vid;
2447
2448 for (vid = 1; vid < VLAN_N_VID - 1; vid++) {
2449 err = mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, vid);
2450 if (err)
2451 last_err = err;
2452 }
2453
2454 return last_err;
2455}
2456
2457static int
2458__mlxsw_sp_port_fdb_flush_lagged(const struct mlxsw_sp_port *mlxsw_sp_port)
2459{
2460 int err, last_err = 0;
2461 u16 vid;
2462
2463 for (vid = 1; vid < VLAN_N_VID - 1; vid++) {
2464 err = mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port, vid);
2465 if (err)
2466 last_err = err;
2467 }
2468
2469 return last_err;
2470}
2471
2472static int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port)
2473{
2474 if (!list_empty(&mlxsw_sp_port->vports_list))
2475 if (mlxsw_sp_port->lagged)
2476 return __mlxsw_sp_port_fdb_flush_lagged(mlxsw_sp_port);
2477 else
2478 return __mlxsw_sp_port_fdb_flush(mlxsw_sp_port);
2479 else
2480 if (mlxsw_sp_port->lagged)
2481 return mlxsw_sp_port_fdb_flush_by_lag_id(mlxsw_sp_port);
2482 else
2483 return mlxsw_sp_port_fdb_flush_by_port(mlxsw_sp_port);
2484}
2485
2486static int mlxsw_sp_vport_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_vport)
2487{
2488 u16 vfid = mlxsw_sp_vport_vfid_get(mlxsw_sp_vport);
2489 u16 fid = mlxsw_sp_vfid_to_fid(vfid);
2490
2491 if (mlxsw_sp_vport->lagged)
2492 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_vport,
2493 fid);
2494 else
2495 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_vport, fid);
2496}
2497
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002498static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
2499{
2500 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
2501}
2502
2503static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port)
2504{
2505 struct net_device *dev = mlxsw_sp_port->dev;
2506 int err;
2507
2508 /* When port is not bridged untagged packets are tagged with
2509 * PVID=VID=1, thereby creating an implicit VLAN interface in
2510 * the device. Remove it and let bridge code take care of its
2511 * own VLANs.
2512 */
2513 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01002514 if (err)
2515 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002516
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01002517 mlxsw_sp_port->learning = 1;
2518 mlxsw_sp_port->learning_sync = 1;
2519 mlxsw_sp_port->uc_flood = 1;
2520 mlxsw_sp_port->bridged = 1;
2521
2522 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002523}
2524
Ido Schimmel039c49a2016-01-27 15:20:18 +01002525static int mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port,
2526 bool flush_fdb)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002527{
2528 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01002529
Ido Schimmel039c49a2016-01-27 15:20:18 +01002530 if (flush_fdb && mlxsw_sp_port_fdb_flush(mlxsw_sp_port))
2531 netdev_err(mlxsw_sp_port->dev, "Failed to flush FDB\n");
2532
Ido Schimmel28a01d22016-02-18 11:30:02 +01002533 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
2534
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01002535 mlxsw_sp_port->learning = 0;
2536 mlxsw_sp_port->learning_sync = 0;
2537 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01002538 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002539
2540 /* Add implicit VLAN interface in the device, so that untagged
2541 * packets will be classified to the default vFID.
2542 */
Ido Schimmel5a8f4522016-01-04 10:42:25 +01002543 return mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002544}
2545
2546static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
2547 struct net_device *br_dev)
2548{
2549 return !mlxsw_sp->master_bridge.dev ||
2550 mlxsw_sp->master_bridge.dev == br_dev;
2551}
2552
2553static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
2554 struct net_device *br_dev)
2555{
2556 mlxsw_sp->master_bridge.dev = br_dev;
2557 mlxsw_sp->master_bridge.ref_count++;
2558}
2559
2560static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp,
2561 struct net_device *br_dev)
2562{
2563 if (--mlxsw_sp->master_bridge.ref_count == 0)
2564 mlxsw_sp->master_bridge.dev = NULL;
2565}
2566
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002567static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002568{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002569 char sldr_pl[MLXSW_REG_SLDR_LEN];
2570
2571 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
2572 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2573}
2574
2575static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
2576{
2577 char sldr_pl[MLXSW_REG_SLDR_LEN];
2578
2579 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
2580 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2581}
2582
2583static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
2584 u16 lag_id, u8 port_index)
2585{
2586 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2587 char slcor_pl[MLXSW_REG_SLCOR_LEN];
2588
2589 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
2590 lag_id, port_index);
2591 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2592}
2593
2594static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
2595 u16 lag_id)
2596{
2597 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2598 char slcor_pl[MLXSW_REG_SLCOR_LEN];
2599
2600 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
2601 lag_id);
2602 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2603}
2604
2605static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
2606 u16 lag_id)
2607{
2608 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2609 char slcor_pl[MLXSW_REG_SLCOR_LEN];
2610
2611 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
2612 lag_id);
2613 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2614}
2615
2616static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
2617 u16 lag_id)
2618{
2619 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2620 char slcor_pl[MLXSW_REG_SLCOR_LEN];
2621
2622 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
2623 lag_id);
2624 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2625}
2626
2627static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
2628 struct net_device *lag_dev,
2629 u16 *p_lag_id)
2630{
2631 struct mlxsw_sp_upper *lag;
2632 int free_lag_id = -1;
2633 int i;
2634
2635 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
2636 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
2637 if (lag->ref_count) {
2638 if (lag->dev == lag_dev) {
2639 *p_lag_id = i;
2640 return 0;
2641 }
2642 } else if (free_lag_id < 0) {
2643 free_lag_id = i;
2644 }
2645 }
2646 if (free_lag_id < 0)
2647 return -EBUSY;
2648 *p_lag_id = free_lag_id;
2649 return 0;
2650}
2651
2652static bool
2653mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
2654 struct net_device *lag_dev,
2655 struct netdev_lag_upper_info *lag_upper_info)
2656{
2657 u16 lag_id;
2658
2659 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
2660 return false;
2661 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
2662 return false;
2663 return true;
2664}
2665
2666static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
2667 u16 lag_id, u8 *p_port_index)
2668{
2669 int i;
2670
2671 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
2672 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
2673 *p_port_index = i;
2674 return 0;
2675 }
2676 }
2677 return -EBUSY;
2678}
2679
2680static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
2681 struct net_device *lag_dev)
2682{
2683 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2684 struct mlxsw_sp_upper *lag;
2685 u16 lag_id;
2686 u8 port_index;
2687 int err;
2688
2689 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
2690 if (err)
2691 return err;
2692 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
2693 if (!lag->ref_count) {
2694 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
2695 if (err)
2696 return err;
2697 lag->dev = lag_dev;
2698 }
2699
2700 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
2701 if (err)
2702 return err;
2703 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
2704 if (err)
2705 goto err_col_port_add;
2706 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
2707 if (err)
2708 goto err_col_port_enable;
2709
2710 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
2711 mlxsw_sp_port->local_port);
2712 mlxsw_sp_port->lag_id = lag_id;
2713 mlxsw_sp_port->lagged = 1;
2714 lag->ref_count++;
2715 return 0;
2716
2717err_col_port_add:
2718 if (!lag->ref_count)
2719 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
2720err_col_port_enable:
2721 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
2722 return err;
2723}
2724
Ido Schimmel4dc236c2016-01-27 15:20:16 +01002725static int mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport,
Ido Schimmel039c49a2016-01-27 15:20:18 +01002726 struct net_device *br_dev,
2727 bool flush_fdb);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01002728
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002729static int mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
2730 struct net_device *lag_dev)
2731{
2732 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel4dc236c2016-01-27 15:20:16 +01002733 struct mlxsw_sp_port *mlxsw_sp_vport;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002734 struct mlxsw_sp_upper *lag;
2735 u16 lag_id = mlxsw_sp_port->lag_id;
2736 int err;
2737
2738 if (!mlxsw_sp_port->lagged)
2739 return 0;
2740 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
2741 WARN_ON(lag->ref_count == 0);
2742
2743 err = mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
2744 if (err)
2745 return err;
Dan Carpenter82a06422015-12-09 13:33:51 +03002746 err = mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002747 if (err)
2748 return err;
2749
Ido Schimmel4dc236c2016-01-27 15:20:16 +01002750 /* In case we leave a LAG device that has bridges built on top,
2751 * then their teardown sequence is never issued and we need to
2752 * invoke the necessary cleanup routines ourselves.
2753 */
2754 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
2755 vport.list) {
2756 struct net_device *br_dev;
2757
2758 if (!mlxsw_sp_vport->bridged)
2759 continue;
2760
2761 br_dev = mlxsw_sp_vport_br_get(mlxsw_sp_vport);
Ido Schimmel039c49a2016-01-27 15:20:18 +01002762 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport, br_dev, false);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01002763 }
2764
2765 if (mlxsw_sp_port->bridged) {
2766 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmel039c49a2016-01-27 15:20:18 +01002767 mlxsw_sp_port_bridge_leave(mlxsw_sp_port, false);
Ido Schimmel912b1c82016-03-07 15:15:29 +01002768 mlxsw_sp_master_bridge_dec(mlxsw_sp, NULL);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01002769 }
2770
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002771 if (lag->ref_count == 1) {
Ido Schimmel039c49a2016-01-27 15:20:18 +01002772 if (mlxsw_sp_port_fdb_flush_by_lag_id(mlxsw_sp_port))
2773 netdev_err(mlxsw_sp_port->dev, "Failed to flush FDB\n");
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002774 err = mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
2775 if (err)
2776 return err;
2777 }
2778
2779 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
2780 mlxsw_sp_port->local_port);
2781 mlxsw_sp_port->lagged = 0;
2782 lag->ref_count--;
2783 return 0;
2784}
2785
Jiri Pirko74581202015-12-03 12:12:30 +01002786static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
2787 u16 lag_id)
2788{
2789 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2790 char sldr_pl[MLXSW_REG_SLDR_LEN];
2791
2792 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
2793 mlxsw_sp_port->local_port);
2794 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2795}
2796
2797static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
2798 u16 lag_id)
2799{
2800 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2801 char sldr_pl[MLXSW_REG_SLDR_LEN];
2802
2803 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
2804 mlxsw_sp_port->local_port);
2805 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2806}
2807
2808static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
2809 bool lag_tx_enabled)
2810{
2811 if (lag_tx_enabled)
2812 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
2813 mlxsw_sp_port->lag_id);
2814 else
2815 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
2816 mlxsw_sp_port->lag_id);
2817}
2818
2819static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
2820 struct netdev_lag_lower_state_info *info)
2821{
2822 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
2823}
2824
Ido Schimmel9589a7b52015-12-15 16:03:43 +01002825static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
2826 struct net_device *vlan_dev)
2827{
2828 struct mlxsw_sp_port *mlxsw_sp_vport;
2829 u16 vid = vlan_dev_vlan_id(vlan_dev);
2830
2831 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
2832 if (!mlxsw_sp_vport) {
2833 WARN_ON(!mlxsw_sp_vport);
2834 return -EINVAL;
2835 }
2836
2837 mlxsw_sp_vport->dev = vlan_dev;
2838
2839 return 0;
2840}
2841
2842static int mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
2843 struct net_device *vlan_dev)
2844{
2845 struct mlxsw_sp_port *mlxsw_sp_vport;
2846 u16 vid = vlan_dev_vlan_id(vlan_dev);
2847
2848 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
2849 if (!mlxsw_sp_vport) {
2850 WARN_ON(!mlxsw_sp_vport);
2851 return -EINVAL;
2852 }
2853
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01002854 /* When removing a VLAN device while still bridged we should first
2855 * remove it from the bridge, as we receive the bridge's notification
2856 * when the vPort is already gone.
2857 */
2858 if (mlxsw_sp_vport->bridged) {
2859 struct net_device *br_dev;
2860
2861 br_dev = mlxsw_sp_vport_br_get(mlxsw_sp_vport);
Ido Schimmel039c49a2016-01-27 15:20:18 +01002862 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport, br_dev, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01002863 }
2864
Ido Schimmel9589a7b52015-12-15 16:03:43 +01002865 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
2866
2867 return 0;
2868}
2869
Jiri Pirko74581202015-12-03 12:12:30 +01002870static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
2871 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002872{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002873 struct netdev_notifier_changeupper_info *info;
2874 struct mlxsw_sp_port *mlxsw_sp_port;
2875 struct net_device *upper_dev;
2876 struct mlxsw_sp *mlxsw_sp;
2877 int err;
2878
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002879 mlxsw_sp_port = netdev_priv(dev);
2880 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2881 info = ptr;
2882
2883 switch (event) {
2884 case NETDEV_PRECHANGEUPPER:
2885 upper_dev = info->upper_dev;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002886 if (!info->master || !info->linking)
2887 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002888 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002889 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002890 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
2891 return NOTIFY_BAD;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002892 if (netif_is_lag_master(upper_dev) &&
2893 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
2894 info->upper_info))
2895 return NOTIFY_BAD;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002896 break;
2897 case NETDEV_CHANGEUPPER:
2898 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01002899 if (is_vlan_dev(upper_dev)) {
2900 if (info->linking) {
2901 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
2902 upper_dev);
2903 if (err) {
2904 netdev_err(dev, "Failed to link VLAN device\n");
2905 return NOTIFY_BAD;
2906 }
2907 } else {
2908 err = mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
2909 upper_dev);
2910 if (err) {
2911 netdev_err(dev, "Failed to unlink VLAN device\n");
2912 return NOTIFY_BAD;
2913 }
2914 }
2915 } else if (netif_is_bridge_master(upper_dev)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002916 if (info->linking) {
2917 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port);
Ido Schimmel78124072016-01-04 10:42:24 +01002918 if (err) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002919 netdev_err(dev, "Failed to join bridge\n");
Ido Schimmel78124072016-01-04 10:42:24 +01002920 return NOTIFY_BAD;
2921 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002922 mlxsw_sp_master_bridge_inc(mlxsw_sp, upper_dev);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002923 } else {
Ido Schimmel039c49a2016-01-27 15:20:18 +01002924 err = mlxsw_sp_port_bridge_leave(mlxsw_sp_port,
2925 true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002926 mlxsw_sp_master_bridge_dec(mlxsw_sp, upper_dev);
Ido Schimmel78124072016-01-04 10:42:24 +01002927 if (err) {
2928 netdev_err(dev, "Failed to leave bridge\n");
2929 return NOTIFY_BAD;
2930 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002931 }
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002932 } else if (netif_is_lag_master(upper_dev)) {
2933 if (info->linking) {
2934 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
2935 upper_dev);
2936 if (err) {
2937 netdev_err(dev, "Failed to join link aggregation\n");
2938 return NOTIFY_BAD;
2939 }
2940 } else {
2941 err = mlxsw_sp_port_lag_leave(mlxsw_sp_port,
2942 upper_dev);
2943 if (err) {
2944 netdev_err(dev, "Failed to leave link aggregation\n");
2945 return NOTIFY_BAD;
2946 }
2947 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002948 }
2949 break;
2950 }
2951
2952 return NOTIFY_DONE;
2953}
2954
Jiri Pirko74581202015-12-03 12:12:30 +01002955static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
2956 unsigned long event, void *ptr)
2957{
2958 struct netdev_notifier_changelowerstate_info *info;
2959 struct mlxsw_sp_port *mlxsw_sp_port;
2960 int err;
2961
2962 mlxsw_sp_port = netdev_priv(dev);
2963 info = ptr;
2964
2965 switch (event) {
2966 case NETDEV_CHANGELOWERSTATE:
2967 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
2968 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
2969 info->lower_state_info);
2970 if (err)
2971 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
2972 }
2973 break;
2974 }
2975
2976 return NOTIFY_DONE;
2977}
2978
2979static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
2980 unsigned long event, void *ptr)
2981{
2982 switch (event) {
2983 case NETDEV_PRECHANGEUPPER:
2984 case NETDEV_CHANGEUPPER:
2985 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
2986 case NETDEV_CHANGELOWERSTATE:
2987 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
2988 }
2989
2990 return NOTIFY_DONE;
2991}
2992
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002993static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
2994 unsigned long event, void *ptr)
2995{
2996 struct net_device *dev;
2997 struct list_head *iter;
2998 int ret;
2999
3000 netdev_for_each_lower_dev(lag_dev, dev, iter) {
3001 if (mlxsw_sp_port_dev_check(dev)) {
3002 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
3003 if (ret == NOTIFY_BAD)
3004 return ret;
3005 }
3006 }
3007
3008 return NOTIFY_DONE;
3009}
3010
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003011static struct mlxsw_sp_vfid *
3012mlxsw_sp_br_vfid_find(const struct mlxsw_sp *mlxsw_sp,
3013 const struct net_device *br_dev)
3014{
3015 struct mlxsw_sp_vfid *vfid;
3016
3017 list_for_each_entry(vfid, &mlxsw_sp->br_vfids.list, list) {
3018 if (vfid->br_dev == br_dev)
3019 return vfid;
3020 }
3021
3022 return NULL;
3023}
3024
3025static u16 mlxsw_sp_vfid_to_br_vfid(u16 vfid)
3026{
3027 return vfid - MLXSW_SP_VFID_PORT_MAX;
3028}
3029
3030static u16 mlxsw_sp_br_vfid_to_vfid(u16 br_vfid)
3031{
3032 return MLXSW_SP_VFID_PORT_MAX + br_vfid;
3033}
3034
3035static u16 mlxsw_sp_avail_br_vfid_get(const struct mlxsw_sp *mlxsw_sp)
3036{
3037 return find_first_zero_bit(mlxsw_sp->br_vfids.mapped,
3038 MLXSW_SP_VFID_BR_MAX);
3039}
3040
3041static struct mlxsw_sp_vfid *mlxsw_sp_br_vfid_create(struct mlxsw_sp *mlxsw_sp,
3042 struct net_device *br_dev)
3043{
3044 struct device *dev = mlxsw_sp->bus_info->dev;
3045 struct mlxsw_sp_vfid *vfid;
3046 u16 n_vfid;
3047 int err;
3048
3049 n_vfid = mlxsw_sp_br_vfid_to_vfid(mlxsw_sp_avail_br_vfid_get(mlxsw_sp));
3050 if (n_vfid == MLXSW_SP_VFID_MAX) {
3051 dev_err(dev, "No available vFIDs\n");
3052 return ERR_PTR(-ERANGE);
3053 }
3054
3055 err = __mlxsw_sp_vfid_create(mlxsw_sp, n_vfid);
3056 if (err) {
3057 dev_err(dev, "Failed to create vFID=%d\n", n_vfid);
3058 return ERR_PTR(err);
3059 }
3060
3061 vfid = kzalloc(sizeof(*vfid), GFP_KERNEL);
3062 if (!vfid)
3063 goto err_allocate_vfid;
3064
3065 vfid->vfid = n_vfid;
3066 vfid->br_dev = br_dev;
3067
3068 list_add(&vfid->list, &mlxsw_sp->br_vfids.list);
3069 set_bit(mlxsw_sp_vfid_to_br_vfid(n_vfid), mlxsw_sp->br_vfids.mapped);
3070
3071 return vfid;
3072
3073err_allocate_vfid:
3074 __mlxsw_sp_vfid_destroy(mlxsw_sp, n_vfid);
3075 return ERR_PTR(-ENOMEM);
3076}
3077
3078static void mlxsw_sp_br_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
3079 struct mlxsw_sp_vfid *vfid)
3080{
3081 u16 br_vfid = mlxsw_sp_vfid_to_br_vfid(vfid->vfid);
3082
3083 clear_bit(br_vfid, mlxsw_sp->br_vfids.mapped);
3084 list_del(&vfid->list);
3085
3086 __mlxsw_sp_vfid_destroy(mlxsw_sp, vfid->vfid);
3087
3088 kfree(vfid);
3089}
3090
3091static int mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003092 struct net_device *br_dev,
3093 bool flush_fdb)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003094{
3095 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3096 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
3097 struct net_device *dev = mlxsw_sp_vport->dev;
3098 struct mlxsw_sp_vfid *vfid, *new_vfid;
3099 int err;
3100
3101 vfid = mlxsw_sp_br_vfid_find(mlxsw_sp, br_dev);
3102 if (!vfid) {
3103 WARN_ON(!vfid);
3104 return -EINVAL;
3105 }
3106
3107 /* We need a vFID to go back to after leaving the bridge's vFID. */
3108 new_vfid = mlxsw_sp_vfid_find(mlxsw_sp, vid);
3109 if (!new_vfid) {
3110 new_vfid = mlxsw_sp_vfid_create(mlxsw_sp, vid);
3111 if (IS_ERR(new_vfid)) {
3112 netdev_err(dev, "Failed to create vFID for VID=%d\n",
3113 vid);
3114 return PTR_ERR(new_vfid);
3115 }
3116 }
3117
3118 /* Invalidate existing {Port, VID} to vFID mapping and create a new
3119 * one for the new vFID.
3120 */
3121 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
3122 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
3123 false,
3124 mlxsw_sp_vfid_to_fid(vfid->vfid),
3125 vid);
3126 if (err) {
3127 netdev_err(dev, "Failed to invalidate {Port, VID} to vFID=%d mapping\n",
3128 vfid->vfid);
3129 goto err_port_vid_to_fid_invalidate;
3130 }
3131
3132 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
3133 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
3134 true,
3135 mlxsw_sp_vfid_to_fid(new_vfid->vfid),
3136 vid);
3137 if (err) {
3138 netdev_err(dev, "Failed to map {Port, VID} to vFID=%d\n",
3139 new_vfid->vfid);
3140 goto err_port_vid_to_fid_validate;
3141 }
3142
3143 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
3144 if (err) {
3145 netdev_err(dev, "Failed to disable learning\n");
3146 goto err_port_vid_learning_set;
3147 }
3148
3149 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid, false,
3150 false);
3151 if (err) {
3152 netdev_err(dev, "Failed clear to clear flooding\n");
3153 goto err_vport_flood_set;
3154 }
3155
Ido Schimmel6a9863a2016-02-15 13:19:54 +01003156 err = mlxsw_sp_port_stp_state_set(mlxsw_sp_vport, vid,
3157 MLXSW_REG_SPMS_STATE_FORWARDING);
3158 if (err) {
3159 netdev_err(dev, "Failed to set STP state\n");
3160 goto err_port_stp_state_set;
3161 }
3162
Ido Schimmel039c49a2016-01-27 15:20:18 +01003163 if (flush_fdb && mlxsw_sp_vport_fdb_flush(mlxsw_sp_vport))
3164 netdev_err(dev, "Failed to flush FDB\n");
3165
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003166 /* Switch between the vFIDs and destroy the old one if needed. */
3167 new_vfid->nr_vports++;
3168 mlxsw_sp_vport->vport.vfid = new_vfid;
3169 vfid->nr_vports--;
3170 if (!vfid->nr_vports)
3171 mlxsw_sp_br_vfid_destroy(mlxsw_sp, vfid);
3172
3173 mlxsw_sp_vport->learning = 0;
3174 mlxsw_sp_vport->learning_sync = 0;
3175 mlxsw_sp_vport->uc_flood = 0;
3176 mlxsw_sp_vport->bridged = 0;
3177
3178 return 0;
3179
Ido Schimmel6a9863a2016-02-15 13:19:54 +01003180err_port_stp_state_set:
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003181err_vport_flood_set:
3182err_port_vid_learning_set:
3183err_port_vid_to_fid_validate:
3184err_port_vid_to_fid_invalidate:
3185 /* Rollback vFID only if new. */
3186 if (!new_vfid->nr_vports)
3187 mlxsw_sp_vfid_destroy(mlxsw_sp, new_vfid);
3188 return err;
3189}
3190
3191static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3192 struct net_device *br_dev)
3193{
3194 struct mlxsw_sp_vfid *old_vfid = mlxsw_sp_vport->vport.vfid;
3195 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3196 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
3197 struct net_device *dev = mlxsw_sp_vport->dev;
3198 struct mlxsw_sp_vfid *vfid;
3199 int err;
3200
3201 vfid = mlxsw_sp_br_vfid_find(mlxsw_sp, br_dev);
3202 if (!vfid) {
3203 vfid = mlxsw_sp_br_vfid_create(mlxsw_sp, br_dev);
3204 if (IS_ERR(vfid)) {
3205 netdev_err(dev, "Failed to create bridge vFID\n");
3206 return PTR_ERR(vfid);
3207 }
3208 }
3209
3210 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid, true, false);
3211 if (err) {
3212 netdev_err(dev, "Failed to setup flooding for vFID=%d\n",
3213 vfid->vfid);
3214 goto err_port_flood_set;
3215 }
3216
3217 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
3218 if (err) {
3219 netdev_err(dev, "Failed to enable learning\n");
3220 goto err_port_vid_learning_set;
3221 }
3222
3223 /* We need to invalidate existing {Port, VID} to vFID mapping and
3224 * create a new one for the bridge's vFID.
3225 */
3226 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
3227 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
3228 false,
3229 mlxsw_sp_vfid_to_fid(old_vfid->vfid),
3230 vid);
3231 if (err) {
3232 netdev_err(dev, "Failed to invalidate {Port, VID} to vFID=%d mapping\n",
3233 old_vfid->vfid);
3234 goto err_port_vid_to_fid_invalidate;
3235 }
3236
3237 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
3238 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
3239 true,
3240 mlxsw_sp_vfid_to_fid(vfid->vfid),
3241 vid);
3242 if (err) {
3243 netdev_err(dev, "Failed to map {Port, VID} to vFID=%d\n",
3244 vfid->vfid);
3245 goto err_port_vid_to_fid_validate;
3246 }
3247
3248 /* Switch between the vFIDs and destroy the old one if needed. */
3249 vfid->nr_vports++;
3250 mlxsw_sp_vport->vport.vfid = vfid;
3251 old_vfid->nr_vports--;
3252 if (!old_vfid->nr_vports)
3253 mlxsw_sp_vfid_destroy(mlxsw_sp, old_vfid);
3254
3255 mlxsw_sp_vport->learning = 1;
3256 mlxsw_sp_vport->learning_sync = 1;
3257 mlxsw_sp_vport->uc_flood = 1;
3258 mlxsw_sp_vport->bridged = 1;
3259
3260 return 0;
3261
3262err_port_vid_to_fid_validate:
3263 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
3264 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID, false,
3265 mlxsw_sp_vfid_to_fid(old_vfid->vfid), vid);
3266err_port_vid_to_fid_invalidate:
3267 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
3268err_port_vid_learning_set:
3269 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid, false, false);
3270err_port_flood_set:
3271 if (!vfid->nr_vports)
3272 mlxsw_sp_br_vfid_destroy(mlxsw_sp, vfid);
3273 return err;
3274}
3275
3276static bool
3277mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
3278 const struct net_device *br_dev)
3279{
3280 struct mlxsw_sp_port *mlxsw_sp_vport;
3281
3282 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
3283 vport.list) {
3284 if (mlxsw_sp_vport_br_get(mlxsw_sp_vport) == br_dev)
3285 return false;
3286 }
3287
3288 return true;
3289}
3290
3291static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
3292 unsigned long event, void *ptr,
3293 u16 vid)
3294{
3295 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
3296 struct netdev_notifier_changeupper_info *info = ptr;
3297 struct mlxsw_sp_port *mlxsw_sp_vport;
3298 struct net_device *upper_dev;
3299 int err;
3300
3301 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3302
3303 switch (event) {
3304 case NETDEV_PRECHANGEUPPER:
3305 upper_dev = info->upper_dev;
3306 if (!info->master || !info->linking)
3307 break;
3308 if (!netif_is_bridge_master(upper_dev))
3309 return NOTIFY_BAD;
3310 /* We can't have multiple VLAN interfaces configured on
3311 * the same port and being members in the same bridge.
3312 */
3313 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
3314 upper_dev))
3315 return NOTIFY_BAD;
3316 break;
3317 case NETDEV_CHANGEUPPER:
3318 upper_dev = info->upper_dev;
3319 if (!info->master)
3320 break;
3321 if (info->linking) {
3322 if (!mlxsw_sp_vport) {
3323 WARN_ON(!mlxsw_sp_vport);
3324 return NOTIFY_BAD;
3325 }
3326 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
3327 upper_dev);
3328 if (err) {
3329 netdev_err(dev, "Failed to join bridge\n");
3330 return NOTIFY_BAD;
3331 }
3332 } else {
3333 /* We ignore bridge's unlinking notifications if vPort
3334 * is gone, since we already left the bridge when the
3335 * VLAN device was unlinked from the real device.
3336 */
3337 if (!mlxsw_sp_vport)
3338 return NOTIFY_DONE;
3339 err = mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003340 upper_dev, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003341 if (err) {
3342 netdev_err(dev, "Failed to leave bridge\n");
3343 return NOTIFY_BAD;
3344 }
3345 }
3346 }
3347
3348 return NOTIFY_DONE;
3349}
3350
Ido Schimmel272c4472015-12-15 16:03:47 +01003351static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
3352 unsigned long event, void *ptr,
3353 u16 vid)
3354{
3355 struct net_device *dev;
3356 struct list_head *iter;
3357 int ret;
3358
3359 netdev_for_each_lower_dev(lag_dev, dev, iter) {
3360 if (mlxsw_sp_port_dev_check(dev)) {
3361 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
3362 vid);
3363 if (ret == NOTIFY_BAD)
3364 return ret;
3365 }
3366 }
3367
3368 return NOTIFY_DONE;
3369}
3370
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003371static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
3372 unsigned long event, void *ptr)
3373{
3374 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
3375 u16 vid = vlan_dev_vlan_id(vlan_dev);
3376
Ido Schimmel272c4472015-12-15 16:03:47 +01003377 if (mlxsw_sp_port_dev_check(real_dev))
3378 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
3379 vid);
3380 else if (netif_is_lag_master(real_dev))
3381 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
3382 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003383
Ido Schimmel272c4472015-12-15 16:03:47 +01003384 return NOTIFY_DONE;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003385}
3386
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003387static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
3388 unsigned long event, void *ptr)
3389{
3390 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
3391
3392 if (mlxsw_sp_port_dev_check(dev))
3393 return mlxsw_sp_netdevice_port_event(dev, event, ptr);
3394
3395 if (netif_is_lag_master(dev))
3396 return mlxsw_sp_netdevice_lag_event(dev, event, ptr);
3397
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003398 if (is_vlan_dev(dev))
3399 return mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
3400
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003401 return NOTIFY_DONE;
3402}
3403
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003404static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
3405 .notifier_call = mlxsw_sp_netdevice_event,
3406};
3407
3408static int __init mlxsw_sp_module_init(void)
3409{
3410 int err;
3411
3412 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
3413 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
3414 if (err)
3415 goto err_core_driver_register;
3416 return 0;
3417
3418err_core_driver_register:
3419 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
3420 return err;
3421}
3422
3423static void __exit mlxsw_sp_module_exit(void)
3424{
3425 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
3426 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
3427}
3428
3429module_init(mlxsw_sp_module_init);
3430module_exit(mlxsw_sp_module_exit);
3431
3432MODULE_LICENSE("Dual BSD/GPL");
3433MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
3434MODULE_DESCRIPTION("Mellanox Spectrum driver");
3435MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);