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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +02002 * linux/drivers/ide/pci/siimage.c Version 1.18 Oct 18 2007
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
4 * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2003 Red Hat <alan@redhat.com>
Sergei Shtylyov075cb652007-02-17 02:40:22 +01006 * Copyright (C) 2007 MontaVista Software, Inc.
Bartlomiej Zolnierkiewicz328dcbb2007-07-20 01:11:54 +02007 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 *
9 * May be copied or modified under the terms of the GNU General Public License
10 *
Jeff Garzikbf4c7962005-11-18 22:55:47 +010011 * Documentation for CMD680:
12 * http://gkernel.sourceforge.net/specs/sii/sii-0680a-v1.31.pdf.bz2
13 *
14 * Documentation for SiI 3112:
15 * http://gkernel.sourceforge.net/specs/sii/3112A_SiI-DS-0095-B2.pdf.bz2
16 *
17 * Errata and other documentation only available under NDA.
Linus Torvalds1da177e2005-04-16 15:20:36 -070018 *
19 *
20 * FAQ Items:
21 * If you are using Marvell SATA-IDE adapters with Maxtor drives
22 * ensure the system is set up for ATA100/UDMA5 not UDMA6.
23 *
24 * If you are using WD drives with SATA bridges you must set the
25 * drive to "Single". "Master" will hang
26 *
27 * If you have strange problems with nVidia chipset systems please
28 * see the SI support documentation and update your system BIOS
29 * if neccessary
Alan Cox8693d3e2007-03-03 17:48:54 +010030 *
31 * The Dell DRAC4 has some interesting features including effectively hot
32 * unplugging/replugging the virtual CD interface when the DRAC is reset.
33 * This often causes drivers/ide/siimage to panic but is ok with the rather
34 * smarter code in libata.
Bartlomiej Zolnierkiewicz328dcbb2007-07-20 01:11:54 +020035 *
36 * TODO:
37 * - IORDY fixes
38 * - VDMA support
Linus Torvalds1da177e2005-04-16 15:20:36 -070039 */
40
Linus Torvalds1da177e2005-04-16 15:20:36 -070041#include <linux/types.h>
42#include <linux/module.h>
43#include <linux/pci.h>
44#include <linux/delay.h>
45#include <linux/hdreg.h>
46#include <linux/ide.h>
47#include <linux/init.h>
48
49#include <asm/io.h>
50
Linus Torvalds1da177e2005-04-16 15:20:36 -070051/**
52 * pdev_is_sata - check if device is SATA
53 * @pdev: PCI device to check
54 *
55 * Returns true if this is a SATA controller
56 */
57
58static int pdev_is_sata(struct pci_dev *pdev)
59{
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +020060#ifdef CONFIG_BLK_DEV_IDE_SATA
61 switch(pdev->device) {
Linus Torvalds1da177e2005-04-16 15:20:36 -070062 case PCI_DEVICE_ID_SII_3112:
63 case PCI_DEVICE_ID_SII_1210SA:
64 return 1;
65 case PCI_DEVICE_ID_SII_680:
66 return 0;
67 }
68 BUG();
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +020069#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070070 return 0;
71}
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +020072
Linus Torvalds1da177e2005-04-16 15:20:36 -070073/**
74 * is_sata - check if hwif is SATA
75 * @hwif: interface to check
76 *
77 * Returns true if this is a SATA controller
78 */
79
80static inline int is_sata(ide_hwif_t *hwif)
81{
82 return pdev_is_sata(hwif->pci_dev);
83}
84
85/**
86 * siimage_selreg - return register base
87 * @hwif: interface
88 * @r: config offset
89 *
90 * Turn a config register offset into the right address in either
91 * PCI space or MMIO space to access the control register in question
92 * Thankfully this is a configuration operation so isnt performance
93 * criticial.
94 */
95
96static unsigned long siimage_selreg(ide_hwif_t *hwif, int r)
97{
98 unsigned long base = (unsigned long)hwif->hwif_data;
99 base += 0xA0 + r;
100 if(hwif->mmio)
101 base += (hwif->channel << 6);
102 else
103 base += (hwif->channel << 4);
104 return base;
105}
106
107/**
108 * siimage_seldev - return register base
109 * @hwif: interface
110 * @r: config offset
111 *
112 * Turn a config register offset into the right address in either
113 * PCI space or MMIO space to access the control register in question
114 * including accounting for the unit shift.
115 */
116
117static inline unsigned long siimage_seldev(ide_drive_t *drive, int r)
118{
119 ide_hwif_t *hwif = HWIF(drive);
120 unsigned long base = (unsigned long)hwif->hwif_data;
121 base += 0xA0 + r;
122 if(hwif->mmio)
123 base += (hwif->channel << 6);
124 else
125 base += (hwif->channel << 4);
126 base |= drive->select.b.unit << drive->select.b.unit;
127 return base;
128}
129
130/**
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +0200131 * sil_udma_filter - compute UDMA mask
132 * @drive: IDE device
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133 *
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +0200134 * Compute the available UDMA speeds for the device on the interface.
135 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136 * For the CMD680 this depends on the clocking mode (scsc), for the
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +0200137 * SI3112 SATA controller life is a bit simpler.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700138 */
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +0200139
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200140static u8 sil_pata_udma_filter(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141{
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +0200142 ide_hwif_t *hwif = drive->hwif;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143 unsigned long base = (unsigned long) hwif->hwif_data;
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +0200144 u8 mask = 0, scsc = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145
146 if (hwif->mmio)
147 scsc = hwif->INB(base + 0x4A);
148 else
149 pci_read_config_byte(hwif->pci_dev, 0x8A, &scsc);
150
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151 if ((scsc & 0x30) == 0x10) /* 133 */
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200152 mask = ATA_UDMA6;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153 else if ((scsc & 0x30) == 0x20) /* 2xPCI */
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200154 mask = ATA_UDMA6;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155 else if ((scsc & 0x30) == 0x00) /* 100 */
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200156 mask = ATA_UDMA5;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157 else /* Disabled ? */
158 BUG();
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200159
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +0200160 return mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700161}
162
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200163static u8 sil_sata_udma_filter(ide_drive_t *drive)
164{
165 return strstr(drive->id->model, "Maxtor") ? ATA_UDMA5 : ATA_UDMA6;
166}
167
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168/**
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200169 * sil_set_pio_mode - set host controller for PIO mode
170 * @drive: drive
171 * @pio: PIO mode number
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172 *
173 * Load the timing settings for this device mode into the
174 * controller. If we are in PIO mode 3 or 4 turn on IORDY
175 * monitoring (bit 9). The TF timing is bits 31:16
176 */
Bartlomiej Zolnierkiewicz328dcbb2007-07-20 01:11:54 +0200177
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200178static void sil_set_pio_mode(ide_drive_t *drive, u8 pio)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179{
Bartlomiej Zolnierkiewicz328dcbb2007-07-20 01:11:54 +0200180 const u16 tf_speed[] = { 0x328a, 0x2283, 0x1281, 0x10c3, 0x10c1 };
181 const u16 data_speed[] = { 0x328a, 0x2283, 0x1104, 0x10c3, 0x10c1 };
182
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183 ide_hwif_t *hwif = HWIF(drive);
Benjamin Herrenschmidta87a87c2007-10-19 00:30:05 +0200184 ide_drive_t *pair = ide_get_paired_drive(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185 u32 speedt = 0;
186 u16 speedp = 0;
187 unsigned long addr = siimage_seldev(drive, 0x04);
188 unsigned long tfaddr = siimage_selreg(hwif, 0x02);
Bartlomiej Zolnierkiewiczffe54152007-10-11 23:54:01 +0200189 unsigned long base = (unsigned long)hwif->hwif_data;
Bartlomiej Zolnierkiewicz328dcbb2007-07-20 01:11:54 +0200190 u8 tf_pio = pio;
Bartlomiej Zolnierkiewiczffe54152007-10-11 23:54:01 +0200191 u8 addr_mask = hwif->channel ? (hwif->mmio ? 0xF4 : 0x84)
192 : (hwif->mmio ? 0xB4 : 0x80);
193 u8 mode = 0;
194 u8 unit = drive->select.b.unit;
Bartlomiej Zolnierkiewicz328dcbb2007-07-20 01:11:54 +0200195
196 /* trim *taskfile* PIO to the slowest of the master/slave */
197 if (pair->present) {
Bartlomiej Zolnierkiewicz21347582007-07-20 01:11:58 +0200198 u8 pair_pio = ide_get_best_pio_mode(pair, 255, 4);
Bartlomiej Zolnierkiewicz328dcbb2007-07-20 01:11:54 +0200199
200 if (pair_pio < tf_pio)
201 tf_pio = pair_pio;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700202 }
Sergei Shtylyov075cb652007-02-17 02:40:22 +0100203
Bartlomiej Zolnierkiewicz328dcbb2007-07-20 01:11:54 +0200204 /* cheat for now and use the docs */
205 speedp = data_speed[pio];
206 speedt = tf_speed[tf_pio];
207
Sergei Shtylyov075cb652007-02-17 02:40:22 +0100208 if (hwif->mmio) {
209 hwif->OUTW(speedp, addr);
210 hwif->OUTW(speedt, tfaddr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211 /* Now set up IORDY */
Bartlomiej Zolnierkiewicz328dcbb2007-07-20 01:11:54 +0200212 if (pio > 2)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213 hwif->OUTW(hwif->INW(tfaddr-2)|0x200, tfaddr-2);
214 else
215 hwif->OUTW(hwif->INW(tfaddr-2)&~0x200, tfaddr-2);
Bartlomiej Zolnierkiewiczffe54152007-10-11 23:54:01 +0200216
217 mode = hwif->INB(base + addr_mask);
218 mode &= ~(unit ? 0x30 : 0x03);
219 mode |= (unit ? 0x10 : 0x01);
220 hwif->OUTB(mode, base + addr_mask);
Sergei Shtylyov075cb652007-02-17 02:40:22 +0100221 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222 pci_write_config_word(hwif->pci_dev, addr, speedp);
223 pci_write_config_word(hwif->pci_dev, tfaddr, speedt);
224 pci_read_config_word(hwif->pci_dev, tfaddr-2, &speedp);
225 speedp &= ~0x200;
226 /* Set IORDY for mode 3 or 4 */
Bartlomiej Zolnierkiewicz328dcbb2007-07-20 01:11:54 +0200227 if (pio > 2)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700228 speedp |= 0x200;
229 pci_write_config_word(hwif->pci_dev, tfaddr-2, speedp);
Bartlomiej Zolnierkiewiczffe54152007-10-11 23:54:01 +0200230
231 pci_read_config_byte(hwif->pci_dev, addr_mask, &mode);
232 mode &= ~(unit ? 0x30 : 0x03);
233 mode |= (unit ? 0x10 : 0x01);
234 pci_write_config_byte(hwif->pci_dev, addr_mask, mode);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235 }
236}
237
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238/**
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200239 * sil_set_dma_mode - set host controller for DMA mode
240 * @drive: drive
241 * @speed: DMA mode
Linus Torvalds1da177e2005-04-16 15:20:36 -0700242 *
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200243 * Tune the SiI chipset for the desired DMA mode.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700244 */
Bartlomiej Zolnierkiewiczf212ff22007-10-11 23:53:59 +0200245
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200246static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700247{
248 u8 ultra6[] = { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 };
249 u8 ultra5[] = { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01 };
250 u16 dma[] = { 0x2208, 0x10C2, 0x10C1 };
251
252 ide_hwif_t *hwif = HWIF(drive);
253 u16 ultra = 0, multi = 0;
254 u8 mode = 0, unit = drive->select.b.unit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700255 unsigned long base = (unsigned long)hwif->hwif_data;
256 u8 scsc = 0, addr_mask = ((hwif->channel) ?
257 ((hwif->mmio) ? 0xF4 : 0x84) :
258 ((hwif->mmio) ? 0xB4 : 0x80));
259
260 unsigned long ma = siimage_seldev(drive, 0x08);
261 unsigned long ua = siimage_seldev(drive, 0x0C);
262
263 if (hwif->mmio) {
264 scsc = hwif->INB(base + 0x4A);
265 mode = hwif->INB(base + addr_mask);
266 multi = hwif->INW(ma);
267 ultra = hwif->INW(ua);
268 } else {
269 pci_read_config_byte(hwif->pci_dev, 0x8A, &scsc);
270 pci_read_config_byte(hwif->pci_dev, addr_mask, &mode);
271 pci_read_config_word(hwif->pci_dev, ma, &multi);
272 pci_read_config_word(hwif->pci_dev, ua, &ultra);
273 }
274
275 mode &= ~((unit) ? 0x30 : 0x03);
276 ultra &= ~0x3F;
277 scsc = ((scsc & 0x30) == 0x00) ? 0 : 1;
278
279 scsc = is_sata(hwif) ? 1 : scsc;
280
281 switch(speed) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700282 case XFER_MW_DMA_2:
283 case XFER_MW_DMA_1:
284 case XFER_MW_DMA_0:
285 multi = dma[speed - XFER_MW_DMA_0];
286 mode |= ((unit) ? 0x20 : 0x02);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287 break;
288 case XFER_UDMA_6:
289 case XFER_UDMA_5:
290 case XFER_UDMA_4:
291 case XFER_UDMA_3:
292 case XFER_UDMA_2:
293 case XFER_UDMA_1:
294 case XFER_UDMA_0:
295 multi = dma[2];
296 ultra |= ((scsc) ? (ultra6[speed - XFER_UDMA_0]) :
297 (ultra5[speed - XFER_UDMA_0]));
298 mode |= ((unit) ? 0x30 : 0x03);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299 break;
300 default:
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200301 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700302 }
303
304 if (hwif->mmio) {
305 hwif->OUTB(mode, base + addr_mask);
306 hwif->OUTW(multi, ma);
307 hwif->OUTW(ultra, ua);
308 } else {
309 pci_write_config_byte(hwif->pci_dev, addr_mask, mode);
310 pci_write_config_word(hwif->pci_dev, ma, multi);
311 pci_write_config_word(hwif->pci_dev, ua, ultra);
312 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700313}
314
Linus Torvalds1da177e2005-04-16 15:20:36 -0700315/* returns 1 if dma irq issued, 0 otherwise */
316static int siimage_io_ide_dma_test_irq (ide_drive_t *drive)
317{
318 ide_hwif_t *hwif = HWIF(drive);
319 u8 dma_altstat = 0;
320 unsigned long addr = siimage_selreg(hwif, 1);
321
322 /* return 1 if INTR asserted */
323 if ((hwif->INB(hwif->dma_status) & 4) == 4)
324 return 1;
325
326 /* return 1 if Device INTR asserted */
327 pci_read_config_byte(hwif->pci_dev, addr, &dma_altstat);
328 if (dma_altstat & 8)
329 return 0; //return 1;
330 return 0;
331}
332
Linus Torvalds1da177e2005-04-16 15:20:36 -0700333/**
334 * siimage_mmio_ide_dma_test_irq - check we caused an IRQ
335 * @drive: drive we are testing
336 *
337 * Check if we caused an IDE DMA interrupt. We may also have caused
338 * SATA status interrupts, if so we clean them up and continue.
339 */
340
341static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive)
342{
343 ide_hwif_t *hwif = HWIF(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700344 unsigned long addr = siimage_selreg(hwif, 0x1);
345
346 if (SATA_ERROR_REG) {
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200347 unsigned long base = (unsigned long)hwif->hwif_data;
348
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100349 u32 ext_stat = readl((void __iomem *)(base + 0x10));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700350 u8 watchdog = 0;
351 if (ext_stat & ((hwif->channel) ? 0x40 : 0x10)) {
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100352 u32 sata_error = readl((void __iomem *)SATA_ERROR_REG);
353 writel(sata_error, (void __iomem *)SATA_ERROR_REG);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700354 watchdog = (sata_error & 0x00680000) ? 1 : 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700355 printk(KERN_WARNING "%s: sata_error = 0x%08x, "
356 "watchdog = %d, %s\n",
357 drive->name, sata_error, watchdog,
358 __FUNCTION__);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700359
360 } else {
361 watchdog = (ext_stat & 0x8000) ? 1 : 0;
362 }
363 ext_stat >>= 16;
364
365 if (!(ext_stat & 0x0404) && !watchdog)
366 return 0;
367 }
368
369 /* return 1 if INTR asserted */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100370 if ((readb((void __iomem *)hwif->dma_status) & 0x04) == 0x04)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700371 return 1;
372
373 /* return 1 if Device INTR asserted */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100374 if ((readb((void __iomem *)addr) & 8) == 8)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700375 return 0; //return 1;
376
377 return 0;
378}
379
380/**
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200381 * sil_sata_busproc - bus isolation IOCTL
Linus Torvalds1da177e2005-04-16 15:20:36 -0700382 * @drive: drive to isolate/restore
383 * @state: bus state to set
384 *
385 * Used by the SII3112 to handle bus isolation. As this is a
386 * SATA controller the work required is quite limited, we
387 * just have to clean up the statistics
388 */
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200389
390static int sil_sata_busproc(ide_drive_t * drive, int state)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700391{
392 ide_hwif_t *hwif = HWIF(drive);
393 u32 stat_config = 0;
394 unsigned long addr = siimage_selreg(hwif, 0);
395
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100396 if (hwif->mmio)
397 stat_config = readl((void __iomem *)addr);
398 else
Linus Torvalds1da177e2005-04-16 15:20:36 -0700399 pci_read_config_dword(hwif->pci_dev, addr, &stat_config);
400
401 switch (state) {
402 case BUSSTATE_ON:
403 hwif->drives[0].failures = 0;
404 hwif->drives[1].failures = 0;
405 break;
406 case BUSSTATE_OFF:
407 hwif->drives[0].failures = hwif->drives[0].max_failures + 1;
408 hwif->drives[1].failures = hwif->drives[1].max_failures + 1;
409 break;
410 case BUSSTATE_TRISTATE:
411 hwif->drives[0].failures = hwif->drives[0].max_failures + 1;
412 hwif->drives[1].failures = hwif->drives[1].max_failures + 1;
413 break;
414 default:
415 return -EINVAL;
416 }
417 hwif->bus_state = state;
418 return 0;
419}
420
421/**
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200422 * sil_sata_reset_poll - wait for SATA reset
Linus Torvalds1da177e2005-04-16 15:20:36 -0700423 * @drive: drive we are resetting
424 *
425 * Poll the SATA phy and see whether it has come back from the dead
426 * yet.
427 */
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200428
429static int sil_sata_reset_poll(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430{
431 if (SATA_STATUS_REG) {
432 ide_hwif_t *hwif = HWIF(drive);
433
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100434 /* SATA_STATUS_REG is valid only when in MMIO mode */
435 if ((readl((void __iomem *)SATA_STATUS_REG) & 0x03) != 0x03) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700436 printk(KERN_WARNING "%s: reset phy dead, status=0x%08x\n",
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100437 hwif->name, readl((void __iomem *)SATA_STATUS_REG));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700438 HWGROUP(drive)->polling = 0;
439 return ide_started;
440 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700441 }
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200442
443 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700444}
445
446/**
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200447 * sil_sata_pre_reset - reset hook
Linus Torvalds1da177e2005-04-16 15:20:36 -0700448 * @drive: IDE device being reset
449 *
450 * For the SATA devices we need to handle recalibration/geometry
451 * differently
452 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700453
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200454static void sil_sata_pre_reset(ide_drive_t *drive)
455{
456 if (drive->media == ide_disk) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457 drive->special.b.set_geometry = 0;
458 drive->special.b.recalibrate = 0;
459 }
460}
461
462/**
463 * siimage_reset - reset a device on an siimage controller
464 * @drive: drive to reset
465 *
466 * Perform a controller level reset fo the device. For
467 * SATA we must also check the PHY.
468 */
469
470static void siimage_reset (ide_drive_t *drive)
471{
472 ide_hwif_t *hwif = HWIF(drive);
473 u8 reset = 0;
474 unsigned long addr = siimage_selreg(hwif, 0);
475
476 if (hwif->mmio) {
477 reset = hwif->INB(addr);
478 hwif->OUTB((reset|0x03), addr);
479 /* FIXME:posting */
480 udelay(25);
481 hwif->OUTB(reset, addr);
482 (void) hwif->INB(addr);
483 } else {
484 pci_read_config_byte(hwif->pci_dev, addr, &reset);
485 pci_write_config_byte(hwif->pci_dev, addr, reset|0x03);
486 udelay(25);
487 pci_write_config_byte(hwif->pci_dev, addr, reset);
488 pci_read_config_byte(hwif->pci_dev, addr, &reset);
489 }
490
491 if (SATA_STATUS_REG) {
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100492 /* SATA_STATUS_REG is valid only when in MMIO mode */
493 u32 sata_stat = readl((void __iomem *)SATA_STATUS_REG);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700494 printk(KERN_WARNING "%s: reset phy, status=0x%08x, %s\n",
495 hwif->name, sata_stat, __FUNCTION__);
496 if (!(sata_stat)) {
497 printk(KERN_WARNING "%s: reset phy dead, status=0x%08x\n",
498 hwif->name, sata_stat);
499 drive->failures++;
500 }
501 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700502}
503
504/**
505 * proc_reports_siimage - add siimage controller to proc
506 * @dev: PCI device
507 * @clocking: SCSC value
508 * @name: controller name
509 *
510 * Report the clocking mode of the controller and add it to
511 * the /proc interface layer
512 */
513
514static void proc_reports_siimage (struct pci_dev *dev, u8 clocking, const char *name)
515{
516 if (!pdev_is_sata(dev)) {
517 printk(KERN_INFO "%s: BASE CLOCK ", name);
518 clocking &= 0x03;
519 switch (clocking) {
520 case 0x03: printk("DISABLED!\n"); break;
521 case 0x02: printk("== 2X PCI\n"); break;
522 case 0x01: printk("== 133\n"); break;
523 case 0x00: printk("== 100\n"); break;
524 }
525 }
526}
527
528/**
529 * setup_mmio_siimage - switch an SI controller into MMIO
530 * @dev: PCI device we are configuring
531 * @name: device name
532 *
533 * Attempt to put the device into mmio mode. There are some slight
534 * complications here with certain systems where the mmio bar isnt
535 * mapped so we have to be sure we can fall back to I/O.
536 */
537
538static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name)
539{
540 unsigned long bar5 = pci_resource_start(dev, 5);
541 unsigned long barsize = pci_resource_len(dev, 5);
542 u8 tmpbyte = 0;
543 void __iomem *ioaddr;
John W. Linvilled868dd12005-11-10 00:19:14 +0100544 u32 tmp, irq_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700545
546 /*
547 * Drop back to PIO if we can't map the mmio. Some
548 * systems seem to get terminally confused in the PCI
549 * spaces.
550 */
551
552 if(!request_mem_region(bar5, barsize, name))
553 {
554 printk(KERN_WARNING "siimage: IDE controller MMIO ports not available.\n");
555 return 0;
556 }
557
558 ioaddr = ioremap(bar5, barsize);
559
560 if (ioaddr == NULL)
561 {
562 release_mem_region(bar5, barsize);
563 return 0;
564 }
565
566 pci_set_master(dev);
567 pci_set_drvdata(dev, (void *) ioaddr);
568
569 if (pdev_is_sata(dev)) {
John W. Linvilled868dd12005-11-10 00:19:14 +0100570 /* make sure IDE0/1 interrupts are not masked */
571 irq_mask = (1 << 22) | (1 << 23);
572 tmp = readl(ioaddr + 0x48);
573 if (tmp & irq_mask) {
574 tmp &= ~irq_mask;
575 writel(tmp, ioaddr + 0x48);
576 readl(ioaddr + 0x48); /* flush */
577 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700578 writel(0, ioaddr + 0x148);
579 writel(0, ioaddr + 0x1C8);
580 }
581
582 writeb(0, ioaddr + 0xB4);
583 writeb(0, ioaddr + 0xF4);
584 tmpbyte = readb(ioaddr + 0x4A);
585
586 switch(tmpbyte & 0x30) {
587 case 0x00:
588 /* In 100 MHz clocking, try and switch to 133 */
589 writeb(tmpbyte|0x10, ioaddr + 0x4A);
590 break;
591 case 0x10:
592 /* On 133Mhz clocking */
593 break;
594 case 0x20:
595 /* On PCIx2 clocking */
596 break;
597 case 0x30:
598 /* Clocking is disabled */
599 /* 133 clock attempt to force it on */
600 writeb(tmpbyte & ~0x20, ioaddr + 0x4A);
601 break;
602 }
603
604 writeb( 0x72, ioaddr + 0xA1);
605 writew( 0x328A, ioaddr + 0xA2);
606 writel(0x62DD62DD, ioaddr + 0xA4);
607 writel(0x43924392, ioaddr + 0xA8);
608 writel(0x40094009, ioaddr + 0xAC);
609 writeb( 0x72, ioaddr + 0xE1);
610 writew( 0x328A, ioaddr + 0xE2);
611 writel(0x62DD62DD, ioaddr + 0xE4);
612 writel(0x43924392, ioaddr + 0xE8);
613 writel(0x40094009, ioaddr + 0xEC);
614
615 if (pdev_is_sata(dev)) {
616 writel(0xFFFF0000, ioaddr + 0x108);
617 writel(0xFFFF0000, ioaddr + 0x188);
618 writel(0x00680000, ioaddr + 0x148);
619 writel(0x00680000, ioaddr + 0x1C8);
620 }
621
622 tmpbyte = readb(ioaddr + 0x4A);
623
624 proc_reports_siimage(dev, (tmpbyte>>4), name);
625 return 1;
626}
627
628/**
629 * init_chipset_siimage - set up an SI device
630 * @dev: PCI device
631 * @name: device name
632 *
633 * Perform the initial PCI set up for this device. Attempt to switch
634 * to 133MHz clocking if the system isn't already set up to do it.
635 */
636
637static unsigned int __devinit init_chipset_siimage(struct pci_dev *dev, const char *name)
638{
Bartlomiej Zolnierkiewiczfc212bb2007-10-19 00:30:08 +0200639 u8 rev = dev->revision, tmpbyte = 0, BA5_EN = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640
Bartlomiej Zolnierkiewiczfc212bb2007-10-19 00:30:08 +0200641 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, rev ? 1 : 255);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700642
643 pci_read_config_byte(dev, 0x8A, &BA5_EN);
644 if ((BA5_EN & 0x01) || (pci_resource_start(dev, 5))) {
645 if (setup_mmio_siimage(dev, name)) {
646 return 0;
647 }
648 }
649
650 pci_write_config_byte(dev, 0x80, 0x00);
651 pci_write_config_byte(dev, 0x84, 0x00);
652 pci_read_config_byte(dev, 0x8A, &tmpbyte);
653 switch(tmpbyte & 0x30) {
654 case 0x00:
655 /* 133 clock attempt to force it on */
656 pci_write_config_byte(dev, 0x8A, tmpbyte|0x10);
657 case 0x30:
658 /* if clocking is disabled */
659 /* 133 clock attempt to force it on */
660 pci_write_config_byte(dev, 0x8A, tmpbyte & ~0x20);
661 case 0x10:
662 /* 133 already */
663 break;
664 case 0x20:
665 /* BIOS set PCI x2 clocking */
666 break;
667 }
668
669 pci_read_config_byte(dev, 0x8A, &tmpbyte);
670
671 pci_write_config_byte(dev, 0xA1, 0x72);
672 pci_write_config_word(dev, 0xA2, 0x328A);
673 pci_write_config_dword(dev, 0xA4, 0x62DD62DD);
674 pci_write_config_dword(dev, 0xA8, 0x43924392);
675 pci_write_config_dword(dev, 0xAC, 0x40094009);
676 pci_write_config_byte(dev, 0xB1, 0x72);
677 pci_write_config_word(dev, 0xB2, 0x328A);
678 pci_write_config_dword(dev, 0xB4, 0x62DD62DD);
679 pci_write_config_dword(dev, 0xB8, 0x43924392);
680 pci_write_config_dword(dev, 0xBC, 0x40094009);
681
682 proc_reports_siimage(dev, (tmpbyte>>4), name);
683 return 0;
684}
685
686/**
687 * init_mmio_iops_siimage - set up the iops for MMIO
688 * @hwif: interface to set up
689 *
690 * The basic setup here is fairly simple, we can use standard MMIO
691 * operations. However we do have to set the taskfile register offsets
692 * by hand as there isnt a standard defined layout for them this
693 * time.
694 *
695 * The hardware supports buffered taskfiles and also some rather nice
Alan Cox19c1ef52006-06-28 04:26:59 -0700696 * extended PRD tables. For better SI3112 support use the libata driver
Linus Torvalds1da177e2005-04-16 15:20:36 -0700697 */
698
699static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
700{
701 struct pci_dev *dev = hwif->pci_dev;
702 void *addr = pci_get_drvdata(dev);
703 u8 ch = hwif->channel;
704 hw_regs_t hw;
705 unsigned long base;
706
707 /*
708 * Fill in the basic HWIF bits
709 */
710
711 default_hwif_mmiops(hwif);
712 hwif->hwif_data = addr;
713
714 /*
715 * Now set up the hw. We have to do this ourselves as
Michael Opdenacker59c51592007-05-09 08:57:56 +0200716 * the MMIO layout isnt the same as the standard port
Linus Torvalds1da177e2005-04-16 15:20:36 -0700717 * based I/O
718 */
719
720 memset(&hw, 0, sizeof(hw_regs_t));
721
722 base = (unsigned long)addr;
723 if (ch)
724 base += 0xC0;
725 else
726 base += 0x80;
727
728 /*
729 * The buffered task file doesn't have status/control
730 * so we can't currently use it sanely since we want to
731 * use LBA48 mode.
732 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700733 hw.io_ports[IDE_DATA_OFFSET] = base;
734 hw.io_ports[IDE_ERROR_OFFSET] = base + 1;
735 hw.io_ports[IDE_NSECTOR_OFFSET] = base + 2;
736 hw.io_ports[IDE_SECTOR_OFFSET] = base + 3;
737 hw.io_ports[IDE_LCYL_OFFSET] = base + 4;
738 hw.io_ports[IDE_HCYL_OFFSET] = base + 5;
739 hw.io_ports[IDE_SELECT_OFFSET] = base + 6;
740 hw.io_ports[IDE_STATUS_OFFSET] = base + 7;
741 hw.io_ports[IDE_CONTROL_OFFSET] = base + 10;
742
743 hw.io_ports[IDE_IRQ_OFFSET] = 0;
744
745 if (pdev_is_sata(dev)) {
746 base = (unsigned long)addr;
747 if (ch)
748 base += 0x80;
749 hwif->sata_scr[SATA_STATUS_OFFSET] = base + 0x104;
750 hwif->sata_scr[SATA_ERROR_OFFSET] = base + 0x108;
751 hwif->sata_scr[SATA_CONTROL_OFFSET] = base + 0x100;
752 hwif->sata_misc[SATA_MISC_OFFSET] = base + 0x140;
753 hwif->sata_misc[SATA_PHY_OFFSET] = base + 0x144;
754 hwif->sata_misc[SATA_IEN_OFFSET] = base + 0x148;
755 }
756
Bartlomiej Zolnierkiewicz9239b332007-10-20 00:32:33 +0200757 memcpy(hwif->io_ports, hw.io_ports, sizeof(hwif->io_ports));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700758
Bartlomiej Zolnierkiewicz9239b332007-10-20 00:32:33 +0200759 hwif->irq = dev->irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700760
Bartlomiej Zolnierkiewicz9239b332007-10-20 00:32:33 +0200761 hwif->dma_base = (unsigned long)addr + (ch ? 0x08 : 0x00);
Bartlomiej Zolnierkiewicz2ad1e552007-02-17 02:40:25 +0100762
763 hwif->mmio = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700764}
765
766static int is_dev_seagate_sata(ide_drive_t *drive)
767{
768 const char *s = &drive->id->model[0];
769 unsigned len;
770
771 if (!drive->present)
772 return 0;
773
774 len = strnlen(s, sizeof(drive->id->model));
775
776 if ((len > 4) && (!memcmp(s, "ST", 2))) {
777 if ((!memcmp(s + len - 2, "AS", 2)) ||
778 (!memcmp(s + len - 3, "ASL", 3))) {
779 printk(KERN_INFO "%s: applying pessimistic Seagate "
780 "errata fix\n", drive->name);
781 return 1;
782 }
783 }
784 return 0;
785}
786
787/**
788 * siimage_fixup - post probe fixups
789 * @hwif: interface to fix up
790 *
791 * Called after drive probe we use this to decide whether the
792 * Seagate fixup must be applied. This used to be in init_iops but
793 * that can occur before we know what drives are present.
794 */
795
796static void __devinit siimage_fixup(ide_hwif_t *hwif)
797{
798 /* Try and raise the rqsize */
799 if (!is_sata(hwif) || !is_dev_seagate_sata(&hwif->drives[0]))
800 hwif->rqsize = 128;
801}
802
803/**
804 * init_iops_siimage - set up iops
805 * @hwif: interface to set up
806 *
807 * Do the basic setup for the SIIMAGE hardware interface
808 * and then do the MMIO setup if we can. This is the first
809 * look in we get for setting up the hwif so that we
810 * can get the iops right before using them.
811 */
812
813static void __devinit init_iops_siimage(ide_hwif_t *hwif)
814{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700815 hwif->hwif_data = NULL;
816
817 /* Pessimal until we finish probing */
818 hwif->rqsize = 15;
819
Bartlomiej Zolnierkiewiczfc212bb2007-10-19 00:30:08 +0200820 if (pci_get_drvdata(hwif->pci_dev) == NULL)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700821 return;
Bartlomiej Zolnierkiewiczfc212bb2007-10-19 00:30:08 +0200822
Linus Torvalds1da177e2005-04-16 15:20:36 -0700823 init_mmio_iops_siimage(hwif);
824}
825
826/**
827 * ata66_siimage - check for 80 pin cable
828 * @hwif: interface to check
829 *
830 * Check for the presence of an ATA66 capable cable on the
831 * interface.
832 */
833
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200834static u8 __devinit ata66_siimage(ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700835{
836 unsigned long addr = siimage_selreg(hwif, 0);
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200837 u8 ata66 = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700838
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200839 if (pci_get_drvdata(hwif->pci_dev) == NULL)
840 pci_read_config_byte(hwif->pci_dev, addr, &ata66);
841 else
842 ata66 = hwif->INB(addr);
843
844 return (ata66 & 0x01) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700845}
846
847/**
848 * init_hwif_siimage - set up hwif structs
849 * @hwif: interface to set up
850 *
851 * We do the basic set up of the interface structure. The SIIMAGE
852 * requires several custom handlers so we override the default
853 * ide DMA handlers appropriately
854 */
855
856static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
857{
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200858 u8 sata = is_sata(hwif);
859
Linus Torvalds1da177e2005-04-16 15:20:36 -0700860 hwif->resetproc = &siimage_reset;
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +0200861 hwif->set_pio_mode = &sil_set_pio_mode;
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200862 hwif->set_dma_mode = &sil_set_dma_mode;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700863
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200864 if (sata) {
Alan Cox19c1ef52006-06-28 04:26:59 -0700865 static int first = 1;
866
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200867 hwif->busproc = &sil_sata_busproc;
868 hwif->reset_poll = &sil_sata_reset_poll;
869 hwif->pre_reset = &sil_sata_pre_reset;
870 hwif->udma_filter = &sil_sata_udma_filter;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700871
Alan Cox19c1ef52006-06-28 04:26:59 -0700872 if (first) {
873 printk(KERN_INFO "siimage: For full SATA support you should use the libata sata_sil module.\n");
874 first = 0;
875 }
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200876 } else
877 hwif->udma_filter = &sil_pata_udma_filter;
Bartlomiej Zolnierkiewicz328dcbb2007-07-20 01:11:54 +0200878
Bartlomiej Zolnierkiewicz328dcbb2007-07-20 01:11:54 +0200879 if (hwif->dma_base == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700880 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700881
Bartlomiej Zolnierkiewicz438c4702007-10-20 00:32:31 +0200882 if (sata)
Bartlomiej Zolnierkiewicz33c10022007-10-19 00:30:06 +0200883 hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700884
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200885 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
886 hwif->cbl = ata66_siimage(hwif);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700887
888 if (hwif->mmio) {
889 hwif->ide_dma_test_irq = &siimage_mmio_ide_dma_test_irq;
890 } else {
891 hwif->ide_dma_test_irq = & siimage_io_ide_dma_test_irq;
892 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700893}
894
895#define DECLARE_SII_DEV(name_str) \
896 { \
897 .name = name_str, \
898 .init_chipset = init_chipset_siimage, \
899 .init_iops = init_iops_siimage, \
900 .init_hwif = init_hwif_siimage, \
901 .fixup = siimage_fixup, \
Bartlomiej Zolnierkiewicz7cab14a2007-10-19 00:30:06 +0200902 .host_flags = IDE_HFLAG_BOOTABLE, \
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200903 .pio_mask = ATA_PIO4, \
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200904 .mwdma_mask = ATA_MWDMA2, \
905 .udma_mask = ATA_UDMA6, \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700906 }
907
908static ide_pci_device_t siimage_chipsets[] __devinitdata = {
909 /* 0 */ DECLARE_SII_DEV("SiI680"),
910 /* 1 */ DECLARE_SII_DEV("SiI3112 Serial ATA"),
911 /* 2 */ DECLARE_SII_DEV("Adaptec AAR-1210SA")
912};
913
914/**
915 * siimage_init_one - pci layer discovery entry
916 * @dev: PCI device
917 * @id: ident table entry
918 *
919 * Called by the PCI code when it finds an SI680 or SI3112 controller.
920 * We then use the IDE PCI generic helper to do most of the work.
921 */
922
923static int __devinit siimage_init_one(struct pci_dev *dev, const struct pci_device_id *id)
924{
925 return ide_setup_pci_device(dev, &siimage_chipsets[id->driver_data]);
926}
927
Bartlomiej Zolnierkiewicz9cbcc5e2007-10-16 22:29:56 +0200928static const struct pci_device_id siimage_pci_tbl[] = {
929 { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_680), 0 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700930#ifdef CONFIG_BLK_DEV_IDE_SATA
Bartlomiej Zolnierkiewicz9cbcc5e2007-10-16 22:29:56 +0200931 { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_3112), 1 },
932 { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_1210SA), 2 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700933#endif
934 { 0, },
935};
936MODULE_DEVICE_TABLE(pci, siimage_pci_tbl);
937
938static struct pci_driver driver = {
939 .name = "SiI_IDE",
940 .id_table = siimage_pci_tbl,
941 .probe = siimage_init_one,
942};
943
Bartlomiej Zolnierkiewicz82ab1ee2007-01-27 13:46:56 +0100944static int __init siimage_ide_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700945{
946 return ide_pci_register_driver(&driver);
947}
948
949module_init(siimage_ide_init);
950
951MODULE_AUTHOR("Andre Hedrick, Alan Cox");
952MODULE_DESCRIPTION("PCI driver module for SiI IDE");
953MODULE_LICENSE("GPL");