Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*- |
| 2 | */ |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 3 | /* |
Dave Airlie | bc54fd1 | 2005-06-23 22:46:46 +1000 | [diff] [blame] | 4 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
| 6 | * All Rights Reserved. |
Dave Airlie | bc54fd1 | 2005-06-23 22:46:46 +1000 | [diff] [blame] | 7 | * |
| 8 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 9 | * copy of this software and associated documentation files (the |
| 10 | * "Software"), to deal in the Software without restriction, including |
| 11 | * without limitation the rights to use, copy, modify, merge, publish, |
| 12 | * distribute, sub license, and/or sell copies of the Software, and to |
| 13 | * permit persons to whom the Software is furnished to do so, subject to |
| 14 | * the following conditions: |
| 15 | * |
| 16 | * The above copyright notice and this permission notice (including the |
| 17 | * next paragraph) shall be included in all copies or substantial portions |
| 18 | * of the Software. |
| 19 | * |
| 20 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| 21 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 22 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
| 23 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR |
| 24 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 25 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 26 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 27 | * |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 28 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | |
Jesse Barnes | 5669fca | 2009-02-17 15:13:31 -0800 | [diff] [blame] | 30 | #include <linux/device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | #include "drmP.h" |
| 32 | #include "drm.h" |
| 33 | #include "i915_drm.h" |
| 34 | #include "i915_drv.h" |
Kenneth Graunke | f49f058 | 2010-09-11 01:19:14 -0700 | [diff] [blame] | 35 | #include "intel_drv.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 37 | #include <linux/console.h> |
Zhao Yakui | 354ff96 | 2009-07-08 14:13:12 +0800 | [diff] [blame] | 38 | #include "drm_crtc_helper.h" |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 39 | |
Kyle McMartin | d6073d7 | 2009-05-26 12:27:34 -0400 | [diff] [blame] | 40 | static int i915_modeset = -1; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 41 | module_param_named(modeset, i915_modeset, int, 0400); |
| 42 | |
| 43 | unsigned int i915_fbpercrtc = 0; |
| 44 | module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | |
Jesse Barnes | 652c393 | 2009-08-17 13:31:43 -0700 | [diff] [blame] | 46 | unsigned int i915_powersave = 1; |
| 47 | module_param_named(powersave, i915_powersave, int, 0400); |
| 48 | |
Jesse Barnes | 3381434 | 2010-01-14 20:48:02 +0000 | [diff] [blame] | 49 | unsigned int i915_lvds_downclock = 0; |
| 50 | module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400); |
| 51 | |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 52 | static struct drm_driver driver; |
Zhenyu Wang | 1f7a6e3 | 2010-02-23 14:05:24 +0800 | [diff] [blame] | 53 | extern int intel_agp_enabled; |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 54 | |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 55 | #define INTEL_VGA_DEVICE(id, info) { \ |
Kristian Høgsberg | 49ae35f | 2009-12-16 15:16:15 -0500 | [diff] [blame] | 56 | .class = PCI_CLASS_DISPLAY_VGA << 8, \ |
| 57 | .class_mask = 0xffff00, \ |
| 58 | .vendor = 0x8086, \ |
| 59 | .device = id, \ |
| 60 | .subvendor = PCI_ANY_ID, \ |
| 61 | .subdevice = PCI_ANY_ID, \ |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 62 | .driver_data = (unsigned long) info } |
Kristian Høgsberg | 49ae35f | 2009-12-16 15:16:15 -0500 | [diff] [blame] | 63 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 64 | static const struct intel_device_info intel_i830_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 65 | .gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 66 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 67 | }; |
| 68 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 69 | static const struct intel_device_info intel_845g_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 70 | .gen = 2, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 71 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 72 | }; |
| 73 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 74 | static const struct intel_device_info intel_i85x_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 75 | .gen = 2, .is_i85x = 1, .is_mobile = 1, |
Adam Jackson | 5ce8ba7 | 2010-04-15 14:03:30 -0400 | [diff] [blame] | 76 | .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 77 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 78 | }; |
| 79 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 80 | static const struct intel_device_info intel_i865g_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 81 | .gen = 2, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 82 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 83 | }; |
| 84 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 85 | static const struct intel_device_info intel_i915g_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 86 | .gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 87 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 88 | }; |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 89 | static const struct intel_device_info intel_i915gm_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 90 | .gen = 3, .is_mobile = 1, |
Kristian Høgsberg | b295d1b | 2009-12-16 15:16:17 -0500 | [diff] [blame] | 91 | .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 92 | .has_overlay = 1, .overlay_needs_physical = 1, |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 93 | .supports_tv = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 94 | }; |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 95 | static const struct intel_device_info intel_i945g_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 96 | .gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 97 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 98 | }; |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 99 | static const struct intel_device_info intel_i945gm_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 100 | .gen = 3, .is_i945gm = 1, .is_mobile = 1, |
Kristian Høgsberg | b295d1b | 2009-12-16 15:16:17 -0500 | [diff] [blame] | 101 | .has_hotplug = 1, .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 102 | .has_overlay = 1, .overlay_needs_physical = 1, |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 103 | .supports_tv = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 104 | }; |
| 105 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 106 | static const struct intel_device_info intel_i965g_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 107 | .gen = 4, .is_broadwater = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 108 | .has_hotplug = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 109 | .has_overlay = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 110 | }; |
| 111 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 112 | static const struct intel_device_info intel_i965gm_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 113 | .gen = 4, .is_crestline = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 114 | .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 115 | .has_overlay = 1, |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 116 | .supports_tv = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 117 | }; |
| 118 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 119 | static const struct intel_device_info intel_g33_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 120 | .gen = 3, .is_g33 = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 121 | .need_gfx_hws = 1, .has_hotplug = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 122 | .has_overlay = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 123 | }; |
| 124 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 125 | static const struct intel_device_info intel_g45_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 126 | .gen = 4, .is_g4x = 1, .need_gfx_hws = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 127 | .has_pipe_cxsr = 1, .has_hotplug = 1, |
Xiang, Haihao | 92f49d9 | 2010-09-16 10:43:10 +0800 | [diff] [blame^] | 128 | .has_bsd_ring = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 129 | }; |
| 130 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 131 | static const struct intel_device_info intel_gm45_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 132 | .gen = 4, .is_g4x = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 133 | .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 134 | .has_pipe_cxsr = 1, .has_hotplug = 1, |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 135 | .supports_tv = 1, |
Xiang, Haihao | 92f49d9 | 2010-09-16 10:43:10 +0800 | [diff] [blame^] | 136 | .has_bsd_ring = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 137 | }; |
| 138 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 139 | static const struct intel_device_info intel_pineview_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 140 | .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 141 | .need_gfx_hws = 1, .has_hotplug = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 142 | .has_overlay = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 143 | }; |
| 144 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 145 | static const struct intel_device_info intel_ironlake_d_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 146 | .gen = 5, .is_ironlake = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 147 | .need_gfx_hws = 1, .has_pipe_cxsr = 1, .has_hotplug = 1, |
Xiang, Haihao | 92f49d9 | 2010-09-16 10:43:10 +0800 | [diff] [blame^] | 148 | .has_bsd_ring = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 149 | }; |
| 150 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 151 | static const struct intel_device_info intel_ironlake_m_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 152 | .gen = 5, .is_ironlake = 1, .is_mobile = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 153 | .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1, |
Xiang, Haihao | 92f49d9 | 2010-09-16 10:43:10 +0800 | [diff] [blame^] | 154 | .has_bsd_ring = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 155 | }; |
| 156 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 157 | static const struct intel_device_info intel_sandybridge_d_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 158 | .gen = 6, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 159 | .need_gfx_hws = 1, .has_hotplug = 1, |
Eric Anholt | f6e450a | 2009-11-02 12:08:22 -0800 | [diff] [blame] | 160 | }; |
| 161 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 162 | static const struct intel_device_info intel_sandybridge_m_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 163 | .gen = 6, .is_mobile = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 164 | .need_gfx_hws = 1, .has_hotplug = 1, |
Eric Anholt | a13e409 | 2010-01-07 15:08:18 -0800 | [diff] [blame] | 165 | }; |
| 166 | |
Chris Wilson | 6103da0 | 2010-07-05 18:01:47 +0100 | [diff] [blame] | 167 | static const struct pci_device_id pciidlist[] = { /* aka */ |
| 168 | INTEL_VGA_DEVICE(0x3577, &intel_i830_info), /* I830_M */ |
| 169 | INTEL_VGA_DEVICE(0x2562, &intel_845g_info), /* 845_G */ |
| 170 | INTEL_VGA_DEVICE(0x3582, &intel_i85x_info), /* I855_GM */ |
Adam Jackson | 5ce8ba7 | 2010-04-15 14:03:30 -0400 | [diff] [blame] | 171 | INTEL_VGA_DEVICE(0x358e, &intel_i85x_info), |
Chris Wilson | 6103da0 | 2010-07-05 18:01:47 +0100 | [diff] [blame] | 172 | INTEL_VGA_DEVICE(0x2572, &intel_i865g_info), /* I865_G */ |
| 173 | INTEL_VGA_DEVICE(0x2582, &intel_i915g_info), /* I915_G */ |
| 174 | INTEL_VGA_DEVICE(0x258a, &intel_i915g_info), /* E7221_G */ |
| 175 | INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info), /* I915_GM */ |
| 176 | INTEL_VGA_DEVICE(0x2772, &intel_i945g_info), /* I945_G */ |
| 177 | INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info), /* I945_GM */ |
| 178 | INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info), /* I945_GME */ |
| 179 | INTEL_VGA_DEVICE(0x2972, &intel_i965g_info), /* I946_GZ */ |
| 180 | INTEL_VGA_DEVICE(0x2982, &intel_i965g_info), /* G35_G */ |
| 181 | INTEL_VGA_DEVICE(0x2992, &intel_i965g_info), /* I965_Q */ |
| 182 | INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info), /* I965_G */ |
| 183 | INTEL_VGA_DEVICE(0x29b2, &intel_g33_info), /* Q35_G */ |
| 184 | INTEL_VGA_DEVICE(0x29c2, &intel_g33_info), /* G33_G */ |
| 185 | INTEL_VGA_DEVICE(0x29d2, &intel_g33_info), /* Q33_G */ |
| 186 | INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info), /* I965_GM */ |
| 187 | INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info), /* I965_GME */ |
| 188 | INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info), /* GM45_G */ |
| 189 | INTEL_VGA_DEVICE(0x2e02, &intel_g45_info), /* IGD_E_G */ |
| 190 | INTEL_VGA_DEVICE(0x2e12, &intel_g45_info), /* Q45_G */ |
| 191 | INTEL_VGA_DEVICE(0x2e22, &intel_g45_info), /* G45_G */ |
| 192 | INTEL_VGA_DEVICE(0x2e32, &intel_g45_info), /* G41_G */ |
| 193 | INTEL_VGA_DEVICE(0x2e42, &intel_g45_info), /* B43_G */ |
Chris Wilson | 41a5142 | 2010-09-17 08:22:30 +0100 | [diff] [blame] | 194 | INTEL_VGA_DEVICE(0x2e92, &intel_g45_info), /* B43_G.1 */ |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 195 | INTEL_VGA_DEVICE(0xa001, &intel_pineview_info), |
| 196 | INTEL_VGA_DEVICE(0xa011, &intel_pineview_info), |
| 197 | INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info), |
| 198 | INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info), |
Eric Anholt | f6e450a | 2009-11-02 12:08:22 -0800 | [diff] [blame] | 199 | INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info), |
Zhenyu Wang | 8554048 | 2010-09-07 13:45:32 +0800 | [diff] [blame] | 200 | INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info), |
| 201 | INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info), |
Eric Anholt | a13e409 | 2010-01-07 15:08:18 -0800 | [diff] [blame] | 202 | INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info), |
Zhenyu Wang | 8554048 | 2010-09-07 13:45:32 +0800 | [diff] [blame] | 203 | INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info), |
Zhenyu Wang | 4fefe43 | 2010-08-19 09:46:16 +0800 | [diff] [blame] | 204 | INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info), |
Zhenyu Wang | 8554048 | 2010-09-07 13:45:32 +0800 | [diff] [blame] | 205 | INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info), |
Kristian Høgsberg | 49ae35f | 2009-12-16 15:16:15 -0500 | [diff] [blame] | 206 | {0, 0, 0} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 207 | }; |
| 208 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 209 | #if defined(CONFIG_DRM_I915_KMS) |
| 210 | MODULE_DEVICE_TABLE(pci, pciidlist); |
| 211 | #endif |
| 212 | |
Zhenyu Wang | 3bad078 | 2010-04-07 16:15:53 +0800 | [diff] [blame] | 213 | #define INTEL_PCH_DEVICE_ID_MASK 0xff00 |
| 214 | #define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00 |
| 215 | |
| 216 | void intel_detect_pch (struct drm_device *dev) |
| 217 | { |
| 218 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 219 | struct pci_dev *pch; |
| 220 | |
| 221 | /* |
| 222 | * The reason to probe ISA bridge instead of Dev31:Fun0 is to |
| 223 | * make graphics device passthrough work easy for VMM, that only |
| 224 | * need to expose ISA bridge to let driver know the real hardware |
| 225 | * underneath. This is a requirement from virtualization team. |
| 226 | */ |
| 227 | pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL); |
| 228 | if (pch) { |
| 229 | if (pch->vendor == PCI_VENDOR_ID_INTEL) { |
| 230 | int id; |
| 231 | id = pch->device & INTEL_PCH_DEVICE_ID_MASK; |
| 232 | |
| 233 | if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) { |
| 234 | dev_priv->pch_type = PCH_CPT; |
| 235 | DRM_DEBUG_KMS("Found CougarPoint PCH\n"); |
| 236 | } |
| 237 | } |
| 238 | pci_dev_put(pch); |
| 239 | } |
| 240 | } |
| 241 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 242 | static int i915_drm_freeze(struct drm_device *dev) |
| 243 | { |
Rafael J. Wysocki | 61caf87 | 2010-02-18 23:06:27 +0100 | [diff] [blame] | 244 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 245 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 246 | pci_save_state(dev->pdev); |
| 247 | |
| 248 | /* If KMS is active, we do the leavevt stuff here */ |
| 249 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
| 250 | int error = i915_gem_idle(dev); |
| 251 | if (error) { |
| 252 | dev_err(&dev->pdev->dev, |
| 253 | "GEM idle failed, resume might fail\n"); |
| 254 | return error; |
| 255 | } |
| 256 | drm_irq_uninstall(dev); |
| 257 | } |
| 258 | |
| 259 | i915_save_state(dev); |
| 260 | |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 261 | intel_opregion_fini(dev); |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 262 | |
| 263 | /* Modeset on resume, not lid events */ |
| 264 | dev_priv->modeset_on_lid = 0; |
Rafael J. Wysocki | 61caf87 | 2010-02-18 23:06:27 +0100 | [diff] [blame] | 265 | |
| 266 | return 0; |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 267 | } |
| 268 | |
Dave Airlie | 6a9ee8a | 2010-02-01 15:38:10 +1000 | [diff] [blame] | 269 | int i915_suspend(struct drm_device *dev, pm_message_t state) |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 270 | { |
| 271 | int error; |
| 272 | |
| 273 | if (!dev || !dev->dev_private) { |
| 274 | DRM_ERROR("dev: %p\n", dev); |
Keith Packard | 1ae8c0a | 2009-06-28 15:42:17 -0700 | [diff] [blame] | 275 | DRM_ERROR("DRM not initialized, aborting suspend.\n"); |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 276 | return -ENODEV; |
| 277 | } |
| 278 | |
Dave Airlie | b932ccb | 2008-02-20 10:02:20 +1000 | [diff] [blame] | 279 | if (state.event == PM_EVENT_PRETHAW) |
| 280 | return 0; |
| 281 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 282 | error = i915_drm_freeze(dev); |
| 283 | if (error) |
| 284 | return error; |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 285 | |
Dave Airlie | b932ccb | 2008-02-20 10:02:20 +1000 | [diff] [blame] | 286 | if (state.event == PM_EVENT_SUSPEND) { |
| 287 | /* Shut down the device */ |
| 288 | pci_disable_device(dev->pdev); |
| 289 | pci_set_power_state(dev->pdev, PCI_D3hot); |
| 290 | } |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 291 | |
| 292 | return 0; |
| 293 | } |
| 294 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 295 | static int i915_drm_thaw(struct drm_device *dev) |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 296 | { |
Jesse Barnes | 5669fca | 2009-02-17 15:13:31 -0800 | [diff] [blame] | 297 | struct drm_i915_private *dev_priv = dev->dev_private; |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 298 | int error = 0; |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 299 | |
Rafael J. Wysocki | 61caf87 | 2010-02-18 23:06:27 +0100 | [diff] [blame] | 300 | i915_restore_state(dev); |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 301 | intel_opregion_setup(dev); |
Rafael J. Wysocki | 61caf87 | 2010-02-18 23:06:27 +0100 | [diff] [blame] | 302 | |
Jesse Barnes | 5669fca | 2009-02-17 15:13:31 -0800 | [diff] [blame] | 303 | /* KMS EnterVT equivalent */ |
| 304 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
| 305 | mutex_lock(&dev->struct_mutex); |
| 306 | dev_priv->mm.suspended = 0; |
| 307 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 308 | error = i915_gem_init_ringbuffer(dev); |
Jesse Barnes | 5669fca | 2009-02-17 15:13:31 -0800 | [diff] [blame] | 309 | mutex_unlock(&dev->struct_mutex); |
Jesse Barnes | 226485e | 2009-02-23 15:41:09 -0800 | [diff] [blame] | 310 | |
| 311 | drm_irq_install(dev); |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 312 | |
Zhao Yakui | 354ff96 | 2009-07-08 14:13:12 +0800 | [diff] [blame] | 313 | /* Resume the modeset for every activated CRTC */ |
| 314 | drm_helper_resume_force_mode(dev); |
| 315 | } |
Jesse Barnes | 5669fca | 2009-02-17 15:13:31 -0800 | [diff] [blame] | 316 | |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 317 | intel_opregion_init(dev); |
| 318 | |
Linus Torvalds | c9354c8 | 2009-11-02 09:29:55 -0800 | [diff] [blame] | 319 | dev_priv->modeset_on_lid = 0; |
Jesse Barnes | 06891e2 | 2009-09-14 10:58:48 -0700 | [diff] [blame] | 320 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 321 | return error; |
| 322 | } |
| 323 | |
Dave Airlie | 6a9ee8a | 2010-02-01 15:38:10 +1000 | [diff] [blame] | 324 | int i915_resume(struct drm_device *dev) |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 325 | { |
| 326 | if (pci_enable_device(dev->pdev)) |
| 327 | return -EIO; |
| 328 | |
| 329 | pci_set_master(dev->pdev); |
| 330 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 331 | return i915_drm_thaw(dev); |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 332 | } |
| 333 | |
Kenneth Graunke | f49f058 | 2010-09-11 01:19:14 -0700 | [diff] [blame] | 334 | static int i965_reset_complete(struct drm_device *dev) |
| 335 | { |
| 336 | u8 gdrst; |
Kenneth Graunke | eeccdca | 2010-09-11 01:24:50 -0700 | [diff] [blame] | 337 | pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst); |
Kenneth Graunke | f49f058 | 2010-09-11 01:19:14 -0700 | [diff] [blame] | 338 | return gdrst & 0x1; |
| 339 | } |
| 340 | |
Kenneth Graunke | 0573ed4 | 2010-09-11 03:17:19 -0700 | [diff] [blame] | 341 | static int i965_do_reset(struct drm_device *dev, u8 flags) |
| 342 | { |
| 343 | u8 gdrst; |
| 344 | |
| 345 | pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst); |
| 346 | pci_write_config_byte(dev->pdev, I965_GDRST, gdrst | flags | 0x1); |
| 347 | |
| 348 | return wait_for(i965_reset_complete(dev), 500); |
| 349 | } |
| 350 | |
| 351 | static int ironlake_do_reset(struct drm_device *dev, u8 flags) |
| 352 | { |
| 353 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 354 | u32 gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR); |
| 355 | I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, gdrst | flags | 0x1); |
| 356 | return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500); |
| 357 | } |
| 358 | |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 359 | /** |
| 360 | * i965_reset - reset chip after a hang |
| 361 | * @dev: drm device to reset |
| 362 | * @flags: reset domains |
| 363 | * |
| 364 | * Reset the chip. Useful if a hang is detected. Returns zero on successful |
| 365 | * reset or otherwise an error code. |
| 366 | * |
| 367 | * Procedure is fairly simple: |
| 368 | * - reset the chip using the reset reg |
| 369 | * - re-init context state |
| 370 | * - re-init hardware status page |
| 371 | * - re-init ring buffer |
| 372 | * - re-init interrupt state |
| 373 | * - re-init display |
| 374 | */ |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 375 | int i915_reset(struct drm_device *dev, u8 flags) |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 376 | { |
| 377 | drm_i915_private_t *dev_priv = dev->dev_private; |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 378 | /* |
| 379 | * We really should only reset the display subsystem if we actually |
| 380 | * need to |
| 381 | */ |
| 382 | bool need_display = true; |
Kenneth Graunke | 0573ed4 | 2010-09-11 03:17:19 -0700 | [diff] [blame] | 383 | int ret; |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 384 | |
| 385 | mutex_lock(&dev->struct_mutex); |
| 386 | |
| 387 | /* |
| 388 | * Clear request list |
| 389 | */ |
Chris Wilson | b09a1fe | 2010-07-23 23:18:49 +0100 | [diff] [blame] | 390 | i915_gem_retire_requests(dev); |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 391 | |
Chris Wilson | 9375e44 | 2010-09-19 12:21:28 +0100 | [diff] [blame] | 392 | /* Remove anything from the flushing lists. The GPU cache is likely |
| 393 | * to be lost on reset along with the data, so simply move the |
| 394 | * lost bo to the inactive list. |
| 395 | */ |
| 396 | i915_gem_reset_flushing_list(dev); |
| 397 | |
Chris Wilson | 77f0123 | 2010-09-19 12:31:36 +0100 | [diff] [blame] | 398 | /* Move everything out of the GPU domains to ensure we do any |
| 399 | * necessary invalidation upon reuse. |
| 400 | */ |
| 401 | i915_gem_reset_inactive_gpu_domains(dev); |
| 402 | |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 403 | /* |
Kenneth Graunke | f49f058 | 2010-09-11 01:19:14 -0700 | [diff] [blame] | 404 | * Set the domains we want to reset (GRDOM/bits 2 and 3) as |
| 405 | * well as the reset bit (GR/bit 0). Setting the GR bit |
| 406 | * triggers the reset; when done, the hardware will clear it. |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 407 | */ |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 408 | ret = -ENODEV; |
| 409 | switch (INTEL_INFO(dev)->gen) { |
| 410 | case 5: |
Kenneth Graunke | 0573ed4 | 2010-09-11 03:17:19 -0700 | [diff] [blame] | 411 | ret = ironlake_do_reset(dev, flags); |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 412 | break; |
| 413 | case 4: |
Kenneth Graunke | 0573ed4 | 2010-09-11 03:17:19 -0700 | [diff] [blame] | 414 | ret = i965_do_reset(dev, flags); |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 415 | break; |
| 416 | } |
Kenneth Graunke | 0573ed4 | 2010-09-11 03:17:19 -0700 | [diff] [blame] | 417 | if (ret) { |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 418 | DRM_ERROR("Failed to reset chip.\n"); |
Daniel J Blueman | f953c93 | 2010-05-17 14:23:52 +0100 | [diff] [blame] | 419 | mutex_unlock(&dev->struct_mutex); |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 420 | return ret; |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 421 | } |
| 422 | |
| 423 | /* Ok, now get things going again... */ |
| 424 | |
| 425 | /* |
| 426 | * Everything depends on having the GTT running, so we need to start |
| 427 | * there. Fortunately we don't need to do this unless we reset the |
| 428 | * chip at a PCI level. |
| 429 | * |
| 430 | * Next we need to restore the context, but we don't use those |
| 431 | * yet either... |
| 432 | * |
| 433 | * Ring buffer needs to be re-initialized in the KMS case, or if X |
| 434 | * was running at the time of the reset (i.e. we weren't VT |
| 435 | * switched away). |
| 436 | */ |
| 437 | if (drm_core_check_feature(dev, DRIVER_MODESET) || |
Zou Nan hai | 8187a2b | 2010-05-21 09:08:55 +0800 | [diff] [blame] | 438 | !dev_priv->mm.suspended) { |
| 439 | struct intel_ring_buffer *ring = &dev_priv->render_ring; |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 440 | dev_priv->mm.suspended = 0; |
Zou Nan hai | 8187a2b | 2010-05-21 09:08:55 +0800 | [diff] [blame] | 441 | ring->init(dev, ring); |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 442 | mutex_unlock(&dev->struct_mutex); |
| 443 | drm_irq_uninstall(dev); |
| 444 | drm_irq_install(dev); |
| 445 | mutex_lock(&dev->struct_mutex); |
| 446 | } |
| 447 | |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 448 | mutex_unlock(&dev->struct_mutex); |
Chris Wilson | 9fd9814 | 2010-09-18 08:08:06 +0100 | [diff] [blame] | 449 | |
| 450 | /* |
| 451 | * Perform a full modeset as on later generations, e.g. Ironlake, we may |
| 452 | * need to retrain the display link and cannot just restore the register |
| 453 | * values. |
| 454 | */ |
| 455 | if (need_display) { |
| 456 | mutex_lock(&dev->mode_config.mutex); |
| 457 | drm_helper_resume_force_mode(dev); |
| 458 | mutex_unlock(&dev->mode_config.mutex); |
| 459 | } |
| 460 | |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 461 | return 0; |
| 462 | } |
| 463 | |
| 464 | |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 465 | static int __devinit |
| 466 | i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
| 467 | { |
Jordan Crouse | dcdb167 | 2010-05-27 13:40:25 -0600 | [diff] [blame] | 468 | return drm_get_pci_dev(pdev, ent, &driver); |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 469 | } |
| 470 | |
| 471 | static void |
| 472 | i915_pci_remove(struct pci_dev *pdev) |
| 473 | { |
| 474 | struct drm_device *dev = pci_get_drvdata(pdev); |
| 475 | |
| 476 | drm_put_dev(dev); |
| 477 | } |
| 478 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 479 | static int i915_pm_suspend(struct device *dev) |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 480 | { |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 481 | struct pci_dev *pdev = to_pci_dev(dev); |
| 482 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
| 483 | int error; |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 484 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 485 | if (!drm_dev || !drm_dev->dev_private) { |
| 486 | dev_err(dev, "DRM not initialized, aborting suspend.\n"); |
| 487 | return -ENODEV; |
| 488 | } |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 489 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 490 | error = i915_drm_freeze(drm_dev); |
| 491 | if (error) |
| 492 | return error; |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 493 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 494 | pci_disable_device(pdev); |
| 495 | pci_set_power_state(pdev, PCI_D3hot); |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 496 | |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 497 | return 0; |
| 498 | } |
| 499 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 500 | static int i915_pm_resume(struct device *dev) |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 501 | { |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 502 | struct pci_dev *pdev = to_pci_dev(dev); |
| 503 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
| 504 | |
| 505 | return i915_resume(drm_dev); |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 506 | } |
| 507 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 508 | static int i915_pm_freeze(struct device *dev) |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 509 | { |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 510 | struct pci_dev *pdev = to_pci_dev(dev); |
| 511 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
| 512 | |
| 513 | if (!drm_dev || !drm_dev->dev_private) { |
| 514 | dev_err(dev, "DRM not initialized, aborting suspend.\n"); |
| 515 | return -ENODEV; |
| 516 | } |
| 517 | |
| 518 | return i915_drm_freeze(drm_dev); |
| 519 | } |
| 520 | |
| 521 | static int i915_pm_thaw(struct device *dev) |
| 522 | { |
| 523 | struct pci_dev *pdev = to_pci_dev(dev); |
| 524 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
| 525 | |
| 526 | return i915_drm_thaw(drm_dev); |
| 527 | } |
| 528 | |
| 529 | static int i915_pm_poweroff(struct device *dev) |
| 530 | { |
| 531 | struct pci_dev *pdev = to_pci_dev(dev); |
| 532 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 533 | |
Rafael J. Wysocki | 61caf87 | 2010-02-18 23:06:27 +0100 | [diff] [blame] | 534 | return i915_drm_freeze(drm_dev); |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 535 | } |
| 536 | |
Chris Wilson | b4b78d1 | 2010-06-06 15:40:20 +0100 | [diff] [blame] | 537 | static const struct dev_pm_ops i915_pm_ops = { |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 538 | .suspend = i915_pm_suspend, |
| 539 | .resume = i915_pm_resume, |
| 540 | .freeze = i915_pm_freeze, |
| 541 | .thaw = i915_pm_thaw, |
| 542 | .poweroff = i915_pm_poweroff, |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 543 | .restore = i915_pm_resume, |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 544 | }; |
| 545 | |
Jesse Barnes | de151cf | 2008-11-12 10:03:55 -0800 | [diff] [blame] | 546 | static struct vm_operations_struct i915_gem_vm_ops = { |
| 547 | .fault = i915_gem_fault, |
Jesse Barnes | ab00b3e | 2009-02-11 14:01:46 -0800 | [diff] [blame] | 548 | .open = drm_gem_vm_open, |
| 549 | .close = drm_gem_vm_close, |
Jesse Barnes | de151cf | 2008-11-12 10:03:55 -0800 | [diff] [blame] | 550 | }; |
| 551 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 552 | static struct drm_driver driver = { |
Dave Airlie | 792d2b9 | 2005-11-11 23:30:27 +1100 | [diff] [blame] | 553 | /* don't use mtrr's here, the Xserver or user space app should |
| 554 | * deal with them for intel hardware. |
| 555 | */ |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 556 | .driver_features = |
| 557 | DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/ |
| 558 | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM, |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 559 | .load = i915_driver_load, |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 560 | .unload = i915_driver_unload, |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 561 | .open = i915_driver_open, |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 562 | .lastclose = i915_driver_lastclose, |
| 563 | .preclose = i915_driver_preclose, |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 564 | .postclose = i915_driver_postclose, |
Rafael J. Wysocki | d8e2920 | 2010-01-09 00:45:33 +0100 | [diff] [blame] | 565 | |
| 566 | /* Used in place of i915_pm_ops for non-DRIVER_MODESET */ |
| 567 | .suspend = i915_suspend, |
| 568 | .resume = i915_resume, |
| 569 | |
Dave Airlie | cda1738 | 2005-07-10 17:31:26 +1000 | [diff] [blame] | 570 | .device_is_agp = i915_driver_device_is_agp, |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 571 | .enable_vblank = i915_enable_vblank, |
| 572 | .disable_vblank = i915_disable_vblank, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 573 | .irq_preinstall = i915_driver_irq_preinstall, |
| 574 | .irq_postinstall = i915_driver_irq_postinstall, |
| 575 | .irq_uninstall = i915_driver_irq_uninstall, |
| 576 | .irq_handler = i915_driver_irq_handler, |
| 577 | .reclaim_buffers = drm_core_reclaim_buffers, |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 578 | .master_create = i915_master_create, |
| 579 | .master_destroy = i915_master_destroy, |
Ben Gamari | 955b12d | 2009-02-17 20:08:49 -0500 | [diff] [blame] | 580 | #if defined(CONFIG_DEBUG_FS) |
Ben Gamari | 27c202a | 2009-07-01 22:26:52 -0400 | [diff] [blame] | 581 | .debugfs_init = i915_debugfs_init, |
| 582 | .debugfs_cleanup = i915_debugfs_cleanup, |
Ben Gamari | 955b12d | 2009-02-17 20:08:49 -0500 | [diff] [blame] | 583 | #endif |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 584 | .gem_init_object = i915_gem_init_object, |
| 585 | .gem_free_object = i915_gem_free_object, |
Jesse Barnes | de151cf | 2008-11-12 10:03:55 -0800 | [diff] [blame] | 586 | .gem_vm_ops = &i915_gem_vm_ops, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 587 | .ioctls = i915_ioctls, |
| 588 | .fops = { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 589 | .owner = THIS_MODULE, |
| 590 | .open = drm_open, |
| 591 | .release = drm_release, |
Arnd Bergmann | ed8b670 | 2009-12-16 22:17:09 +0000 | [diff] [blame] | 592 | .unlocked_ioctl = drm_ioctl, |
Jesse Barnes | de151cf | 2008-11-12 10:03:55 -0800 | [diff] [blame] | 593 | .mmap = drm_gem_mmap, |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 594 | .poll = drm_poll, |
| 595 | .fasync = drm_fasync, |
Kristian Høgsberg | c9a9c5e | 2009-09-12 04:33:34 +1000 | [diff] [blame] | 596 | .read = drm_read, |
Dave Airlie | 8ca7c1d | 2005-07-07 21:51:26 +1000 | [diff] [blame] | 597 | #ifdef CONFIG_COMPAT |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 598 | .compat_ioctl = i915_compat_ioctl, |
Dave Airlie | 8ca7c1d | 2005-07-07 21:51:26 +1000 | [diff] [blame] | 599 | #endif |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 600 | }, |
| 601 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 602 | .pci_driver = { |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 603 | .name = DRIVER_NAME, |
| 604 | .id_table = pciidlist, |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 605 | .probe = i915_pci_probe, |
| 606 | .remove = i915_pci_remove, |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 607 | .driver.pm = &i915_pm_ops, |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 608 | }, |
Dave Airlie | bc5f452 | 2007-11-05 12:50:58 +1000 | [diff] [blame] | 609 | |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 610 | .name = DRIVER_NAME, |
| 611 | .desc = DRIVER_DESC, |
| 612 | .date = DRIVER_DATE, |
| 613 | .major = DRIVER_MAJOR, |
| 614 | .minor = DRIVER_MINOR, |
| 615 | .patchlevel = DRIVER_PATCHLEVEL, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 616 | }; |
| 617 | |
| 618 | static int __init i915_init(void) |
| 619 | { |
Zhenyu Wang | 1f7a6e3 | 2010-02-23 14:05:24 +0800 | [diff] [blame] | 620 | if (!intel_agp_enabled) { |
| 621 | DRM_ERROR("drm/i915 can't work without intel_agp module!\n"); |
| 622 | return -ENODEV; |
| 623 | } |
| 624 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 625 | driver.num_ioctls = i915_max_ioctl; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 626 | |
Chris Wilson | 3116971 | 2009-09-14 16:50:28 +0100 | [diff] [blame] | 627 | i915_gem_shrinker_init(); |
| 628 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 629 | /* |
| 630 | * If CONFIG_DRM_I915_KMS is set, default to KMS unless |
| 631 | * explicitly disabled with the module pararmeter. |
| 632 | * |
| 633 | * Otherwise, just follow the parameter (defaulting to off). |
| 634 | * |
| 635 | * Allow optional vga_text_mode_force boot option to override |
| 636 | * the default behavior. |
| 637 | */ |
| 638 | #if defined(CONFIG_DRM_I915_KMS) |
| 639 | if (i915_modeset != 0) |
| 640 | driver.driver_features |= DRIVER_MODESET; |
| 641 | #endif |
| 642 | if (i915_modeset == 1) |
| 643 | driver.driver_features |= DRIVER_MODESET; |
| 644 | |
| 645 | #ifdef CONFIG_VGA_CONSOLE |
| 646 | if (vgacon_text_force() && i915_modeset == -1) |
| 647 | driver.driver_features &= ~DRIVER_MODESET; |
| 648 | #endif |
| 649 | |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 650 | if (!(driver.driver_features & DRIVER_MODESET)) { |
| 651 | driver.suspend = i915_suspend; |
| 652 | driver.resume = i915_resume; |
| 653 | } |
| 654 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 655 | return drm_init(&driver); |
| 656 | } |
| 657 | |
| 658 | static void __exit i915_exit(void) |
| 659 | { |
Chris Wilson | 3116971 | 2009-09-14 16:50:28 +0100 | [diff] [blame] | 660 | i915_gem_shrinker_exit(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 661 | drm_exit(&driver); |
| 662 | } |
| 663 | |
| 664 | module_init(i915_init); |
| 665 | module_exit(i915_exit); |
| 666 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 667 | MODULE_AUTHOR(DRIVER_AUTHOR); |
| 668 | MODULE_DESCRIPTION(DRIVER_DESC); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 669 | MODULE_LICENSE("GPL and additional rights"); |