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Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata_opti.c - ATI PATA for new ATA layer
3 * (C) 2005 Red Hat Inc
Jeff Garzik669a5db2006-08-29 18:12:40 -04004 *
5 * Based on
6 * linux/drivers/ide/pci/opti621.c Version 0.7 Sept 10, 2002
7 *
8 * Copyright (C) 1996-1998 Linus Torvalds & authors (see below)
9 *
10 * Authors:
11 * Jaromir Koutek <miri@punknet.cz>,
12 * Jan Harkes <jaharkes@cwi.nl>,
13 * Mark Lord <mlord@pobox.com>
14 * Some parts of code are from ali14xx.c and from rz1000.c.
15 *
16 * Also consulted the FreeBSD prototype driver by Kevin Day to try
17 * and resolve some confusions. Further documentation can be found in
18 * Ralf Brown's interrupt list
19 *
20 * If you have other variants of the Opti range (Viper/Vendetta) please
21 * try this driver with those PCI idents and report back. For the later
22 * chips see the pata_optidma driver
23 *
24 */
25
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/pci.h>
29#include <linux/init.h>
30#include <linux/blkdev.h>
31#include <linux/delay.h>
32#include <scsi/scsi_host.h>
33#include <linux/libata.h>
34
35#define DRV_NAME "pata_opti"
Jeff Garzika0fcdc02007-03-09 07:24:15 -050036#define DRV_VERSION "0.2.9"
Jeff Garzik669a5db2006-08-29 18:12:40 -040037
38enum {
39 READ_REG = 0, /* index of Read cycle timing register */
40 WRITE_REG = 1, /* index of Write cycle timing register */
41 CNTRL_REG = 3, /* index of Control register */
42 STRAP_REG = 5, /* index of Strap register */
43 MISC_REG = 6 /* index of Miscellaneous register */
44};
45
46/**
47 * opti_pre_reset - probe begin
Tejun Heocc0680a2007-08-06 18:36:23 +090048 * @link: ATA link
Tejun Heod4b2bab2007-02-02 16:50:52 +090049 * @deadline: deadline jiffies for the operation
Jeff Garzik669a5db2006-08-29 18:12:40 -040050 *
51 * Set up cable type and use generic probe init
52 */
53
Tejun Heocc0680a2007-08-06 18:36:23 +090054static int opti_pre_reset(struct ata_link *link, unsigned long deadline)
Jeff Garzik669a5db2006-08-29 18:12:40 -040055{
Tejun Heocc0680a2007-08-06 18:36:23 +090056 struct ata_port *ap = link->ap;
Jeff Garzik669a5db2006-08-29 18:12:40 -040057 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
58 static const struct pci_bits opti_enable_bits[] = {
59 { 0x45, 1, 0x80, 0x00 },
60 { 0x40, 1, 0x08, 0x00 }
61 };
62
Alan Coxc9619222006-09-26 17:53:38 +010063 if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no]))
64 return -ENOENT;
Tejun Heod4b2bab2007-02-02 16:50:52 +090065
Tejun Heo9363c382008-04-07 22:47:16 +090066 return ata_sff_prereset(link, deadline);
Jeff Garzik669a5db2006-08-29 18:12:40 -040067}
68
69/**
Jeff Garzik669a5db2006-08-29 18:12:40 -040070 * opti_write_reg - control register setup
71 * @ap: ATA port
72 * @value: value
73 * @reg: control register number
74 *
75 * The Opti uses magic 'trapdoor' register accesses to do configuration
76 * rather than using PCI space as other controllers do. The double inw
77 * on the error register activates configuration mode. We can then write
78 * the control register
79 */
80
81static void opti_write_reg(struct ata_port *ap, u8 val, int reg)
82{
Tejun Heo0d5ff562007-02-01 15:06:36 +090083 void __iomem *regio = ap->ioaddr.cmd_addr;
Jeff Garzik669a5db2006-08-29 18:12:40 -040084
85 /* These 3 unlock the control register access */
Tejun Heo0d5ff562007-02-01 15:06:36 +090086 ioread16(regio + 1);
87 ioread16(regio + 1);
88 iowrite8(3, regio + 2);
Jeff Garzik669a5db2006-08-29 18:12:40 -040089
90 /* Do the I/O */
Tejun Heo0d5ff562007-02-01 15:06:36 +090091 iowrite8(val, regio + reg);
Jeff Garzik669a5db2006-08-29 18:12:40 -040092
93 /* Relock */
Tejun Heo0d5ff562007-02-01 15:06:36 +090094 iowrite8(0x83, regio + 2);
Jeff Garzik669a5db2006-08-29 18:12:40 -040095}
96
Jeff Garzik669a5db2006-08-29 18:12:40 -040097/**
98 * opti_set_piomode - set initial PIO mode data
99 * @ap: ATA interface
100 * @adev: ATA device
101 *
102 * Called to do the PIO mode setup. Timing numbers are taken from
103 * the FreeBSD driver then pre computed to keep the code clean. There
104 * are two tables depending on the hardware clock speed.
105 */
106
107static void opti_set_piomode(struct ata_port *ap, struct ata_device *adev)
108{
109 struct ata_device *pair = ata_dev_pair(adev);
110 int clock;
111 int pio = adev->pio_mode - XFER_PIO_0;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900112 void __iomem *regio = ap->ioaddr.cmd_addr;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400113 u8 addr;
114
115 /* Address table precomputed with prefetch off and a DCLK of 2 */
116 static const u8 addr_timing[2][5] = {
117 { 0x30, 0x20, 0x20, 0x10, 0x10 },
118 { 0x20, 0x20, 0x10, 0x10, 0x10 }
119 };
120 static const u8 data_rec_timing[2][5] = {
121 { 0x6B, 0x56, 0x42, 0x32, 0x31 },
122 { 0x58, 0x44, 0x32, 0x22, 0x21 }
123 };
124
Tejun Heo0d5ff562007-02-01 15:06:36 +0900125 iowrite8(0xff, regio + 5);
126 clock = ioread16(regio + 5) & 1;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400127
128 /*
129 * As with many controllers the address setup time is shared
130 * and must suit both devices if present.
131 */
132
133 addr = addr_timing[clock][pio];
134 if (pair) {
135 /* Hardware constraint */
136 u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0];
137 if (pair_addr > addr)
138 addr = pair_addr;
139 }
140
141 /* Commence primary programming sequence */
142 opti_write_reg(ap, adev->devno, MISC_REG);
143 opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG);
144 opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG);
145 opti_write_reg(ap, addr, MISC_REG);
146
147 /* Programming sequence complete, override strapping */
148 opti_write_reg(ap, 0x85, CNTRL_REG);
149}
150
151static struct scsi_host_template opti_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900152 ATA_PIO_SHT(DRV_NAME),
Jeff Garzik669a5db2006-08-29 18:12:40 -0400153};
154
155static struct ata_port_operations opti_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900156 .inherits = &ata_sff_port_ops,
Jeff Garzika0fcdc02007-03-09 07:24:15 -0500157 .cable_detect = ata_cable_40wire,
Tejun Heo029cfd62008-03-25 12:22:49 +0900158 .set_piomode = opti_set_piomode,
Tejun Heoa1efdab2008-03-25 12:22:50 +0900159 .prereset = opti_pre_reset,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400160};
161
162static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id)
163{
Tejun Heo1626aeb2007-05-04 12:43:58 +0200164 static const struct ata_port_info info = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400165 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100166 .pio_mask = ATA_PIO4,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400167 .port_ops = &opti_port_ops
168 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200169 const struct ata_port_info *ppi[] = { &info, NULL };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400170
Joe Perches06296a12011-04-15 15:52:00 -0700171 ata_print_version_once(&dev->dev, DRV_VERSION);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400172
Alan Cox16ea0fc2010-02-23 02:26:06 -0500173 return ata_pci_sff_init_one(dev, ppi, &opti_sht, NULL, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400174}
175
176static const struct pci_device_id opti[] = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400177 { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
178 { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 },
179
180 { },
Jeff Garzik669a5db2006-08-29 18:12:40 -0400181};
182
183static struct pci_driver opti_pci_driver = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400184 .name = DRV_NAME,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400185 .id_table = opti,
186 .probe = opti_init_one,
Alan30ced0f2006-11-22 16:57:36 +0000187 .remove = ata_pci_remove_one,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900188#ifdef CONFIG_PM
Alan30ced0f2006-11-22 16:57:36 +0000189 .suspend = ata_pci_device_suspend,
190 .resume = ata_pci_device_resume,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900191#endif
Jeff Garzik669a5db2006-08-29 18:12:40 -0400192};
193
194static int __init opti_init(void)
195{
196 return pci_register_driver(&opti_pci_driver);
197}
198
Jeff Garzik669a5db2006-08-29 18:12:40 -0400199static void __exit opti_exit(void)
200{
201 pci_unregister_driver(&opti_pci_driver);
202}
203
204
205MODULE_AUTHOR("Alan Cox");
206MODULE_DESCRIPTION("low-level driver for Opti 621/621X");
207MODULE_LICENSE("GPL");
208MODULE_DEVICE_TABLE(pci, opti);
209MODULE_VERSION(DRV_VERSION);
210
211module_init(opti_init);
212module_exit(opti_exit);