Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1 | /* |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 2 | * Freescale MPC85xx/MPC86xx RapidIO support |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 3 | * |
Thomas Moll | bd4fb65 | 2010-05-26 14:44:05 -0700 | [diff] [blame] | 4 | * Copyright 2009 Sysgo AG |
| 5 | * Thomas Moll <thomas.moll@sysgo.com> |
| 6 | * - fixed maintenance access routines, check for aligned access |
| 7 | * |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 8 | * Copyright 2009 Integrated Device Technology, Inc. |
| 9 | * Alex Bounine <alexandre.bounine@idt.com> |
| 10 | * - Added Port-Write message handling |
| 11 | * - Added Machine Check exception handling |
| 12 | * |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 13 | * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc. |
| 14 | * Zhang Wei <wei.zhang@freescale.com> |
| 15 | * |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 16 | * Copyright 2005 MontaVista Software, Inc. |
| 17 | * Matt Porter <mporter@kernel.crashing.org> |
| 18 | * |
| 19 | * This program is free software; you can redistribute it and/or modify it |
| 20 | * under the terms of the GNU General Public License as published by the |
| 21 | * Free Software Foundation; either version 2 of the License, or (at your |
| 22 | * option) any later version. |
| 23 | */ |
| 24 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 25 | #include <linux/init.h> |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/types.h> |
| 28 | #include <linux/dma-mapping.h> |
| 29 | #include <linux/interrupt.h> |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 30 | #include <linux/device.h> |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 31 | #include <linux/rio.h> |
| 32 | #include <linux/rio_drv.h> |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 33 | #include <linux/of_platform.h> |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 34 | #include <linux/delay.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 35 | #include <linux/slab.h> |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 36 | #include <linux/kfifo.h> |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 37 | |
| 38 | #include <asm/io.h> |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 39 | #include <asm/machdep.h> |
| 40 | #include <asm/uaccess.h> |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 41 | |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 42 | #undef DEBUG_PW /* Port-Write debugging */ |
| 43 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 44 | /* RapidIO definition irq, which read from OF-tree */ |
| 45 | #define IRQ_RIO_BELL(m) (((struct rio_priv *)(m->priv))->bellirq) |
| 46 | #define IRQ_RIO_TX(m) (((struct rio_priv *)(m->priv))->txirq) |
| 47 | #define IRQ_RIO_RX(m) (((struct rio_priv *)(m->priv))->rxirq) |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 48 | #define IRQ_RIO_PW(m) (((struct rio_priv *)(m->priv))->pwirq) |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 49 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 50 | #define RIO_ATMU_REGS_OFFSET 0x10c00 |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 51 | #define RIO_P_MSG_REGS_OFFSET 0x11000 |
| 52 | #define RIO_S_MSG_REGS_OFFSET 0x13000 |
| 53 | #define RIO_ESCSR 0x158 |
| 54 | #define RIO_CCSR 0x15c |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 55 | #define RIO_LTLEDCSR 0x0608 |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 56 | #define RIO_LTLEDCSR_IER 0x80000000 |
| 57 | #define RIO_LTLEDCSR_PRT 0x01000000 |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 58 | #define RIO_LTLEECSR 0x060c |
| 59 | #define RIO_EPWISR 0x10010 |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 60 | #define RIO_ISR_AACR 0x10120 |
| 61 | #define RIO_ISR_AACR_AA 0x1 /* Accept All ID */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 62 | #define RIO_MAINT_WIN_SIZE 0x400000 |
| 63 | #define RIO_DBELL_WIN_SIZE 0x1000 |
| 64 | |
| 65 | #define RIO_MSG_OMR_MUI 0x00000002 |
| 66 | #define RIO_MSG_OSR_TE 0x00000080 |
| 67 | #define RIO_MSG_OSR_QOI 0x00000020 |
| 68 | #define RIO_MSG_OSR_QFI 0x00000010 |
| 69 | #define RIO_MSG_OSR_MUB 0x00000004 |
| 70 | #define RIO_MSG_OSR_EOMI 0x00000002 |
| 71 | #define RIO_MSG_OSR_QEI 0x00000001 |
| 72 | |
| 73 | #define RIO_MSG_IMR_MI 0x00000002 |
| 74 | #define RIO_MSG_ISR_TE 0x00000080 |
| 75 | #define RIO_MSG_ISR_QFI 0x00000010 |
| 76 | #define RIO_MSG_ISR_DIQI 0x00000001 |
| 77 | |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 78 | #define RIO_IPWMR_SEN 0x00100000 |
| 79 | #define RIO_IPWMR_QFIE 0x00000100 |
| 80 | #define RIO_IPWMR_EIE 0x00000020 |
| 81 | #define RIO_IPWMR_CQ 0x00000002 |
| 82 | #define RIO_IPWMR_PWE 0x00000001 |
| 83 | |
| 84 | #define RIO_IPWSR_QF 0x00100000 |
| 85 | #define RIO_IPWSR_TE 0x00000080 |
| 86 | #define RIO_IPWSR_QFI 0x00000010 |
| 87 | #define RIO_IPWSR_PWD 0x00000008 |
| 88 | #define RIO_IPWSR_PWB 0x00000004 |
| 89 | |
Alexandre Bounine | 93e2cbd | 2010-10-27 15:34:28 -0700 | [diff] [blame^] | 90 | #define RIO_EPWISR_PINT 0x80000000 |
| 91 | #define RIO_EPWISR_PW 0x00000001 |
| 92 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 93 | #define RIO_MSG_DESC_SIZE 32 |
| 94 | #define RIO_MSG_BUFFER_SIZE 4096 |
| 95 | #define RIO_MIN_TX_RING_SIZE 2 |
| 96 | #define RIO_MAX_TX_RING_SIZE 2048 |
| 97 | #define RIO_MIN_RX_RING_SIZE 2 |
| 98 | #define RIO_MAX_RX_RING_SIZE 2048 |
| 99 | |
| 100 | #define DOORBELL_DMR_DI 0x00000002 |
| 101 | #define DOORBELL_DSR_TE 0x00000080 |
| 102 | #define DOORBELL_DSR_QFI 0x00000010 |
| 103 | #define DOORBELL_DSR_DIQI 0x00000001 |
Zhang Wei | 6c39103 | 2008-04-18 13:33:48 -0700 | [diff] [blame] | 104 | #define DOORBELL_TID_OFFSET 0x02 |
| 105 | #define DOORBELL_SID_OFFSET 0x04 |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 106 | #define DOORBELL_INFO_OFFSET 0x06 |
| 107 | |
| 108 | #define DOORBELL_MESSAGE_SIZE 0x08 |
Zhang Wei | 6c39103 | 2008-04-18 13:33:48 -0700 | [diff] [blame] | 109 | #define DBELL_SID(x) (*(u16 *)(x + DOORBELL_SID_OFFSET)) |
| 110 | #define DBELL_TID(x) (*(u16 *)(x + DOORBELL_TID_OFFSET)) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 111 | #define DBELL_INF(x) (*(u16 *)(x + DOORBELL_INFO_OFFSET)) |
| 112 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 113 | struct rio_atmu_regs { |
| 114 | u32 rowtar; |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 115 | u32 rowtear; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 116 | u32 rowbar; |
| 117 | u32 pad2; |
| 118 | u32 rowar; |
| 119 | u32 pad3[3]; |
| 120 | }; |
| 121 | |
| 122 | struct rio_msg_regs { |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame] | 123 | u32 omr; /* 0xD_3000 - Outbound message 0 mode register */ |
| 124 | u32 osr; /* 0xD_3004 - Outbound message 0 status register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 125 | u32 pad1; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame] | 126 | u32 odqdpar; /* 0xD_300C - Outbound message 0 descriptor queue |
| 127 | dequeue pointer address register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 128 | u32 pad2; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame] | 129 | u32 osar; /* 0xD_3014 - Outbound message 0 source address |
| 130 | register */ |
| 131 | u32 odpr; /* 0xD_3018 - Outbound message 0 destination port |
| 132 | register */ |
| 133 | u32 odatr; /* 0xD_301C - Outbound message 0 destination attributes |
| 134 | Register*/ |
| 135 | u32 odcr; /* 0xD_3020 - Outbound message 0 double-word count |
| 136 | register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 137 | u32 pad3; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame] | 138 | u32 odqepar; /* 0xD_3028 - Outbound message 0 descriptor queue |
| 139 | enqueue pointer address register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 140 | u32 pad4[13]; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame] | 141 | u32 imr; /* 0xD_3060 - Inbound message 0 mode register */ |
| 142 | u32 isr; /* 0xD_3064 - Inbound message 0 status register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 143 | u32 pad5; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame] | 144 | u32 ifqdpar; /* 0xD_306C - Inbound message 0 frame queue dequeue |
| 145 | pointer address register*/ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 146 | u32 pad6; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame] | 147 | u32 ifqepar; /* 0xD_3074 - Inbound message 0 frame queue enqueue |
| 148 | pointer address register */ |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 149 | u32 pad7[226]; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame] | 150 | u32 odmr; /* 0xD_3400 - Outbound doorbell mode register */ |
| 151 | u32 odsr; /* 0xD_3404 - Outbound doorbell status register */ |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 152 | u32 res0[4]; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame] | 153 | u32 oddpr; /* 0xD_3418 - Outbound doorbell destination port |
| 154 | register */ |
| 155 | u32 oddatr; /* 0xD_341c - Outbound doorbell destination attributes |
| 156 | register */ |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 157 | u32 res1[3]; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame] | 158 | u32 odretcr; /* 0xD_342C - Outbound doorbell retry error threshold |
| 159 | configuration register */ |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 160 | u32 res2[12]; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame] | 161 | u32 dmr; /* 0xD_3460 - Inbound doorbell mode register */ |
| 162 | u32 dsr; /* 0xD_3464 - Inbound doorbell status register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 163 | u32 pad8; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame] | 164 | u32 dqdpar; /* 0xD_346C - Inbound doorbell queue dequeue Pointer |
| 165 | address register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 166 | u32 pad9; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame] | 167 | u32 dqepar; /* 0xD_3474 - Inbound doorbell Queue enqueue pointer |
| 168 | address register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 169 | u32 pad10[26]; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame] | 170 | u32 pwmr; /* 0xD_34E0 - Inbound port-write mode register */ |
| 171 | u32 pwsr; /* 0xD_34E4 - Inbound port-write status register */ |
| 172 | u32 epwqbar; /* 0xD_34E8 - Extended Port-Write Queue Base Address |
| 173 | register */ |
| 174 | u32 pwqbar; /* 0xD_34EC - Inbound port-write queue base address |
| 175 | register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 176 | }; |
| 177 | |
| 178 | struct rio_tx_desc { |
| 179 | u32 res1; |
| 180 | u32 saddr; |
| 181 | u32 dport; |
| 182 | u32 dattr; |
| 183 | u32 res2; |
| 184 | u32 res3; |
| 185 | u32 dwcnt; |
| 186 | u32 res4; |
| 187 | }; |
| 188 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 189 | struct rio_dbell_ring { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 190 | void *virt; |
| 191 | dma_addr_t phys; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 192 | }; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 193 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 194 | struct rio_msg_tx_ring { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 195 | void *virt; |
| 196 | dma_addr_t phys; |
| 197 | void *virt_buffer[RIO_MAX_TX_RING_SIZE]; |
| 198 | dma_addr_t phys_buffer[RIO_MAX_TX_RING_SIZE]; |
| 199 | int tx_slot; |
| 200 | int size; |
Matt Porter | 6978bbc | 2005-11-07 01:00:20 -0800 | [diff] [blame] | 201 | void *dev_id; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 202 | }; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 203 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 204 | struct rio_msg_rx_ring { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 205 | void *virt; |
| 206 | dma_addr_t phys; |
| 207 | void *virt_buffer[RIO_MAX_RX_RING_SIZE]; |
| 208 | int rx_slot; |
| 209 | int size; |
Matt Porter | 6978bbc | 2005-11-07 01:00:20 -0800 | [diff] [blame] | 210 | void *dev_id; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 211 | }; |
| 212 | |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 213 | struct rio_port_write_msg { |
| 214 | void *virt; |
| 215 | dma_addr_t phys; |
| 216 | u32 msg_count; |
| 217 | u32 err_count; |
| 218 | u32 discard_count; |
| 219 | }; |
| 220 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 221 | struct rio_priv { |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 222 | struct device *dev; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 223 | void __iomem *regs_win; |
| 224 | struct rio_atmu_regs __iomem *atmu_regs; |
| 225 | struct rio_atmu_regs __iomem *maint_atmu_regs; |
| 226 | struct rio_atmu_regs __iomem *dbell_atmu_regs; |
| 227 | void __iomem *dbell_win; |
| 228 | void __iomem *maint_win; |
| 229 | struct rio_msg_regs __iomem *msg_regs; |
| 230 | struct rio_dbell_ring dbell_ring; |
| 231 | struct rio_msg_tx_ring msg_tx_ring; |
| 232 | struct rio_msg_rx_ring msg_rx_ring; |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 233 | struct rio_port_write_msg port_write_msg; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 234 | int bellirq; |
| 235 | int txirq; |
| 236 | int rxirq; |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 237 | int pwirq; |
| 238 | struct work_struct pw_work; |
| 239 | struct kfifo pw_fifo; |
| 240 | spinlock_t pw_fifo_lock; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 241 | }; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 242 | |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 243 | #define __fsl_read_rio_config(x, addr, err, op) \ |
| 244 | __asm__ __volatile__( \ |
| 245 | "1: "op" %1,0(%2)\n" \ |
| 246 | " eieio\n" \ |
| 247 | "2:\n" \ |
| 248 | ".section .fixup,\"ax\"\n" \ |
| 249 | "3: li %1,-1\n" \ |
| 250 | " li %0,%3\n" \ |
| 251 | " b 2b\n" \ |
| 252 | ".section __ex_table,\"a\"\n" \ |
| 253 | " .align 2\n" \ |
| 254 | " .long 1b,3b\n" \ |
| 255 | ".text" \ |
| 256 | : "=r" (err), "=r" (x) \ |
| 257 | : "b" (addr), "i" (-EFAULT), "0" (err)) |
| 258 | |
| 259 | static void __iomem *rio_regs_win; |
| 260 | |
Li Yang | ff33f18 | 2010-06-18 14:24:20 +0800 | [diff] [blame] | 261 | #ifdef CONFIG_E500 |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 262 | static int (*saved_mcheck_exception)(struct pt_regs *regs); |
| 263 | |
| 264 | static int fsl_rio_mcheck_exception(struct pt_regs *regs) |
| 265 | { |
| 266 | const struct exception_table_entry *entry = NULL; |
Li Yang | ff33f18 | 2010-06-18 14:24:20 +0800 | [diff] [blame] | 267 | unsigned long reason = mfspr(SPRN_MCSR); |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 268 | |
| 269 | if (reason & MCSR_BUS_RBERR) { |
| 270 | reason = in_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR)); |
| 271 | if (reason & (RIO_LTLEDCSR_IER | RIO_LTLEDCSR_PRT)) { |
| 272 | /* Check if we are prepared to handle this fault */ |
| 273 | entry = search_exception_tables(regs->nip); |
| 274 | if (entry) { |
| 275 | pr_debug("RIO: %s - MC Exception handled\n", |
| 276 | __func__); |
| 277 | out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), |
| 278 | 0); |
| 279 | regs->msr |= MSR_RI; |
| 280 | regs->nip = entry->fixup; |
| 281 | return 1; |
| 282 | } |
| 283 | } |
| 284 | } |
| 285 | |
| 286 | if (saved_mcheck_exception) |
| 287 | return saved_mcheck_exception(regs); |
| 288 | else |
| 289 | return cur_cpu_spec->machine_check(regs); |
| 290 | } |
Li Yang | ff33f18 | 2010-06-18 14:24:20 +0800 | [diff] [blame] | 291 | #endif |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 292 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 293 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 294 | * fsl_rio_doorbell_send - Send a MPC85xx doorbell message |
Randy Dunlap | 9941d94 | 2008-04-30 16:45:58 -0700 | [diff] [blame] | 295 | * @mport: RapidIO master port info |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 296 | * @index: ID of RapidIO interface |
| 297 | * @destid: Destination ID of target device |
| 298 | * @data: 16-bit info field of RapidIO doorbell message |
| 299 | * |
| 300 | * Sends a MPC85xx doorbell message. Returns %0 on success or |
| 301 | * %-EINVAL on failure. |
| 302 | */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 303 | static int fsl_rio_doorbell_send(struct rio_mport *mport, |
| 304 | int index, u16 destid, u16 data) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 305 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 306 | struct rio_priv *priv = mport->priv; |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 307 | pr_debug("fsl_doorbell_send: index %d destid %4.4x data %4.4x\n", |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 308 | index, destid, data); |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 309 | switch (mport->phy_type) { |
| 310 | case RIO_PHY_PARALLEL: |
| 311 | out_be32(&priv->dbell_atmu_regs->rowtar, destid << 22); |
| 312 | out_be16(priv->dbell_win, data); |
| 313 | break; |
| 314 | case RIO_PHY_SERIAL: |
| 315 | /* In the serial version silicons, such as MPC8548, MPC8641, |
| 316 | * below operations is must be. |
| 317 | */ |
| 318 | out_be32(&priv->msg_regs->odmr, 0x00000000); |
| 319 | out_be32(&priv->msg_regs->odretcr, 0x00000004); |
| 320 | out_be32(&priv->msg_regs->oddpr, destid << 16); |
| 321 | out_be32(&priv->msg_regs->oddatr, data); |
| 322 | out_be32(&priv->msg_regs->odmr, 0x00000001); |
| 323 | break; |
| 324 | } |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 325 | |
| 326 | return 0; |
| 327 | } |
| 328 | |
| 329 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 330 | * fsl_local_config_read - Generate a MPC85xx local config space read |
Randy Dunlap | 9941d94 | 2008-04-30 16:45:58 -0700 | [diff] [blame] | 331 | * @mport: RapidIO master port info |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 332 | * @index: ID of RapdiIO interface |
| 333 | * @offset: Offset into configuration space |
| 334 | * @len: Length (in bytes) of the maintenance transaction |
| 335 | * @data: Value to be read into |
| 336 | * |
| 337 | * Generates a MPC85xx local configuration space read. Returns %0 on |
| 338 | * success or %-EINVAL on failure. |
| 339 | */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 340 | static int fsl_local_config_read(struct rio_mport *mport, |
| 341 | int index, u32 offset, int len, u32 *data) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 342 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 343 | struct rio_priv *priv = mport->priv; |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 344 | pr_debug("fsl_local_config_read: index %d offset %8.8x\n", index, |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 345 | offset); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 346 | *data = in_be32(priv->regs_win + offset); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 347 | |
| 348 | return 0; |
| 349 | } |
| 350 | |
| 351 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 352 | * fsl_local_config_write - Generate a MPC85xx local config space write |
Randy Dunlap | 9941d94 | 2008-04-30 16:45:58 -0700 | [diff] [blame] | 353 | * @mport: RapidIO master port info |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 354 | * @index: ID of RapdiIO interface |
| 355 | * @offset: Offset into configuration space |
| 356 | * @len: Length (in bytes) of the maintenance transaction |
| 357 | * @data: Value to be written |
| 358 | * |
| 359 | * Generates a MPC85xx local configuration space write. Returns %0 on |
| 360 | * success or %-EINVAL on failure. |
| 361 | */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 362 | static int fsl_local_config_write(struct rio_mport *mport, |
| 363 | int index, u32 offset, int len, u32 data) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 364 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 365 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 366 | pr_debug |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 367 | ("fsl_local_config_write: index %d offset %8.8x data %8.8x\n", |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 368 | index, offset, data); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 369 | out_be32(priv->regs_win + offset, data); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 370 | |
| 371 | return 0; |
| 372 | } |
| 373 | |
| 374 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 375 | * fsl_rio_config_read - Generate a MPC85xx read maintenance transaction |
Randy Dunlap | 9941d94 | 2008-04-30 16:45:58 -0700 | [diff] [blame] | 376 | * @mport: RapidIO master port info |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 377 | * @index: ID of RapdiIO interface |
| 378 | * @destid: Destination ID of transaction |
| 379 | * @hopcount: Number of hops to target device |
| 380 | * @offset: Offset into configuration space |
| 381 | * @len: Length (in bytes) of the maintenance transaction |
| 382 | * @val: Location to be read into |
| 383 | * |
| 384 | * Generates a MPC85xx read maintenance transaction. Returns %0 on |
| 385 | * success or %-EINVAL on failure. |
| 386 | */ |
| 387 | static int |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 388 | fsl_rio_config_read(struct rio_mport *mport, int index, u16 destid, |
| 389 | u8 hopcount, u32 offset, int len, u32 *val) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 390 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 391 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 392 | u8 *data; |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 393 | u32 rval, err = 0; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 394 | |
| 395 | pr_debug |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 396 | ("fsl_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n", |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 397 | index, destid, hopcount, offset, len); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 398 | |
Thomas Moll | bd4fb65 | 2010-05-26 14:44:05 -0700 | [diff] [blame] | 399 | /* 16MB maintenance window possible */ |
| 400 | /* allow only aligned access to maintenance registers */ |
| 401 | if (offset > (0x1000000 - len) || !IS_ALIGNED(offset, len)) |
| 402 | return -EINVAL; |
| 403 | |
| 404 | out_be32(&priv->maint_atmu_regs->rowtar, |
| 405 | (destid << 22) | (hopcount << 12) | (offset >> 12)); |
| 406 | out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10)); |
| 407 | |
| 408 | data = (u8 *) priv->maint_win + (offset & (RIO_MAINT_WIN_SIZE - 1)); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 409 | switch (len) { |
| 410 | case 1: |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 411 | __fsl_read_rio_config(rval, data, err, "lbz"); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 412 | break; |
| 413 | case 2: |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 414 | __fsl_read_rio_config(rval, data, err, "lhz"); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 415 | break; |
Thomas Moll | bd4fb65 | 2010-05-26 14:44:05 -0700 | [diff] [blame] | 416 | case 4: |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 417 | __fsl_read_rio_config(rval, data, err, "lwz"); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 418 | break; |
Thomas Moll | bd4fb65 | 2010-05-26 14:44:05 -0700 | [diff] [blame] | 419 | default: |
| 420 | return -EINVAL; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 421 | } |
| 422 | |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 423 | if (err) { |
| 424 | pr_debug("RIO: cfg_read error %d for %x:%x:%x\n", |
| 425 | err, destid, hopcount, offset); |
| 426 | } |
| 427 | |
| 428 | *val = rval; |
| 429 | |
| 430 | return err; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 431 | } |
| 432 | |
| 433 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 434 | * fsl_rio_config_write - Generate a MPC85xx write maintenance transaction |
Randy Dunlap | 9941d94 | 2008-04-30 16:45:58 -0700 | [diff] [blame] | 435 | * @mport: RapidIO master port info |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 436 | * @index: ID of RapdiIO interface |
| 437 | * @destid: Destination ID of transaction |
| 438 | * @hopcount: Number of hops to target device |
| 439 | * @offset: Offset into configuration space |
| 440 | * @len: Length (in bytes) of the maintenance transaction |
| 441 | * @val: Value to be written |
| 442 | * |
| 443 | * Generates an MPC85xx write maintenance transaction. Returns %0 on |
| 444 | * success or %-EINVAL on failure. |
| 445 | */ |
| 446 | static int |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 447 | fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid, |
| 448 | u8 hopcount, u32 offset, int len, u32 val) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 449 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 450 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 451 | u8 *data; |
| 452 | pr_debug |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 453 | ("fsl_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n", |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 454 | index, destid, hopcount, offset, len, val); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 455 | |
Thomas Moll | bd4fb65 | 2010-05-26 14:44:05 -0700 | [diff] [blame] | 456 | /* 16MB maintenance windows possible */ |
| 457 | /* allow only aligned access to maintenance registers */ |
| 458 | if (offset > (0x1000000 - len) || !IS_ALIGNED(offset, len)) |
| 459 | return -EINVAL; |
| 460 | |
| 461 | out_be32(&priv->maint_atmu_regs->rowtar, |
| 462 | (destid << 22) | (hopcount << 12) | (offset >> 12)); |
| 463 | out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10)); |
| 464 | |
| 465 | data = (u8 *) priv->maint_win + (offset & (RIO_MAINT_WIN_SIZE - 1)); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 466 | switch (len) { |
| 467 | case 1: |
| 468 | out_8((u8 *) data, val); |
| 469 | break; |
| 470 | case 2: |
| 471 | out_be16((u16 *) data, val); |
| 472 | break; |
Thomas Moll | bd4fb65 | 2010-05-26 14:44:05 -0700 | [diff] [blame] | 473 | case 4: |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 474 | out_be32((u32 *) data, val); |
| 475 | break; |
Thomas Moll | bd4fb65 | 2010-05-26 14:44:05 -0700 | [diff] [blame] | 476 | default: |
| 477 | return -EINVAL; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 478 | } |
| 479 | |
| 480 | return 0; |
| 481 | } |
| 482 | |
| 483 | /** |
| 484 | * rio_hw_add_outb_message - Add message to the MPC85xx outbound message queue |
| 485 | * @mport: Master port with outbound message queue |
| 486 | * @rdev: Target of outbound message |
| 487 | * @mbox: Outbound mailbox |
| 488 | * @buffer: Message to add to outbound queue |
| 489 | * @len: Length of message |
| 490 | * |
| 491 | * Adds the @buffer message to the MPC85xx outbound message queue. Returns |
| 492 | * %0 on success or %-EINVAL on failure. |
| 493 | */ |
| 494 | int |
| 495 | rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox, |
| 496 | void *buffer, size_t len) |
| 497 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 498 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 499 | u32 omr; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 500 | struct rio_tx_desc *desc = (struct rio_tx_desc *)priv->msg_tx_ring.virt |
| 501 | + priv->msg_tx_ring.tx_slot; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 502 | int ret = 0; |
| 503 | |
| 504 | pr_debug |
| 505 | ("RIO: rio_hw_add_outb_message(): destid %4.4x mbox %d buffer %8.8x len %8.8x\n", |
| 506 | rdev->destid, mbox, (int)buffer, len); |
| 507 | |
| 508 | if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) { |
| 509 | ret = -EINVAL; |
| 510 | goto out; |
| 511 | } |
| 512 | |
| 513 | /* Copy and clear rest of buffer */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 514 | memcpy(priv->msg_tx_ring.virt_buffer[priv->msg_tx_ring.tx_slot], buffer, |
| 515 | len); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 516 | if (len < (RIO_MAX_MSG_SIZE - 4)) |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 517 | memset(priv->msg_tx_ring.virt_buffer[priv->msg_tx_ring.tx_slot] |
| 518 | + len, 0, RIO_MAX_MSG_SIZE - len); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 519 | |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 520 | switch (mport->phy_type) { |
| 521 | case RIO_PHY_PARALLEL: |
| 522 | /* Set mbox field for message */ |
| 523 | desc->dport = mbox & 0x3; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 524 | |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 525 | /* Enable EOMI interrupt, set priority, and set destid */ |
| 526 | desc->dattr = 0x28000000 | (rdev->destid << 2); |
| 527 | break; |
| 528 | case RIO_PHY_SERIAL: |
| 529 | /* Set mbox field for message, and set destid */ |
| 530 | desc->dport = (rdev->destid << 16) | (mbox & 0x3); |
| 531 | |
| 532 | /* Enable EOMI interrupt and priority */ |
| 533 | desc->dattr = 0x28000000; |
| 534 | break; |
| 535 | } |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 536 | |
| 537 | /* Set transfer size aligned to next power of 2 (in double words) */ |
| 538 | desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len); |
| 539 | |
| 540 | /* Set snooping and source buffer address */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 541 | desc->saddr = 0x00000004 |
| 542 | | priv->msg_tx_ring.phys_buffer[priv->msg_tx_ring.tx_slot]; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 543 | |
| 544 | /* Increment enqueue pointer */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 545 | omr = in_be32(&priv->msg_regs->omr); |
| 546 | out_be32(&priv->msg_regs->omr, omr | RIO_MSG_OMR_MUI); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 547 | |
| 548 | /* Go to next descriptor */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 549 | if (++priv->msg_tx_ring.tx_slot == priv->msg_tx_ring.size) |
| 550 | priv->msg_tx_ring.tx_slot = 0; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 551 | |
| 552 | out: |
| 553 | return ret; |
| 554 | } |
| 555 | |
| 556 | EXPORT_SYMBOL_GPL(rio_hw_add_outb_message); |
| 557 | |
| 558 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 559 | * fsl_rio_tx_handler - MPC85xx outbound message interrupt handler |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 560 | * @irq: Linux interrupt number |
| 561 | * @dev_instance: Pointer to interrupt-specific data |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 562 | * |
| 563 | * Handles outbound message interrupts. Executes a register outbound |
Simon Arlott | a8de5ce | 2007-05-12 05:42:54 +1000 | [diff] [blame] | 564 | * mailbox event handler and acks the interrupt occurrence. |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 565 | */ |
| 566 | static irqreturn_t |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 567 | fsl_rio_tx_handler(int irq, void *dev_instance) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 568 | { |
| 569 | int osr; |
| 570 | struct rio_mport *port = (struct rio_mport *)dev_instance; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 571 | struct rio_priv *priv = port->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 572 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 573 | osr = in_be32(&priv->msg_regs->osr); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 574 | |
| 575 | if (osr & RIO_MSG_OSR_TE) { |
| 576 | pr_info("RIO: outbound message transmission error\n"); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 577 | out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_TE); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 578 | goto out; |
| 579 | } |
| 580 | |
| 581 | if (osr & RIO_MSG_OSR_QOI) { |
| 582 | pr_info("RIO: outbound message queue overflow\n"); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 583 | out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_QOI); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 584 | goto out; |
| 585 | } |
| 586 | |
| 587 | if (osr & RIO_MSG_OSR_EOMI) { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 588 | u32 dqp = in_be32(&priv->msg_regs->odqdpar); |
| 589 | int slot = (dqp - priv->msg_tx_ring.phys) >> 5; |
| 590 | port->outb_msg[0].mcback(port, priv->msg_tx_ring.dev_id, -1, |
| 591 | slot); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 592 | |
| 593 | /* Ack the end-of-message interrupt */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 594 | out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_EOMI); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 595 | } |
| 596 | |
| 597 | out: |
| 598 | return IRQ_HANDLED; |
| 599 | } |
| 600 | |
| 601 | /** |
| 602 | * rio_open_outb_mbox - Initialize MPC85xx outbound mailbox |
| 603 | * @mport: Master port implementing the outbound message unit |
Matt Porter | 6978bbc | 2005-11-07 01:00:20 -0800 | [diff] [blame] | 604 | * @dev_id: Device specific pointer to pass on event |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 605 | * @mbox: Mailbox to open |
| 606 | * @entries: Number of entries in the outbound mailbox ring |
| 607 | * |
| 608 | * Initializes buffer ring, request the outbound message interrupt, |
| 609 | * and enables the outbound message unit. Returns %0 on success and |
| 610 | * %-EINVAL or %-ENOMEM on failure. |
| 611 | */ |
Matt Porter | 6978bbc | 2005-11-07 01:00:20 -0800 | [diff] [blame] | 612 | int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 613 | { |
| 614 | int i, j, rc = 0; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 615 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 616 | |
| 617 | if ((entries < RIO_MIN_TX_RING_SIZE) || |
| 618 | (entries > RIO_MAX_TX_RING_SIZE) || (!is_power_of_2(entries))) { |
| 619 | rc = -EINVAL; |
| 620 | goto out; |
| 621 | } |
| 622 | |
| 623 | /* Initialize shadow copy ring */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 624 | priv->msg_tx_ring.dev_id = dev_id; |
| 625 | priv->msg_tx_ring.size = entries; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 626 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 627 | for (i = 0; i < priv->msg_tx_ring.size; i++) { |
| 628 | priv->msg_tx_ring.virt_buffer[i] = |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 629 | dma_alloc_coherent(priv->dev, RIO_MSG_BUFFER_SIZE, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 630 | &priv->msg_tx_ring.phys_buffer[i], GFP_KERNEL); |
| 631 | if (!priv->msg_tx_ring.virt_buffer[i]) { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 632 | rc = -ENOMEM; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 633 | for (j = 0; j < priv->msg_tx_ring.size; j++) |
| 634 | if (priv->msg_tx_ring.virt_buffer[j]) |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 635 | dma_free_coherent(priv->dev, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 636 | RIO_MSG_BUFFER_SIZE, |
| 637 | priv->msg_tx_ring. |
| 638 | virt_buffer[j], |
| 639 | priv->msg_tx_ring. |
| 640 | phys_buffer[j]); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 641 | goto out; |
| 642 | } |
| 643 | } |
| 644 | |
| 645 | /* Initialize outbound message descriptor ring */ |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 646 | priv->msg_tx_ring.virt = dma_alloc_coherent(priv->dev, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 647 | priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE, |
| 648 | &priv->msg_tx_ring.phys, GFP_KERNEL); |
| 649 | if (!priv->msg_tx_ring.virt) { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 650 | rc = -ENOMEM; |
| 651 | goto out_dma; |
| 652 | } |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 653 | memset(priv->msg_tx_ring.virt, 0, |
| 654 | priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE); |
| 655 | priv->msg_tx_ring.tx_slot = 0; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 656 | |
| 657 | /* Point dequeue/enqueue pointers at first entry in ring */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 658 | out_be32(&priv->msg_regs->odqdpar, priv->msg_tx_ring.phys); |
| 659 | out_be32(&priv->msg_regs->odqepar, priv->msg_tx_ring.phys); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 660 | |
| 661 | /* Configure for snooping */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 662 | out_be32(&priv->msg_regs->osar, 0x00000004); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 663 | |
| 664 | /* Clear interrupt status */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 665 | out_be32(&priv->msg_regs->osr, 0x000000b3); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 666 | |
| 667 | /* Hook up outbound message handler */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 668 | rc = request_irq(IRQ_RIO_TX(mport), fsl_rio_tx_handler, 0, |
| 669 | "msg_tx", (void *)mport); |
| 670 | if (rc < 0) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 671 | goto out_irq; |
| 672 | |
| 673 | /* |
| 674 | * Configure outbound message unit |
| 675 | * Snooping |
| 676 | * Interrupts (all enabled, except QEIE) |
| 677 | * Chaining mode |
| 678 | * Disable |
| 679 | */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 680 | out_be32(&priv->msg_regs->omr, 0x00100220); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 681 | |
| 682 | /* Set number of entries */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 683 | out_be32(&priv->msg_regs->omr, |
| 684 | in_be32(&priv->msg_regs->omr) | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 685 | ((get_bitmask_order(entries) - 2) << 12)); |
| 686 | |
| 687 | /* Now enable the unit */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 688 | out_be32(&priv->msg_regs->omr, in_be32(&priv->msg_regs->omr) | 0x1); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 689 | |
| 690 | out: |
| 691 | return rc; |
| 692 | |
| 693 | out_irq: |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 694 | dma_free_coherent(priv->dev, |
| 695 | priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 696 | priv->msg_tx_ring.virt, priv->msg_tx_ring.phys); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 697 | |
| 698 | out_dma: |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 699 | for (i = 0; i < priv->msg_tx_ring.size; i++) |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 700 | dma_free_coherent(priv->dev, RIO_MSG_BUFFER_SIZE, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 701 | priv->msg_tx_ring.virt_buffer[i], |
| 702 | priv->msg_tx_ring.phys_buffer[i]); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 703 | |
| 704 | return rc; |
| 705 | } |
| 706 | |
| 707 | /** |
| 708 | * rio_close_outb_mbox - Shut down MPC85xx outbound mailbox |
| 709 | * @mport: Master port implementing the outbound message unit |
| 710 | * @mbox: Mailbox to close |
| 711 | * |
| 712 | * Disables the outbound message unit, free all buffers, and |
| 713 | * frees the outbound message interrupt. |
| 714 | */ |
| 715 | void rio_close_outb_mbox(struct rio_mport *mport, int mbox) |
| 716 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 717 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 718 | /* Disable inbound message unit */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 719 | out_be32(&priv->msg_regs->omr, 0); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 720 | |
| 721 | /* Free ring */ |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 722 | dma_free_coherent(priv->dev, |
| 723 | priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 724 | priv->msg_tx_ring.virt, priv->msg_tx_ring.phys); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 725 | |
| 726 | /* Free interrupt */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 727 | free_irq(IRQ_RIO_TX(mport), (void *)mport); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 728 | } |
| 729 | |
| 730 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 731 | * fsl_rio_rx_handler - MPC85xx inbound message interrupt handler |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 732 | * @irq: Linux interrupt number |
| 733 | * @dev_instance: Pointer to interrupt-specific data |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 734 | * |
| 735 | * Handles inbound message interrupts. Executes a registered inbound |
Simon Arlott | a8de5ce | 2007-05-12 05:42:54 +1000 | [diff] [blame] | 736 | * mailbox event handler and acks the interrupt occurrence. |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 737 | */ |
| 738 | static irqreturn_t |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 739 | fsl_rio_rx_handler(int irq, void *dev_instance) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 740 | { |
| 741 | int isr; |
| 742 | struct rio_mport *port = (struct rio_mport *)dev_instance; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 743 | struct rio_priv *priv = port->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 744 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 745 | isr = in_be32(&priv->msg_regs->isr); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 746 | |
| 747 | if (isr & RIO_MSG_ISR_TE) { |
| 748 | pr_info("RIO: inbound message reception error\n"); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 749 | out_be32((void *)&priv->msg_regs->isr, RIO_MSG_ISR_TE); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 750 | goto out; |
| 751 | } |
| 752 | |
| 753 | /* XXX Need to check/dispatch until queue empty */ |
| 754 | if (isr & RIO_MSG_ISR_DIQI) { |
| 755 | /* |
| 756 | * We implement *only* mailbox 0, but can receive messages |
| 757 | * for any mailbox/letter to that mailbox destination. So, |
| 758 | * make the callback with an unknown/invalid mailbox number |
| 759 | * argument. |
| 760 | */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 761 | port->inb_msg[0].mcback(port, priv->msg_rx_ring.dev_id, -1, -1); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 762 | |
| 763 | /* Ack the queueing interrupt */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 764 | out_be32(&priv->msg_regs->isr, RIO_MSG_ISR_DIQI); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 765 | } |
| 766 | |
| 767 | out: |
| 768 | return IRQ_HANDLED; |
| 769 | } |
| 770 | |
| 771 | /** |
| 772 | * rio_open_inb_mbox - Initialize MPC85xx inbound mailbox |
| 773 | * @mport: Master port implementing the inbound message unit |
Matt Porter | 6978bbc | 2005-11-07 01:00:20 -0800 | [diff] [blame] | 774 | * @dev_id: Device specific pointer to pass on event |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 775 | * @mbox: Mailbox to open |
| 776 | * @entries: Number of entries in the inbound mailbox ring |
| 777 | * |
| 778 | * Initializes buffer ring, request the inbound message interrupt, |
| 779 | * and enables the inbound message unit. Returns %0 on success |
| 780 | * and %-EINVAL or %-ENOMEM on failure. |
| 781 | */ |
Matt Porter | 6978bbc | 2005-11-07 01:00:20 -0800 | [diff] [blame] | 782 | int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 783 | { |
| 784 | int i, rc = 0; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 785 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 786 | |
| 787 | if ((entries < RIO_MIN_RX_RING_SIZE) || |
| 788 | (entries > RIO_MAX_RX_RING_SIZE) || (!is_power_of_2(entries))) { |
| 789 | rc = -EINVAL; |
| 790 | goto out; |
| 791 | } |
| 792 | |
| 793 | /* Initialize client buffer ring */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 794 | priv->msg_rx_ring.dev_id = dev_id; |
| 795 | priv->msg_rx_ring.size = entries; |
| 796 | priv->msg_rx_ring.rx_slot = 0; |
| 797 | for (i = 0; i < priv->msg_rx_ring.size; i++) |
| 798 | priv->msg_rx_ring.virt_buffer[i] = NULL; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 799 | |
| 800 | /* Initialize inbound message ring */ |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 801 | priv->msg_rx_ring.virt = dma_alloc_coherent(priv->dev, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 802 | priv->msg_rx_ring.size * RIO_MAX_MSG_SIZE, |
| 803 | &priv->msg_rx_ring.phys, GFP_KERNEL); |
| 804 | if (!priv->msg_rx_ring.virt) { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 805 | rc = -ENOMEM; |
| 806 | goto out; |
| 807 | } |
| 808 | |
| 809 | /* Point dequeue/enqueue pointers at first entry in ring */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 810 | out_be32(&priv->msg_regs->ifqdpar, (u32) priv->msg_rx_ring.phys); |
| 811 | out_be32(&priv->msg_regs->ifqepar, (u32) priv->msg_rx_ring.phys); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 812 | |
| 813 | /* Clear interrupt status */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 814 | out_be32(&priv->msg_regs->isr, 0x00000091); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 815 | |
| 816 | /* Hook up inbound message handler */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 817 | rc = request_irq(IRQ_RIO_RX(mport), fsl_rio_rx_handler, 0, |
| 818 | "msg_rx", (void *)mport); |
| 819 | if (rc < 0) { |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 820 | dma_free_coherent(priv->dev, RIO_MSG_BUFFER_SIZE, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 821 | priv->msg_tx_ring.virt_buffer[i], |
| 822 | priv->msg_tx_ring.phys_buffer[i]); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 823 | goto out; |
| 824 | } |
| 825 | |
| 826 | /* |
| 827 | * Configure inbound message unit: |
| 828 | * Snooping |
| 829 | * 4KB max message size |
| 830 | * Unmask all interrupt sources |
| 831 | * Disable |
| 832 | */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 833 | out_be32(&priv->msg_regs->imr, 0x001b0060); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 834 | |
| 835 | /* Set number of queue entries */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 836 | setbits32(&priv->msg_regs->imr, (get_bitmask_order(entries) - 2) << 12); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 837 | |
| 838 | /* Now enable the unit */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 839 | setbits32(&priv->msg_regs->imr, 0x1); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 840 | |
| 841 | out: |
| 842 | return rc; |
| 843 | } |
| 844 | |
| 845 | /** |
| 846 | * rio_close_inb_mbox - Shut down MPC85xx inbound mailbox |
| 847 | * @mport: Master port implementing the inbound message unit |
| 848 | * @mbox: Mailbox to close |
| 849 | * |
| 850 | * Disables the inbound message unit, free all buffers, and |
| 851 | * frees the inbound message interrupt. |
| 852 | */ |
| 853 | void rio_close_inb_mbox(struct rio_mport *mport, int mbox) |
| 854 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 855 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 856 | /* Disable inbound message unit */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 857 | out_be32(&priv->msg_regs->imr, 0); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 858 | |
| 859 | /* Free ring */ |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 860 | dma_free_coherent(priv->dev, priv->msg_rx_ring.size * RIO_MAX_MSG_SIZE, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 861 | priv->msg_rx_ring.virt, priv->msg_rx_ring.phys); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 862 | |
| 863 | /* Free interrupt */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 864 | free_irq(IRQ_RIO_RX(mport), (void *)mport); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 865 | } |
| 866 | |
| 867 | /** |
| 868 | * rio_hw_add_inb_buffer - Add buffer to the MPC85xx inbound message queue |
| 869 | * @mport: Master port implementing the inbound message unit |
| 870 | * @mbox: Inbound mailbox number |
| 871 | * @buf: Buffer to add to inbound queue |
| 872 | * |
| 873 | * Adds the @buf buffer to the MPC85xx inbound message queue. Returns |
| 874 | * %0 on success or %-EINVAL on failure. |
| 875 | */ |
| 876 | int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf) |
| 877 | { |
| 878 | int rc = 0; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 879 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 880 | |
| 881 | pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n", |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 882 | priv->msg_rx_ring.rx_slot); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 883 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 884 | if (priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot]) { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 885 | printk(KERN_ERR |
| 886 | "RIO: error adding inbound buffer %d, buffer exists\n", |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 887 | priv->msg_rx_ring.rx_slot); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 888 | rc = -EINVAL; |
| 889 | goto out; |
| 890 | } |
| 891 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 892 | priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot] = buf; |
| 893 | if (++priv->msg_rx_ring.rx_slot == priv->msg_rx_ring.size) |
| 894 | priv->msg_rx_ring.rx_slot = 0; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 895 | |
| 896 | out: |
| 897 | return rc; |
| 898 | } |
| 899 | |
| 900 | EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer); |
| 901 | |
| 902 | /** |
| 903 | * rio_hw_get_inb_message - Fetch inbound message from the MPC85xx message unit |
| 904 | * @mport: Master port implementing the inbound message unit |
| 905 | * @mbox: Inbound mailbox number |
| 906 | * |
| 907 | * Gets the next available inbound message from the inbound message queue. |
| 908 | * A pointer to the message is returned on success or NULL on failure. |
| 909 | */ |
| 910 | void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox) |
| 911 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 912 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 913 | u32 phys_buf, virt_buf; |
| 914 | void *buf = NULL; |
| 915 | int buf_idx; |
| 916 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 917 | phys_buf = in_be32(&priv->msg_regs->ifqdpar); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 918 | |
| 919 | /* If no more messages, then bail out */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 920 | if (phys_buf == in_be32(&priv->msg_regs->ifqepar)) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 921 | goto out2; |
| 922 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 923 | virt_buf = (u32) priv->msg_rx_ring.virt + (phys_buf |
| 924 | - priv->msg_rx_ring.phys); |
| 925 | buf_idx = (phys_buf - priv->msg_rx_ring.phys) / RIO_MAX_MSG_SIZE; |
| 926 | buf = priv->msg_rx_ring.virt_buffer[buf_idx]; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 927 | |
| 928 | if (!buf) { |
| 929 | printk(KERN_ERR |
| 930 | "RIO: inbound message copy failed, no buffers\n"); |
| 931 | goto out1; |
| 932 | } |
| 933 | |
| 934 | /* Copy max message size, caller is expected to allocate that big */ |
| 935 | memcpy(buf, (void *)virt_buf, RIO_MAX_MSG_SIZE); |
| 936 | |
| 937 | /* Clear the available buffer */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 938 | priv->msg_rx_ring.virt_buffer[buf_idx] = NULL; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 939 | |
| 940 | out1: |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 941 | setbits32(&priv->msg_regs->imr, RIO_MSG_IMR_MI); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 942 | |
| 943 | out2: |
| 944 | return buf; |
| 945 | } |
| 946 | |
| 947 | EXPORT_SYMBOL_GPL(rio_hw_get_inb_message); |
| 948 | |
| 949 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 950 | * fsl_rio_dbell_handler - MPC85xx doorbell interrupt handler |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 951 | * @irq: Linux interrupt number |
| 952 | * @dev_instance: Pointer to interrupt-specific data |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 953 | * |
| 954 | * Handles doorbell interrupts. Parses a list of registered |
| 955 | * doorbell event handlers and executes a matching event handler. |
| 956 | */ |
| 957 | static irqreturn_t |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 958 | fsl_rio_dbell_handler(int irq, void *dev_instance) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 959 | { |
| 960 | int dsr; |
| 961 | struct rio_mport *port = (struct rio_mport *)dev_instance; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 962 | struct rio_priv *priv = port->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 963 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 964 | dsr = in_be32(&priv->msg_regs->dsr); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 965 | |
| 966 | if (dsr & DOORBELL_DSR_TE) { |
| 967 | pr_info("RIO: doorbell reception error\n"); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 968 | out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_TE); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 969 | goto out; |
| 970 | } |
| 971 | |
| 972 | if (dsr & DOORBELL_DSR_QFI) { |
| 973 | pr_info("RIO: doorbell queue full\n"); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 974 | out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_QFI); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 975 | goto out; |
| 976 | } |
| 977 | |
| 978 | /* XXX Need to check/dispatch until queue empty */ |
| 979 | if (dsr & DOORBELL_DSR_DIQI) { |
| 980 | u32 dmsg = |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 981 | (u32) priv->dbell_ring.virt + |
| 982 | (in_be32(&priv->msg_regs->dqdpar) & 0xfff); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 983 | struct rio_dbell *dbell; |
| 984 | int found = 0; |
| 985 | |
| 986 | pr_debug |
| 987 | ("RIO: processing doorbell, sid %2.2x tid %2.2x info %4.4x\n", |
| 988 | DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg)); |
| 989 | |
| 990 | list_for_each_entry(dbell, &port->dbells, node) { |
| 991 | if ((dbell->res->start <= DBELL_INF(dmsg)) && |
| 992 | (dbell->res->end >= DBELL_INF(dmsg))) { |
| 993 | found = 1; |
| 994 | break; |
| 995 | } |
| 996 | } |
| 997 | if (found) { |
Matt Porter | 6978bbc | 2005-11-07 01:00:20 -0800 | [diff] [blame] | 998 | dbell->dinb(port, dbell->dev_id, DBELL_SID(dmsg), DBELL_TID(dmsg), |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 999 | DBELL_INF(dmsg)); |
| 1000 | } else { |
| 1001 | pr_debug |
| 1002 | ("RIO: spurious doorbell, sid %2.2x tid %2.2x info %4.4x\n", |
| 1003 | DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg)); |
| 1004 | } |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1005 | setbits32(&priv->msg_regs->dmr, DOORBELL_DMR_DI); |
| 1006 | out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_DIQI); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1007 | } |
| 1008 | |
| 1009 | out: |
| 1010 | return IRQ_HANDLED; |
| 1011 | } |
| 1012 | |
| 1013 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1014 | * fsl_rio_doorbell_init - MPC85xx doorbell interface init |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1015 | * @mport: Master port implementing the inbound doorbell unit |
| 1016 | * |
| 1017 | * Initializes doorbell unit hardware and inbound DMA buffer |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1018 | * ring. Called from fsl_rio_setup(). Returns %0 on success |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1019 | * or %-ENOMEM on failure. |
| 1020 | */ |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1021 | static int fsl_rio_doorbell_init(struct rio_mport *mport) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1022 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1023 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1024 | int rc = 0; |
| 1025 | |
| 1026 | /* Map outbound doorbell window immediately after maintenance window */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1027 | priv->dbell_win = ioremap(mport->iores.start + RIO_MAINT_WIN_SIZE, |
| 1028 | RIO_DBELL_WIN_SIZE); |
| 1029 | if (!priv->dbell_win) { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1030 | printk(KERN_ERR |
| 1031 | "RIO: unable to map outbound doorbell window\n"); |
| 1032 | rc = -ENOMEM; |
| 1033 | goto out; |
| 1034 | } |
| 1035 | |
| 1036 | /* Initialize inbound doorbells */ |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 1037 | priv->dbell_ring.virt = dma_alloc_coherent(priv->dev, 512 * |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1038 | DOORBELL_MESSAGE_SIZE, &priv->dbell_ring.phys, GFP_KERNEL); |
| 1039 | if (!priv->dbell_ring.virt) { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1040 | printk(KERN_ERR "RIO: unable allocate inbound doorbell ring\n"); |
| 1041 | rc = -ENOMEM; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1042 | iounmap(priv->dbell_win); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1043 | goto out; |
| 1044 | } |
| 1045 | |
| 1046 | /* Point dequeue/enqueue pointers at first entry in ring */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1047 | out_be32(&priv->msg_regs->dqdpar, (u32) priv->dbell_ring.phys); |
| 1048 | out_be32(&priv->msg_regs->dqepar, (u32) priv->dbell_ring.phys); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1049 | |
| 1050 | /* Clear interrupt status */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1051 | out_be32(&priv->msg_regs->dsr, 0x00000091); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1052 | |
| 1053 | /* Hook up doorbell handler */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1054 | rc = request_irq(IRQ_RIO_BELL(mport), fsl_rio_dbell_handler, 0, |
| 1055 | "dbell_rx", (void *)mport); |
| 1056 | if (rc < 0) { |
| 1057 | iounmap(priv->dbell_win); |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 1058 | dma_free_coherent(priv->dev, 512 * DOORBELL_MESSAGE_SIZE, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1059 | priv->dbell_ring.virt, priv->dbell_ring.phys); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1060 | printk(KERN_ERR |
| 1061 | "MPC85xx RIO: unable to request inbound doorbell irq"); |
| 1062 | goto out; |
| 1063 | } |
| 1064 | |
| 1065 | /* Configure doorbells for snooping, 512 entries, and enable */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1066 | out_be32(&priv->msg_regs->dmr, 0x00108161); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1067 | |
| 1068 | out: |
| 1069 | return rc; |
| 1070 | } |
| 1071 | |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1072 | /** |
| 1073 | * fsl_rio_port_write_handler - MPC85xx port write interrupt handler |
| 1074 | * @irq: Linux interrupt number |
| 1075 | * @dev_instance: Pointer to interrupt-specific data |
| 1076 | * |
| 1077 | * Handles port write interrupts. Parses a list of registered |
| 1078 | * port write event handlers and executes a matching event handler. |
| 1079 | */ |
| 1080 | static irqreturn_t |
| 1081 | fsl_rio_port_write_handler(int irq, void *dev_instance) |
| 1082 | { |
| 1083 | u32 ipwmr, ipwsr; |
| 1084 | struct rio_mport *port = (struct rio_mport *)dev_instance; |
| 1085 | struct rio_priv *priv = port->priv; |
| 1086 | u32 epwisr, tmp; |
| 1087 | |
Alexandre Bounine | 93e2cbd | 2010-10-27 15:34:28 -0700 | [diff] [blame^] | 1088 | epwisr = in_be32(priv->regs_win + RIO_EPWISR); |
| 1089 | if (!(epwisr & RIO_EPWISR_PW)) |
| 1090 | goto pw_done; |
| 1091 | |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1092 | ipwmr = in_be32(&priv->msg_regs->pwmr); |
| 1093 | ipwsr = in_be32(&priv->msg_regs->pwsr); |
| 1094 | |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1095 | #ifdef DEBUG_PW |
| 1096 | pr_debug("PW Int->IPWMR: 0x%08x IPWSR: 0x%08x (", ipwmr, ipwsr); |
| 1097 | if (ipwsr & RIO_IPWSR_QF) |
| 1098 | pr_debug(" QF"); |
| 1099 | if (ipwsr & RIO_IPWSR_TE) |
| 1100 | pr_debug(" TE"); |
| 1101 | if (ipwsr & RIO_IPWSR_QFI) |
| 1102 | pr_debug(" QFI"); |
| 1103 | if (ipwsr & RIO_IPWSR_PWD) |
| 1104 | pr_debug(" PWD"); |
| 1105 | if (ipwsr & RIO_IPWSR_PWB) |
| 1106 | pr_debug(" PWB"); |
| 1107 | pr_debug(" )\n"); |
| 1108 | #endif |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1109 | /* Schedule deferred processing if PW was received */ |
| 1110 | if (ipwsr & RIO_IPWSR_QFI) { |
| 1111 | /* Save PW message (if there is room in FIFO), |
| 1112 | * otherwise discard it. |
| 1113 | */ |
| 1114 | if (kfifo_avail(&priv->pw_fifo) >= RIO_PW_MSG_SIZE) { |
| 1115 | priv->port_write_msg.msg_count++; |
| 1116 | kfifo_in(&priv->pw_fifo, priv->port_write_msg.virt, |
| 1117 | RIO_PW_MSG_SIZE); |
| 1118 | } else { |
| 1119 | priv->port_write_msg.discard_count++; |
Alexandre Bounine | 93e2cbd | 2010-10-27 15:34:28 -0700 | [diff] [blame^] | 1120 | pr_debug("RIO: ISR Discarded Port-Write Msg(s) (%d)\n", |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1121 | priv->port_write_msg.discard_count); |
| 1122 | } |
Alexandre Bounine | 93e2cbd | 2010-10-27 15:34:28 -0700 | [diff] [blame^] | 1123 | /* Clear interrupt and issue Clear Queue command. This allows |
| 1124 | * another port-write to be received. |
| 1125 | */ |
| 1126 | out_be32(&priv->msg_regs->pwsr, RIO_IPWSR_QFI); |
| 1127 | out_be32(&priv->msg_regs->pwmr, ipwmr | RIO_IPWMR_CQ); |
| 1128 | |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1129 | schedule_work(&priv->pw_work); |
| 1130 | } |
| 1131 | |
Alexandre Bounine | 93e2cbd | 2010-10-27 15:34:28 -0700 | [diff] [blame^] | 1132 | if ((ipwmr & RIO_IPWMR_EIE) && (ipwsr & RIO_IPWSR_TE)) { |
| 1133 | priv->port_write_msg.err_count++; |
| 1134 | pr_debug("RIO: Port-Write Transaction Err (%d)\n", |
| 1135 | priv->port_write_msg.err_count); |
| 1136 | /* Clear Transaction Error: port-write controller should be |
| 1137 | * disabled when clearing this error |
| 1138 | */ |
| 1139 | out_be32(&priv->msg_regs->pwmr, ipwmr & ~RIO_IPWMR_PWE); |
| 1140 | out_be32(&priv->msg_regs->pwsr, RIO_IPWSR_TE); |
| 1141 | out_be32(&priv->msg_regs->pwmr, ipwmr); |
| 1142 | } |
| 1143 | |
| 1144 | if (ipwsr & RIO_IPWSR_PWD) { |
| 1145 | priv->port_write_msg.discard_count++; |
| 1146 | pr_debug("RIO: Port Discarded Port-Write Msg(s) (%d)\n", |
| 1147 | priv->port_write_msg.discard_count); |
| 1148 | out_be32(&priv->msg_regs->pwsr, RIO_IPWSR_PWD); |
| 1149 | } |
| 1150 | |
| 1151 | pw_done: |
| 1152 | if (epwisr & RIO_EPWISR_PINT) { |
| 1153 | tmp = in_be32(priv->regs_win + RIO_LTLEDCSR); |
| 1154 | pr_debug("RIO_LTLEDCSR = 0x%x\n", tmp); |
| 1155 | out_be32(priv->regs_win + RIO_LTLEDCSR, 0); |
| 1156 | } |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1157 | |
| 1158 | return IRQ_HANDLED; |
| 1159 | } |
| 1160 | |
| 1161 | static void fsl_pw_dpc(struct work_struct *work) |
| 1162 | { |
| 1163 | struct rio_priv *priv = container_of(work, struct rio_priv, pw_work); |
| 1164 | unsigned long flags; |
| 1165 | u32 msg_buffer[RIO_PW_MSG_SIZE/sizeof(u32)]; |
| 1166 | |
| 1167 | /* |
| 1168 | * Process port-write messages |
| 1169 | */ |
| 1170 | spin_lock_irqsave(&priv->pw_fifo_lock, flags); |
| 1171 | while (kfifo_out(&priv->pw_fifo, (unsigned char *)msg_buffer, |
| 1172 | RIO_PW_MSG_SIZE)) { |
| 1173 | /* Process one message */ |
| 1174 | spin_unlock_irqrestore(&priv->pw_fifo_lock, flags); |
| 1175 | #ifdef DEBUG_PW |
| 1176 | { |
| 1177 | u32 i; |
| 1178 | pr_debug("%s : Port-Write Message:", __func__); |
| 1179 | for (i = 0; i < RIO_PW_MSG_SIZE/sizeof(u32); i++) { |
| 1180 | if ((i%4) == 0) |
| 1181 | pr_debug("\n0x%02x: 0x%08x", i*4, |
| 1182 | msg_buffer[i]); |
| 1183 | else |
| 1184 | pr_debug(" 0x%08x", msg_buffer[i]); |
| 1185 | } |
| 1186 | pr_debug("\n"); |
| 1187 | } |
| 1188 | #endif |
| 1189 | /* Pass the port-write message to RIO core for processing */ |
| 1190 | rio_inb_pwrite_handler((union rio_pw_msg *)msg_buffer); |
| 1191 | spin_lock_irqsave(&priv->pw_fifo_lock, flags); |
| 1192 | } |
| 1193 | spin_unlock_irqrestore(&priv->pw_fifo_lock, flags); |
| 1194 | } |
| 1195 | |
| 1196 | /** |
| 1197 | * fsl_rio_pw_enable - enable/disable port-write interface init |
| 1198 | * @mport: Master port implementing the port write unit |
| 1199 | * @enable: 1=enable; 0=disable port-write message handling |
| 1200 | */ |
| 1201 | static int fsl_rio_pw_enable(struct rio_mport *mport, int enable) |
| 1202 | { |
| 1203 | struct rio_priv *priv = mport->priv; |
| 1204 | u32 rval; |
| 1205 | |
| 1206 | rval = in_be32(&priv->msg_regs->pwmr); |
| 1207 | |
| 1208 | if (enable) |
| 1209 | rval |= RIO_IPWMR_PWE; |
| 1210 | else |
| 1211 | rval &= ~RIO_IPWMR_PWE; |
| 1212 | |
| 1213 | out_be32(&priv->msg_regs->pwmr, rval); |
| 1214 | |
| 1215 | return 0; |
| 1216 | } |
| 1217 | |
| 1218 | /** |
| 1219 | * fsl_rio_port_write_init - MPC85xx port write interface init |
| 1220 | * @mport: Master port implementing the port write unit |
| 1221 | * |
| 1222 | * Initializes port write unit hardware and DMA buffer |
| 1223 | * ring. Called from fsl_rio_setup(). Returns %0 on success |
| 1224 | * or %-ENOMEM on failure. |
| 1225 | */ |
| 1226 | static int fsl_rio_port_write_init(struct rio_mport *mport) |
| 1227 | { |
| 1228 | struct rio_priv *priv = mport->priv; |
| 1229 | int rc = 0; |
| 1230 | |
| 1231 | /* Following configurations require a disabled port write controller */ |
| 1232 | out_be32(&priv->msg_regs->pwmr, |
| 1233 | in_be32(&priv->msg_regs->pwmr) & ~RIO_IPWMR_PWE); |
| 1234 | |
| 1235 | /* Initialize port write */ |
| 1236 | priv->port_write_msg.virt = dma_alloc_coherent(priv->dev, |
| 1237 | RIO_PW_MSG_SIZE, |
| 1238 | &priv->port_write_msg.phys, GFP_KERNEL); |
| 1239 | if (!priv->port_write_msg.virt) { |
| 1240 | pr_err("RIO: unable allocate port write queue\n"); |
| 1241 | return -ENOMEM; |
| 1242 | } |
| 1243 | |
| 1244 | priv->port_write_msg.err_count = 0; |
| 1245 | priv->port_write_msg.discard_count = 0; |
| 1246 | |
| 1247 | /* Point dequeue/enqueue pointers at first entry */ |
| 1248 | out_be32(&priv->msg_regs->epwqbar, 0); |
| 1249 | out_be32(&priv->msg_regs->pwqbar, (u32) priv->port_write_msg.phys); |
| 1250 | |
| 1251 | pr_debug("EIPWQBAR: 0x%08x IPWQBAR: 0x%08x\n", |
| 1252 | in_be32(&priv->msg_regs->epwqbar), |
| 1253 | in_be32(&priv->msg_regs->pwqbar)); |
| 1254 | |
| 1255 | /* Clear interrupt status IPWSR */ |
| 1256 | out_be32(&priv->msg_regs->pwsr, |
| 1257 | (RIO_IPWSR_TE | RIO_IPWSR_QFI | RIO_IPWSR_PWD)); |
| 1258 | |
| 1259 | /* Configure port write contoller for snooping enable all reporting, |
| 1260 | clear queue full */ |
| 1261 | out_be32(&priv->msg_regs->pwmr, |
| 1262 | RIO_IPWMR_SEN | RIO_IPWMR_QFIE | RIO_IPWMR_EIE | RIO_IPWMR_CQ); |
| 1263 | |
| 1264 | |
| 1265 | /* Hook up port-write handler */ |
| 1266 | rc = request_irq(IRQ_RIO_PW(mport), fsl_rio_port_write_handler, 0, |
| 1267 | "port-write", (void *)mport); |
| 1268 | if (rc < 0) { |
| 1269 | pr_err("MPC85xx RIO: unable to request inbound doorbell irq"); |
| 1270 | goto err_out; |
| 1271 | } |
| 1272 | |
| 1273 | INIT_WORK(&priv->pw_work, fsl_pw_dpc); |
| 1274 | spin_lock_init(&priv->pw_fifo_lock); |
| 1275 | if (kfifo_alloc(&priv->pw_fifo, RIO_PW_MSG_SIZE * 32, GFP_KERNEL)) { |
| 1276 | pr_err("FIFO allocation failed\n"); |
| 1277 | rc = -ENOMEM; |
| 1278 | goto err_out_irq; |
| 1279 | } |
| 1280 | |
| 1281 | pr_debug("IPWMR: 0x%08x IPWSR: 0x%08x\n", |
| 1282 | in_be32(&priv->msg_regs->pwmr), |
| 1283 | in_be32(&priv->msg_regs->pwsr)); |
| 1284 | |
| 1285 | return rc; |
| 1286 | |
| 1287 | err_out_irq: |
| 1288 | free_irq(IRQ_RIO_PW(mport), (void *)mport); |
| 1289 | err_out: |
| 1290 | dma_free_coherent(priv->dev, RIO_PW_MSG_SIZE, |
| 1291 | priv->port_write_msg.virt, |
| 1292 | priv->port_write_msg.phys); |
| 1293 | return rc; |
| 1294 | } |
| 1295 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1296 | static char *cmdline = NULL; |
| 1297 | |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1298 | static int fsl_rio_get_hdid(int index) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1299 | { |
| 1300 | /* XXX Need to parse multiple entries in some format */ |
| 1301 | if (!cmdline) |
| 1302 | return -1; |
| 1303 | |
| 1304 | return simple_strtol(cmdline, NULL, 0); |
| 1305 | } |
| 1306 | |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1307 | static int fsl_rio_get_cmdline(char *s) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1308 | { |
| 1309 | if (!s) |
| 1310 | return 0; |
| 1311 | |
| 1312 | cmdline = s; |
| 1313 | return 1; |
| 1314 | } |
| 1315 | |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1316 | __setup("riohdid=", fsl_rio_get_cmdline); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1317 | |
Zhang Wei | 7f620df | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 1318 | static inline void fsl_rio_info(struct device *dev, u32 ccsr) |
| 1319 | { |
| 1320 | const char *str; |
| 1321 | if (ccsr & 1) { |
| 1322 | /* Serial phy */ |
| 1323 | switch (ccsr >> 30) { |
| 1324 | case 0: |
| 1325 | str = "1"; |
| 1326 | break; |
| 1327 | case 1: |
| 1328 | str = "4"; |
| 1329 | break; |
| 1330 | default: |
| 1331 | str = "Unknown"; |
Joe Perches | d258e64 | 2009-06-28 06:26:10 +0000 | [diff] [blame] | 1332 | break; |
Zhang Wei | 7f620df | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 1333 | } |
| 1334 | dev_info(dev, "Hardware port width: %s\n", str); |
| 1335 | |
| 1336 | switch ((ccsr >> 27) & 7) { |
| 1337 | case 0: |
| 1338 | str = "Single-lane 0"; |
| 1339 | break; |
| 1340 | case 1: |
| 1341 | str = "Single-lane 2"; |
| 1342 | break; |
| 1343 | case 2: |
| 1344 | str = "Four-lane"; |
| 1345 | break; |
| 1346 | default: |
| 1347 | str = "Unknown"; |
| 1348 | break; |
| 1349 | } |
| 1350 | dev_info(dev, "Training connection status: %s\n", str); |
| 1351 | } else { |
| 1352 | /* Parallel phy */ |
| 1353 | if (!(ccsr & 0x80000000)) |
| 1354 | dev_info(dev, "Output port operating in 8-bit mode\n"); |
| 1355 | if (!(ccsr & 0x08000000)) |
| 1356 | dev_info(dev, "Input port operating in 8-bit mode\n"); |
| 1357 | } |
| 1358 | } |
| 1359 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1360 | /** |
Randy Dunlap | 9941d94 | 2008-04-30 16:45:58 -0700 | [diff] [blame] | 1361 | * fsl_rio_setup - Setup Freescale PowerPC RapidIO interface |
Grant Likely | 2dc1158 | 2010-08-06 09:25:50 -0600 | [diff] [blame] | 1362 | * @dev: platform_device pointer |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1363 | * |
| 1364 | * Initializes MPC85xx RapidIO hardware interface, configures |
| 1365 | * master port with system-specific info, and registers the |
| 1366 | * master port with the RapidIO subsystem. |
| 1367 | */ |
Grant Likely | a454dc5 | 2010-07-22 15:52:34 -0600 | [diff] [blame] | 1368 | int fsl_rio_setup(struct platform_device *dev) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1369 | { |
| 1370 | struct rio_ops *ops; |
| 1371 | struct rio_mport *port; |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1372 | struct rio_priv *priv; |
| 1373 | int rc = 0; |
| 1374 | const u32 *dt_range, *cell; |
| 1375 | struct resource regs; |
| 1376 | int rlen; |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 1377 | u32 ccsr; |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1378 | u64 law_start, law_size; |
| 1379 | int paw, aw, sw; |
| 1380 | |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1381 | if (!dev->dev.of_node) { |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1382 | dev_err(&dev->dev, "Device OF-Node is NULL"); |
| 1383 | return -EFAULT; |
| 1384 | } |
| 1385 | |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1386 | rc = of_address_to_resource(dev->dev.of_node, 0, ®s); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1387 | if (rc) { |
| 1388 | dev_err(&dev->dev, "Can't get %s property 'reg'\n", |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1389 | dev->dev.of_node->full_name); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1390 | return -EFAULT; |
| 1391 | } |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1392 | dev_info(&dev->dev, "Of-device full name %s\n", dev->dev.of_node->full_name); |
Kumar Gala | fc274a1 | 2009-05-13 17:02:24 -0500 | [diff] [blame] | 1393 | dev_info(&dev->dev, "Regs: %pR\n", ®s); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1394 | |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1395 | dt_range = of_get_property(dev->dev.of_node, "ranges", &rlen); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1396 | if (!dt_range) { |
| 1397 | dev_err(&dev->dev, "Can't get %s property 'ranges'\n", |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1398 | dev->dev.of_node->full_name); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1399 | return -EFAULT; |
| 1400 | } |
| 1401 | |
| 1402 | /* Get node address wide */ |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1403 | cell = of_get_property(dev->dev.of_node, "#address-cells", NULL); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1404 | if (cell) |
| 1405 | aw = *cell; |
| 1406 | else |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1407 | aw = of_n_addr_cells(dev->dev.of_node); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1408 | /* Get node size wide */ |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1409 | cell = of_get_property(dev->dev.of_node, "#size-cells", NULL); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1410 | if (cell) |
| 1411 | sw = *cell; |
| 1412 | else |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1413 | sw = of_n_size_cells(dev->dev.of_node); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1414 | /* Get parent address wide wide */ |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1415 | paw = of_n_addr_cells(dev->dev.of_node); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1416 | |
| 1417 | law_start = of_read_number(dt_range + aw, paw); |
| 1418 | law_size = of_read_number(dt_range + aw + paw, sw); |
| 1419 | |
| 1420 | dev_info(&dev->dev, "LAW start 0x%016llx, size 0x%016llx.\n", |
| 1421 | law_start, law_size); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1422 | |
Alexandre Bounine | e5cabeb | 2010-05-26 14:43:59 -0700 | [diff] [blame] | 1423 | ops = kzalloc(sizeof(struct rio_ops), GFP_KERNEL); |
Julia Lawall | 6c75933 | 2009-08-07 09:00:34 +0200 | [diff] [blame] | 1424 | if (!ops) { |
| 1425 | rc = -ENOMEM; |
| 1426 | goto err_ops; |
| 1427 | } |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1428 | ops->lcread = fsl_local_config_read; |
| 1429 | ops->lcwrite = fsl_local_config_write; |
| 1430 | ops->cread = fsl_rio_config_read; |
| 1431 | ops->cwrite = fsl_rio_config_write; |
| 1432 | ops->dsend = fsl_rio_doorbell_send; |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1433 | ops->pwenable = fsl_rio_pw_enable; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1434 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1435 | port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL); |
Julia Lawall | 6c75933 | 2009-08-07 09:00:34 +0200 | [diff] [blame] | 1436 | if (!port) { |
| 1437 | rc = -ENOMEM; |
| 1438 | goto err_port; |
| 1439 | } |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1440 | port->id = 0; |
| 1441 | port->index = 0; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1442 | |
| 1443 | priv = kzalloc(sizeof(struct rio_priv), GFP_KERNEL); |
| 1444 | if (!priv) { |
| 1445 | printk(KERN_ERR "Can't alloc memory for 'priv'\n"); |
| 1446 | rc = -ENOMEM; |
Julia Lawall | 6c75933 | 2009-08-07 09:00:34 +0200 | [diff] [blame] | 1447 | goto err_priv; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1448 | } |
| 1449 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1450 | INIT_LIST_HEAD(&port->dbells); |
| 1451 | port->iores.start = law_start; |
Li Yang | 186e74b | 2009-05-12 16:35:59 +0800 | [diff] [blame] | 1452 | port->iores.end = law_start + law_size - 1; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1453 | port->iores.flags = IORESOURCE_MEM; |
Li Yang | 186e74b | 2009-05-12 16:35:59 +0800 | [diff] [blame] | 1454 | port->iores.name = "rio_io_win"; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1455 | |
Alexandre Bounine | 45fdf00 | 2010-05-28 13:56:17 -0400 | [diff] [blame] | 1456 | priv->pwirq = irq_of_parse_and_map(dev->dev.of_node, 0); |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1457 | priv->bellirq = irq_of_parse_and_map(dev->dev.of_node, 2); |
| 1458 | priv->txirq = irq_of_parse_and_map(dev->dev.of_node, 3); |
| 1459 | priv->rxirq = irq_of_parse_and_map(dev->dev.of_node, 4); |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1460 | dev_info(&dev->dev, "pwirq: %d, bellirq: %d, txirq: %d, rxirq %d\n", |
| 1461 | priv->pwirq, priv->bellirq, priv->txirq, priv->rxirq); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1462 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1463 | rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff); |
| 1464 | rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0); |
| 1465 | rio_init_mbox_res(&port->riores[RIO_OUTB_MBOX_RESOURCE], 0, 0); |
| 1466 | strcpy(port->name, "RIO0 mport"); |
| 1467 | |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 1468 | priv->dev = &dev->dev; |
| 1469 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1470 | port->ops = ops; |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1471 | port->host_deviceid = fsl_rio_get_hdid(port->id); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1472 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1473 | port->priv = priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1474 | rio_register_mport(port); |
| 1475 | |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1476 | priv->regs_win = ioremap(regs.start, regs.end - regs.start + 1); |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1477 | rio_regs_win = priv->regs_win; |
Zhang Wei | e042323 | 2008-04-18 13:33:42 -0700 | [diff] [blame] | 1478 | |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 1479 | /* Probe the master port phy type */ |
| 1480 | ccsr = in_be32(priv->regs_win + RIO_CCSR); |
| 1481 | port->phy_type = (ccsr & 1) ? RIO_PHY_SERIAL : RIO_PHY_PARALLEL; |
| 1482 | dev_info(&dev->dev, "RapidIO PHY type: %s\n", |
| 1483 | (port->phy_type == RIO_PHY_PARALLEL) ? "parallel" : |
| 1484 | ((port->phy_type == RIO_PHY_SERIAL) ? "serial" : |
| 1485 | "unknown")); |
Zhang Wei | 7f620df | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 1486 | /* Checking the port training status */ |
| 1487 | if (in_be32((priv->regs_win + RIO_ESCSR)) & 1) { |
| 1488 | dev_err(&dev->dev, "Port is not ready. " |
| 1489 | "Try to restart connection...\n"); |
| 1490 | switch (port->phy_type) { |
| 1491 | case RIO_PHY_SERIAL: |
| 1492 | /* Disable ports */ |
| 1493 | out_be32(priv->regs_win + RIO_CCSR, 0); |
| 1494 | /* Set 1x lane */ |
| 1495 | setbits32(priv->regs_win + RIO_CCSR, 0x02000000); |
| 1496 | /* Enable ports */ |
| 1497 | setbits32(priv->regs_win + RIO_CCSR, 0x00600000); |
| 1498 | break; |
| 1499 | case RIO_PHY_PARALLEL: |
| 1500 | /* Disable ports */ |
| 1501 | out_be32(priv->regs_win + RIO_CCSR, 0x22000000); |
| 1502 | /* Enable ports */ |
| 1503 | out_be32(priv->regs_win + RIO_CCSR, 0x44000000); |
| 1504 | break; |
| 1505 | } |
| 1506 | msleep(100); |
| 1507 | if (in_be32((priv->regs_win + RIO_ESCSR)) & 1) { |
| 1508 | dev_err(&dev->dev, "Port restart failed.\n"); |
| 1509 | rc = -ENOLINK; |
| 1510 | goto err; |
| 1511 | } |
| 1512 | dev_info(&dev->dev, "Port restart success!\n"); |
| 1513 | } |
| 1514 | fsl_rio_info(&dev->dev, ccsr); |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 1515 | |
Zhang Wei | e042323 | 2008-04-18 13:33:42 -0700 | [diff] [blame] | 1516 | port->sys_size = (in_be32((priv->regs_win + RIO_PEF_CAR)) |
| 1517 | & RIO_PEF_CTLS) >> 4; |
| 1518 | dev_info(&dev->dev, "RapidIO Common Transport System size: %d\n", |
| 1519 | port->sys_size ? 65536 : 256); |
| 1520 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1521 | priv->atmu_regs = (struct rio_atmu_regs *)(priv->regs_win |
| 1522 | + RIO_ATMU_REGS_OFFSET); |
| 1523 | priv->maint_atmu_regs = priv->atmu_regs + 1; |
| 1524 | priv->dbell_atmu_regs = priv->atmu_regs + 2; |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 1525 | priv->msg_regs = (struct rio_msg_regs *)(priv->regs_win + |
| 1526 | ((port->phy_type == RIO_PHY_SERIAL) ? |
| 1527 | RIO_S_MSG_REGS_OFFSET : RIO_P_MSG_REGS_OFFSET)); |
| 1528 | |
| 1529 | /* Set to receive any dist ID for serial RapidIO controller. */ |
| 1530 | if (port->phy_type == RIO_PHY_SERIAL) |
| 1531 | out_be32((priv->regs_win + RIO_ISR_AACR), RIO_ISR_AACR_AA); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1532 | |
| 1533 | /* Configure maintenance transaction window */ |
Li Yang | 186e74b | 2009-05-12 16:35:59 +0800 | [diff] [blame] | 1534 | out_be32(&priv->maint_atmu_regs->rowbar, law_start >> 12); |
Thomas Moll | bd4fb65 | 2010-05-26 14:44:05 -0700 | [diff] [blame] | 1535 | out_be32(&priv->maint_atmu_regs->rowar, |
| 1536 | 0x80077000 | (ilog2(RIO_MAINT_WIN_SIZE) - 1)); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1537 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1538 | priv->maint_win = ioremap(law_start, RIO_MAINT_WIN_SIZE); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1539 | |
| 1540 | /* Configure outbound doorbell window */ |
Li Yang | 186e74b | 2009-05-12 16:35:59 +0800 | [diff] [blame] | 1541 | out_be32(&priv->dbell_atmu_regs->rowbar, |
| 1542 | (law_start + RIO_MAINT_WIN_SIZE) >> 12); |
| 1543 | out_be32(&priv->dbell_atmu_regs->rowar, 0x8004200b); /* 4k */ |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1544 | fsl_rio_doorbell_init(port); |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1545 | fsl_rio_port_write_init(port); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1546 | |
Li Yang | ff33f18 | 2010-06-18 14:24:20 +0800 | [diff] [blame] | 1547 | #ifdef CONFIG_E500 |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1548 | saved_mcheck_exception = ppc_md.machine_check_exception; |
| 1549 | ppc_md.machine_check_exception = fsl_rio_mcheck_exception; |
Li Yang | ff33f18 | 2010-06-18 14:24:20 +0800 | [diff] [blame] | 1550 | #endif |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1551 | /* Ensure that RFXE is set */ |
| 1552 | mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000)); |
| 1553 | |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1554 | return 0; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1555 | err: |
Julia Lawall | 6c75933 | 2009-08-07 09:00:34 +0200 | [diff] [blame] | 1556 | iounmap(priv->regs_win); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1557 | kfree(priv); |
Julia Lawall | 6c75933 | 2009-08-07 09:00:34 +0200 | [diff] [blame] | 1558 | err_priv: |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1559 | kfree(port); |
Julia Lawall | 6c75933 | 2009-08-07 09:00:34 +0200 | [diff] [blame] | 1560 | err_port: |
| 1561 | kfree(ops); |
| 1562 | err_ops: |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1563 | return rc; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1564 | } |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1565 | |
| 1566 | /* The probe function for RapidIO peer-to-peer network. |
| 1567 | */ |
Grant Likely | a454dc5 | 2010-07-22 15:52:34 -0600 | [diff] [blame] | 1568 | static int __devinit fsl_of_rio_rpn_probe(struct platform_device *dev, |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1569 | const struct of_device_id *match) |
| 1570 | { |
| 1571 | int rc; |
| 1572 | printk(KERN_INFO "Setting up RapidIO peer-to-peer network %s\n", |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1573 | dev->dev.of_node->full_name); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1574 | |
| 1575 | rc = fsl_rio_setup(dev); |
| 1576 | if (rc) |
| 1577 | goto out; |
| 1578 | |
| 1579 | /* Enumerate all registered ports */ |
| 1580 | rc = rio_init_mports(); |
| 1581 | out: |
| 1582 | return rc; |
| 1583 | }; |
| 1584 | |
| 1585 | static const struct of_device_id fsl_of_rio_rpn_ids[] = { |
| 1586 | { |
| 1587 | .compatible = "fsl,rapidio-delta", |
| 1588 | }, |
| 1589 | {}, |
| 1590 | }; |
| 1591 | |
| 1592 | static struct of_platform_driver fsl_of_rio_rpn_driver = { |
Grant Likely | 4018294 | 2010-04-13 16:13:02 -0700 | [diff] [blame] | 1593 | .driver = { |
| 1594 | .name = "fsl-of-rio", |
| 1595 | .owner = THIS_MODULE, |
| 1596 | .of_match_table = fsl_of_rio_rpn_ids, |
| 1597 | }, |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1598 | .probe = fsl_of_rio_rpn_probe, |
| 1599 | }; |
| 1600 | |
| 1601 | static __init int fsl_of_rio_rpn_init(void) |
| 1602 | { |
| 1603 | return of_register_platform_driver(&fsl_of_rio_rpn_driver); |
| 1604 | } |
| 1605 | |
| 1606 | subsys_initcall(fsl_of_rio_rpn_init); |