Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 1 | /* |
| 2 | * POWERNV cpufreq driver for the IBM POWER processors |
| 3 | * |
| 4 | * (C) Copyright IBM 2014 |
| 5 | * |
| 6 | * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2, or (at your option) |
| 11 | * any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | */ |
| 19 | |
| 20 | #define pr_fmt(fmt) "powernv-cpufreq: " fmt |
| 21 | |
| 22 | #include <linux/kernel.h> |
| 23 | #include <linux/sysfs.h> |
| 24 | #include <linux/cpumask.h> |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/cpufreq.h> |
| 27 | #include <linux/smp.h> |
| 28 | #include <linux/of.h> |
Shilpasri G Bhat | cf30af76 | 2014-09-29 15:49:11 +0200 | [diff] [blame] | 29 | #include <linux/reboot.h> |
Shilpasri G Bhat | 053819e | 2015-07-16 13:34:18 +0530 | [diff] [blame] | 30 | #include <linux/slab.h> |
Shilpasri G Bhat | 6d167a4 | 2016-02-03 01:11:38 +0530 | [diff] [blame] | 31 | #include <linux/cpu.h> |
Shilpasri G Bhat | c89f268 | 2016-02-03 01:11:41 +0530 | [diff] [blame] | 32 | #include <trace/events/power.h> |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 33 | |
| 34 | #include <asm/cputhreads.h> |
Vaidyanathan Srinivasan | 6174bac | 2014-08-03 14:54:05 +0530 | [diff] [blame] | 35 | #include <asm/firmware.h> |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 36 | #include <asm/reg.h> |
Srivatsa S. Bhat | f3cae35 | 2014-04-16 11:35:38 +0530 | [diff] [blame] | 37 | #include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */ |
Shilpasri G Bhat | cb166fa | 2015-07-16 13:34:20 +0530 | [diff] [blame] | 38 | #include <asm/opal.h> |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 39 | #include <linux/timer.h> |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 40 | |
| 41 | #define POWERNV_MAX_PSTATES 256 |
Shilpasri G Bhat | 09a972d | 2015-04-01 15:16:34 +0530 | [diff] [blame] | 42 | #define PMSR_PSAFE_ENABLE (1UL << 30) |
| 43 | #define PMSR_SPR_EM_DISABLE (1UL << 31) |
| 44 | #define PMSR_MAX(x) ((x >> 32) & 0xFF) |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 45 | |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 46 | #define MAX_RAMP_DOWN_TIME 5120 |
| 47 | /* |
| 48 | * On an idle system we want the global pstate to ramp-down from max value to |
| 49 | * min over a span of ~5 secs. Also we want it to initially ramp-down slowly and |
| 50 | * then ramp-down rapidly later on. |
| 51 | * |
| 52 | * This gives a percentage rampdown for time elapsed in milliseconds. |
| 53 | * ramp_down_percentage = ((ms * ms) >> 18) |
| 54 | * ~= 3.8 * (sec * sec) |
| 55 | * |
| 56 | * At 0 ms ramp_down_percent = 0 |
| 57 | * At 5120 ms ramp_down_percent = 100 |
| 58 | */ |
| 59 | #define ramp_down_percent(time) ((time * time) >> 18) |
| 60 | |
| 61 | /* Interval after which the timer is queued to bring down global pstate */ |
| 62 | #define GPSTATE_TIMER_INTERVAL 2000 |
| 63 | |
| 64 | /** |
| 65 | * struct global_pstate_info - Per policy data structure to maintain history of |
| 66 | * global pstates |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 67 | * @highest_lpstate_idx: The local pstate index from which we are |
| 68 | * ramping down |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 69 | * @elapsed_time: Time in ms spent in ramping down from |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 70 | * highest_lpstate_idx |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 71 | * @last_sampled_time: Time from boot in ms when global pstates were |
| 72 | * last set |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 73 | * @last_lpstate_idx, Last set value of local pstate and global |
| 74 | * last_gpstate_idx pstate in terms of cpufreq table index |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 75 | * @timer: Is used for ramping down if cpu goes idle for |
| 76 | * a long time with global pstate held high |
| 77 | * @gpstate_lock: A spinlock to maintain synchronization between |
| 78 | * routines called by the timer handler and |
| 79 | * governer's target_index calls |
| 80 | */ |
| 81 | struct global_pstate_info { |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 82 | int highest_lpstate_idx; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 83 | unsigned int elapsed_time; |
| 84 | unsigned int last_sampled_time; |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 85 | int last_lpstate_idx; |
| 86 | int last_gpstate_idx; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 87 | spinlock_t gpstate_lock; |
| 88 | struct timer_list timer; |
| 89 | }; |
| 90 | |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 91 | static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1]; |
Shilpasri G Bhat | cb166fa | 2015-07-16 13:34:20 +0530 | [diff] [blame] | 92 | static bool rebooting, throttled, occ_reset; |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 93 | |
Shilpasri G Bhat | c89f268 | 2016-02-03 01:11:41 +0530 | [diff] [blame] | 94 | static const char * const throttle_reason[] = { |
| 95 | "No throttling", |
| 96 | "Power Cap", |
| 97 | "Processor Over Temperature", |
| 98 | "Power Supply Failure", |
| 99 | "Over Current", |
| 100 | "OCC Reset" |
| 101 | }; |
| 102 | |
Shilpasri G Bhat | 1b02898 | 2016-03-22 18:57:09 +0530 | [diff] [blame] | 103 | enum throttle_reason_type { |
| 104 | NO_THROTTLE = 0, |
| 105 | POWERCAP, |
| 106 | CPU_OVERTEMP, |
| 107 | POWER_SUPPLY_FAILURE, |
| 108 | OVERCURRENT, |
| 109 | OCC_RESET_THROTTLE, |
| 110 | OCC_MAX_REASON |
| 111 | }; |
| 112 | |
Shilpasri G Bhat | 053819e | 2015-07-16 13:34:18 +0530 | [diff] [blame] | 113 | static struct chip { |
| 114 | unsigned int id; |
| 115 | bool throttled; |
Shilpasri G Bhat | c89f268 | 2016-02-03 01:11:41 +0530 | [diff] [blame] | 116 | bool restore; |
| 117 | u8 throttle_reason; |
Shilpasri G Bhat | 735366f | 2015-07-16 13:34:21 +0530 | [diff] [blame] | 118 | cpumask_t mask; |
| 119 | struct work_struct throttle; |
Shilpasri G Bhat | 1b02898 | 2016-03-22 18:57:09 +0530 | [diff] [blame] | 120 | int throttle_turbo; |
| 121 | int throttle_sub_turbo; |
| 122 | int reason[OCC_MAX_REASON]; |
Shilpasri G Bhat | 053819e | 2015-07-16 13:34:18 +0530 | [diff] [blame] | 123 | } *chips; |
| 124 | |
| 125 | static int nr_chips; |
Michael Neuling | 3e5963b | 2016-03-21 22:24:52 +0530 | [diff] [blame] | 126 | static DEFINE_PER_CPU(struct chip *, chip_info); |
Shilpasri G Bhat | 053819e | 2015-07-16 13:34:18 +0530 | [diff] [blame] | 127 | |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 128 | /* |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 129 | * Note: |
| 130 | * The set of pstates consists of contiguous integers. |
| 131 | * powernv_pstate_info stores the index of the frequency table for |
| 132 | * max, min and nominal frequencies. It also stores number of |
| 133 | * available frequencies. |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 134 | * |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 135 | * powernv_pstate_info.nominal indicates the index to the highest |
| 136 | * non-turbo frequency. |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 137 | */ |
| 138 | static struct powernv_pstate_info { |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 139 | unsigned int min; |
| 140 | unsigned int max; |
| 141 | unsigned int nominal; |
| 142 | unsigned int nr_pstates; |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 143 | } powernv_pstate_info; |
| 144 | |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 145 | /* Use following macros for conversions between pstate_id and index */ |
| 146 | static inline int idx_to_pstate(unsigned int i) |
| 147 | { |
Akshay Adiga | 8e85946 | 2016-08-04 20:59:17 +0530 | [diff] [blame] | 148 | if (unlikely(i >= powernv_pstate_info.nr_pstates)) { |
| 149 | pr_warn_once("index %u is out of bound\n", i); |
| 150 | return powernv_freqs[powernv_pstate_info.nominal].driver_data; |
| 151 | } |
| 152 | |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 153 | return powernv_freqs[i].driver_data; |
| 154 | } |
| 155 | |
| 156 | static inline unsigned int pstate_to_idx(int pstate) |
| 157 | { |
Akshay Adiga | 8e85946 | 2016-08-04 20:59:17 +0530 | [diff] [blame] | 158 | int min = powernv_freqs[powernv_pstate_info.min].driver_data; |
| 159 | int max = powernv_freqs[powernv_pstate_info.max].driver_data; |
| 160 | |
| 161 | if (min > 0) { |
| 162 | if (unlikely((pstate < max) || (pstate > min))) { |
| 163 | pr_warn_once("pstate %d is out of bound\n", pstate); |
| 164 | return powernv_pstate_info.nominal; |
| 165 | } |
| 166 | } else { |
| 167 | if (unlikely((pstate > max) || (pstate < min))) { |
| 168 | pr_warn_once("pstate %d is out of bound\n", pstate); |
| 169 | return powernv_pstate_info.nominal; |
| 170 | } |
| 171 | } |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 172 | /* |
| 173 | * abs() is deliberately used so that is works with |
| 174 | * both monotonically increasing and decreasing |
| 175 | * pstate values |
| 176 | */ |
| 177 | return abs(pstate - idx_to_pstate(powernv_pstate_info.max)); |
| 178 | } |
| 179 | |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 180 | static inline void reset_gpstates(struct cpufreq_policy *policy) |
| 181 | { |
| 182 | struct global_pstate_info *gpstates = policy->driver_data; |
| 183 | |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 184 | gpstates->highest_lpstate_idx = 0; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 185 | gpstates->elapsed_time = 0; |
| 186 | gpstates->last_sampled_time = 0; |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 187 | gpstates->last_lpstate_idx = 0; |
| 188 | gpstates->last_gpstate_idx = 0; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 189 | } |
| 190 | |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 191 | /* |
| 192 | * Initialize the freq table based on data obtained |
| 193 | * from the firmware passed via device-tree |
| 194 | */ |
| 195 | static int init_powernv_pstates(void) |
| 196 | { |
| 197 | struct device_node *power_mgt; |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 198 | int i, nr_pstates = 0; |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 199 | const __be32 *pstate_ids, *pstate_freqs; |
| 200 | u32 len_ids, len_freqs; |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 201 | u32 pstate_min, pstate_max, pstate_nominal; |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 202 | |
| 203 | power_mgt = of_find_node_by_path("/ibm,opal/power-mgt"); |
| 204 | if (!power_mgt) { |
| 205 | pr_warn("power-mgt node not found\n"); |
| 206 | return -ENODEV; |
| 207 | } |
| 208 | |
| 209 | if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) { |
| 210 | pr_warn("ibm,pstate-min node not found\n"); |
| 211 | return -ENODEV; |
| 212 | } |
| 213 | |
| 214 | if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) { |
| 215 | pr_warn("ibm,pstate-max node not found\n"); |
| 216 | return -ENODEV; |
| 217 | } |
| 218 | |
| 219 | if (of_property_read_u32(power_mgt, "ibm,pstate-nominal", |
| 220 | &pstate_nominal)) { |
| 221 | pr_warn("ibm,pstate-nominal not found\n"); |
| 222 | return -ENODEV; |
| 223 | } |
| 224 | pr_info("cpufreq pstate min %d nominal %d max %d\n", pstate_min, |
| 225 | pstate_nominal, pstate_max); |
| 226 | |
| 227 | pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids); |
| 228 | if (!pstate_ids) { |
| 229 | pr_warn("ibm,pstate-ids not found\n"); |
| 230 | return -ENODEV; |
| 231 | } |
| 232 | |
| 233 | pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz", |
| 234 | &len_freqs); |
| 235 | if (!pstate_freqs) { |
| 236 | pr_warn("ibm,pstate-frequencies-mhz not found\n"); |
| 237 | return -ENODEV; |
| 238 | } |
| 239 | |
Vaidyanathan Srinivasan | 6174bac | 2014-08-03 14:54:05 +0530 | [diff] [blame] | 240 | if (len_ids != len_freqs) { |
| 241 | pr_warn("Entries in ibm,pstate-ids and " |
| 242 | "ibm,pstate-frequencies-mhz does not match\n"); |
| 243 | } |
| 244 | |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 245 | nr_pstates = min(len_ids, len_freqs) / sizeof(u32); |
| 246 | if (!nr_pstates) { |
| 247 | pr_warn("No PStates found\n"); |
| 248 | return -ENODEV; |
| 249 | } |
| 250 | |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 251 | powernv_pstate_info.nr_pstates = nr_pstates; |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 252 | pr_debug("NR PStates %d\n", nr_pstates); |
| 253 | for (i = 0; i < nr_pstates; i++) { |
| 254 | u32 id = be32_to_cpu(pstate_ids[i]); |
| 255 | u32 freq = be32_to_cpu(pstate_freqs[i]); |
| 256 | |
| 257 | pr_debug("PState id %d freq %d MHz\n", id, freq); |
| 258 | powernv_freqs[i].frequency = freq * 1000; /* kHz */ |
Gautham R. Shenoy | 0692c69 | 2014-04-01 12:43:27 +0530 | [diff] [blame] | 259 | powernv_freqs[i].driver_data = id; |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 260 | |
| 261 | if (id == pstate_max) |
| 262 | powernv_pstate_info.max = i; |
| 263 | else if (id == pstate_nominal) |
| 264 | powernv_pstate_info.nominal = i; |
| 265 | else if (id == pstate_min) |
| 266 | powernv_pstate_info.min = i; |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 267 | } |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 268 | |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 269 | /* End of list marker entry */ |
| 270 | powernv_freqs[i].frequency = CPUFREQ_TABLE_END; |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 271 | return 0; |
| 272 | } |
| 273 | |
| 274 | /* Returns the CPU frequency corresponding to the pstate_id. */ |
| 275 | static unsigned int pstate_id_to_freq(int pstate_id) |
| 276 | { |
| 277 | int i; |
| 278 | |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 279 | i = pstate_to_idx(pstate_id); |
Vaidyanathan Srinivasan | 6174bac | 2014-08-03 14:54:05 +0530 | [diff] [blame] | 280 | if (i >= powernv_pstate_info.nr_pstates || i < 0) { |
| 281 | pr_warn("PState id %d outside of PState table, " |
| 282 | "reporting nominal id %d instead\n", |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 283 | pstate_id, idx_to_pstate(powernv_pstate_info.nominal)); |
| 284 | i = powernv_pstate_info.nominal; |
Vaidyanathan Srinivasan | 6174bac | 2014-08-03 14:54:05 +0530 | [diff] [blame] | 285 | } |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 286 | |
| 287 | return powernv_freqs[i].frequency; |
| 288 | } |
| 289 | |
| 290 | /* |
| 291 | * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by |
| 292 | * the firmware |
| 293 | */ |
| 294 | static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy, |
| 295 | char *buf) |
| 296 | { |
| 297 | return sprintf(buf, "%u\n", |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 298 | powernv_freqs[powernv_pstate_info.nominal].frequency); |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 299 | } |
| 300 | |
| 301 | struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq = |
| 302 | __ATTR_RO(cpuinfo_nominal_freq); |
| 303 | |
| 304 | static struct freq_attr *powernv_cpu_freq_attr[] = { |
| 305 | &cpufreq_freq_attr_scaling_available_freqs, |
| 306 | &cpufreq_freq_attr_cpuinfo_nominal_freq, |
| 307 | NULL, |
| 308 | }; |
| 309 | |
Shilpasri G Bhat | 1b02898 | 2016-03-22 18:57:09 +0530 | [diff] [blame] | 310 | #define throttle_attr(name, member) \ |
| 311 | static ssize_t name##_show(struct cpufreq_policy *policy, char *buf) \ |
| 312 | { \ |
| 313 | struct chip *chip = per_cpu(chip_info, policy->cpu); \ |
| 314 | \ |
| 315 | return sprintf(buf, "%u\n", chip->member); \ |
| 316 | } \ |
| 317 | \ |
| 318 | static struct freq_attr throttle_attr_##name = __ATTR_RO(name) \ |
| 319 | |
| 320 | throttle_attr(unthrottle, reason[NO_THROTTLE]); |
| 321 | throttle_attr(powercap, reason[POWERCAP]); |
| 322 | throttle_attr(overtemp, reason[CPU_OVERTEMP]); |
| 323 | throttle_attr(supply_fault, reason[POWER_SUPPLY_FAILURE]); |
| 324 | throttle_attr(overcurrent, reason[OVERCURRENT]); |
| 325 | throttle_attr(occ_reset, reason[OCC_RESET_THROTTLE]); |
| 326 | throttle_attr(turbo_stat, throttle_turbo); |
| 327 | throttle_attr(sub_turbo_stat, throttle_sub_turbo); |
| 328 | |
| 329 | static struct attribute *throttle_attrs[] = { |
| 330 | &throttle_attr_unthrottle.attr, |
| 331 | &throttle_attr_powercap.attr, |
| 332 | &throttle_attr_overtemp.attr, |
| 333 | &throttle_attr_supply_fault.attr, |
| 334 | &throttle_attr_overcurrent.attr, |
| 335 | &throttle_attr_occ_reset.attr, |
| 336 | &throttle_attr_turbo_stat.attr, |
| 337 | &throttle_attr_sub_turbo_stat.attr, |
| 338 | NULL, |
| 339 | }; |
| 340 | |
| 341 | static const struct attribute_group throttle_attr_grp = { |
| 342 | .name = "throttle_stats", |
| 343 | .attrs = throttle_attrs, |
| 344 | }; |
| 345 | |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 346 | /* Helper routines */ |
| 347 | |
| 348 | /* Access helpers to power mgt SPR */ |
| 349 | |
| 350 | static inline unsigned long get_pmspr(unsigned long sprn) |
| 351 | { |
| 352 | switch (sprn) { |
| 353 | case SPRN_PMCR: |
| 354 | return mfspr(SPRN_PMCR); |
| 355 | |
| 356 | case SPRN_PMICR: |
| 357 | return mfspr(SPRN_PMICR); |
| 358 | |
| 359 | case SPRN_PMSR: |
| 360 | return mfspr(SPRN_PMSR); |
| 361 | } |
| 362 | BUG(); |
| 363 | } |
| 364 | |
| 365 | static inline void set_pmspr(unsigned long sprn, unsigned long val) |
| 366 | { |
| 367 | switch (sprn) { |
| 368 | case SPRN_PMCR: |
| 369 | mtspr(SPRN_PMCR, val); |
| 370 | return; |
| 371 | |
| 372 | case SPRN_PMICR: |
| 373 | mtspr(SPRN_PMICR, val); |
| 374 | return; |
| 375 | } |
| 376 | BUG(); |
| 377 | } |
| 378 | |
| 379 | /* |
| 380 | * Use objects of this type to query/update |
| 381 | * pstates on a remote CPU via smp_call_function. |
| 382 | */ |
| 383 | struct powernv_smp_call_data { |
| 384 | unsigned int freq; |
| 385 | int pstate_id; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 386 | int gpstate_id; |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 387 | }; |
| 388 | |
| 389 | /* |
| 390 | * powernv_read_cpu_freq: Reads the current frequency on this CPU. |
| 391 | * |
| 392 | * Called via smp_call_function. |
| 393 | * |
| 394 | * Note: The caller of the smp_call_function should pass an argument of |
| 395 | * the type 'struct powernv_smp_call_data *' along with this function. |
| 396 | * |
| 397 | * The current frequency on this CPU will be returned via |
| 398 | * ((struct powernv_smp_call_data *)arg)->freq; |
| 399 | */ |
| 400 | static void powernv_read_cpu_freq(void *arg) |
| 401 | { |
| 402 | unsigned long pmspr_val; |
| 403 | s8 local_pstate_id; |
| 404 | struct powernv_smp_call_data *freq_data = arg; |
| 405 | |
| 406 | pmspr_val = get_pmspr(SPRN_PMSR); |
| 407 | |
| 408 | /* |
| 409 | * The local pstate id corresponds bits 48..55 in the PMSR. |
| 410 | * Note: Watch out for the sign! |
| 411 | */ |
| 412 | local_pstate_id = (pmspr_val >> 48) & 0xFF; |
| 413 | freq_data->pstate_id = local_pstate_id; |
| 414 | freq_data->freq = pstate_id_to_freq(freq_data->pstate_id); |
| 415 | |
| 416 | pr_debug("cpu %d pmsr %016lX pstate_id %d frequency %d kHz\n", |
| 417 | raw_smp_processor_id(), pmspr_val, freq_data->pstate_id, |
| 418 | freq_data->freq); |
| 419 | } |
| 420 | |
| 421 | /* |
| 422 | * powernv_cpufreq_get: Returns the CPU frequency as reported by the |
| 423 | * firmware for CPU 'cpu'. This value is reported through the sysfs |
| 424 | * file cpuinfo_cur_freq. |
| 425 | */ |
Brian Norris | 60d1ea4 | 2014-05-11 00:51:20 -0700 | [diff] [blame] | 426 | static unsigned int powernv_cpufreq_get(unsigned int cpu) |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 427 | { |
| 428 | struct powernv_smp_call_data freq_data; |
| 429 | |
| 430 | smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq, |
| 431 | &freq_data, 1); |
| 432 | |
| 433 | return freq_data.freq; |
| 434 | } |
| 435 | |
| 436 | /* |
| 437 | * set_pstate: Sets the pstate on this CPU. |
| 438 | * |
| 439 | * This is called via an smp_call_function. |
| 440 | * |
| 441 | * The caller must ensure that freq_data is of the type |
| 442 | * (struct powernv_smp_call_data *) and the pstate_id which needs to be set |
| 443 | * on this CPU should be present in freq_data->pstate_id. |
| 444 | */ |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 445 | static void set_pstate(void *data) |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 446 | { |
| 447 | unsigned long val; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 448 | struct powernv_smp_call_data *freq_data = data; |
| 449 | unsigned long pstate_ul = freq_data->pstate_id; |
| 450 | unsigned long gpstate_ul = freq_data->gpstate_id; |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 451 | |
| 452 | val = get_pmspr(SPRN_PMCR); |
| 453 | val = val & 0x0000FFFFFFFFFFFFULL; |
| 454 | |
| 455 | pstate_ul = pstate_ul & 0xFF; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 456 | gpstate_ul = gpstate_ul & 0xFF; |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 457 | |
| 458 | /* Set both global(bits 56..63) and local(bits 48..55) PStates */ |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 459 | val = val | (gpstate_ul << 56) | (pstate_ul << 48); |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 460 | |
| 461 | pr_debug("Setting cpu %d pmcr to %016lX\n", |
| 462 | raw_smp_processor_id(), val); |
| 463 | set_pmspr(SPRN_PMCR, val); |
| 464 | } |
| 465 | |
| 466 | /* |
Shilpasri G Bhat | cf30af76 | 2014-09-29 15:49:11 +0200 | [diff] [blame] | 467 | * get_nominal_index: Returns the index corresponding to the nominal |
| 468 | * pstate in the cpufreq table |
| 469 | */ |
| 470 | static inline unsigned int get_nominal_index(void) |
| 471 | { |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 472 | return powernv_pstate_info.nominal; |
Shilpasri G Bhat | cf30af76 | 2014-09-29 15:49:11 +0200 | [diff] [blame] | 473 | } |
| 474 | |
Shilpasri G Bhat | 735366f | 2015-07-16 13:34:21 +0530 | [diff] [blame] | 475 | static void powernv_cpufreq_throttle_check(void *data) |
Shilpasri G Bhat | 09a972d | 2015-04-01 15:16:34 +0530 | [diff] [blame] | 476 | { |
Michael Neuling | 3e5963b | 2016-03-21 22:24:52 +0530 | [diff] [blame] | 477 | struct chip *chip; |
Shilpasri G Bhat | 735366f | 2015-07-16 13:34:21 +0530 | [diff] [blame] | 478 | unsigned int cpu = smp_processor_id(); |
Shilpasri G Bhat | 09a972d | 2015-04-01 15:16:34 +0530 | [diff] [blame] | 479 | unsigned long pmsr; |
Michael Neuling | 3e5963b | 2016-03-21 22:24:52 +0530 | [diff] [blame] | 480 | int pmsr_pmax; |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 481 | unsigned int pmsr_pmax_idx; |
Shilpasri G Bhat | 09a972d | 2015-04-01 15:16:34 +0530 | [diff] [blame] | 482 | |
| 483 | pmsr = get_pmspr(SPRN_PMSR); |
Michael Neuling | 3e5963b | 2016-03-21 22:24:52 +0530 | [diff] [blame] | 484 | chip = this_cpu_read(chip_info); |
Shilpasri G Bhat | 053819e | 2015-07-16 13:34:18 +0530 | [diff] [blame] | 485 | |
Shilpasri G Bhat | 09a972d | 2015-04-01 15:16:34 +0530 | [diff] [blame] | 486 | /* Check for Pmax Capping */ |
| 487 | pmsr_pmax = (s8)PMSR_MAX(pmsr); |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 488 | pmsr_pmax_idx = pstate_to_idx(pmsr_pmax); |
| 489 | if (pmsr_pmax_idx != powernv_pstate_info.max) { |
Michael Neuling | 3e5963b | 2016-03-21 22:24:52 +0530 | [diff] [blame] | 490 | if (chip->throttled) |
Shilpasri G Bhat | 053819e | 2015-07-16 13:34:18 +0530 | [diff] [blame] | 491 | goto next; |
Michael Neuling | 3e5963b | 2016-03-21 22:24:52 +0530 | [diff] [blame] | 492 | chip->throttled = true; |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 493 | if (pmsr_pmax_idx > powernv_pstate_info.nominal) { |
| 494 | pr_warn_once("CPU %d on Chip %u has Pmax(%d) reduced below nominal frequency(%d)\n", |
Michael Neuling | 3e5963b | 2016-03-21 22:24:52 +0530 | [diff] [blame] | 495 | cpu, chip->id, pmsr_pmax, |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 496 | idx_to_pstate(powernv_pstate_info.nominal)); |
Shilpasri G Bhat | 1b02898 | 2016-03-22 18:57:09 +0530 | [diff] [blame] | 497 | chip->throttle_sub_turbo++; |
| 498 | } else { |
| 499 | chip->throttle_turbo++; |
| 500 | } |
Michael Neuling | 3e5963b | 2016-03-21 22:24:52 +0530 | [diff] [blame] | 501 | trace_powernv_throttle(chip->id, |
| 502 | throttle_reason[chip->throttle_reason], |
Shilpasri G Bhat | c89f268 | 2016-02-03 01:11:41 +0530 | [diff] [blame] | 503 | pmsr_pmax); |
Michael Neuling | 3e5963b | 2016-03-21 22:24:52 +0530 | [diff] [blame] | 504 | } else if (chip->throttled) { |
| 505 | chip->throttled = false; |
| 506 | trace_powernv_throttle(chip->id, |
| 507 | throttle_reason[chip->throttle_reason], |
Shilpasri G Bhat | c89f268 | 2016-02-03 01:11:41 +0530 | [diff] [blame] | 508 | pmsr_pmax); |
Shilpasri G Bhat | 09a972d | 2015-04-01 15:16:34 +0530 | [diff] [blame] | 509 | } |
| 510 | |
Shilpasri G Bhat | 3dd3ebe | 2015-07-16 13:34:22 +0530 | [diff] [blame] | 511 | /* Check if Psafe_mode_active is set in PMSR. */ |
Shilpasri G Bhat | 053819e | 2015-07-16 13:34:18 +0530 | [diff] [blame] | 512 | next: |
Shilpasri G Bhat | 3dd3ebe | 2015-07-16 13:34:22 +0530 | [diff] [blame] | 513 | if (pmsr & PMSR_PSAFE_ENABLE) { |
Shilpasri G Bhat | 09a972d | 2015-04-01 15:16:34 +0530 | [diff] [blame] | 514 | throttled = true; |
| 515 | pr_info("Pstate set to safe frequency\n"); |
| 516 | } |
| 517 | |
| 518 | /* Check if SPR_EM_DISABLE is set in PMSR */ |
| 519 | if (pmsr & PMSR_SPR_EM_DISABLE) { |
| 520 | throttled = true; |
| 521 | pr_info("Frequency Control disabled from OS\n"); |
| 522 | } |
| 523 | |
| 524 | if (throttled) { |
| 525 | pr_info("PMSR = %16lx\n", pmsr); |
Shilpasri G Bhat | c89f268 | 2016-02-03 01:11:41 +0530 | [diff] [blame] | 526 | pr_warn("CPU Frequency could be throttled\n"); |
Shilpasri G Bhat | 09a972d | 2015-04-01 15:16:34 +0530 | [diff] [blame] | 527 | } |
| 528 | } |
| 529 | |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 530 | /** |
| 531 | * calc_global_pstate - Calculate global pstate |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 532 | * @elapsed_time: Elapsed time in milliseconds |
| 533 | * @local_pstate_idx: New local pstate |
| 534 | * @highest_lpstate_idx: pstate from which its ramping down |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 535 | * |
| 536 | * Finds the appropriate global pstate based on the pstate from which its |
| 537 | * ramping down and the time elapsed in ramping down. It follows a quadratic |
| 538 | * equation which ensures that it reaches ramping down to pmin in 5sec. |
| 539 | */ |
| 540 | static inline int calc_global_pstate(unsigned int elapsed_time, |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 541 | int highest_lpstate_idx, |
| 542 | int local_pstate_idx) |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 543 | { |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 544 | int index_diff; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 545 | |
| 546 | /* |
| 547 | * Using ramp_down_percent we get the percentage of rampdown |
| 548 | * that we are expecting to be dropping. Difference between |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 549 | * highest_lpstate_idx and powernv_pstate_info.min will give a absolute |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 550 | * number of how many pstates we will drop eventually by the end of |
| 551 | * 5 seconds, then just scale it get the number pstates to be dropped. |
| 552 | */ |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 553 | index_diff = ((int)ramp_down_percent(elapsed_time) * |
| 554 | (powernv_pstate_info.min - highest_lpstate_idx)) / 100; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 555 | |
| 556 | /* Ensure that global pstate is >= to local pstate */ |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 557 | if (highest_lpstate_idx + index_diff >= local_pstate_idx) |
| 558 | return local_pstate_idx; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 559 | else |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 560 | return highest_lpstate_idx + index_diff; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 561 | } |
| 562 | |
| 563 | static inline void queue_gpstate_timer(struct global_pstate_info *gpstates) |
| 564 | { |
| 565 | unsigned int timer_interval; |
| 566 | |
| 567 | /* |
| 568 | * Setting up timer to fire after GPSTATE_TIMER_INTERVAL ms, But |
| 569 | * if it exceeds MAX_RAMP_DOWN_TIME ms for ramp down time. |
| 570 | * Set timer such that it fires exactly at MAX_RAMP_DOWN_TIME |
| 571 | * seconds of ramp down time. |
| 572 | */ |
| 573 | if ((gpstates->elapsed_time + GPSTATE_TIMER_INTERVAL) |
| 574 | > MAX_RAMP_DOWN_TIME) |
| 575 | timer_interval = MAX_RAMP_DOWN_TIME - gpstates->elapsed_time; |
| 576 | else |
| 577 | timer_interval = GPSTATE_TIMER_INTERVAL; |
| 578 | |
Thomas Gleixner | 7bc54b6 | 2016-07-04 09:50:18 +0000 | [diff] [blame] | 579 | mod_timer(&gpstates->timer, jiffies + msecs_to_jiffies(timer_interval)); |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 580 | } |
| 581 | |
| 582 | /** |
| 583 | * gpstate_timer_handler |
| 584 | * |
| 585 | * @data: pointer to cpufreq_policy on which timer was queued |
| 586 | * |
| 587 | * This handler brings down the global pstate closer to the local pstate |
| 588 | * according quadratic equation. Queues a new timer if it is still not equal |
| 589 | * to local pstate |
| 590 | */ |
| 591 | void gpstate_timer_handler(unsigned long data) |
| 592 | { |
| 593 | struct cpufreq_policy *policy = (struct cpufreq_policy *)data; |
| 594 | struct global_pstate_info *gpstates = policy->driver_data; |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 595 | int gpstate_idx; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 596 | unsigned int time_diff = jiffies_to_msecs(jiffies) |
| 597 | - gpstates->last_sampled_time; |
| 598 | struct powernv_smp_call_data freq_data; |
| 599 | |
| 600 | if (!spin_trylock(&gpstates->gpstate_lock)) |
| 601 | return; |
| 602 | |
| 603 | gpstates->last_sampled_time += time_diff; |
| 604 | gpstates->elapsed_time += time_diff; |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 605 | freq_data.pstate_id = idx_to_pstate(gpstates->last_lpstate_idx); |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 606 | |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 607 | if ((gpstates->last_gpstate_idx == gpstates->last_lpstate_idx) || |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 608 | (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME)) { |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 609 | gpstate_idx = pstate_to_idx(freq_data.pstate_id); |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 610 | reset_gpstates(policy); |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 611 | gpstates->highest_lpstate_idx = gpstate_idx; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 612 | } else { |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 613 | gpstate_idx = calc_global_pstate(gpstates->elapsed_time, |
| 614 | gpstates->highest_lpstate_idx, |
Akshay Adiga | 8e85946 | 2016-08-04 20:59:17 +0530 | [diff] [blame] | 615 | gpstates->last_lpstate_idx); |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 616 | } |
| 617 | |
| 618 | /* |
| 619 | * If local pstate is equal to global pstate, rampdown is over |
| 620 | * So timer is not required to be queued. |
| 621 | */ |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 622 | if (gpstate_idx != gpstates->last_lpstate_idx) |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 623 | queue_gpstate_timer(gpstates); |
| 624 | |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 625 | freq_data.gpstate_id = idx_to_pstate(gpstate_idx); |
| 626 | gpstates->last_gpstate_idx = pstate_to_idx(freq_data.gpstate_id); |
| 627 | gpstates->last_lpstate_idx = pstate_to_idx(freq_data.pstate_id); |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 628 | |
Akshay Adiga | 1fd3ff2 | 2016-05-03 20:49:35 +0530 | [diff] [blame] | 629 | spin_unlock(&gpstates->gpstate_lock); |
| 630 | |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 631 | /* Timer may get migrated to a different cpu on cpu hot unplug */ |
| 632 | smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1); |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 633 | } |
| 634 | |
Shilpasri G Bhat | cf30af76 | 2014-09-29 15:49:11 +0200 | [diff] [blame] | 635 | /* |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 636 | * powernv_cpufreq_target_index: Sets the frequency corresponding to |
| 637 | * the cpufreq table entry indexed by new_index on the cpus in the |
| 638 | * mask policy->cpus |
| 639 | */ |
| 640 | static int powernv_cpufreq_target_index(struct cpufreq_policy *policy, |
| 641 | unsigned int new_index) |
| 642 | { |
| 643 | struct powernv_smp_call_data freq_data; |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 644 | unsigned int cur_msec, gpstate_idx; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 645 | struct global_pstate_info *gpstates = policy->driver_data; |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 646 | |
Shilpasri G Bhat | cf30af76 | 2014-09-29 15:49:11 +0200 | [diff] [blame] | 647 | if (unlikely(rebooting) && new_index != get_nominal_index()) |
| 648 | return 0; |
| 649 | |
Denis Kirjanov | 89c728e | 2016-11-08 05:39:28 -0500 | [diff] [blame] | 650 | if (!throttled) { |
| 651 | /* we don't want to be preempted while |
| 652 | * checking if the CPU frequency has been throttled |
| 653 | */ |
| 654 | preempt_disable(); |
Shilpasri G Bhat | 735366f | 2015-07-16 13:34:21 +0530 | [diff] [blame] | 655 | powernv_cpufreq_throttle_check(NULL); |
Denis Kirjanov | 89c728e | 2016-11-08 05:39:28 -0500 | [diff] [blame] | 656 | preempt_enable(); |
| 657 | } |
Shilpasri G Bhat | 09a972d | 2015-04-01 15:16:34 +0530 | [diff] [blame] | 658 | |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 659 | cur_msec = jiffies_to_msecs(get_jiffies_64()); |
| 660 | |
Akshay Adiga | 1fd3ff2 | 2016-05-03 20:49:35 +0530 | [diff] [blame] | 661 | spin_lock(&gpstates->gpstate_lock); |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 662 | freq_data.pstate_id = idx_to_pstate(new_index); |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 663 | |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 664 | if (!gpstates->last_sampled_time) { |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 665 | gpstate_idx = new_index; |
| 666 | gpstates->highest_lpstate_idx = new_index; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 667 | goto gpstates_done; |
| 668 | } |
| 669 | |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 670 | if (gpstates->last_gpstate_idx < new_index) { |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 671 | gpstates->elapsed_time += cur_msec - |
| 672 | gpstates->last_sampled_time; |
| 673 | |
| 674 | /* |
| 675 | * If its has been ramping down for more than MAX_RAMP_DOWN_TIME |
| 676 | * we should be resetting all global pstate related data. Set it |
| 677 | * equal to local pstate to start fresh. |
| 678 | */ |
| 679 | if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) { |
| 680 | reset_gpstates(policy); |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 681 | gpstates->highest_lpstate_idx = new_index; |
| 682 | gpstate_idx = new_index; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 683 | } else { |
| 684 | /* Elaspsed_time is less than 5 seconds, continue to rampdown */ |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 685 | gpstate_idx = calc_global_pstate(gpstates->elapsed_time, |
| 686 | gpstates->highest_lpstate_idx, |
| 687 | new_index); |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 688 | } |
| 689 | } else { |
| 690 | reset_gpstates(policy); |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 691 | gpstates->highest_lpstate_idx = new_index; |
| 692 | gpstate_idx = new_index; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 693 | } |
| 694 | |
| 695 | /* |
| 696 | * If local pstate is equal to global pstate, rampdown is over |
| 697 | * So timer is not required to be queued. |
| 698 | */ |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 699 | if (gpstate_idx != new_index) |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 700 | queue_gpstate_timer(gpstates); |
Akshay Adiga | 0bc10b9 | 2016-05-03 20:49:36 +0530 | [diff] [blame] | 701 | else |
| 702 | del_timer_sync(&gpstates->timer); |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 703 | |
| 704 | gpstates_done: |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 705 | freq_data.gpstate_id = idx_to_pstate(gpstate_idx); |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 706 | gpstates->last_sampled_time = cur_msec; |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 707 | gpstates->last_gpstate_idx = gpstate_idx; |
| 708 | gpstates->last_lpstate_idx = new_index; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 709 | |
Akshay Adiga | 1fd3ff2 | 2016-05-03 20:49:35 +0530 | [diff] [blame] | 710 | spin_unlock(&gpstates->gpstate_lock); |
| 711 | |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 712 | /* |
| 713 | * Use smp_call_function to send IPI and execute the |
| 714 | * mtspr on target CPU. We could do that without IPI |
| 715 | * if current CPU is within policy->cpus (core) |
| 716 | */ |
| 717 | smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1); |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 718 | return 0; |
| 719 | } |
| 720 | |
| 721 | static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy) |
| 722 | { |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 723 | int base, i, ret; |
Shilpasri G Bhat | 2920e9c | 2016-04-19 15:28:00 +0530 | [diff] [blame] | 724 | struct kernfs_node *kn; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 725 | struct global_pstate_info *gpstates; |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 726 | |
| 727 | base = cpu_first_thread_sibling(policy->cpu); |
| 728 | |
| 729 | for (i = 0; i < threads_per_core; i++) |
| 730 | cpumask_set_cpu(base + i, policy->cpus); |
| 731 | |
Shilpasri G Bhat | 2920e9c | 2016-04-19 15:28:00 +0530 | [diff] [blame] | 732 | kn = kernfs_find_and_get(policy->kobj.sd, throttle_attr_grp.name); |
| 733 | if (!kn) { |
Shilpasri G Bhat | 1b02898 | 2016-03-22 18:57:09 +0530 | [diff] [blame] | 734 | int ret; |
| 735 | |
| 736 | ret = sysfs_create_group(&policy->kobj, &throttle_attr_grp); |
| 737 | if (ret) { |
| 738 | pr_info("Failed to create throttle stats directory for cpu %d\n", |
| 739 | policy->cpu); |
| 740 | return ret; |
| 741 | } |
Shilpasri G Bhat | 2920e9c | 2016-04-19 15:28:00 +0530 | [diff] [blame] | 742 | } else { |
| 743 | kernfs_put(kn); |
Shilpasri G Bhat | 1b02898 | 2016-03-22 18:57:09 +0530 | [diff] [blame] | 744 | } |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 745 | |
| 746 | gpstates = kzalloc(sizeof(*gpstates), GFP_KERNEL); |
| 747 | if (!gpstates) |
| 748 | return -ENOMEM; |
| 749 | |
| 750 | policy->driver_data = gpstates; |
| 751 | |
| 752 | /* initialize timer */ |
Thomas Gleixner | 7bc54b6 | 2016-07-04 09:50:18 +0000 | [diff] [blame] | 753 | init_timer_pinned_deferrable(&gpstates->timer); |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 754 | gpstates->timer.data = (unsigned long)policy; |
| 755 | gpstates->timer.function = gpstate_timer_handler; |
| 756 | gpstates->timer.expires = jiffies + |
| 757 | msecs_to_jiffies(GPSTATE_TIMER_INTERVAL); |
| 758 | spin_lock_init(&gpstates->gpstate_lock); |
| 759 | ret = cpufreq_table_validate_and_show(policy, powernv_freqs); |
| 760 | |
| 761 | if (ret < 0) |
| 762 | kfree(policy->driver_data); |
| 763 | |
| 764 | return ret; |
| 765 | } |
| 766 | |
| 767 | static int powernv_cpufreq_cpu_exit(struct cpufreq_policy *policy) |
| 768 | { |
| 769 | /* timer is deleted in cpufreq_cpu_stop() */ |
| 770 | kfree(policy->driver_data); |
| 771 | |
| 772 | return 0; |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 773 | } |
| 774 | |
Shilpasri G Bhat | cf30af76 | 2014-09-29 15:49:11 +0200 | [diff] [blame] | 775 | static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb, |
| 776 | unsigned long action, void *unused) |
| 777 | { |
| 778 | int cpu; |
| 779 | struct cpufreq_policy cpu_policy; |
| 780 | |
| 781 | rebooting = true; |
| 782 | for_each_online_cpu(cpu) { |
| 783 | cpufreq_get_policy(&cpu_policy, cpu); |
| 784 | powernv_cpufreq_target_index(&cpu_policy, get_nominal_index()); |
| 785 | } |
| 786 | |
| 787 | return NOTIFY_DONE; |
| 788 | } |
| 789 | |
| 790 | static struct notifier_block powernv_cpufreq_reboot_nb = { |
| 791 | .notifier_call = powernv_cpufreq_reboot_notifier, |
| 792 | }; |
| 793 | |
Shilpasri G Bhat | 735366f | 2015-07-16 13:34:21 +0530 | [diff] [blame] | 794 | void powernv_cpufreq_work_fn(struct work_struct *work) |
| 795 | { |
| 796 | struct chip *chip = container_of(work, struct chip, throttle); |
Shilpasri G Bhat | 22794280 | 2015-07-16 13:34:23 +0530 | [diff] [blame] | 797 | unsigned int cpu; |
Shilpasri G Bhat | 6d167a4 | 2016-02-03 01:11:38 +0530 | [diff] [blame] | 798 | cpumask_t mask; |
Shilpasri G Bhat | 735366f | 2015-07-16 13:34:21 +0530 | [diff] [blame] | 799 | |
Shilpasri G Bhat | 6d167a4 | 2016-02-03 01:11:38 +0530 | [diff] [blame] | 800 | get_online_cpus(); |
| 801 | cpumask_and(&mask, &chip->mask, cpu_online_mask); |
| 802 | smp_call_function_any(&mask, |
Shilpasri G Bhat | 735366f | 2015-07-16 13:34:21 +0530 | [diff] [blame] | 803 | powernv_cpufreq_throttle_check, NULL, 0); |
Shilpasri G Bhat | 22794280 | 2015-07-16 13:34:23 +0530 | [diff] [blame] | 804 | |
| 805 | if (!chip->restore) |
Shilpasri G Bhat | 6d167a4 | 2016-02-03 01:11:38 +0530 | [diff] [blame] | 806 | goto out; |
Shilpasri G Bhat | 22794280 | 2015-07-16 13:34:23 +0530 | [diff] [blame] | 807 | |
| 808 | chip->restore = false; |
Shilpasri G Bhat | 6d167a4 | 2016-02-03 01:11:38 +0530 | [diff] [blame] | 809 | for_each_cpu(cpu, &mask) { |
| 810 | int index; |
Shilpasri G Bhat | 22794280 | 2015-07-16 13:34:23 +0530 | [diff] [blame] | 811 | struct cpufreq_policy policy; |
| 812 | |
| 813 | cpufreq_get_policy(&policy, cpu); |
Viresh Kumar | 8257736 | 2016-06-27 09:59:34 +0530 | [diff] [blame] | 814 | index = cpufreq_table_find_index_c(&policy, policy.cur); |
Shilpasri G Bhat | 22794280 | 2015-07-16 13:34:23 +0530 | [diff] [blame] | 815 | powernv_cpufreq_target_index(&policy, index); |
Shilpasri G Bhat | 6d167a4 | 2016-02-03 01:11:38 +0530 | [diff] [blame] | 816 | cpumask_andnot(&mask, &mask, policy.cpus); |
Shilpasri G Bhat | 22794280 | 2015-07-16 13:34:23 +0530 | [diff] [blame] | 817 | } |
Shilpasri G Bhat | 6d167a4 | 2016-02-03 01:11:38 +0530 | [diff] [blame] | 818 | out: |
| 819 | put_online_cpus(); |
Shilpasri G Bhat | 735366f | 2015-07-16 13:34:21 +0530 | [diff] [blame] | 820 | } |
| 821 | |
Shilpasri G Bhat | cb166fa | 2015-07-16 13:34:20 +0530 | [diff] [blame] | 822 | static int powernv_cpufreq_occ_msg(struct notifier_block *nb, |
| 823 | unsigned long msg_type, void *_msg) |
| 824 | { |
| 825 | struct opal_msg *msg = _msg; |
| 826 | struct opal_occ_msg omsg; |
Shilpasri G Bhat | 735366f | 2015-07-16 13:34:21 +0530 | [diff] [blame] | 827 | int i; |
Shilpasri G Bhat | cb166fa | 2015-07-16 13:34:20 +0530 | [diff] [blame] | 828 | |
| 829 | if (msg_type != OPAL_MSG_OCC) |
| 830 | return 0; |
| 831 | |
| 832 | omsg.type = be64_to_cpu(msg->params[0]); |
| 833 | |
| 834 | switch (omsg.type) { |
| 835 | case OCC_RESET: |
| 836 | occ_reset = true; |
Shilpasri G Bhat | 309d063 | 2015-08-27 14:41:44 +0530 | [diff] [blame] | 837 | pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n"); |
Shilpasri G Bhat | cb166fa | 2015-07-16 13:34:20 +0530 | [diff] [blame] | 838 | /* |
| 839 | * powernv_cpufreq_throttle_check() is called in |
| 840 | * target() callback which can detect the throttle state |
| 841 | * for governors like ondemand. |
| 842 | * But static governors will not call target() often thus |
| 843 | * report throttling here. |
| 844 | */ |
| 845 | if (!throttled) { |
| 846 | throttled = true; |
Shilpasri G Bhat | c89f268 | 2016-02-03 01:11:41 +0530 | [diff] [blame] | 847 | pr_warn("CPU frequency is throttled for duration\n"); |
Shilpasri G Bhat | cb166fa | 2015-07-16 13:34:20 +0530 | [diff] [blame] | 848 | } |
Shilpasri G Bhat | 309d063 | 2015-08-27 14:41:44 +0530 | [diff] [blame] | 849 | |
Shilpasri G Bhat | cb166fa | 2015-07-16 13:34:20 +0530 | [diff] [blame] | 850 | break; |
| 851 | case OCC_LOAD: |
Shilpasri G Bhat | 309d063 | 2015-08-27 14:41:44 +0530 | [diff] [blame] | 852 | pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n"); |
Shilpasri G Bhat | cb166fa | 2015-07-16 13:34:20 +0530 | [diff] [blame] | 853 | break; |
| 854 | case OCC_THROTTLE: |
| 855 | omsg.chip = be64_to_cpu(msg->params[1]); |
| 856 | omsg.throttle_status = be64_to_cpu(msg->params[2]); |
| 857 | |
| 858 | if (occ_reset) { |
| 859 | occ_reset = false; |
| 860 | throttled = false; |
Shilpasri G Bhat | 309d063 | 2015-08-27 14:41:44 +0530 | [diff] [blame] | 861 | pr_info("OCC Active, CPU frequency is no longer throttled\n"); |
Shilpasri G Bhat | 735366f | 2015-07-16 13:34:21 +0530 | [diff] [blame] | 862 | |
Shilpasri G Bhat | 22794280 | 2015-07-16 13:34:23 +0530 | [diff] [blame] | 863 | for (i = 0; i < nr_chips; i++) { |
| 864 | chips[i].restore = true; |
Shilpasri G Bhat | 735366f | 2015-07-16 13:34:21 +0530 | [diff] [blame] | 865 | schedule_work(&chips[i].throttle); |
Shilpasri G Bhat | 22794280 | 2015-07-16 13:34:23 +0530 | [diff] [blame] | 866 | } |
Shilpasri G Bhat | 735366f | 2015-07-16 13:34:21 +0530 | [diff] [blame] | 867 | |
Shilpasri G Bhat | cb166fa | 2015-07-16 13:34:20 +0530 | [diff] [blame] | 868 | return 0; |
| 869 | } |
| 870 | |
Shilpasri G Bhat | 735366f | 2015-07-16 13:34:21 +0530 | [diff] [blame] | 871 | for (i = 0; i < nr_chips; i++) |
Shilpasri G Bhat | c89f268 | 2016-02-03 01:11:41 +0530 | [diff] [blame] | 872 | if (chips[i].id == omsg.chip) |
| 873 | break; |
| 874 | |
| 875 | if (omsg.throttle_status >= 0 && |
Shilpasri G Bhat | 1b02898 | 2016-03-22 18:57:09 +0530 | [diff] [blame] | 876 | omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS) { |
Shilpasri G Bhat | c89f268 | 2016-02-03 01:11:41 +0530 | [diff] [blame] | 877 | chips[i].throttle_reason = omsg.throttle_status; |
Shilpasri G Bhat | 1b02898 | 2016-03-22 18:57:09 +0530 | [diff] [blame] | 878 | chips[i].reason[omsg.throttle_status]++; |
| 879 | } |
Shilpasri G Bhat | c89f268 | 2016-02-03 01:11:41 +0530 | [diff] [blame] | 880 | |
| 881 | if (!omsg.throttle_status) |
| 882 | chips[i].restore = true; |
| 883 | |
| 884 | schedule_work(&chips[i].throttle); |
Shilpasri G Bhat | cb166fa | 2015-07-16 13:34:20 +0530 | [diff] [blame] | 885 | } |
| 886 | return 0; |
| 887 | } |
| 888 | |
| 889 | static struct notifier_block powernv_cpufreq_opal_nb = { |
| 890 | .notifier_call = powernv_cpufreq_occ_msg, |
| 891 | .next = NULL, |
| 892 | .priority = 0, |
| 893 | }; |
| 894 | |
Preeti U Murthy | b120339 | 2014-09-29 15:47:53 +0200 | [diff] [blame] | 895 | static void powernv_cpufreq_stop_cpu(struct cpufreq_policy *policy) |
| 896 | { |
| 897 | struct powernv_smp_call_data freq_data; |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 898 | struct global_pstate_info *gpstates = policy->driver_data; |
Preeti U Murthy | b120339 | 2014-09-29 15:47:53 +0200 | [diff] [blame] | 899 | |
Akshay Adiga | 09ca4c9 | 2016-06-30 11:53:07 +0530 | [diff] [blame] | 900 | freq_data.pstate_id = idx_to_pstate(powernv_pstate_info.min); |
| 901 | freq_data.gpstate_id = idx_to_pstate(powernv_pstate_info.min); |
Preeti U Murthy | b120339 | 2014-09-29 15:47:53 +0200 | [diff] [blame] | 902 | smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1); |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 903 | del_timer_sync(&gpstates->timer); |
Preeti U Murthy | b120339 | 2014-09-29 15:47:53 +0200 | [diff] [blame] | 904 | } |
| 905 | |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 906 | static struct cpufreq_driver powernv_cpufreq_driver = { |
| 907 | .name = "powernv-cpufreq", |
| 908 | .flags = CPUFREQ_CONST_LOOPS, |
| 909 | .init = powernv_cpufreq_cpu_init, |
Akshay Adiga | eaa2c3a | 2016-04-19 15:28:01 +0530 | [diff] [blame] | 910 | .exit = powernv_cpufreq_cpu_exit, |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 911 | .verify = cpufreq_generic_frequency_table_verify, |
| 912 | .target_index = powernv_cpufreq_target_index, |
| 913 | .get = powernv_cpufreq_get, |
Preeti U Murthy | b120339 | 2014-09-29 15:47:53 +0200 | [diff] [blame] | 914 | .stop_cpu = powernv_cpufreq_stop_cpu, |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 915 | .attr = powernv_cpu_freq_attr, |
| 916 | }; |
| 917 | |
Shilpasri G Bhat | 053819e | 2015-07-16 13:34:18 +0530 | [diff] [blame] | 918 | static int init_chip_info(void) |
| 919 | { |
| 920 | unsigned int chip[256]; |
| 921 | unsigned int cpu, i; |
| 922 | unsigned int prev_chip_id = UINT_MAX; |
| 923 | |
Michael Neuling | 3e5963b | 2016-03-21 22:24:52 +0530 | [diff] [blame] | 924 | for_each_possible_cpu(cpu) { |
Shilpasri G Bhat | 053819e | 2015-07-16 13:34:18 +0530 | [diff] [blame] | 925 | unsigned int id = cpu_to_chip_id(cpu); |
| 926 | |
| 927 | if (prev_chip_id != id) { |
| 928 | prev_chip_id = id; |
| 929 | chip[nr_chips++] = id; |
| 930 | } |
| 931 | } |
| 932 | |
Shilpasri G Bhat | c89f268 | 2016-02-03 01:11:41 +0530 | [diff] [blame] | 933 | chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL); |
Shilpasri G Bhat | 053819e | 2015-07-16 13:34:18 +0530 | [diff] [blame] | 934 | if (!chips) |
Michael Neuling | 3e5963b | 2016-03-21 22:24:52 +0530 | [diff] [blame] | 935 | return -ENOMEM; |
Shilpasri G Bhat | 053819e | 2015-07-16 13:34:18 +0530 | [diff] [blame] | 936 | |
| 937 | for (i = 0; i < nr_chips; i++) { |
| 938 | chips[i].id = chip[i]; |
Shilpasri G Bhat | 735366f | 2015-07-16 13:34:21 +0530 | [diff] [blame] | 939 | cpumask_copy(&chips[i].mask, cpumask_of_node(chip[i])); |
| 940 | INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn); |
Michael Neuling | 3e5963b | 2016-03-21 22:24:52 +0530 | [diff] [blame] | 941 | for_each_cpu(cpu, &chips[i].mask) |
| 942 | per_cpu(chip_info, cpu) = &chips[i]; |
Shilpasri G Bhat | 053819e | 2015-07-16 13:34:18 +0530 | [diff] [blame] | 943 | } |
| 944 | |
| 945 | return 0; |
| 946 | } |
| 947 | |
Shilpasri G Bhat | c5e29ea | 2016-02-26 16:06:51 +0530 | [diff] [blame] | 948 | static inline void clean_chip_info(void) |
| 949 | { |
| 950 | kfree(chips); |
Shilpasri G Bhat | c5e29ea | 2016-02-26 16:06:51 +0530 | [diff] [blame] | 951 | } |
| 952 | |
| 953 | static inline void unregister_all_notifiers(void) |
| 954 | { |
| 955 | opal_message_notifier_unregister(OPAL_MSG_OCC, |
| 956 | &powernv_cpufreq_opal_nb); |
| 957 | unregister_reboot_notifier(&powernv_cpufreq_reboot_nb); |
| 958 | } |
| 959 | |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 960 | static int __init powernv_cpufreq_init(void) |
| 961 | { |
| 962 | int rc = 0; |
| 963 | |
Vaidyanathan Srinivasan | 6174bac | 2014-08-03 14:54:05 +0530 | [diff] [blame] | 964 | /* Don't probe on pseries (guest) platforms */ |
Stewart Smith | e4d54f7 | 2015-12-09 17:18:20 +1100 | [diff] [blame] | 965 | if (!firmware_has_feature(FW_FEATURE_OPAL)) |
Vaidyanathan Srinivasan | 6174bac | 2014-08-03 14:54:05 +0530 | [diff] [blame] | 966 | return -ENODEV; |
| 967 | |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 968 | /* Discover pstates from device tree and init */ |
| 969 | rc = init_powernv_pstates(); |
Shilpasri G Bhat | c5e29ea | 2016-02-26 16:06:51 +0530 | [diff] [blame] | 970 | if (rc) |
| 971 | goto out; |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 972 | |
Shilpasri G Bhat | 053819e | 2015-07-16 13:34:18 +0530 | [diff] [blame] | 973 | /* Populate chip info */ |
| 974 | rc = init_chip_info(); |
| 975 | if (rc) |
Shilpasri G Bhat | c5e29ea | 2016-02-26 16:06:51 +0530 | [diff] [blame] | 976 | goto out; |
Shilpasri G Bhat | 053819e | 2015-07-16 13:34:18 +0530 | [diff] [blame] | 977 | |
Shilpasri G Bhat | cf30af76 | 2014-09-29 15:49:11 +0200 | [diff] [blame] | 978 | register_reboot_notifier(&powernv_cpufreq_reboot_nb); |
Shilpasri G Bhat | cb166fa | 2015-07-16 13:34:20 +0530 | [diff] [blame] | 979 | opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb); |
Shilpasri G Bhat | c5e29ea | 2016-02-26 16:06:51 +0530 | [diff] [blame] | 980 | |
| 981 | rc = cpufreq_register_driver(&powernv_cpufreq_driver); |
| 982 | if (!rc) |
| 983 | return 0; |
| 984 | |
| 985 | pr_info("Failed to register the cpufreq driver (%d)\n", rc); |
| 986 | unregister_all_notifiers(); |
| 987 | clean_chip_info(); |
| 988 | out: |
| 989 | pr_info("Platform driver disabled. System does not support PState control\n"); |
| 990 | return rc; |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 991 | } |
| 992 | module_init(powernv_cpufreq_init); |
| 993 | |
| 994 | static void __exit powernv_cpufreq_exit(void) |
| 995 | { |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 996 | cpufreq_unregister_driver(&powernv_cpufreq_driver); |
Shilpasri G Bhat | c5e29ea | 2016-02-26 16:06:51 +0530 | [diff] [blame] | 997 | unregister_all_notifiers(); |
| 998 | clean_chip_info(); |
Vaidyanathan Srinivasan | b3d627a | 2014-04-01 12:43:26 +0530 | [diff] [blame] | 999 | } |
| 1000 | module_exit(powernv_cpufreq_exit); |
| 1001 | |
| 1002 | MODULE_LICENSE("GPL"); |
| 1003 | MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>"); |