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Peter Ujfalusia53b8e32011-06-04 08:16:41 +03001/*
2 * twl-common.c
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc..
5 * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 *
21 */
22
23#include <linux/i2c.h>
24#include <linux/i2c/twl.h>
25#include <linux/gpio.h>
Peter Ujfalusib22f9542011-06-07 10:26:46 +030026#include <linux/regulator/machine.h>
27#include <linux/regulator/fixed.h>
Peter Ujfalusia53b8e32011-06-04 08:16:41 +030028
29#include <plat/i2c.h>
Peter Ujfalusib22f9542011-06-07 10:26:46 +030030#include <plat/usb.h>
Peter Ujfalusia53b8e32011-06-04 08:16:41 +030031
Tony Lindgrendbc04162012-08-31 10:59:07 -070032#include "soc.h"
Peter Ujfalusia53b8e32011-06-04 08:16:41 +030033#include "twl-common.h"
Kevin Hilman46232a32011-11-23 14:43:01 -080034#include "pm.h"
Tero Kristo49c008e2012-02-20 12:26:08 +020035#include "voltage.h"
Kevin Hilman5941b812012-06-28 10:01:32 -070036#include "mux.h"
Peter Ujfalusia53b8e32011-06-04 08:16:41 +030037
38static struct i2c_board_info __initdata pmic_i2c_board_info = {
39 .addr = 0x48,
40 .flags = I2C_CLIENT_WAKE,
41};
42
Peter Ujfalusida0085f2012-06-21 01:36:02 -070043#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
Tero Kristo49c008e2012-02-20 12:26:08 +020044static int twl_set_voltage(void *data, int target_uV)
45{
46 struct voltagedomain *voltdm = (struct voltagedomain *)data;
47 return voltdm_scale(voltdm, target_uV);
48}
49
50static int twl_get_voltage(void *data)
51{
52 struct voltagedomain *voltdm = (struct voltagedomain *)data;
53 return voltdm_get_voltage(voltdm);
54}
Peter Ujfalusida0085f2012-06-21 01:36:02 -070055#endif
Tero Kristo49c008e2012-02-20 12:26:08 +020056
Peter Ujfalusia53b8e32011-06-04 08:16:41 +030057void __init omap_pmic_init(int bus, u32 clkrate,
58 const char *pmic_type, int pmic_irq,
59 struct twl4030_platform_data *pmic_data)
60{
Kevin Hilman265a2bc2012-07-16 16:56:15 -070061 omap_mux_init_signal("sys_nirq", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
Peter Ujfalusia53b8e32011-06-04 08:16:41 +030062 strncpy(pmic_i2c_board_info.type, pmic_type,
63 sizeof(pmic_i2c_board_info.type));
64 pmic_i2c_board_info.irq = pmic_irq;
65 pmic_i2c_board_info.platform_data = pmic_data;
66
67 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
68}
Peter Ujfalusib22f9542011-06-07 10:26:46 +030069
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +030070void __init omap4_pmic_init(const char *pmic_type,
71 struct twl4030_platform_data *pmic_data,
Peter Ujfalusi9495d1e2012-09-24 12:24:48 +030072 struct i2c_board_info *devices, int nr_devices)
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +030073{
74 /* PMIC part*/
Kevin Hilman5941b812012-06-28 10:01:32 -070075 omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
Peter Ujfalusi9495d1e2012-09-24 12:24:48 +030076 omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data);
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +030077
Peter Ujfalusi9495d1e2012-09-24 12:24:48 +030078 /* Register additional devices on i2c1 bus if needed */
79 if (devices)
80 i2c_register_board_info(1, devices, nr_devices);
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +030081}
82
Kevin Hilman46232a32011-11-23 14:43:01 -080083void __init omap_pmic_late_init(void)
84{
Peter Ujfalusi9495d1e2012-09-24 12:24:48 +030085 /* Init the OMAP TWL parameters (if PMIC has been registerd) */
86 if (!pmic_i2c_board_info.irq)
87 return;
88
89 omap3_twl_init();
90 omap4_twl_init();
Kevin Hilman46232a32011-11-23 14:43:01 -080091}
92
Peter Ujfalusid12d1fc2011-08-09 15:36:50 +030093#if defined(CONFIG_ARCH_OMAP3)
Peter Ujfalusi827ed9a2011-06-07 10:28:54 +030094static struct twl4030_usb_data omap3_usb_pdata = {
95 .usb_mode = T2_USB_MODE_ULPI,
96};
97
98static int omap3_batt_table[] = {
99/* 0 C */
10030800, 29500, 28300, 27100,
10126000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
10217200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
10311600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
1048020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
1055640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
1064040, 3910, 3790, 3670, 3550
107};
108
109static struct twl4030_bci_platform_data omap3_bci_pdata = {
110 .battery_tmp_tbl = omap3_batt_table,
111 .tblsize = ARRAY_SIZE(omap3_batt_table),
112};
113
114static struct twl4030_madc_platform_data omap3_madc_pdata = {
115 .irq_line = 1,
116};
117
Peter Ujfalusi4ae6df52011-05-31 15:21:13 +0300118static struct twl4030_codec_data omap3_codec;
Peter Ujfalusi827ed9a2011-06-07 10:28:54 +0300119
Peter Ujfalusi4ae6df52011-05-31 15:21:13 +0300120static struct twl4030_audio_data omap3_audio_pdata = {
Peter Ujfalusi827ed9a2011-06-07 10:28:54 +0300121 .audio_mclk = 26000000,
Peter Ujfalusi4ae6df52011-05-31 15:21:13 +0300122 .codec = &omap3_codec,
Peter Ujfalusi827ed9a2011-06-07 10:28:54 +0300123};
124
Peter Ujfalusib252b0e2011-06-07 11:38:24 +0300125static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = {
126 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
127};
128
129static struct regulator_init_data omap3_vdac_idata = {
130 .constraints = {
131 .min_uV = 1800000,
132 .max_uV = 1800000,
133 .valid_modes_mask = REGULATOR_MODE_NORMAL
134 | REGULATOR_MODE_STANDBY,
135 .valid_ops_mask = REGULATOR_CHANGE_MODE
136 | REGULATOR_CHANGE_STATUS,
137 },
138 .num_consumer_supplies = ARRAY_SIZE(omap3_vdda_dac_supplies),
139 .consumer_supplies = omap3_vdda_dac_supplies,
140};
141
142static struct regulator_consumer_supply omap3_vpll2_supplies[] = {
143 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
Tomi Valkeinen7c68dd92011-08-03 14:00:57 +0300144 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
Peter Ujfalusib252b0e2011-06-07 11:38:24 +0300145};
146
147static struct regulator_init_data omap3_vpll2_idata = {
148 .constraints = {
149 .min_uV = 1800000,
150 .max_uV = 1800000,
151 .valid_modes_mask = REGULATOR_MODE_NORMAL
152 | REGULATOR_MODE_STANDBY,
153 .valid_ops_mask = REGULATOR_CHANGE_MODE
154 | REGULATOR_CHANGE_STATUS,
155 },
156 .num_consumer_supplies = ARRAY_SIZE(omap3_vpll2_supplies),
157 .consumer_supplies = omap3_vpll2_supplies,
158};
159
Tero Kristo23e22a52012-02-20 12:26:07 +0200160static struct regulator_consumer_supply omap3_vdd1_supply[] = {
161 REGULATOR_SUPPLY("vcc", "mpu.0"),
162};
163
164static struct regulator_consumer_supply omap3_vdd2_supply[] = {
165 REGULATOR_SUPPLY("vcc", "l3_main.0"),
166};
167
168static struct regulator_init_data omap3_vdd1 = {
169 .constraints = {
170 .name = "vdd_mpu_iva",
171 .min_uV = 600000,
172 .max_uV = 1450000,
173 .valid_modes_mask = REGULATOR_MODE_NORMAL,
174 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
175 },
176 .num_consumer_supplies = ARRAY_SIZE(omap3_vdd1_supply),
177 .consumer_supplies = omap3_vdd1_supply,
178};
179
180static struct regulator_init_data omap3_vdd2 = {
181 .constraints = {
182 .name = "vdd_core",
183 .min_uV = 600000,
184 .max_uV = 1450000,
185 .valid_modes_mask = REGULATOR_MODE_NORMAL,
186 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
187 },
188 .num_consumer_supplies = ARRAY_SIZE(omap3_vdd2_supply),
189 .consumer_supplies = omap3_vdd2_supply,
190};
191
Tero Kristo49c008e2012-02-20 12:26:08 +0200192static struct twl_regulator_driver_data omap3_vdd1_drvdata = {
193 .get_voltage = twl_get_voltage,
194 .set_voltage = twl_set_voltage,
195};
196
197static struct twl_regulator_driver_data omap3_vdd2_drvdata = {
198 .get_voltage = twl_get_voltage,
199 .set_voltage = twl_set_voltage,
200};
201
Peter Ujfalusid12d1fc2011-08-09 15:36:50 +0300202void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
203 u32 pdata_flags, u32 regulators_flags)
204{
Tero Kristo49c008e2012-02-20 12:26:08 +0200205 if (!pmic_data->vdd1) {
206 omap3_vdd1.driver_data = &omap3_vdd1_drvdata;
207 omap3_vdd1_drvdata.data = voltdm_lookup("mpu_iva");
Tero Kristo23e22a52012-02-20 12:26:07 +0200208 pmic_data->vdd1 = &omap3_vdd1;
Tero Kristo49c008e2012-02-20 12:26:08 +0200209 }
210 if (!pmic_data->vdd2) {
211 omap3_vdd2.driver_data = &omap3_vdd2_drvdata;
212 omap3_vdd2_drvdata.data = voltdm_lookup("core");
Tero Kristo23e22a52012-02-20 12:26:07 +0200213 pmic_data->vdd2 = &omap3_vdd2;
Tero Kristo49c008e2012-02-20 12:26:08 +0200214 }
Peter Ujfalusid12d1fc2011-08-09 15:36:50 +0300215
216 /* Common platform data configurations */
217 if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
218 pmic_data->usb = &omap3_usb_pdata;
219
220 if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci)
221 pmic_data->bci = &omap3_bci_pdata;
222
223 if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc)
224 pmic_data->madc = &omap3_madc_pdata;
225
226 if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio)
227 pmic_data->audio = &omap3_audio_pdata;
228
229 /* Common regulator configurations */
230 if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
231 pmic_data->vdac = &omap3_vdac_idata;
232
233 if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2)
234 pmic_data->vpll2 = &omap3_vpll2_idata;
235}
236#endif /* CONFIG_ARCH_OMAP3 */
237
238#if defined(CONFIG_ARCH_OMAP4)
239static struct twl4030_usb_data omap4_usb_pdata = {
240 .phy_init = omap4430_phy_init,
241 .phy_exit = omap4430_phy_exit,
242 .phy_power = omap4430_phy_power,
243 .phy_set_clock = omap4430_phy_set_clk,
244 .phy_suspend = omap4430_phy_suspend,
245};
246
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300247static struct regulator_init_data omap4_vdac_idata = {
248 .constraints = {
249 .min_uV = 1800000,
250 .max_uV = 1800000,
251 .valid_modes_mask = REGULATOR_MODE_NORMAL
252 | REGULATOR_MODE_STANDBY,
253 .valid_ops_mask = REGULATOR_CHANGE_MODE
254 | REGULATOR_CHANGE_STATUS,
255 },
Peter Ujfalusifde01902012-05-09 14:19:16 -0700256 .supply_regulator = "V2V1",
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300257};
258
259static struct regulator_init_data omap4_vaux2_idata = {
260 .constraints = {
261 .min_uV = 1200000,
262 .max_uV = 2800000,
263 .apply_uV = true,
264 .valid_modes_mask = REGULATOR_MODE_NORMAL
265 | REGULATOR_MODE_STANDBY,
266 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
267 | REGULATOR_CHANGE_MODE
268 | REGULATOR_CHANGE_STATUS,
269 },
270};
271
272static struct regulator_init_data omap4_vaux3_idata = {
273 .constraints = {
274 .min_uV = 1000000,
275 .max_uV = 3000000,
276 .apply_uV = true,
277 .valid_modes_mask = REGULATOR_MODE_NORMAL
278 | REGULATOR_MODE_STANDBY,
279 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
280 | REGULATOR_CHANGE_MODE
281 | REGULATOR_CHANGE_STATUS,
282 },
283};
284
285static struct regulator_consumer_supply omap4_vmmc_supply[] = {
286 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
287};
288
289/* VMMC1 for MMC1 card */
290static struct regulator_init_data omap4_vmmc_idata = {
291 .constraints = {
292 .min_uV = 1200000,
293 .max_uV = 3000000,
294 .apply_uV = true,
295 .valid_modes_mask = REGULATOR_MODE_NORMAL
296 | REGULATOR_MODE_STANDBY,
297 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
298 | REGULATOR_CHANGE_MODE
299 | REGULATOR_CHANGE_STATUS,
300 },
301 .num_consumer_supplies = ARRAY_SIZE(omap4_vmmc_supply),
302 .consumer_supplies = omap4_vmmc_supply,
303};
304
305static struct regulator_init_data omap4_vpp_idata = {
306 .constraints = {
307 .min_uV = 1800000,
308 .max_uV = 2500000,
309 .apply_uV = true,
310 .valid_modes_mask = REGULATOR_MODE_NORMAL
311 | REGULATOR_MODE_STANDBY,
312 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
313 | REGULATOR_CHANGE_MODE
314 | REGULATOR_CHANGE_STATUS,
315 },
316};
317
318static struct regulator_init_data omap4_vana_idata = {
319 .constraints = {
320 .min_uV = 2100000,
321 .max_uV = 2100000,
322 .valid_modes_mask = REGULATOR_MODE_NORMAL
323 | REGULATOR_MODE_STANDBY,
324 .valid_ops_mask = REGULATOR_CHANGE_MODE
325 | REGULATOR_CHANGE_STATUS,
326 },
327};
328
Tomi Valkeinen4e6a0ab2011-08-03 14:13:52 +0300329static struct regulator_consumer_supply omap4_vcxio_supply[] = {
330 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dss"),
331 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
332 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.1"),
333};
334
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300335static struct regulator_init_data omap4_vcxio_idata = {
336 .constraints = {
337 .min_uV = 1800000,
338 .max_uV = 1800000,
339 .valid_modes_mask = REGULATOR_MODE_NORMAL
340 | REGULATOR_MODE_STANDBY,
341 .valid_ops_mask = REGULATOR_CHANGE_MODE
342 | REGULATOR_CHANGE_STATUS,
Tomi Valkeinen4e6a0ab2011-08-03 14:13:52 +0300343 .always_on = true,
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300344 },
Tomi Valkeinen4e6a0ab2011-08-03 14:13:52 +0300345 .num_consumer_supplies = ARRAY_SIZE(omap4_vcxio_supply),
346 .consumer_supplies = omap4_vcxio_supply,
Peter Ujfalusifde01902012-05-09 14:19:16 -0700347 .supply_regulator = "V2V1",
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300348};
349
350static struct regulator_init_data omap4_vusb_idata = {
351 .constraints = {
352 .min_uV = 3300000,
353 .max_uV = 3300000,
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300354 .valid_modes_mask = REGULATOR_MODE_NORMAL
355 | REGULATOR_MODE_STANDBY,
356 .valid_ops_mask = REGULATOR_CHANGE_MODE
357 | REGULATOR_CHANGE_STATUS,
358 },
359};
360
361static struct regulator_init_data omap4_clk32kg_idata = {
362 .constraints = {
363 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
364 },
365};
366
Tero Kristoe160dda2012-02-22 12:40:40 +0200367static struct regulator_consumer_supply omap4_vdd1_supply[] = {
368 REGULATOR_SUPPLY("vcc", "mpu.0"),
369};
370
371static struct regulator_consumer_supply omap4_vdd2_supply[] = {
372 REGULATOR_SUPPLY("vcc", "iva.0"),
373};
374
375static struct regulator_consumer_supply omap4_vdd3_supply[] = {
376 REGULATOR_SUPPLY("vcc", "l3_main.0"),
377};
378
379static struct regulator_init_data omap4_vdd1 = {
380 .constraints = {
381 .name = "vdd_mpu",
382 .min_uV = 500000,
383 .max_uV = 1500000,
384 .valid_modes_mask = REGULATOR_MODE_NORMAL,
385 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
386 },
387 .num_consumer_supplies = ARRAY_SIZE(omap4_vdd1_supply),
388 .consumer_supplies = omap4_vdd1_supply,
389};
390
391static struct regulator_init_data omap4_vdd2 = {
392 .constraints = {
393 .name = "vdd_iva",
394 .min_uV = 500000,
395 .max_uV = 1500000,
396 .valid_modes_mask = REGULATOR_MODE_NORMAL,
397 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
398 },
399 .num_consumer_supplies = ARRAY_SIZE(omap4_vdd2_supply),
400 .consumer_supplies = omap4_vdd2_supply,
401};
402
403static struct regulator_init_data omap4_vdd3 = {
404 .constraints = {
405 .name = "vdd_core",
406 .min_uV = 500000,
407 .max_uV = 1500000,
408 .valid_modes_mask = REGULATOR_MODE_NORMAL,
409 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
410 },
411 .num_consumer_supplies = ARRAY_SIZE(omap4_vdd3_supply),
412 .consumer_supplies = omap4_vdd3_supply,
413};
414
415
416static struct twl_regulator_driver_data omap4_vdd1_drvdata = {
417 .get_voltage = twl_get_voltage,
418 .set_voltage = twl_set_voltage,
419};
420
421static struct twl_regulator_driver_data omap4_vdd2_drvdata = {
422 .get_voltage = twl_get_voltage,
423 .set_voltage = twl_set_voltage,
424};
425
426static struct twl_regulator_driver_data omap4_vdd3_drvdata = {
427 .get_voltage = twl_get_voltage,
428 .set_voltage = twl_set_voltage,
429};
430
Peter Ujfalusifde01902012-05-09 14:19:16 -0700431static struct regulator_consumer_supply omap4_v1v8_supply[] = {
432 REGULATOR_SUPPLY("vio", "1-004b"),
433};
434
435static struct regulator_init_data omap4_v1v8_idata = {
436 .constraints = {
437 .min_uV = 1800000,
438 .max_uV = 1800000,
439 .valid_modes_mask = REGULATOR_MODE_NORMAL
440 | REGULATOR_MODE_STANDBY,
441 .valid_ops_mask = REGULATOR_CHANGE_MODE
442 | REGULATOR_CHANGE_STATUS,
443 .always_on = true,
444 },
445 .num_consumer_supplies = ARRAY_SIZE(omap4_v1v8_supply),
446 .consumer_supplies = omap4_v1v8_supply,
447};
448
449static struct regulator_consumer_supply omap4_v2v1_supply[] = {
450 REGULATOR_SUPPLY("v2v1", "1-004b"),
451};
452
453static struct regulator_init_data omap4_v2v1_idata = {
454 .constraints = {
455 .min_uV = 2100000,
456 .max_uV = 2100000,
457 .valid_modes_mask = REGULATOR_MODE_NORMAL
458 | REGULATOR_MODE_STANDBY,
459 .valid_ops_mask = REGULATOR_CHANGE_MODE
460 | REGULATOR_CHANGE_STATUS,
461 },
462 .num_consumer_supplies = ARRAY_SIZE(omap4_v2v1_supply),
463 .consumer_supplies = omap4_v2v1_supply,
464};
465
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300466void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
467 u32 pdata_flags, u32 regulators_flags)
468{
Tero Kristoe160dda2012-02-22 12:40:40 +0200469 if (!pmic_data->vdd1) {
470 omap4_vdd1.driver_data = &omap4_vdd1_drvdata;
471 omap4_vdd1_drvdata.data = voltdm_lookup("mpu");
472 pmic_data->vdd1 = &omap4_vdd1;
473 }
474
475 if (!pmic_data->vdd2) {
476 omap4_vdd2.driver_data = &omap4_vdd2_drvdata;
477 omap4_vdd2_drvdata.data = voltdm_lookup("iva");
478 pmic_data->vdd2 = &omap4_vdd2;
479 }
480
481 if (!pmic_data->vdd3) {
482 omap4_vdd3.driver_data = &omap4_vdd3_drvdata;
483 omap4_vdd3_drvdata.data = voltdm_lookup("core");
484 pmic_data->vdd3 = &omap4_vdd3;
485 }
486
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300487 /* Common platform data configurations */
488 if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
489 pmic_data->usb = &omap4_usb_pdata;
490
491 /* Common regulator configurations */
492 if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
493 pmic_data->vdac = &omap4_vdac_idata;
494
495 if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && !pmic_data->vaux2)
496 pmic_data->vaux2 = &omap4_vaux2_idata;
497
498 if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && !pmic_data->vaux3)
499 pmic_data->vaux3 = &omap4_vaux3_idata;
500
501 if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && !pmic_data->vmmc)
502 pmic_data->vmmc = &omap4_vmmc_idata;
503
504 if (regulators_flags & TWL_COMMON_REGULATOR_VPP && !pmic_data->vpp)
505 pmic_data->vpp = &omap4_vpp_idata;
506
507 if (regulators_flags & TWL_COMMON_REGULATOR_VANA && !pmic_data->vana)
508 pmic_data->vana = &omap4_vana_idata;
509
510 if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && !pmic_data->vcxio)
511 pmic_data->vcxio = &omap4_vcxio_idata;
512
513 if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && !pmic_data->vusb)
514 pmic_data->vusb = &omap4_vusb_idata;
515
516 if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG &&
517 !pmic_data->clk32kg)
518 pmic_data->clk32kg = &omap4_clk32kg_idata;
Peter Ujfalusifde01902012-05-09 14:19:16 -0700519
520 if (regulators_flags & TWL_COMMON_REGULATOR_V1V8 && !pmic_data->v1v8)
521 pmic_data->v1v8 = &omap4_v1v8_idata;
522
523 if (regulators_flags & TWL_COMMON_REGULATOR_V2V1 && !pmic_data->v2v1)
524 pmic_data->v2v1 = &omap4_v2v1_idata;
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300525}
Peter Ujfalusid12d1fc2011-08-09 15:36:50 +0300526#endif /* CONFIG_ARCH_OMAP4 */