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Michael Hennerichdc26aec2008-11-18 17:48:22 +08001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
Michael Hennerichdc26aec2008-11-18 17:48:22 +08005 *
Robin Getz96f10502009-09-24 14:11:24 +00006 * Licensed under the GPL-2
Michael Hennerichdc26aec2008-11-18 17:48:22 +08007 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
Barry Songf1cb6462009-08-03 04:40:36 +000012#include <linux/mtd/physmap.h>
Michael Hennerichdc26aec2008-11-18 17:48:22 +080013#include <linux/mtd/partitions.h>
14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
16#include <linux/irq.h>
17#include <linux/interrupt.h>
18#include <asm/bfin5xx_spi.h>
19#include <asm/dma.h>
20#include <asm/gpio.h>
21#include <asm/nand.h>
22#include <asm/portmux.h>
23#include <asm/dpmc.h>
24#include <linux/input.h>
25
26/*
27 * Name the Board for the /proc/cpuinfo
28 */
Mike Frysingerfe85cad2008-11-18 17:48:22 +080029const char bfin_board_name[] = "ADI BF538-EZKIT";
Michael Hennerichdc26aec2008-11-18 17:48:22 +080030
31/*
32 * Driver needs to know address, irq and flag pin.
33 */
34
35
36#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
37static struct platform_device rtc_device = {
38 .name = "rtc-bfin",
39 .id = -1,
40};
41#endif
42
43#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
44static struct resource bfin_uart_resources[] = {
45#ifdef CONFIG_SERIAL_BFIN_UART0
46 {
47 .start = 0xFFC00400,
48 .end = 0xFFC004FF,
49 .flags = IORESOURCE_MEM,
50 },
51#endif
52#ifdef CONFIG_SERIAL_BFIN_UART1
53 {
54 .start = 0xFFC02000,
55 .end = 0xFFC020FF,
56 .flags = IORESOURCE_MEM,
57 },
58#endif
59#ifdef CONFIG_SERIAL_BFIN_UART2
60 {
61 .start = 0xFFC02100,
62 .end = 0xFFC021FF,
63 .flags = IORESOURCE_MEM,
64 },
65#endif
66};
67
68static struct platform_device bfin_uart_device = {
69 .name = "bfin-uart",
70 .id = 1,
71 .num_resources = ARRAY_SIZE(bfin_uart_resources),
72 .resource = bfin_uart_resources,
73};
74#endif
75
76#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Michael Hennerichdc26aec2008-11-18 17:48:22 +080077#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +080078static struct resource bfin_sir0_resources[] = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +080079 {
80 .start = 0xFFC00400,
81 .end = 0xFFC004FF,
82 .flags = IORESOURCE_MEM,
83 },
Graf Yang42bd8bc2009-01-07 23:14:39 +080084 {
85 .start = IRQ_UART0_RX,
86 .end = IRQ_UART0_RX+1,
87 .flags = IORESOURCE_IRQ,
88 },
89 {
90 .start = CH_UART0_RX,
91 .end = CH_UART0_RX+1,
92 .flags = IORESOURCE_DMA,
93 },
94};
95static struct platform_device bfin_sir0_device = {
96 .name = "bfin_sir",
97 .id = 0,
98 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
99 .resource = bfin_sir0_resources,
100};
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800101#endif
102#ifdef CONFIG_BFIN_SIR1
Graf Yang42bd8bc2009-01-07 23:14:39 +0800103static struct resource bfin_sir1_resources[] = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800104 {
105 .start = 0xFFC02000,
106 .end = 0xFFC020FF,
107 .flags = IORESOURCE_MEM,
108 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800109 {
110 .start = IRQ_UART1_RX,
111 .end = IRQ_UART1_RX+1,
112 .flags = IORESOURCE_IRQ,
113 },
114 {
115 .start = CH_UART1_RX,
116 .end = CH_UART1_RX+1,
117 .flags = IORESOURCE_DMA,
118 },
119};
120static struct platform_device bfin_sir1_device = {
121 .name = "bfin_sir",
122 .id = 1,
123 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
124 .resource = bfin_sir1_resources,
125};
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800126#endif
127#ifdef CONFIG_BFIN_SIR2
Graf Yang42bd8bc2009-01-07 23:14:39 +0800128static struct resource bfin_sir2_resources[] = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800129 {
130 .start = 0xFFC02100,
131 .end = 0xFFC021FF,
132 .flags = IORESOURCE_MEM,
133 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800134 {
135 .start = IRQ_UART2_RX,
136 .end = IRQ_UART2_RX+1,
137 .flags = IORESOURCE_IRQ,
138 },
139 {
140 .start = CH_UART2_RX,
141 .end = CH_UART2_RX+1,
142 .flags = IORESOURCE_DMA,
143 },
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800144};
Graf Yang42bd8bc2009-01-07 23:14:39 +0800145static struct platform_device bfin_sir2_device = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800146 .name = "bfin_sir",
Graf Yang42bd8bc2009-01-07 23:14:39 +0800147 .id = 2,
148 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
149 .resource = bfin_sir2_resources,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800150};
151#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +0800152#endif
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800153
154/*
155 * USB-LAN EzExtender board
156 * Driver needs to know address, irq and flag pin.
157 */
158#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
Michael Hennerich61f09b52009-07-24 08:48:31 +0000159#include <linux/smc91x.h>
160
161static struct smc91x_platdata smc91x_info = {
162 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
163 .leda = RPC_LED_100_10,
164 .ledb = RPC_LED_TX_RX,
165};
166
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800167static struct resource smc91x_resources[] = {
168 {
169 .name = "smc91x-regs",
170 .start = 0x20310300,
171 .end = 0x20310300 + 16,
172 .flags = IORESOURCE_MEM,
173 }, {
174 .start = IRQ_PF0,
175 .end = IRQ_PF0,
176 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
177 },
178};
179static struct platform_device smc91x_device = {
180 .name = "smc91x",
181 .id = 0,
182 .num_resources = ARRAY_SIZE(smc91x_resources),
183 .resource = smc91x_resources,
Michael Hennerich61f09b52009-07-24 08:48:31 +0000184 .dev = {
185 .platform_data = &smc91x_info,
186 },
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800187};
188#endif
189
190#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
191/* all SPI peripherals info goes here */
192#if defined(CONFIG_MTD_M25P80) \
193 || defined(CONFIG_MTD_M25P80_MODULE)
194/* SPI flash chip (m25p16) */
195static struct mtd_partition bfin_spi_flash_partitions[] = {
196 {
197 .name = "bootloader(spi)",
198 .size = 0x00040000,
199 .offset = 0,
200 .mask_flags = MTD_CAP_ROM
201 }, {
202 .name = "linux kernel(spi)",
203 .size = 0x1c0000,
204 .offset = 0x40000
205 }
206};
207
208static struct flash_platform_data bfin_spi_flash_data = {
209 .name = "m25p80",
210 .parts = bfin_spi_flash_partitions,
211 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
212 .type = "m25p16",
213};
214
215static struct bfin5xx_spi_chip spi_flash_chip_info = {
216 .enable_dma = 0, /* use dma transfer with this chip*/
217 .bits_per_word = 8,
218 .cs_change_per_word = 0,
219};
220#endif
221
222#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
223#include <linux/spi/ad7879.h>
224static const struct ad7879_platform_data bfin_ad7879_ts_info = {
225 .model = 7879, /* Model = AD7879 */
226 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
227 .pressure_max = 10000,
228 .pressure_min = 0,
229 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
230 .acquisition_time = 1, /* 4us acquisition time per sample */
231 .median = 2, /* do 8 measurements */
232 .averaging = 1, /* take the average of 4 middle samples */
233 .pen_down_acc_interval = 255, /* 9.4 ms */
234 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
235 .gpio_default = 1, /* During initialization set GPIO = HIGH */
236};
237#endif
238
239#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
240static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
241 .enable_dma = 0,
242 .bits_per_word = 16,
243};
244#endif
245
246#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
247#include <asm/bfin-lq035q1.h>
248
249static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
250 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
251 .use_bl = 0, /* let something else control the LCD Blacklight */
252 .gpio_bl = GPIO_PF7,
253};
254
255static struct resource bfin_lq035q1_resources[] = {
256 {
257 .start = IRQ_PPI_ERROR,
258 .end = IRQ_PPI_ERROR,
259 .flags = IORESOURCE_IRQ,
260 },
261};
262
263static struct platform_device bfin_lq035q1_device = {
264 .name = "bfin-lq035q1",
265 .id = -1,
266 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
267 .resource = bfin_lq035q1_resources,
268 .dev = {
269 .platform_data = &bfin_lq035q1_data,
270 },
271};
272#endif
273
274#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
275static struct bfin5xx_spi_chip spidev_chip_info = {
276 .enable_dma = 0,
277 .bits_per_word = 8,
278};
279#endif
280
281#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
282static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
283 .enable_dma = 0,
284 .bits_per_word = 8,
285};
286#endif
287
288static struct spi_board_info bf538_spi_board_info[] __initdata = {
289#if defined(CONFIG_MTD_M25P80) \
290 || defined(CONFIG_MTD_M25P80_MODULE)
291 {
292 /* the modalias must be the same as spi device driver name */
293 .modalias = "m25p80", /* Name of spi_driver for this device */
294 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
295 .bus_num = 0, /* Framework bus number */
296 .chip_select = 1, /* SPI_SSEL1*/
297 .platform_data = &bfin_spi_flash_data,
298 .controller_data = &spi_flash_chip_info,
299 .mode = SPI_MODE_3,
300 },
301#endif
302#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
303 {
304 .modalias = "ad7879",
305 .platform_data = &bfin_ad7879_ts_info,
306 .irq = IRQ_PF3,
307 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
308 .bus_num = 0,
309 .chip_select = 1,
310 .controller_data = &spi_ad7879_chip_info,
311 .mode = SPI_CPHA | SPI_CPOL,
312 },
313#endif
314#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
315 {
316 .modalias = "bfin-lq035q1-spi",
317 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
318 .bus_num = 0,
319 .chip_select = 2,
320 .controller_data = &lq035q1_spi_chip_info,
321 .mode = SPI_CPHA | SPI_CPOL,
322 },
323#endif
324#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
325 {
326 .modalias = "spidev",
327 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
328 .bus_num = 0,
329 .chip_select = 1,
330 .controller_data = &spidev_chip_info,
331 },
332#endif
333};
334
335/* SPI (0) */
336static struct resource bfin_spi0_resource[] = {
337 [0] = {
338 .start = SPI0_REGBASE,
339 .end = SPI0_REGBASE + 0xFF,
340 .flags = IORESOURCE_MEM,
341 },
342 [1] = {
343 .start = CH_SPI0,
344 .end = CH_SPI0,
Yi Li53122692009-06-05 12:11:11 +0000345 .flags = IORESOURCE_DMA,
346 },
347 [2] = {
348 .start = IRQ_SPI0,
349 .end = IRQ_SPI0,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800350 .flags = IORESOURCE_IRQ,
351 }
352};
353
354/* SPI (1) */
355static struct resource bfin_spi1_resource[] = {
356 [0] = {
357 .start = SPI1_REGBASE,
358 .end = SPI1_REGBASE + 0xFF,
359 .flags = IORESOURCE_MEM,
360 },
361 [1] = {
362 .start = CH_SPI1,
363 .end = CH_SPI1,
Yi Li53122692009-06-05 12:11:11 +0000364 .flags = IORESOURCE_DMA,
365 },
366 [2] = {
367 .start = IRQ_SPI1,
368 .end = IRQ_SPI1,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800369 .flags = IORESOURCE_IRQ,
370 }
371};
372
373/* SPI (2) */
374static struct resource bfin_spi2_resource[] = {
375 [0] = {
376 .start = SPI2_REGBASE,
377 .end = SPI2_REGBASE + 0xFF,
378 .flags = IORESOURCE_MEM,
379 },
380 [1] = {
381 .start = CH_SPI2,
382 .end = CH_SPI2,
Barry Song769cfc02009-09-10 04:32:47 +0000383 .flags = IORESOURCE_DMA,
384 },
385 [2] = {
386 .start = IRQ_SPI2,
387 .end = IRQ_SPI2,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800388 .flags = IORESOURCE_IRQ,
389 }
390};
391
392/* SPI controller data */
393static struct bfin5xx_spi_master bf538_spi_master_info0 = {
394 .num_chipselect = 8,
395 .enable_dma = 1, /* master has the ability to do dma transfer */
396 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
397};
398
399static struct platform_device bf538_spi_master0 = {
400 .name = "bfin-spi",
401 .id = 0, /* Bus number */
402 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
403 .resource = bfin_spi0_resource,
404 .dev = {
405 .platform_data = &bf538_spi_master_info0, /* Passed to driver */
406 },
407};
408
409static struct bfin5xx_spi_master bf538_spi_master_info1 = {
410 .num_chipselect = 8,
411 .enable_dma = 1, /* master has the ability to do dma transfer */
412 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
413};
414
415static struct platform_device bf538_spi_master1 = {
416 .name = "bfin-spi",
417 .id = 1, /* Bus number */
418 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
419 .resource = bfin_spi1_resource,
420 .dev = {
421 .platform_data = &bf538_spi_master_info1, /* Passed to driver */
422 },
423};
424
425static struct bfin5xx_spi_master bf538_spi_master_info2 = {
426 .num_chipselect = 8,
427 .enable_dma = 1, /* master has the ability to do dma transfer */
428 .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
429};
430
431static struct platform_device bf538_spi_master2 = {
432 .name = "bfin-spi",
433 .id = 2, /* Bus number */
434 .num_resources = ARRAY_SIZE(bfin_spi2_resource),
435 .resource = bfin_spi2_resource,
436 .dev = {
437 .platform_data = &bf538_spi_master_info2, /* Passed to driver */
438 },
439};
440
441#endif /* spi master and devices */
442
443#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
444static struct resource bfin_twi0_resource[] = {
445 [0] = {
446 .start = TWI0_REGBASE,
447 .end = TWI0_REGBASE + 0xFF,
448 .flags = IORESOURCE_MEM,
449 },
450 [1] = {
451 .start = IRQ_TWI0,
452 .end = IRQ_TWI0,
453 .flags = IORESOURCE_IRQ,
454 },
455};
456
457static struct platform_device i2c_bfin_twi0_device = {
458 .name = "i2c-bfin-twi",
459 .id = 0,
460 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
461 .resource = bfin_twi0_resource,
462};
463
464#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
465static struct resource bfin_twi1_resource[] = {
466 [0] = {
467 .start = TWI1_REGBASE,
468 .end = TWI1_REGBASE + 0xFF,
469 .flags = IORESOURCE_MEM,
470 },
471 [1] = {
472 .start = IRQ_TWI1,
473 .end = IRQ_TWI1,
474 .flags = IORESOURCE_IRQ,
475 },
476};
477
478static struct platform_device i2c_bfin_twi1_device = {
479 .name = "i2c-bfin-twi",
480 .id = 1,
481 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
482 .resource = bfin_twi1_resource,
483};
484#endif
485#endif
486
Mike Frysingerc97618d2009-01-07 23:14:38 +0800487static struct resource bfin_gpios_resources = {
488 .start = 0,
489 .end = MAX_BLACKFIN_GPIOS - 1,
490 .flags = IORESOURCE_IRQ,
491};
492
493static struct platform_device bfin_gpios_device = {
494 .name = "simple-gpio",
495 .id = -1,
496 .num_resources = 1,
497 .resource = &bfin_gpios_resources,
498};
499
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800500#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
501#include <linux/gpio_keys.h>
502
503static struct gpio_keys_button bfin_gpio_keys_table[] = {
504 {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
505};
506
507static struct gpio_keys_platform_data bfin_gpio_keys_data = {
508 .buttons = bfin_gpio_keys_table,
509 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
510};
511
512static struct platform_device bfin_device_gpiokeys = {
513 .name = "gpio-keys",
514 .dev = {
515 .platform_data = &bfin_gpio_keys_data,
516 },
517};
518#endif
519
520static const unsigned int cclk_vlev_datasheet[] =
521{
522/*
523 * Internal VLEV BF538SBBC1533
524 ****temporarily using these values until data sheet is updated
525 */
526 VRPAIR(VLEV_100, 150000000),
527 VRPAIR(VLEV_100, 250000000),
528 VRPAIR(VLEV_110, 276000000),
529 VRPAIR(VLEV_115, 301000000),
530 VRPAIR(VLEV_120, 525000000),
531 VRPAIR(VLEV_125, 550000000),
532 VRPAIR(VLEV_130, 600000000),
533};
534
535static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
536 .tuple_tab = cclk_vlev_datasheet,
537 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
538 .vr_settling_time = 25 /* us */,
539};
540
541static struct platform_device bfin_dpmc = {
542 .name = "bfin dpmc",
543 .dev = {
544 .platform_data = &bfin_dmpc_vreg_data,
545 },
546};
547
Barry Songf1cb6462009-08-03 04:40:36 +0000548#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
549static struct mtd_partition ezkit_partitions[] = {
550 {
551 .name = "bootloader(nor)",
552 .size = 0x40000,
553 .offset = 0,
554 }, {
555 .name = "linux kernel(nor)",
556 .size = 0x180000,
557 .offset = MTDPART_OFS_APPEND,
558 }, {
559 .name = "file system(nor)",
560 .size = MTDPART_SIZ_FULL,
561 .offset = MTDPART_OFS_APPEND,
562 }
563};
564
565static struct physmap_flash_data ezkit_flash_data = {
566 .width = 2,
567 .parts = ezkit_partitions,
568 .nr_parts = ARRAY_SIZE(ezkit_partitions),
569};
570
571static struct resource ezkit_flash_resource = {
572 .start = 0x20000000,
573#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
574 .end = 0x202fffff,
575#else
576 .end = 0x203fffff,
577#endif
578 .flags = IORESOURCE_MEM,
579};
580
581static struct platform_device ezkit_flash_device = {
582 .name = "physmap-flash",
583 .id = 0,
584 .dev = {
585 .platform_data = &ezkit_flash_data,
586 },
587 .num_resources = 1,
588 .resource = &ezkit_flash_resource,
589};
590#endif
591
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800592static struct platform_device *cm_bf538_devices[] __initdata = {
593
594 &bfin_dpmc,
595
596#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
597 &rtc_device,
598#endif
599
600#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
601 &bfin_uart_device,
602#endif
603
604#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
605 &bf538_spi_master0,
606 &bf538_spi_master1,
607 &bf538_spi_master2,
608#endif
609
610#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
611 &i2c_bfin_twi0_device,
612 &i2c_bfin_twi1_device,
613#endif
614
615#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +0800616#ifdef CONFIG_BFIN_SIR0
617 &bfin_sir0_device,
618#endif
619#ifdef CONFIG_BFIN_SIR1
620 &bfin_sir1_device,
621#endif
622#ifdef CONFIG_BFIN_SIR2
623 &bfin_sir2_device,
624#endif
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800625#endif
626
627#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
628 &smc91x_device,
629#endif
630
631#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
632 &bfin_lq035q1_device,
633#endif
634
635#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
636 &bfin_device_gpiokeys,
637#endif
Mike Frysingerc97618d2009-01-07 23:14:38 +0800638
639 &bfin_gpios_device,
Barry Songf1cb6462009-08-03 04:40:36 +0000640
641#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
642 &ezkit_flash_device,
643#endif
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800644};
645
646static int __init ezkit_init(void)
647{
648 printk(KERN_INFO "%s(): registering device resources\n", __func__);
649 platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
650
651#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
652 spi_register_board_info(bf538_spi_board_info,
653 ARRAY_SIZE(bf538_spi_board_info));
654#endif
655
656 return 0;
657}
658
659arch_initcall(ezkit_init);