blob: 445426f3f9edafcada881aac6f143ea9451ceb6f [file] [log] [blame]
Kalle Valobdcd8172011-07-18 00:22:30 +03001
2/*
3 * Copyright (c) 2011 Atheros Communications Inc.
Vasanthakumar Thiagarajan1b2df402012-02-06 20:15:53 +05304 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
Kalle Valobdcd8172011-07-18 00:22:30 +03005 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
Stephen Rothwellc6efe5782011-09-28 18:32:34 +100019#include <linux/moduleparam.h>
Sangwook Leef7830202011-10-26 16:28:38 +010020#include <linux/errno.h>
Kalle Valod6a434d2012-01-17 20:09:36 +020021#include <linux/export.h>
Sam Leffler92ecbff2011-09-07 10:55:16 +030022#include <linux/of.h>
Kalle Valobdcd8172011-07-18 00:22:30 +030023#include <linux/mmc/sdio_func.h>
Kalle Valod6a434d2012-01-17 20:09:36 +020024
Kalle Valobdcd8172011-07-18 00:22:30 +030025#include "core.h"
26#include "cfg80211.h"
27#include "target.h"
28#include "debug.h"
29#include "hif-ops.h"
30
Kalle Valo856f4b312011-11-14 19:30:29 +020031static const struct ath6kl_hw hw_list[] = {
32 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +020033 .id = AR6003_HW_2_0_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020034 .name = "ar6003 hw 2.0",
Kalle Valo856f4b312011-11-14 19:30:29 +020035 .dataset_patch_addr = 0x57e884,
36 .app_load_addr = 0x543180,
37 .board_ext_data_addr = 0x57e500,
38 .reserved_ram_size = 6912,
Ryan Hsu39586bf2011-12-13 17:11:07 +080039 .refclk_hz = 26000000,
40 .uarttx_pin = 8,
Kalle Valo856f4b312011-11-14 19:30:29 +020041
42 /* hw2.0 needs override address hardcoded */
43 .app_start_override_addr = 0x944C00,
Kalle Valod1a94212011-11-14 19:31:23 +020044
Kalle Valoc0038972011-12-16 20:53:31 +020045 .fw = {
46 .dir = AR6003_HW_2_0_FW_DIR,
47 .otp = AR6003_HW_2_0_OTP_FILE,
48 .fw = AR6003_HW_2_0_FIRMWARE_FILE,
49 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
50 .patch = AR6003_HW_2_0_PATCH_FILE,
Kalle Valoc0038972011-12-16 20:53:31 +020051 },
52
Kalle Valod1a94212011-11-14 19:31:23 +020053 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
54 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +020055 },
56 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +020057 .id = AR6003_HW_2_1_1_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020058 .name = "ar6003 hw 2.1.1",
Kalle Valo856f4b312011-11-14 19:30:29 +020059 .dataset_patch_addr = 0x57ff74,
60 .app_load_addr = 0x1234,
61 .board_ext_data_addr = 0x542330,
62 .reserved_ram_size = 512,
Ryan Hsu39586bf2011-12-13 17:11:07 +080063 .refclk_hz = 26000000,
64 .uarttx_pin = 8,
Alex Yangcd23c1c2012-01-17 15:32:29 +020065 .testscript_addr = 0x57ef74,
Kalle Valod1a94212011-11-14 19:31:23 +020066
Kalle Valoc0038972011-12-16 20:53:31 +020067 .fw = {
68 .dir = AR6003_HW_2_1_1_FW_DIR,
69 .otp = AR6003_HW_2_1_1_OTP_FILE,
70 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
71 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
72 .patch = AR6003_HW_2_1_1_PATCH_FILE,
Alex Yangcd23c1c2012-01-17 15:32:29 +020073 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
74 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
Kalle Valoc0038972011-12-16 20:53:31 +020075 },
76
Kalle Valod1a94212011-11-14 19:31:23 +020077 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
78 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +020079 },
80 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +020081 .id = AR6004_HW_1_0_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020082 .name = "ar6004 hw 1.0",
Kalle Valo856f4b312011-11-14 19:30:29 +020083 .dataset_patch_addr = 0x57e884,
84 .app_load_addr = 0x1234,
85 .board_ext_data_addr = 0x437000,
86 .reserved_ram_size = 19456,
Kalle Valo0d4d72b2011-11-14 19:30:39 +020087 .board_addr = 0x433900,
Ryan Hsu39586bf2011-12-13 17:11:07 +080088 .refclk_hz = 26000000,
89 .uarttx_pin = 11,
Kalle Valod1a94212011-11-14 19:31:23 +020090
Kalle Valoc0038972011-12-16 20:53:31 +020091 .fw = {
92 .dir = AR6004_HW_1_0_FW_DIR,
93 .fw = AR6004_HW_1_0_FIRMWARE_FILE,
Kalle Valoc0038972011-12-16 20:53:31 +020094 },
95
Kalle Valod1a94212011-11-14 19:31:23 +020096 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
97 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +020098 },
99 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +0200100 .id = AR6004_HW_1_1_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +0200101 .name = "ar6004 hw 1.1",
Kalle Valo856f4b312011-11-14 19:30:29 +0200102 .dataset_patch_addr = 0x57e884,
103 .app_load_addr = 0x1234,
104 .board_ext_data_addr = 0x437000,
105 .reserved_ram_size = 11264,
Kalle Valo0d4d72b2011-11-14 19:30:39 +0200106 .board_addr = 0x43d400,
Ryan Hsu39586bf2011-12-13 17:11:07 +0800107 .refclk_hz = 40000000,
108 .uarttx_pin = 11,
Kalle Valod1a94212011-11-14 19:31:23 +0200109
Kalle Valoc0038972011-12-16 20:53:31 +0200110 .fw = {
111 .dir = AR6004_HW_1_1_FW_DIR,
112 .fw = AR6004_HW_1_1_FIRMWARE_FILE,
Kalle Valoc0038972011-12-16 20:53:31 +0200113 },
114
Kalle Valod1a94212011-11-14 19:31:23 +0200115 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
116 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +0200117 },
118};
119
Kalle Valobdcd8172011-07-18 00:22:30 +0300120/*
121 * Include definitions here that can be used to tune the WLAN module
122 * behavior. Different customers can tune the behavior as per their needs,
123 * here.
124 */
125
126/*
127 * This configuration item enable/disable keepalive support.
128 * Keepalive support: In the absence of any data traffic to AP, null
129 * frames will be sent to the AP at periodic interval, to keep the association
130 * active. This configuration item defines the periodic interval.
131 * Use value of zero to disable keepalive support
132 * Default: 60 seconds
133 */
134#define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
135
136/*
137 * This configuration item sets the value of disconnect timeout
138 * Firmware delays sending the disconnec event to the host for this
139 * timeout after is gets disconnected from the current AP.
140 * If the firmware successly roams within the disconnect timeout
141 * it sends a new connect event
142 */
143#define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
144
Kalle Valobdcd8172011-07-18 00:22:30 +0300145
Kalle Valobdcd8172011-07-18 00:22:30 +0300146#define ATH6KL_DATA_OFFSET 64
147struct sk_buff *ath6kl_buf_alloc(int size)
148{
149 struct sk_buff *skb;
150 u16 reserved;
151
152 /* Add chacheline space at front and back of buffer */
153 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
Vasanthakumar Thiagarajan1df94a82011-08-17 18:45:10 +0530154 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
Kalle Valobdcd8172011-07-18 00:22:30 +0300155 skb = dev_alloc_skb(size + reserved);
156
157 if (skb)
158 skb_reserve(skb, reserved - L1_CACHE_BYTES);
159 return skb;
160}
161
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530162void ath6kl_init_profile_info(struct ath6kl_vif *vif)
Kalle Valobdcd8172011-07-18 00:22:30 +0300163{
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +0530164 vif->ssid_len = 0;
165 memset(vif->ssid, 0, sizeof(vif->ssid));
166
167 vif->dot11_auth_mode = OPEN_AUTH;
168 vif->auth_mode = NONE_AUTH;
169 vif->prwise_crypto = NONE_CRYPT;
170 vif->prwise_crypto_len = 0;
171 vif->grp_crypto = NONE_CRYPT;
172 vif->grp_crypto_len = 0;
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +0530173 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
Vasanthakumar Thiagarajan8c8b65e2011-10-25 19:34:04 +0530174 memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
175 memset(vif->bssid, 0, sizeof(vif->bssid));
Vasanthakumar Thiagarajanf74bac52011-10-25 19:34:05 +0530176 vif->bss_ch = 0;
Kalle Valobdcd8172011-07-18 00:22:30 +0300177}
178
Kalle Valobdcd8172011-07-18 00:22:30 +0300179static int ath6kl_set_host_app_area(struct ath6kl *ar)
180{
181 u32 address, data;
182 struct host_app_area host_app_area;
183
184 /* Fetch the address of the host_app_area_s
185 * instance in the host interest area */
186 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
Kevin Fang31024d92011-07-11 17:14:13 +0800187 address = TARG_VTOP(ar->target_type, address);
Kalle Valobdcd8172011-07-18 00:22:30 +0300188
Kalle Valoaddb44b2011-09-02 10:32:05 +0300189 if (ath6kl_diag_read32(ar, address, &data))
Kalle Valobdcd8172011-07-18 00:22:30 +0300190 return -EIO;
191
Kevin Fang31024d92011-07-11 17:14:13 +0800192 address = TARG_VTOP(ar->target_type, data);
Kalle Valocbf49a62011-10-05 12:23:17 +0300193 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
Kalle Valoaddb44b2011-09-02 10:32:05 +0300194 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
195 sizeof(struct host_app_area)))
Kalle Valobdcd8172011-07-18 00:22:30 +0300196 return -EIO;
197
198 return 0;
199}
200
201static inline void set_ac2_ep_map(struct ath6kl *ar,
202 u8 ac,
203 enum htc_endpoint_id ep)
204{
205 ar->ac2ep_map[ac] = ep;
206 ar->ep2ac_map[ep] = ac;
207}
208
209/* connect to a service */
210static int ath6kl_connectservice(struct ath6kl *ar,
211 struct htc_service_connect_req *con_req,
212 char *desc)
213{
214 int status;
215 struct htc_service_connect_resp response;
216
217 memset(&response, 0, sizeof(response));
218
Kalle Vaload226ec2011-08-10 09:49:12 +0300219 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
Kalle Valobdcd8172011-07-18 00:22:30 +0300220 if (status) {
221 ath6kl_err("failed to connect to %s service status:%d\n",
222 desc, status);
223 return status;
224 }
225
226 switch (con_req->svc_id) {
227 case WMI_CONTROL_SVC:
228 if (test_bit(WMI_ENABLED, &ar->flag))
229 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
230 ar->ctrl_ep = response.endpoint;
231 break;
232 case WMI_DATA_BE_SVC:
233 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
234 break;
235 case WMI_DATA_BK_SVC:
236 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
237 break;
238 case WMI_DATA_VI_SVC:
239 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
240 break;
241 case WMI_DATA_VO_SVC:
242 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
243 break;
244 default:
245 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
246 return -EINVAL;
247 }
248
249 return 0;
250}
251
252static int ath6kl_init_service_ep(struct ath6kl *ar)
253{
254 struct htc_service_connect_req connect;
255
256 memset(&connect, 0, sizeof(connect));
257
258 /* these fields are the same for all service endpoints */
259 connect.ep_cb.rx = ath6kl_rx;
260 connect.ep_cb.rx_refill = ath6kl_rx_refill;
261 connect.ep_cb.tx_full = ath6kl_tx_queue_full;
262
263 /*
264 * Set the max queue depth so that our ath6kl_tx_queue_full handler
265 * gets called.
266 */
267 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
268 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
269 if (!connect.ep_cb.rx_refill_thresh)
270 connect.ep_cb.rx_refill_thresh++;
271
272 /* connect to control service */
273 connect.svc_id = WMI_CONTROL_SVC;
274 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
275 return -EIO;
276
277 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
278
279 /*
280 * Limit the HTC message size on the send path, although e can
281 * receive A-MSDU frames of 4K, we will only send ethernet-sized
282 * (802.3) frames on the send path.
283 */
284 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
285
286 /*
287 * To reduce the amount of committed memory for larger A_MSDU
288 * frames, use the recv-alloc threshold mechanism for larger
289 * packets.
290 */
291 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
292 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
293
294 /*
295 * For the remaining data services set the connection flag to
296 * reduce dribbling, if configured to do so.
297 */
298 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
299 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
300 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
301
302 connect.svc_id = WMI_DATA_BE_SVC;
303
304 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
305 return -EIO;
306
307 /* connect to back-ground map this to WMI LOW_PRI */
308 connect.svc_id = WMI_DATA_BK_SVC;
309 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
310 return -EIO;
311
312 /* connect to Video service, map this to to HI PRI */
313 connect.svc_id = WMI_DATA_VI_SVC;
314 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
315 return -EIO;
316
317 /*
318 * Connect to VO service, this is currently not mapped to a WMI
319 * priority stream due to historical reasons. WMI originally
320 * defined 3 priorities over 3 mailboxes We can change this when
321 * WMI is reworked so that priorities are not dependent on
322 * mailboxes.
323 */
324 connect.svc_id = WMI_DATA_VO_SVC;
325 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
326 return -EIO;
327
328 return 0;
329}
330
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530331void ath6kl_init_control_info(struct ath6kl_vif *vif)
Kalle Valobdcd8172011-07-18 00:22:30 +0300332{
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530333 ath6kl_init_profile_info(vif);
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +0530334 vif->def_txkey_index = 0;
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +0530335 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
Vasanthakumar Thiagarajanf74bac52011-10-25 19:34:05 +0530336 vif->ch_hint = 0;
Kalle Valobdcd8172011-07-18 00:22:30 +0300337}
338
339/*
340 * Set HTC/Mbox operational parameters, this can only be called when the
341 * target is in the BMI phase.
342 */
343static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
344 u8 htc_ctrl_buf)
345{
346 int status;
347 u32 blk_size;
348
349 blk_size = ar->mbox_info.block_size;
350
351 if (htc_ctrl_buf)
352 blk_size |= ((u32)htc_ctrl_buf) << 16;
353
354 /* set the host interest area for the block size */
355 status = ath6kl_bmi_write(ar,
356 ath6kl_get_hi_item_addr(ar,
357 HI_ITEM(hi_mbox_io_block_sz)),
358 (u8 *)&blk_size,
359 4);
360 if (status) {
361 ath6kl_err("bmi_write_memory for IO block size failed\n");
362 goto out;
363 }
364
365 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
366 blk_size,
367 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
368
369 if (mbox_isr_yield_val) {
370 /* set the host interest area for the mbox ISR yield limit */
371 status = ath6kl_bmi_write(ar,
372 ath6kl_get_hi_item_addr(ar,
373 HI_ITEM(hi_mbox_isr_yield_limit)),
374 (u8 *)&mbox_isr_yield_val,
375 4);
376 if (status) {
377 ath6kl_err("bmi_write_memory for yield limit failed\n");
378 goto out;
379 }
380 }
381
382out:
383 return status;
384}
385
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530386static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
Kalle Valobdcd8172011-07-18 00:22:30 +0300387{
388 int status = 0;
Jouni Malinen4dea08e2011-08-30 21:57:57 +0300389 int ret;
Kalle Valobdcd8172011-07-18 00:22:30 +0300390
391 /*
392 * Configure the device for rx dot11 header rules. "0,0" are the
393 * default values. Required if checksum offload is needed. Set
394 * RxMetaVersion to 2.
395 */
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530396 if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
Kalle Valobdcd8172011-07-18 00:22:30 +0300397 ar->rx_meta_ver, 0, 0)) {
398 ath6kl_err("unable to set the rx frame format\n");
399 status = -EIO;
400 }
401
402 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530403 if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
Kalle Valobdcd8172011-07-18 00:22:30 +0300404 IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
405 ath6kl_err("unable to set power save fail event policy\n");
406 status = -EIO;
407 }
408
409 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530410 if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
Kalle Valobdcd8172011-07-18 00:22:30 +0300411 WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
412 ath6kl_err("unable to set barker preamble policy\n");
413 status = -EIO;
414 }
415
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530416 if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
Kalle Valo96f1fad2012-03-07 20:03:57 +0200417 WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
Kalle Valobdcd8172011-07-18 00:22:30 +0300418 ath6kl_err("unable to set keep alive interval\n");
419 status = -EIO;
420 }
421
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530422 if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
Kalle Valo96f1fad2012-03-07 20:03:57 +0200423 WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
Kalle Valobdcd8172011-07-18 00:22:30 +0300424 ath6kl_err("unable to set disconnect timeout\n");
425 status = -EIO;
426 }
427
428 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530429 if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
Kalle Valobdcd8172011-07-18 00:22:30 +0300430 ath6kl_err("unable to set txop bursting\n");
431 status = -EIO;
432 }
433
Vasanthakumar Thiagarajanb64de352011-11-18 10:05:28 +0530434 if (ar->p2p && (ar->vif_max == 1 || idx)) {
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530435 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300436 P2P_FLAG_CAPABILITIES_REQ |
437 P2P_FLAG_MACADDR_REQ |
438 P2P_FLAG_HMODEL_REQ);
439 if (ret) {
440 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
441 "capabilities (%d) - assuming P2P not "
442 "supported\n", ret);
Rusty Russell3db1cd52011-12-19 13:56:45 +0000443 ar->p2p = false;
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300444 }
445 }
446
Vasanthakumar Thiagarajanb64de352011-11-18 10:05:28 +0530447 if (ar->p2p && (ar->vif_max == 1 || idx)) {
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300448 /* Enable Probe Request reporting for P2P */
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530449 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300450 if (ret) {
451 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
452 "Request reporting (%d)\n", ret);
453 }
Jouni Malinen4dea08e2011-08-30 21:57:57 +0300454 }
455
Kalle Valobdcd8172011-07-18 00:22:30 +0300456 return status;
457}
458
459int ath6kl_configure_target(struct ath6kl *ar)
460{
461 u32 param, ram_reserved_size;
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530462 u8 fw_iftype, fw_mode = 0, fw_submode = 0;
Ryan Hsu39586bf2011-12-13 17:11:07 +0800463 int i, status;
Kalle Valobdcd8172011-07-18 00:22:30 +0300464
Kalle Valof29af972012-01-17 20:08:56 +0200465 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
Vasanthakumar Thiagarajana10e2f22011-12-29 16:05:38 +0530466 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
467 HI_ITEM(hi_serial_enable)), (u8 *)&param, 4)) {
468 ath6kl_err("bmi_write_memory for uart debug failed\n");
469 return -EIO;
470 }
471
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530472 /*
473 * Note: Even though the firmware interface type is
474 * chosen as BSS_STA for all three interfaces, can
475 * be configured to IBSS/AP as long as the fw submode
476 * remains normal mode (0 - AP, STA and IBSS). But
477 * due to an target assert in firmware only one interface is
478 * configured for now.
479 */
Vasanthakumar Thiagarajandd3751f2011-10-25 19:33:59 +0530480 fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
Kalle Valobdcd8172011-07-18 00:22:30 +0300481
Kalle Valo71f96ee2011-11-14 19:31:30 +0200482 for (i = 0; i < ar->vif_max; i++)
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530483 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
484
485 /*
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530486 * By default, submodes :
487 * vif[0] - AP/STA/IBSS
488 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
489 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530490 */
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530491
492 for (i = 0; i < ar->max_norm_iface; i++)
493 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
494 (i * HI_OPTION_FW_SUBMODE_BITS);
495
Kalle Valo71f96ee2011-11-14 19:31:30 +0200496 for (i = ar->max_norm_iface; i < ar->vif_max; i++)
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530497 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
498 (i * HI_OPTION_FW_SUBMODE_BITS);
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530499
Vasanthakumar Thiagarajanb64de352011-11-18 10:05:28 +0530500 if (ar->p2p && ar->vif_max == 1)
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530501 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530502
Kalle Valobdcd8172011-07-18 00:22:30 +0300503 param = HTC_PROTOCOL_VERSION;
504 if (ath6kl_bmi_write(ar,
505 ath6kl_get_hi_item_addr(ar,
506 HI_ITEM(hi_app_host_interest)),
507 (u8 *)&param, 4) != 0) {
508 ath6kl_err("bmi_write_memory for htc version failed\n");
509 return -EIO;
510 }
511
512 /* set the firmware mode to STA/IBSS/AP */
513 param = 0;
514
515 if (ath6kl_bmi_read(ar,
516 ath6kl_get_hi_item_addr(ar,
517 HI_ITEM(hi_option_flag)),
518 (u8 *)&param, 4) != 0) {
519 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
520 return -EIO;
521 }
522
Kalle Valo71f96ee2011-11-14 19:31:30 +0200523 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530524 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
525 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
526
Kalle Valobdcd8172011-07-18 00:22:30 +0300527 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
528 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
529
530 if (ath6kl_bmi_write(ar,
531 ath6kl_get_hi_item_addr(ar,
532 HI_ITEM(hi_option_flag)),
533 (u8 *)&param,
534 4) != 0) {
535 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
536 return -EIO;
537 }
538
539 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
540
541 /*
542 * Hardcode the address use for the extended board data
543 * Ideally this should be pre-allocate by the OS at boot time
544 * But since it is a new feature and board data is loaded
545 * at init time, we have to workaround this from host.
546 * It is difficult to patch the firmware boot code,
547 * but possible in theory.
548 */
549
Kalle Valo991b27e2011-09-07 10:55:17 +0300550 param = ar->hw.board_ext_data_addr;
551 ram_reserved_size = ar->hw.reserved_ram_size;
Kalle Valobdcd8172011-07-18 00:22:30 +0300552
Kalle Valo991b27e2011-09-07 10:55:17 +0300553 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
554 HI_ITEM(hi_board_ext_data)),
555 (u8 *)&param, 4) != 0) {
556 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
557 return -EIO;
558 }
559
560 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
561 HI_ITEM(hi_end_ram_reserve_sz)),
562 (u8 *)&ram_reserved_size, 4) != 0) {
563 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
564 return -EIO;
Kalle Valobdcd8172011-07-18 00:22:30 +0300565 }
566
567 /* set the block size for the target */
568 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
569 /* use default number of control buffers */
570 return -EIO;
571
Ryan Hsu39586bf2011-12-13 17:11:07 +0800572 /* Configure GPIO AR600x UART */
573 param = ar->hw.uarttx_pin;
574 status = ath6kl_bmi_write(ar,
575 ath6kl_get_hi_item_addr(ar,
576 HI_ITEM(hi_dbg_uart_txpin)),
577 (u8 *)&param, 4);
578 if (status)
579 return status;
580
581 /* Configure target refclk_hz */
582 param = ar->hw.refclk_hz;
583 status = ath6kl_bmi_write(ar,
584 ath6kl_get_hi_item_addr(ar,
585 HI_ITEM(hi_refclk_hz)),
586 (u8 *)&param, 4);
587 if (status)
588 return status;
589
Kalle Valobdcd8172011-07-18 00:22:30 +0300590 return 0;
591}
592
Kalle Valobdcd8172011-07-18 00:22:30 +0300593/* firmware upload */
Kalle Valobdcd8172011-07-18 00:22:30 +0300594static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
595 u8 **fw, size_t *fw_len)
596{
597 const struct firmware *fw_entry;
598 int ret;
599
600 ret = request_firmware(&fw_entry, filename, ar->dev);
601 if (ret)
602 return ret;
603
604 *fw_len = fw_entry->size;
605 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
606
607 if (*fw == NULL)
608 ret = -ENOMEM;
609
610 release_firmware(fw_entry);
611
612 return ret;
613}
614
Sam Leffler92ecbff2011-09-07 10:55:16 +0300615#ifdef CONFIG_OF
Sam Leffler92ecbff2011-09-07 10:55:16 +0300616/*
617 * Check the device tree for a board-id and use it to construct
618 * the pathname to the firmware file. Used (for now) to find a
619 * fallback to the "bdata.bin" file--typically a symlink to the
620 * appropriate board-specific file.
621 */
622static bool check_device_tree(struct ath6kl *ar)
623{
624 static const char *board_id_prop = "atheros,board-id";
625 struct device_node *node;
626 char board_filename[64];
627 const char *board_id;
628 int ret;
629
630 for_each_compatible_node(node, NULL, "atheros,ath6kl") {
631 board_id = of_get_property(node, board_id_prop, NULL);
632 if (board_id == NULL) {
633 ath6kl_warn("No \"%s\" property on %s node.\n",
634 board_id_prop, node->name);
635 continue;
636 }
637 snprintf(board_filename, sizeof(board_filename),
Kalle Valoc0038972011-12-16 20:53:31 +0200638 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
Sam Leffler92ecbff2011-09-07 10:55:16 +0300639
640 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
641 &ar->fw_board_len);
642 if (ret) {
643 ath6kl_err("Failed to get DT board file %s: %d\n",
644 board_filename, ret);
645 continue;
646 }
647 return true;
648 }
649 return false;
650}
651#else
652static bool check_device_tree(struct ath6kl *ar)
653{
654 return false;
655}
656#endif /* CONFIG_OF */
657
Kalle Valobdcd8172011-07-18 00:22:30 +0300658static int ath6kl_fetch_board_file(struct ath6kl *ar)
659{
660 const char *filename;
661 int ret;
662
Kalle Valo772c31e2011-09-07 10:55:16 +0300663 if (ar->fw_board != NULL)
664 return 0;
665
Kalle Valod1a94212011-11-14 19:31:23 +0200666 if (WARN_ON(ar->hw.fw_board == NULL))
667 return -EINVAL;
668
669 filename = ar->hw.fw_board;
Kalle Valobdcd8172011-07-18 00:22:30 +0300670
671 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
672 &ar->fw_board_len);
673 if (ret == 0) {
674 /* managed to get proper board file */
675 return 0;
676 }
677
Sam Leffler92ecbff2011-09-07 10:55:16 +0300678 if (check_device_tree(ar)) {
679 /* got board file from device tree */
680 return 0;
681 }
682
Kalle Valobdcd8172011-07-18 00:22:30 +0300683 /* there was no proper board file, try to use default instead */
684 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
685 filename, ret);
686
Kalle Valod1a94212011-11-14 19:31:23 +0200687 filename = ar->hw.fw_default_board;
Kalle Valobdcd8172011-07-18 00:22:30 +0300688
689 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
690 &ar->fw_board_len);
691 if (ret) {
692 ath6kl_err("Failed to get default board file %s: %d\n",
693 filename, ret);
694 return ret;
695 }
696
697 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
698 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
699
700 return 0;
701}
702
Kalle Valo772c31e2011-09-07 10:55:16 +0300703static int ath6kl_fetch_otp_file(struct ath6kl *ar)
704{
Kalle Valoc0038972011-12-16 20:53:31 +0200705 char filename[100];
Kalle Valo772c31e2011-09-07 10:55:16 +0300706 int ret;
707
708 if (ar->fw_otp != NULL)
709 return 0;
710
Kalle Valoc0038972011-12-16 20:53:31 +0200711 if (ar->hw.fw.otp == NULL) {
Kalle Valod1a94212011-11-14 19:31:23 +0200712 ath6kl_dbg(ATH6KL_DBG_BOOT,
713 "no OTP file configured for this hw\n");
Kalle Valo772c31e2011-09-07 10:55:16 +0300714 return 0;
Kalle Valo772c31e2011-09-07 10:55:16 +0300715 }
716
Kalle Valoc0038972011-12-16 20:53:31 +0200717 snprintf(filename, sizeof(filename), "%s/%s",
718 ar->hw.fw.dir, ar->hw.fw.otp);
Kalle Valod1a94212011-11-14 19:31:23 +0200719
Kalle Valo772c31e2011-09-07 10:55:16 +0300720 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
721 &ar->fw_otp_len);
722 if (ret) {
723 ath6kl_err("Failed to get OTP file %s: %d\n",
724 filename, ret);
725 return ret;
726 }
727
728 return 0;
729}
730
Kalle Valo5f1127f2012-01-24 13:50:16 +0200731static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
732{
733 char filename[100];
734 int ret;
735
736 if (ar->testmode == 0)
737 return 0;
738
739 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
740
741 if (ar->testmode == 2) {
742 if (ar->hw.fw.utf == NULL) {
743 ath6kl_warn("testmode 2 not supported\n");
744 return -EOPNOTSUPP;
745 }
746
747 snprintf(filename, sizeof(filename), "%s/%s",
748 ar->hw.fw.dir, ar->hw.fw.utf);
749 } else {
750 if (ar->hw.fw.tcmd == NULL) {
751 ath6kl_warn("testmode 1 not supported\n");
752 return -EOPNOTSUPP;
753 }
754
755 snprintf(filename, sizeof(filename), "%s/%s",
756 ar->hw.fw.dir, ar->hw.fw.tcmd);
757 }
758
759 set_bit(TESTMODE, &ar->flag);
760
761 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
762 if (ret) {
763 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
764 ar->testmode, filename, ret);
765 return ret;
766 }
767
768 return 0;
769}
770
Kalle Valo772c31e2011-09-07 10:55:16 +0300771static int ath6kl_fetch_fw_file(struct ath6kl *ar)
772{
Kalle Valoc0038972011-12-16 20:53:31 +0200773 char filename[100];
Kalle Valo772c31e2011-09-07 10:55:16 +0300774 int ret;
775
776 if (ar->fw != NULL)
777 return 0;
778
Kalle Valoc0038972011-12-16 20:53:31 +0200779 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
780 if (WARN_ON(ar->hw.fw.fw == NULL))
Kalle Valod1a94212011-11-14 19:31:23 +0200781 return -EINVAL;
782
Kalle Valoc0038972011-12-16 20:53:31 +0200783 snprintf(filename, sizeof(filename), "%s/%s",
784 ar->hw.fw.dir, ar->hw.fw.fw);
Kalle Valo772c31e2011-09-07 10:55:16 +0300785
Kalle Valo772c31e2011-09-07 10:55:16 +0300786 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
787 if (ret) {
788 ath6kl_err("Failed to get firmware file %s: %d\n",
789 filename, ret);
790 return ret;
791 }
792
793 return 0;
794}
795
796static int ath6kl_fetch_patch_file(struct ath6kl *ar)
797{
Kalle Valoc0038972011-12-16 20:53:31 +0200798 char filename[100];
Kalle Valo772c31e2011-09-07 10:55:16 +0300799 int ret;
800
Kalle Valod1a94212011-11-14 19:31:23 +0200801 if (ar->fw_patch != NULL)
Kalle Valo772c31e2011-09-07 10:55:16 +0300802 return 0;
Kalle Valo772c31e2011-09-07 10:55:16 +0300803
Kalle Valoc0038972011-12-16 20:53:31 +0200804 if (ar->hw.fw.patch == NULL)
Kalle Valod1a94212011-11-14 19:31:23 +0200805 return 0;
806
Kalle Valoc0038972011-12-16 20:53:31 +0200807 snprintf(filename, sizeof(filename), "%s/%s",
808 ar->hw.fw.dir, ar->hw.fw.patch);
Kalle Valod1a94212011-11-14 19:31:23 +0200809
810 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
811 &ar->fw_patch_len);
812 if (ret) {
813 ath6kl_err("Failed to get patch file %s: %d\n",
814 filename, ret);
815 return ret;
Kalle Valo772c31e2011-09-07 10:55:16 +0300816 }
817
818 return 0;
819}
820
Alex Yangcd23c1c2012-01-17 15:32:29 +0200821static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
822{
823 char filename[100];
824 int ret;
825
Kalle Valo5f1127f2012-01-24 13:50:16 +0200826 if (ar->testmode != 2)
Alex Yangcd23c1c2012-01-17 15:32:29 +0200827 return 0;
828
829 if (ar->fw_testscript != NULL)
830 return 0;
831
832 if (ar->hw.fw.testscript == NULL)
833 return 0;
834
835 snprintf(filename, sizeof(filename), "%s/%s",
Kalle Valo96f1fad2012-03-07 20:03:57 +0200836 ar->hw.fw.dir, ar->hw.fw.testscript);
Alex Yangcd23c1c2012-01-17 15:32:29 +0200837
838 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
839 &ar->fw_testscript_len);
840 if (ret) {
841 ath6kl_err("Failed to get testscript file %s: %d\n",
Kalle Valo96f1fad2012-03-07 20:03:57 +0200842 filename, ret);
Alex Yangcd23c1c2012-01-17 15:32:29 +0200843 return ret;
844 }
845
846 return 0;
847}
848
Kalle Valo50d41232011-09-07 10:55:17 +0300849static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
Kalle Valo772c31e2011-09-07 10:55:16 +0300850{
851 int ret;
852
Kalle Valo772c31e2011-09-07 10:55:16 +0300853 ret = ath6kl_fetch_otp_file(ar);
854 if (ret)
855 return ret;
856
857 ret = ath6kl_fetch_fw_file(ar);
858 if (ret)
859 return ret;
860
861 ret = ath6kl_fetch_patch_file(ar);
862 if (ret)
863 return ret;
864
Alex Yangcd23c1c2012-01-17 15:32:29 +0200865 ret = ath6kl_fetch_testscript_file(ar);
866 if (ret)
867 return ret;
868
Kalle Valo772c31e2011-09-07 10:55:16 +0300869 return 0;
870}
Kalle Valobdcd8172011-07-18 00:22:30 +0300871
Kalle Valo65a8b4c2011-12-16 20:53:41 +0200872static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
Kalle Valo50d41232011-09-07 10:55:17 +0300873{
874 size_t magic_len, len, ie_len;
875 const struct firmware *fw;
876 struct ath6kl_fw_ie *hdr;
Kalle Valoc0038972011-12-16 20:53:31 +0200877 char filename[100];
Kalle Valo50d41232011-09-07 10:55:17 +0300878 const u8 *data;
Kalle Valo97e04962011-09-12 13:47:34 +0300879 int ret, ie_id, i, index, bit;
Kalle Valo8a137482011-09-07 10:55:17 +0300880 __le32 *val;
Kalle Valo50d41232011-09-07 10:55:17 +0300881
Kalle Valo65a8b4c2011-12-16 20:53:41 +0200882 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
Kalle Valo50d41232011-09-07 10:55:17 +0300883
884 ret = request_firmware(&fw, filename, ar->dev);
885 if (ret)
886 return ret;
887
888 data = fw->data;
889 len = fw->size;
890
891 /* magic also includes the null byte, check that as well */
892 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
893
894 if (len < magic_len) {
895 ret = -EINVAL;
896 goto out;
897 }
898
899 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
900 ret = -EINVAL;
901 goto out;
902 }
903
904 len -= magic_len;
905 data += magic_len;
906
907 /* loop elements */
908 while (len > sizeof(struct ath6kl_fw_ie)) {
909 /* hdr is unaligned! */
910 hdr = (struct ath6kl_fw_ie *) data;
911
912 ie_id = le32_to_cpup(&hdr->id);
913 ie_len = le32_to_cpup(&hdr->len);
914
915 len -= sizeof(*hdr);
916 data += sizeof(*hdr);
917
918 if (len < ie_len) {
919 ret = -EINVAL;
920 goto out;
921 }
922
923 switch (ie_id) {
924 case ATH6KL_FW_IE_OTP_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300925 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
Kalle Valo96f1fad2012-03-07 20:03:57 +0200926 ie_len);
Kalle Valo6bc36432011-09-27 14:31:11 +0300927
Kalle Valo50d41232011-09-07 10:55:17 +0300928 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
929
930 if (ar->fw_otp == NULL) {
931 ret = -ENOMEM;
932 goto out;
933 }
934
935 ar->fw_otp_len = ie_len;
936 break;
937 case ATH6KL_FW_IE_FW_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300938 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
Kalle Valo96f1fad2012-03-07 20:03:57 +0200939 ie_len);
Kalle Valo6bc36432011-09-27 14:31:11 +0300940
Kalle Valo5f1127f2012-01-24 13:50:16 +0200941 /* in testmode we already might have a fw file */
942 if (ar->fw != NULL)
943 break;
944
Kalle Valo50d41232011-09-07 10:55:17 +0300945 ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
946
947 if (ar->fw == NULL) {
948 ret = -ENOMEM;
949 goto out;
950 }
951
952 ar->fw_len = ie_len;
953 break;
954 case ATH6KL_FW_IE_PATCH_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300955 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
Kalle Valo96f1fad2012-03-07 20:03:57 +0200956 ie_len);
Kalle Valo6bc36432011-09-27 14:31:11 +0300957
Kalle Valo50d41232011-09-07 10:55:17 +0300958 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
959
960 if (ar->fw_patch == NULL) {
961 ret = -ENOMEM;
962 goto out;
963 }
964
965 ar->fw_patch_len = ie_len;
966 break;
Kalle Valo8a137482011-09-07 10:55:17 +0300967 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
968 val = (__le32 *) data;
969 ar->hw.reserved_ram_size = le32_to_cpup(val);
Kalle Valo6bc36432011-09-27 14:31:11 +0300970
971 ath6kl_dbg(ATH6KL_DBG_BOOT,
972 "found reserved ram size ie 0x%d\n",
973 ar->hw.reserved_ram_size);
Kalle Valo8a137482011-09-07 10:55:17 +0300974 break;
Kalle Valo97e04962011-09-12 13:47:34 +0300975 case ATH6KL_FW_IE_CAPABILITIES:
Kalle Valo277d90f2011-12-13 14:51:58 +0200976 if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8))
977 break;
978
Kalle Valo6bc36432011-09-27 14:31:11 +0300979 ath6kl_dbg(ATH6KL_DBG_BOOT,
Kalle Valoef548622011-10-01 09:43:09 +0300980 "found firmware capabilities ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300981 ie_len);
982
Kalle Valo97e04962011-09-12 13:47:34 +0300983 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
Kalle Valo277d90f2011-12-13 14:51:58 +0200984 index = i / 8;
Kalle Valo97e04962011-09-12 13:47:34 +0300985 bit = i % 8;
986
987 if (data[index] & (1 << bit))
988 __set_bit(i, ar->fw_capabilities);
989 }
Kalle Valo6bc36432011-09-27 14:31:11 +0300990
991 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
992 ar->fw_capabilities,
993 sizeof(ar->fw_capabilities));
Kalle Valo97e04962011-09-12 13:47:34 +0300994 break;
Kalle Valo1b4304d2011-09-27 11:05:26 +0300995 case ATH6KL_FW_IE_PATCH_ADDR:
996 if (ie_len != sizeof(*val))
997 break;
998
999 val = (__le32 *) data;
1000 ar->hw.dataset_patch_addr = le32_to_cpup(val);
Kalle Valo6bc36432011-09-27 14:31:11 +03001001
1002 ath6kl_dbg(ATH6KL_DBG_BOOT,
Kalle Valo03ef0252011-11-14 19:30:47 +02001003 "found patch address ie 0x%x\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001004 ar->hw.dataset_patch_addr);
Kalle Valo1b4304d2011-09-27 11:05:26 +03001005 break;
Kalle Valo03ef0252011-11-14 19:30:47 +02001006 case ATH6KL_FW_IE_BOARD_ADDR:
1007 if (ie_len != sizeof(*val))
1008 break;
1009
1010 val = (__le32 *) data;
1011 ar->hw.board_addr = le32_to_cpup(val);
1012
1013 ath6kl_dbg(ATH6KL_DBG_BOOT,
1014 "found board address ie 0x%x\n",
1015 ar->hw.board_addr);
1016 break;
Kalle Valo368b1b02011-11-14 19:31:38 +02001017 case ATH6KL_FW_IE_VIF_MAX:
1018 if (ie_len != sizeof(*val))
1019 break;
1020
1021 val = (__le32 *) data;
1022 ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1023 ATH6KL_VIF_MAX);
1024
Vasanthakumar Thiagarajanf1433792011-11-18 10:05:27 +05301025 if (ar->vif_max > 1 && !ar->p2p)
1026 ar->max_norm_iface = 2;
1027
Kalle Valo368b1b02011-11-14 19:31:38 +02001028 ath6kl_dbg(ATH6KL_DBG_BOOT,
1029 "found vif max ie %d\n", ar->vif_max);
1030 break;
Kalle Valo50d41232011-09-07 10:55:17 +03001031 default:
Kalle Valo6bc36432011-09-27 14:31:11 +03001032 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
Kalle Valo50d41232011-09-07 10:55:17 +03001033 le32_to_cpup(&hdr->id));
1034 break;
1035 }
1036
1037 len -= ie_len;
1038 data += ie_len;
1039 };
1040
1041 ret = 0;
1042out:
1043 release_firmware(fw);
1044
1045 return ret;
1046}
1047
Kalle Valo45eaa782012-01-17 20:09:05 +02001048int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
Kalle Valo50d41232011-09-07 10:55:17 +03001049{
1050 int ret;
1051
1052 ret = ath6kl_fetch_board_file(ar);
1053 if (ret)
1054 return ret;
1055
Kalle Valo5f1127f2012-01-24 13:50:16 +02001056 ret = ath6kl_fetch_testmode_file(ar);
1057 if (ret)
1058 return ret;
1059
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001060 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
Kalle Valo6bc36432011-09-27 14:31:11 +03001061 if (ret == 0) {
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001062 ar->fw_api = 3;
1063 goto out;
1064 }
1065
1066 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1067 if (ret == 0) {
1068 ar->fw_api = 2;
1069 goto out;
Kalle Valo6bc36432011-09-27 14:31:11 +03001070 }
Kalle Valo50d41232011-09-07 10:55:17 +03001071
1072 ret = ath6kl_fetch_fw_api1(ar);
1073 if (ret)
1074 return ret;
1075
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001076 ar->fw_api = 1;
1077
1078out:
1079 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
Kalle Valo6bc36432011-09-27 14:31:11 +03001080
Kalle Valo50d41232011-09-07 10:55:17 +03001081 return 0;
1082}
1083
Kalle Valobdcd8172011-07-18 00:22:30 +03001084static int ath6kl_upload_board_file(struct ath6kl *ar)
1085{
1086 u32 board_address, board_ext_address, param;
Kevin Fang31024d92011-07-11 17:14:13 +08001087 u32 board_data_size, board_ext_data_size;
Kalle Valobdcd8172011-07-18 00:22:30 +03001088 int ret;
1089
Kalle Valo772c31e2011-09-07 10:55:16 +03001090 if (WARN_ON(ar->fw_board == NULL))
1091 return -ENOENT;
Kalle Valobdcd8172011-07-18 00:22:30 +03001092
Kevin Fang31024d92011-07-11 17:14:13 +08001093 /*
1094 * Determine where in Target RAM to write Board Data.
1095 * For AR6004, host determine Target RAM address for
1096 * writing board data.
1097 */
Kalle Valo0d4d72b2011-11-14 19:30:39 +02001098 if (ar->hw.board_addr != 0) {
1099 board_address = ar->hw.board_addr;
Kevin Fang31024d92011-07-11 17:14:13 +08001100 ath6kl_bmi_write(ar,
1101 ath6kl_get_hi_item_addr(ar,
1102 HI_ITEM(hi_board_data)),
1103 (u8 *) &board_address, 4);
1104 } else {
1105 ath6kl_bmi_read(ar,
1106 ath6kl_get_hi_item_addr(ar,
1107 HI_ITEM(hi_board_data)),
1108 (u8 *) &board_address, 4);
1109 }
1110
Kalle Valobdcd8172011-07-18 00:22:30 +03001111 /* determine where in target ram to write extended board data */
1112 ath6kl_bmi_read(ar,
1113 ath6kl_get_hi_item_addr(ar,
1114 HI_ITEM(hi_board_ext_data)),
1115 (u8 *) &board_ext_address, 4);
1116
Kalle Valo50e27402011-11-11 12:18:06 +02001117 if (ar->target_type == TARGET_TYPE_AR6003 &&
1118 board_ext_address == 0) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001119 ath6kl_err("Failed to get board file target address.\n");
1120 return -EINVAL;
1121 }
1122
Kevin Fang31024d92011-07-11 17:14:13 +08001123 switch (ar->target_type) {
1124 case TARGET_TYPE_AR6003:
1125 board_data_size = AR6003_BOARD_DATA_SZ;
1126 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
Prasanna Kumarfb1ac2e2012-02-07 14:58:54 -08001127 if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1128 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
Kevin Fang31024d92011-07-11 17:14:13 +08001129 break;
1130 case TARGET_TYPE_AR6004:
1131 board_data_size = AR6004_BOARD_DATA_SZ;
1132 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1133 break;
1134 default:
1135 WARN_ON(1);
1136 return -EINVAL;
1137 break;
1138 }
1139
Kalle Valo50e27402011-11-11 12:18:06 +02001140 if (board_ext_address &&
1141 ar->fw_board_len == (board_data_size + board_ext_data_size)) {
Kevin Fang31024d92011-07-11 17:14:13 +08001142
Kalle Valobdcd8172011-07-18 00:22:30 +03001143 /* write extended board data */
Kalle Valo6bc36432011-09-27 14:31:11 +03001144 ath6kl_dbg(ATH6KL_DBG_BOOT,
1145 "writing extended board data to 0x%x (%d B)\n",
1146 board_ext_address, board_ext_data_size);
1147
Kalle Valobdcd8172011-07-18 00:22:30 +03001148 ret = ath6kl_bmi_write(ar, board_ext_address,
Kevin Fang31024d92011-07-11 17:14:13 +08001149 ar->fw_board + board_data_size,
1150 board_ext_data_size);
Kalle Valobdcd8172011-07-18 00:22:30 +03001151 if (ret) {
1152 ath6kl_err("Failed to write extended board data: %d\n",
1153 ret);
1154 return ret;
1155 }
1156
1157 /* record that extended board data is initialized */
Kevin Fang31024d92011-07-11 17:14:13 +08001158 param = (board_ext_data_size << 16) | 1;
1159
Kalle Valobdcd8172011-07-18 00:22:30 +03001160 ath6kl_bmi_write(ar,
1161 ath6kl_get_hi_item_addr(ar,
1162 HI_ITEM(hi_board_ext_data_config)),
1163 (unsigned char *) &param, 4);
1164 }
1165
Kevin Fang31024d92011-07-11 17:14:13 +08001166 if (ar->fw_board_len < board_data_size) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001167 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1168 ret = -EINVAL;
1169 return ret;
1170 }
1171
Kalle Valo6bc36432011-09-27 14:31:11 +03001172 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1173 board_address, board_data_size);
1174
Kalle Valobdcd8172011-07-18 00:22:30 +03001175 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
Kevin Fang31024d92011-07-11 17:14:13 +08001176 board_data_size);
Kalle Valobdcd8172011-07-18 00:22:30 +03001177
1178 if (ret) {
1179 ath6kl_err("Board file bmi write failed: %d\n", ret);
1180 return ret;
1181 }
1182
1183 /* record the fact that Board Data IS initialized */
1184 param = 1;
1185 ath6kl_bmi_write(ar,
1186 ath6kl_get_hi_item_addr(ar,
1187 HI_ITEM(hi_board_data_initialized)),
1188 (u8 *)&param, 4);
1189
1190 return ret;
1191}
1192
1193static int ath6kl_upload_otp(struct ath6kl *ar)
1194{
Kalle Valobdcd8172011-07-18 00:22:30 +03001195 u32 address, param;
Kalle Valobef26a72011-10-12 09:58:28 +03001196 bool from_hw = false;
Kalle Valobdcd8172011-07-18 00:22:30 +03001197 int ret;
1198
Kalle Valo50e27402011-11-11 12:18:06 +02001199 if (ar->fw_otp == NULL)
1200 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001201
Kalle Valoa01ac412011-09-07 10:55:17 +03001202 address = ar->hw.app_load_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001203
Kalle Valoef548622011-10-01 09:43:09 +03001204 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
Kalle Valo6bc36432011-09-27 14:31:11 +03001205 ar->fw_otp_len);
1206
Kalle Valobdcd8172011-07-18 00:22:30 +03001207 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1208 ar->fw_otp_len);
1209 if (ret) {
1210 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1211 return ret;
1212 }
1213
Kalle Valo639d0b82011-09-12 12:48:09 +03001214 /* read firmware start address */
1215 ret = ath6kl_bmi_read(ar,
1216 ath6kl_get_hi_item_addr(ar,
1217 HI_ITEM(hi_app_start)),
1218 (u8 *) &address, sizeof(address));
1219
1220 if (ret) {
1221 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1222 return ret;
1223 }
1224
Kalle Valobef26a72011-10-12 09:58:28 +03001225 if (ar->hw.app_start_override_addr == 0) {
1226 ar->hw.app_start_override_addr = address;
1227 from_hw = true;
1228 }
Kalle Valo639d0b82011-09-12 12:48:09 +03001229
Kalle Valobef26a72011-10-12 09:58:28 +03001230 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1231 from_hw ? " (from hw)" : "",
Kalle Valo6bc36432011-09-27 14:31:11 +03001232 ar->hw.app_start_override_addr);
1233
Kalle Valobdcd8172011-07-18 00:22:30 +03001234 /* execute the OTP code */
Kalle Valobef26a72011-10-12 09:58:28 +03001235 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1236 ar->hw.app_start_override_addr);
Kalle Valobdcd8172011-07-18 00:22:30 +03001237 param = 0;
Kalle Valobef26a72011-10-12 09:58:28 +03001238 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
Kalle Valobdcd8172011-07-18 00:22:30 +03001239
1240 return ret;
1241}
1242
1243static int ath6kl_upload_firmware(struct ath6kl *ar)
1244{
Kalle Valobdcd8172011-07-18 00:22:30 +03001245 u32 address;
1246 int ret;
1247
Kalle Valo772c31e2011-09-07 10:55:16 +03001248 if (WARN_ON(ar->fw == NULL))
Kalle Valo50e27402011-11-11 12:18:06 +02001249 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001250
Kalle Valoa01ac412011-09-07 10:55:17 +03001251 address = ar->hw.app_load_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001252
Kalle Valoef548622011-10-01 09:43:09 +03001253 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001254 address, ar->fw_len);
1255
Kalle Valobdcd8172011-07-18 00:22:30 +03001256 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1257
1258 if (ret) {
1259 ath6kl_err("Failed to write firmware: %d\n", ret);
1260 return ret;
1261 }
1262
Kevin Fang31024d92011-07-11 17:14:13 +08001263 /*
1264 * Set starting address for firmware
1265 * Don't need to setup app_start override addr on AR6004
1266 */
1267 if (ar->target_type != TARGET_TYPE_AR6004) {
Kalle Valoa01ac412011-09-07 10:55:17 +03001268 address = ar->hw.app_start_override_addr;
Kevin Fang31024d92011-07-11 17:14:13 +08001269 ath6kl_bmi_set_app_start(ar, address);
1270 }
Kalle Valobdcd8172011-07-18 00:22:30 +03001271 return ret;
1272}
1273
1274static int ath6kl_upload_patch(struct ath6kl *ar)
1275{
Kalle Valobdcd8172011-07-18 00:22:30 +03001276 u32 address, param;
1277 int ret;
1278
Kalle Valo50e27402011-11-11 12:18:06 +02001279 if (ar->fw_patch == NULL)
1280 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001281
Kalle Valoa01ac412011-09-07 10:55:17 +03001282 address = ar->hw.dataset_patch_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001283
Kalle Valoef548622011-10-01 09:43:09 +03001284 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001285 address, ar->fw_patch_len);
1286
Kalle Valobdcd8172011-07-18 00:22:30 +03001287 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1288 if (ret) {
1289 ath6kl_err("Failed to write patch file: %d\n", ret);
1290 return ret;
1291 }
1292
1293 param = address;
1294 ath6kl_bmi_write(ar,
1295 ath6kl_get_hi_item_addr(ar,
1296 HI_ITEM(hi_dset_list_head)),
1297 (unsigned char *) &param, 4);
1298
1299 return 0;
1300}
1301
Alex Yangcd23c1c2012-01-17 15:32:29 +02001302static int ath6kl_upload_testscript(struct ath6kl *ar)
1303{
1304 u32 address, param;
1305 int ret;
1306
Kalle Valo5f1127f2012-01-24 13:50:16 +02001307 if (ar->testmode != 2)
Alex Yangcd23c1c2012-01-17 15:32:29 +02001308 return 0;
1309
1310 if (ar->fw_testscript == NULL)
1311 return 0;
1312
1313 address = ar->hw.testscript_addr;
1314
1315 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
Kalle Valo96f1fad2012-03-07 20:03:57 +02001316 address, ar->fw_testscript_len);
Alex Yangcd23c1c2012-01-17 15:32:29 +02001317
1318 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1319 ar->fw_testscript_len);
1320 if (ret) {
1321 ath6kl_err("Failed to write testscript file: %d\n", ret);
1322 return ret;
1323 }
1324
1325 param = address;
1326 ath6kl_bmi_write(ar,
1327 ath6kl_get_hi_item_addr(ar,
1328 HI_ITEM(hi_ota_testscript)),
1329 (unsigned char *) &param, 4);
1330
1331 param = 4096;
1332 ath6kl_bmi_write(ar,
1333 ath6kl_get_hi_item_addr(ar,
1334 HI_ITEM(hi_end_ram_reserve_sz)),
1335 (unsigned char *) &param, 4);
1336
1337 param = 1;
1338 ath6kl_bmi_write(ar,
1339 ath6kl_get_hi_item_addr(ar,
1340 HI_ITEM(hi_test_apps_related)),
1341 (unsigned char *) &param, 4);
1342
1343 return 0;
1344}
1345
Kalle Valobdcd8172011-07-18 00:22:30 +03001346static int ath6kl_init_upload(struct ath6kl *ar)
1347{
1348 u32 param, options, sleep, address;
1349 int status = 0;
1350
Kevin Fang31024d92011-07-11 17:14:13 +08001351 if (ar->target_type != TARGET_TYPE_AR6003 &&
Kalle Valo96f1fad2012-03-07 20:03:57 +02001352 ar->target_type != TARGET_TYPE_AR6004)
Kalle Valobdcd8172011-07-18 00:22:30 +03001353 return -EINVAL;
1354
1355 /* temporarily disable system sleep */
1356 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1357 status = ath6kl_bmi_reg_read(ar, address, &param);
1358 if (status)
1359 return status;
1360
1361 options = param;
1362
1363 param |= ATH6KL_OPTION_SLEEP_DISABLE;
1364 status = ath6kl_bmi_reg_write(ar, address, param);
1365 if (status)
1366 return status;
1367
1368 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1369 status = ath6kl_bmi_reg_read(ar, address, &param);
1370 if (status)
1371 return status;
1372
1373 sleep = param;
1374
1375 param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1376 status = ath6kl_bmi_reg_write(ar, address, param);
1377 if (status)
1378 return status;
1379
1380 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1381 options, sleep);
1382
1383 /* program analog PLL register */
Kevin Fang31024d92011-07-11 17:14:13 +08001384 /* no need to control 40/44MHz clock on AR6004 */
1385 if (ar->target_type != TARGET_TYPE_AR6004) {
1386 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1387 0xF9104001);
Kalle Valobdcd8172011-07-18 00:22:30 +03001388
Kevin Fang31024d92011-07-11 17:14:13 +08001389 if (status)
1390 return status;
Kalle Valobdcd8172011-07-18 00:22:30 +03001391
Kevin Fang31024d92011-07-11 17:14:13 +08001392 /* Run at 80/88MHz by default */
1393 param = SM(CPU_CLOCK_STANDARD, 1);
1394
1395 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1396 status = ath6kl_bmi_reg_write(ar, address, param);
1397 if (status)
1398 return status;
1399 }
Kalle Valobdcd8172011-07-18 00:22:30 +03001400
1401 param = 0;
1402 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1403 param = SM(LPO_CAL_ENABLE, 1);
1404 status = ath6kl_bmi_reg_write(ar, address, param);
1405 if (status)
1406 return status;
1407
1408 /* WAR to avoid SDIO CRC err */
Raja Mani4480bb52012-02-22 12:03:51 +05301409 if (ar->version.target_ver == AR6003_HW_2_0_VERSION ||
1410 ar->version.target_ver == AR6003_HW_2_1_1_VERSION) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001411 ath6kl_err("temporary war to avoid sdio crc error\n");
1412
1413 param = 0x20;
1414
1415 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1416 status = ath6kl_bmi_reg_write(ar, address, param);
1417 if (status)
1418 return status;
1419
1420 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1421 status = ath6kl_bmi_reg_write(ar, address, param);
1422 if (status)
1423 return status;
1424
1425 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1426 status = ath6kl_bmi_reg_write(ar, address, param);
1427 if (status)
1428 return status;
1429
1430 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1431 status = ath6kl_bmi_reg_write(ar, address, param);
1432 if (status)
1433 return status;
1434 }
1435
1436 /* write EEPROM data to Target RAM */
1437 status = ath6kl_upload_board_file(ar);
1438 if (status)
1439 return status;
1440
1441 /* transfer One time Programmable data */
1442 status = ath6kl_upload_otp(ar);
1443 if (status)
1444 return status;
1445
1446 /* Download Target firmware */
1447 status = ath6kl_upload_firmware(ar);
1448 if (status)
1449 return status;
1450
1451 status = ath6kl_upload_patch(ar);
1452 if (status)
1453 return status;
1454
Alex Yangcd23c1c2012-01-17 15:32:29 +02001455 /* Download the test script */
1456 status = ath6kl_upload_testscript(ar);
1457 if (status)
1458 return status;
1459
Kalle Valobdcd8172011-07-18 00:22:30 +03001460 /* Restore system sleep */
1461 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1462 status = ath6kl_bmi_reg_write(ar, address, sleep);
1463 if (status)
1464 return status;
1465
1466 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1467 param = options | 0x20;
1468 status = ath6kl_bmi_reg_write(ar, address, param);
1469 if (status)
1470 return status;
1471
Kalle Valobdcd8172011-07-18 00:22:30 +03001472 return status;
1473}
1474
Kalle Valo45eaa782012-01-17 20:09:05 +02001475int ath6kl_init_hw_params(struct ath6kl *ar)
Kalle Valoa01ac412011-09-07 10:55:17 +03001476{
Kalle Valo1b46dc042012-01-31 21:26:22 +02001477 const struct ath6kl_hw *uninitialized_var(hw);
Kalle Valo856f4b312011-11-14 19:30:29 +02001478 int i;
Kalle Valobef26a72011-10-12 09:58:28 +03001479
Kalle Valo856f4b312011-11-14 19:30:29 +02001480 for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1481 hw = &hw_list[i];
Kalle Valobef26a72011-10-12 09:58:28 +03001482
Kalle Valo856f4b312011-11-14 19:30:29 +02001483 if (hw->id == ar->version.target_ver)
1484 break;
1485 }
1486
1487 if (i == ARRAY_SIZE(hw_list)) {
Kalle Valoa01ac412011-09-07 10:55:17 +03001488 ath6kl_err("Unsupported hardware version: 0x%x\n",
1489 ar->version.target_ver);
1490 return -EINVAL;
1491 }
1492
Kalle Valo856f4b312011-11-14 19:30:29 +02001493 ar->hw = *hw;
1494
Kalle Valo6bc36432011-09-27 14:31:11 +03001495 ath6kl_dbg(ATH6KL_DBG_BOOT,
1496 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1497 ar->version.target_ver, ar->target_type,
1498 ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1499 ath6kl_dbg(ATH6KL_DBG_BOOT,
1500 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1501 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1502 ar->hw.reserved_ram_size);
Ryan Hsu39586bf2011-12-13 17:11:07 +08001503 ath6kl_dbg(ATH6KL_DBG_BOOT,
1504 "refclk_hz %d uarttx_pin %d",
1505 ar->hw.refclk_hz, ar->hw.uarttx_pin);
Kalle Valo6bc36432011-09-27 14:31:11 +03001506
Kalle Valoa01ac412011-09-07 10:55:17 +03001507 return 0;
1508}
1509
Kalle Valo293badf2011-11-14 19:30:54 +02001510static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1511{
1512 switch (type) {
1513 case ATH6KL_HIF_TYPE_SDIO:
1514 return "sdio";
1515 case ATH6KL_HIF_TYPE_USB:
1516 return "usb";
1517 }
1518
1519 return NULL;
1520}
1521
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001522int ath6kl_init_hw_start(struct ath6kl *ar)
Kalle Valo20459ee2011-10-27 18:48:37 +03001523{
1524 long timeleft;
1525 int ret, i;
1526
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001527 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1528
Kalle Valo20459ee2011-10-27 18:48:37 +03001529 ret = ath6kl_hif_power_on(ar);
1530 if (ret)
1531 return ret;
1532
1533 ret = ath6kl_configure_target(ar);
1534 if (ret)
1535 goto err_power_off;
1536
1537 ret = ath6kl_init_upload(ar);
1538 if (ret)
1539 goto err_power_off;
1540
1541 /* Do we need to finish the BMI phase */
1542 /* FIXME: return error from ath6kl_bmi_done() */
1543 if (ath6kl_bmi_done(ar)) {
1544 ret = -EIO;
1545 goto err_power_off;
1546 }
1547
1548 /*
1549 * The reason we have to wait for the target here is that the
1550 * driver layer has to init BMI in order to set the host block
1551 * size.
1552 */
1553 if (ath6kl_htc_wait_target(ar->htc_target)) {
1554 ret = -EIO;
1555 goto err_power_off;
1556 }
1557
1558 if (ath6kl_init_service_ep(ar)) {
1559 ret = -EIO;
1560 goto err_cleanup_scatter;
1561 }
1562
1563 /* setup credit distribution */
1564 ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
1565
1566 /* start HTC */
1567 ret = ath6kl_htc_start(ar->htc_target);
1568 if (ret) {
1569 /* FIXME: call this */
1570 ath6kl_cookie_cleanup(ar);
1571 goto err_cleanup_scatter;
1572 }
1573
1574 /* Wait for Wmi event to be ready */
1575 timeleft = wait_event_interruptible_timeout(ar->event_wq,
1576 test_bit(WMI_READY,
1577 &ar->flag),
1578 WMI_TIMEOUT);
1579
1580 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1581
Kalle Valo293badf2011-11-14 19:30:54 +02001582
1583 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001584 ath6kl_info("%s %s fw %s api %d%s\n",
Kalle Valo293badf2011-11-14 19:30:54 +02001585 ar->hw.name,
1586 ath6kl_init_get_hif_name(ar->hif_type),
1587 ar->wiphy->fw_version,
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001588 ar->fw_api,
Kalle Valo293badf2011-11-14 19:30:54 +02001589 test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1590 }
1591
Kalle Valo20459ee2011-10-27 18:48:37 +03001592 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1593 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1594 ATH6KL_ABI_VERSION, ar->version.abi_ver);
1595 ret = -EIO;
1596 goto err_htc_stop;
1597 }
1598
1599 if (!timeleft || signal_pending(current)) {
1600 ath6kl_err("wmi is not ready or wait was interrupted\n");
1601 ret = -EIO;
1602 goto err_htc_stop;
1603 }
1604
1605 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1606
1607 /* communicate the wmi protocol verision to the target */
1608 /* FIXME: return error */
1609 if ((ath6kl_set_host_app_area(ar)) != 0)
1610 ath6kl_err("unable to set the host app area\n");
1611
Kalle Valo71f96ee2011-11-14 19:31:30 +02001612 for (i = 0; i < ar->vif_max; i++) {
Kalle Valo20459ee2011-10-27 18:48:37 +03001613 ret = ath6kl_target_config_wlan_params(ar, i);
1614 if (ret)
1615 goto err_htc_stop;
1616 }
1617
Kalle Valo76a9fbe2011-11-01 08:44:28 +02001618 ar->state = ATH6KL_STATE_ON;
1619
Kalle Valo20459ee2011-10-27 18:48:37 +03001620 return 0;
1621
1622err_htc_stop:
1623 ath6kl_htc_stop(ar->htc_target);
1624err_cleanup_scatter:
1625 ath6kl_hif_cleanup_scatter(ar);
1626err_power_off:
1627 ath6kl_hif_power_off(ar);
1628
1629 return ret;
1630}
1631
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001632int ath6kl_init_hw_stop(struct ath6kl *ar)
1633{
1634 int ret;
1635
1636 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1637
1638 ath6kl_htc_stop(ar->htc_target);
1639
1640 ath6kl_hif_stop(ar);
1641
1642 ath6kl_bmi_reset(ar);
1643
1644 ret = ath6kl_hif_power_off(ar);
1645 if (ret)
1646 ath6kl_warn("failed to power off hif: %d\n", ret);
1647
Kalle Valo76a9fbe2011-11-01 08:44:28 +02001648 ar->state = ATH6KL_STATE_OFF;
1649
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001650 return 0;
1651}
1652
Kalle Valoc25889e2012-01-17 20:08:27 +02001653/* FIXME: move this to cfg80211.c and rename to ath6kl_cfg80211_vif_stop() */
Vasanthakumar Thiagarajan55055972011-10-25 19:34:23 +05301654void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301655{
1656 static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
1657 bool discon_issued;
1658
1659 netif_stop_queue(vif->ndev);
1660
1661 clear_bit(WLAN_ENABLED, &vif->flags);
1662
1663 if (wmi_ready) {
1664 discon_issued = test_bit(CONNECTED, &vif->flags) ||
1665 test_bit(CONNECT_PEND, &vif->flags);
1666 ath6kl_disconnect(vif);
1667 del_timer(&vif->disconnect_timer);
1668
1669 if (discon_issued)
1670 ath6kl_disconnect_event(vif, DISCONNECT_CMD,
1671 (vif->nw_type & AP_NETWORK) ?
1672 bcast_mac : vif->bssid,
1673 0, NULL, 0);
1674 }
1675
1676 if (vif->scan_req) {
1677 cfg80211_scan_done(vif->scan_req, true);
1678 vif->scan_req = NULL;
1679 }
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301680}
1681
Kalle Valobdcd8172011-07-18 00:22:30 +03001682void ath6kl_stop_txrx(struct ath6kl *ar)
1683{
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301684 struct ath6kl_vif *vif, *tmp_vif;
Vasanthakumar Thiagarajan1d2a4452012-01-21 15:22:53 +05301685 int i;
Kalle Valobdcd8172011-07-18 00:22:30 +03001686
1687 set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1688
1689 if (down_interruptible(&ar->sem)) {
1690 ath6kl_err("down_interruptible failed\n");
1691 return;
1692 }
1693
Vasanthakumar Thiagarajan1d2a4452012-01-21 15:22:53 +05301694 for (i = 0; i < AP_MAX_NUM_STA; i++)
1695 aggr_reset_state(ar->sta_list[i].aggr_conn);
1696
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301697 spin_lock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301698 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1699 list_del(&vif->list);
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301700 spin_unlock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301701 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
Vasanthakumar Thiagarajan27929722011-10-25 19:34:21 +05301702 rtnl_lock();
Kalle Valoc25889e2012-01-17 20:08:27 +02001703 ath6kl_cfg80211_vif_cleanup(vif);
Vasanthakumar Thiagarajan27929722011-10-25 19:34:21 +05301704 rtnl_unlock();
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301705 spin_lock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301706 }
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301707 spin_unlock_bh(&ar->list_lock);
Kalle Valobdcd8172011-07-18 00:22:30 +03001708
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301709 clear_bit(WMI_READY, &ar->flag);
Kalle Valobdcd8172011-07-18 00:22:30 +03001710
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301711 /*
1712 * After wmi_shudown all WMI events will be dropped. We
1713 * need to cleanup the buffers allocated in AP mode and
1714 * give disconnect notification to stack, which usually
1715 * happens in the disconnect_event. Simulate the disconnect
1716 * event by calling the function directly. Sometimes
1717 * disconnect_event will be received when the debug logs
1718 * are collected.
1719 */
1720 ath6kl_wmi_shutdown(ar->wmi);
Kalle Valobdcd8172011-07-18 00:22:30 +03001721
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301722 clear_bit(WMI_ENABLED, &ar->flag);
1723 if (ar->htc_target) {
1724 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1725 ath6kl_htc_stop(ar->htc_target);
Kalle Valobdcd8172011-07-18 00:22:30 +03001726 }
1727
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301728 /*
1729 * Try to reset the device if we can. The driver may have been
1730 * configure NOT to reset the target during a debug session.
1731 */
1732 ath6kl_dbg(ATH6KL_DBG_TRC,
Kalle Valo96f1fad2012-03-07 20:03:57 +02001733 "attempting to reset target on instance destroy\n");
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301734 ath6kl_reset_device(ar, ar->target_type, true, true);
Kalle Valobdcd8172011-07-18 00:22:30 +03001735
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301736 clear_bit(WLAN_ENABLED, &ar->flag);
Vasanthakumar Thiagarajane8ad9a02012-02-14 20:32:59 +05301737
1738 up(&ar->sem);
Kalle Valobdcd8172011-07-18 00:22:30 +03001739}
Kalle Valod6a434d2012-01-17 20:09:36 +02001740EXPORT_SYMBOL(ath6kl_stop_txrx);