blob: a9a066a18ccfd3e8d247bd8fb1dc4b20f1e6f039 [file] [log] [blame]
Sergey Matyukevich918d7b72009-06-19 08:27:40 +04001/*
2 * PATA driver for AT91SAM9260 Static Memory Controller
3 * with CompactFlash interface in True IDE mode
4 *
5 * Copyright (C) 2009 Matyukevich Sergey
6 *
7 * Based on:
8 * * generic platform driver by Paul Mundt: drivers/ata/pata_platform.c
9 * * pata_at32 driver by Kristoffer Nyborg Gregertsen
10 * * at91_ide driver by Stanislaw Gruszka
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License version 2
14 * as published by the Free Software Foundation.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/blkdev.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090022#include <linux/gfp.h>
Sergey Matyukevich918d7b72009-06-19 08:27:40 +040023#include <scsi/scsi_host.h>
24#include <linux/ata.h>
25#include <linux/clk.h>
26#include <linux/libata.h>
27#include <linux/platform_device.h>
28#include <linux/ata_platform.h>
29
Sergey Matyukevich918d7b72009-06-19 08:27:40 +040030#include <mach/at91sam9_smc.h>
Sergey Matyukevich918d7b72009-06-19 08:27:40 +040031#include <mach/board.h>
32#include <mach/gpio.h>
33
34
35#define DRV_NAME "pata_at91"
Igor Plyatov9719b8f2011-03-28 16:56:15 +040036#define DRV_VERSION "0.2"
Sergey Matyukevich918d7b72009-06-19 08:27:40 +040037
38#define CF_IDE_OFFSET 0x00c00000
39#define CF_ALT_IDE_OFFSET 0x00e00000
40#define CF_IDE_RES_SIZE 0x08
Igor Plyatov9719b8f2011-03-28 16:56:15 +040041#define NCS_RD_PULSE_LIMIT 0x3f /* maximal value for pulse bitfields */
Sergey Matyukevich918d7b72009-06-19 08:27:40 +040042
43struct at91_ide_info {
44 unsigned long mode;
45 unsigned int cs;
46
Sergey Matyukevich7d084d92009-07-16 22:38:55 +040047 struct clk *mck;
48
Sergey Matyukevich918d7b72009-06-19 08:27:40 +040049 void __iomem *ide_addr;
50 void __iomem *alt_addr;
51};
52
Sergey Matyukevich7d084d92009-07-16 22:38:55 +040053static const struct ata_timing initial_timing =
Sergey Matyukevich918d7b72009-06-19 08:27:40 +040054 {XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0};
55
Sergey Matyukevich7d084d92009-07-16 22:38:55 +040056static unsigned long calc_mck_cycles(unsigned long ns, unsigned long mck_hz)
Sergey Matyukevich918d7b72009-06-19 08:27:40 +040057{
58 unsigned long mul;
59
Sergey Matyukevich7d084d92009-07-16 22:38:55 +040060 /*
61 * cycles = x [nsec] * f [Hz] / 10^9 [ns in sec] =
62 * x * (f / 1_000_000_000) =
63 * x * ((f * 65536) / 1_000_000_000) / 65536 =
64 * x * (((f / 10_000) * 65536) / 100_000) / 65536 =
65 */
Sergey Matyukevich918d7b72009-06-19 08:27:40 +040066
Sergey Matyukevich7d084d92009-07-16 22:38:55 +040067 mul = (mck_hz / 10000) << 16;
68 mul /= 100000;
Sergey Matyukevich918d7b72009-06-19 08:27:40 +040069
Sergey Matyukevich7d084d92009-07-16 22:38:55 +040070 return (ns * mul + 65536) >> 16; /* rounding */
Sergey Matyukevich918d7b72009-06-19 08:27:40 +040071}
72
73static void set_smc_mode(struct at91_ide_info *info)
74{
Sergey Matyukevich7d084d92009-07-16 22:38:55 +040075 at91_sys_write(AT91_SMC_MODE(info->cs), info->mode);
76 return;
Sergey Matyukevich918d7b72009-06-19 08:27:40 +040077}
78
79static void set_smc_timing(struct device *dev,
80 struct at91_ide_info *info, const struct ata_timing *ata)
81{
Sergey Matyukevich7d084d92009-07-16 22:38:55 +040082 unsigned long read_cycle, write_cycle, active, recover;
83 unsigned long nrd_setup, nrd_pulse, nrd_recover;
84 unsigned long nwe_setup, nwe_pulse;
Sergey Matyukevich918d7b72009-06-19 08:27:40 +040085
Sergey Matyukevich7d084d92009-07-16 22:38:55 +040086 unsigned long ncs_write_setup, ncs_write_pulse;
87 unsigned long ncs_read_setup, ncs_read_pulse;
Sergey Matyukevich918d7b72009-06-19 08:27:40 +040088
Sergey Matyukevich7d084d92009-07-16 22:38:55 +040089 unsigned long mck_hz;
Sergey Matyukevich918d7b72009-06-19 08:27:40 +040090
91 read_cycle = ata->cyc8b;
92 nrd_setup = ata->setup;
93 nrd_pulse = ata->act8b;
94 nrd_recover = ata->rec8b;
95
Sergey Matyukevich7d084d92009-07-16 22:38:55 +040096 mck_hz = clk_get_rate(info->mck);
Sergey Matyukevich918d7b72009-06-19 08:27:40 +040097
98 read_cycle = calc_mck_cycles(read_cycle, mck_hz);
99 nrd_setup = calc_mck_cycles(nrd_setup, mck_hz);
100 nrd_pulse = calc_mck_cycles(nrd_pulse, mck_hz);
101 nrd_recover = calc_mck_cycles(nrd_recover, mck_hz);
102
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400103 active = nrd_setup + nrd_pulse;
104 recover = read_cycle - active;
105
106 /* Need at least two cycles recovery */
107 if (recover < 2)
108 read_cycle = active + 2;
109
110 /* (CS0, CS1, DIR, OE) <= (CFCE1, CFCE2, CFRNW, NCSX) timings */
111 ncs_read_setup = 1;
112 ncs_read_pulse = read_cycle - 2;
Igor Plyatov9719b8f2011-03-28 16:56:15 +0400113 if (ncs_read_pulse > NCS_RD_PULSE_LIMIT) {
114 ncs_read_pulse = NCS_RD_PULSE_LIMIT;
115 dev_warn(dev, "ncs_read_pulse limited to maximal value %lu\n",
116 ncs_read_pulse);
117 }
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400118
119 /* Write timings same as read timings */
120 write_cycle = read_cycle;
121 nwe_setup = nrd_setup;
122 nwe_pulse = nrd_pulse;
123 ncs_write_setup = ncs_read_setup;
124 ncs_write_pulse = ncs_read_pulse;
125
Sergey Matyukevich7d084d92009-07-16 22:38:55 +0400126 dev_dbg(dev, "ATA timings: nrd_setup = %lu nrd_pulse = %lu nrd_cycle = %lu\n",
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400127 nrd_setup, nrd_pulse, read_cycle);
Sergey Matyukevich7d084d92009-07-16 22:38:55 +0400128 dev_dbg(dev, "ATA timings: nwe_setup = %lu nwe_pulse = %lu nwe_cycle = %lu\n",
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400129 nwe_setup, nwe_pulse, write_cycle);
Sergey Matyukevich7d084d92009-07-16 22:38:55 +0400130 dev_dbg(dev, "ATA timings: ncs_read_setup = %lu ncs_read_pulse = %lu\n",
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400131 ncs_read_setup, ncs_read_pulse);
Sergey Matyukevich7d084d92009-07-16 22:38:55 +0400132 dev_dbg(dev, "ATA timings: ncs_write_setup = %lu ncs_write_pulse = %lu\n",
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400133 ncs_write_setup, ncs_write_pulse);
134
135 at91_sys_write(AT91_SMC_SETUP(info->cs),
136 AT91_SMC_NWESETUP_(nwe_setup) |
137 AT91_SMC_NRDSETUP_(nrd_setup) |
138 AT91_SMC_NCS_WRSETUP_(ncs_write_setup) |
139 AT91_SMC_NCS_RDSETUP_(ncs_read_setup));
140
141 at91_sys_write(AT91_SMC_PULSE(info->cs),
142 AT91_SMC_NWEPULSE_(nwe_pulse) |
143 AT91_SMC_NRDPULSE_(nrd_pulse) |
144 AT91_SMC_NCS_WRPULSE_(ncs_write_pulse) |
145 AT91_SMC_NCS_RDPULSE_(ncs_read_pulse));
146
147 at91_sys_write(AT91_SMC_CYCLE(info->cs),
148 AT91_SMC_NWECYCLE_(write_cycle) |
149 AT91_SMC_NRDCYCLE_(read_cycle));
150
151 return;
152}
153
154static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
155{
156 struct at91_ide_info *info = ap->host->private_data;
157 struct ata_timing timing;
158 int ret;
159
160 /* Compute ATA timing and set it to SMC */
161 ret = ata_timing_compute(adev, adev->pio_mode, &timing, 1000, 0);
162 if (ret) {
Jeff Garzik429e3862010-02-04 01:09:54 -0500163 dev_warn(ap->dev, "Failed to compute ATA timing %d, "
164 "set PIO_0 timing\n", ret);
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400165 set_smc_timing(ap->dev, info, &initial_timing);
166 } else {
167 set_smc_timing(ap->dev, info, &timing);
168 }
169
170 /* Setup SMC mode */
171 set_smc_mode(info);
172
173 return;
174}
175
176static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
177 unsigned char *buf, unsigned int buflen, int rw)
178{
179 struct at91_ide_info *info = dev->link->ap->host->private_data;
180 unsigned int consumed;
181 unsigned long flags;
182 unsigned int mode;
183
184 local_irq_save(flags);
185 mode = at91_sys_read(AT91_SMC_MODE(info->cs));
186
187 /* set 16bit mode before writing data */
188 at91_sys_write(AT91_SMC_MODE(info->cs),
189 (mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16);
190
191 consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
192
193 /* restore 8bit mode after data is written */
194 at91_sys_write(AT91_SMC_MODE(info->cs),
195 (mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8);
196
197 local_irq_restore(flags);
198 return consumed;
199}
200
201static struct scsi_host_template pata_at91_sht = {
202 ATA_PIO_SHT(DRV_NAME),
203};
204
205static struct ata_port_operations pata_at91_port_ops = {
206 .inherits = &ata_sff_port_ops,
207
208 .sff_data_xfer = pata_at91_data_xfer_noirq,
209 .set_piomode = pata_at91_set_piomode,
210 .cable_detect = ata_cable_40wire,
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400211};
212
213static int __devinit pata_at91_probe(struct platform_device *pdev)
214{
215 struct at91_cf_data *board = pdev->dev.platform_data;
216 struct device *dev = &pdev->dev;
217 struct at91_ide_info *info;
218 struct resource *mem_res;
219 struct ata_host *host;
220 struct ata_port *ap;
Sergey Matyukevich7d084d92009-07-16 22:38:55 +0400221
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400222 int irq_flags = 0;
223 int irq = 0;
224 int ret;
225
226 /* get platform resources: IO/CTL memories and irq/rst pins */
227
228 if (pdev->num_resources != 1) {
229 dev_err(&pdev->dev, "invalid number of resources\n");
230 return -EINVAL;
231 }
232
233 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
234
235 if (!mem_res) {
236 dev_err(dev, "failed to get mem resource\n");
237 return -EINVAL;
238 }
239
240 irq = board->irq_pin;
241
242 /* init ata host */
243
244 host = ata_host_alloc(dev, 1);
245
246 if (!host)
247 return -ENOMEM;
248
249 ap = host->ports[0];
250 ap->ops = &pata_at91_port_ops;
251 ap->flags |= ATA_FLAG_SLAVE_POSS;
252 ap->pio_mask = ATA_PIO4;
253
254 if (!irq) {
255 ap->flags |= ATA_FLAG_PIO_POLLING;
256 ata_port_desc(ap, "no IRQ, using PIO polling");
257 }
258
Tejun Heodf9eba82009-08-07 11:15:20 +0900259 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400260
261 if (!info) {
262 dev_err(dev, "failed to allocate memory for private data\n");
263 return -ENOMEM;
264 }
265
Sergey Matyukevich7d084d92009-07-16 22:38:55 +0400266 info->mck = clk_get(NULL, "mck");
267
268 if (IS_ERR(info->mck)) {
269 dev_err(dev, "failed to get access to mck clock\n");
270 return -ENODEV;
271 }
272
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400273 info->cs = board->chipselect;
274 info->mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
275 AT91_SMC_EXNWMODE_READY | AT91_SMC_BAT_SELECT |
276 AT91_SMC_DBW_8 | AT91_SMC_TDF_(0);
277
278 info->ide_addr = devm_ioremap(dev,
279 mem_res->start + CF_IDE_OFFSET, CF_IDE_RES_SIZE);
280
281 if (!info->ide_addr) {
282 dev_err(dev, "failed to map IO base\n");
283 ret = -ENOMEM;
Tejun Heodf9eba82009-08-07 11:15:20 +0900284 goto err_put;
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400285 }
286
287 info->alt_addr = devm_ioremap(dev,
288 mem_res->start + CF_ALT_IDE_OFFSET, CF_IDE_RES_SIZE);
289
290 if (!info->alt_addr) {
291 dev_err(dev, "failed to map CTL base\n");
292 ret = -ENOMEM;
Tejun Heodf9eba82009-08-07 11:15:20 +0900293 goto err_put;
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400294 }
295
296 ap->ioaddr.cmd_addr = info->ide_addr;
297 ap->ioaddr.ctl_addr = info->alt_addr + 0x06;
298 ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr;
299
300 ata_sff_std_ports(&ap->ioaddr);
301
302 ata_port_desc(ap, "mmio cmd 0x%llx ctl 0x%llx",
303 (unsigned long long)mem_res->start + CF_IDE_OFFSET,
304 (unsigned long long)mem_res->start + CF_ALT_IDE_OFFSET);
305
306 host->private_data = info;
307
308 return ata_host_activate(host, irq ? gpio_to_irq(irq) : 0,
309 irq ? ata_sff_interrupt : NULL,
310 irq_flags, &pata_at91_sht);
311
Tejun Heodf9eba82009-08-07 11:15:20 +0900312err_put:
Sergey Matyukevich7d084d92009-07-16 22:38:55 +0400313 clk_put(info->mck);
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400314 return ret;
315}
316
317static int __devexit pata_at91_remove(struct platform_device *pdev)
318{
319 struct ata_host *host = dev_get_drvdata(&pdev->dev);
Julia Lawall1e1f4212009-07-11 09:49:48 +0200320 struct at91_ide_info *info;
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400321
322 if (!host)
323 return 0;
Julia Lawall1e1f4212009-07-11 09:49:48 +0200324 info = host->private_data;
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400325
326 ata_host_detach(host);
327
328 if (!info)
329 return 0;
330
Sergey Matyukevich7d084d92009-07-16 22:38:55 +0400331 clk_put(info->mck);
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400332
Sergey Matyukevich918d7b72009-06-19 08:27:40 +0400333 return 0;
334}
335
336static struct platform_driver pata_at91_driver = {
337 .probe = pata_at91_probe,
338 .remove = __devexit_p(pata_at91_remove),
339 .driver = {
340 .name = DRV_NAME,
341 .owner = THIS_MODULE,
342 },
343};
344
345static int __init pata_at91_init(void)
346{
347 return platform_driver_register(&pata_at91_driver);
348}
349
350static void __exit pata_at91_exit(void)
351{
352 platform_driver_unregister(&pata_at91_driver);
353}
354
355
356module_init(pata_at91_init);
357module_exit(pata_at91_exit);
358
359
360MODULE_LICENSE("GPL");
361MODULE_DESCRIPTION("Driver for CF in True IDE mode on AT91SAM9260 SoC");
362MODULE_AUTHOR("Matyukevich Sergey");
363MODULE_VERSION(DRV_VERSION);
364