Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 1 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 2 | |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 3 | #include <linux/kernel.h> |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 4 | #include <linux/sched.h> |
| 5 | #include <linux/init.h> |
Paul Gortmaker | 186f436 | 2016-07-13 20:18:56 -0400 | [diff] [blame] | 6 | #include <linux/export.h> |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 7 | #include <linux/timer.h> |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 8 | #include <linux/acpi_pmtmr.h> |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 9 | #include <linux/cpufreq.h> |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 10 | #include <linux/delay.h> |
| 11 | #include <linux/clocksource.h> |
| 12 | #include <linux/percpu.h> |
Arnd Bergmann | 08604bd | 2009-06-16 15:31:12 -0700 | [diff] [blame] | 13 | #include <linux/timex.h> |
Peter Zijlstra | 10b033d | 2013-11-28 19:01:40 +0100 | [diff] [blame] | 14 | #include <linux/static_key.h> |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 15 | |
| 16 | #include <asm/hpet.h> |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 17 | #include <asm/timer.h> |
| 18 | #include <asm/vgtod.h> |
| 19 | #include <asm/time.h> |
| 20 | #include <asm/delay.h> |
Alok Kataria | 88b094f | 2008-10-27 10:41:46 -0700 | [diff] [blame] | 21 | #include <asm/hypervisor.h> |
Thomas Gleixner | 08047c4 | 2009-08-20 16:27:41 +0200 | [diff] [blame] | 22 | #include <asm/nmi.h> |
Thomas Gleixner | 2d82640 | 2009-08-20 17:06:25 +0200 | [diff] [blame] | 23 | #include <asm/x86_init.h> |
David Woodhouse | 03da3ff | 2015-09-16 14:10:03 +0100 | [diff] [blame] | 24 | #include <asm/geode.h> |
Nicolai Stange | 6731b0d | 2016-07-14 17:22:55 +0200 | [diff] [blame] | 25 | #include <asm/apic.h> |
Prarit Bhargava | 655e52d | 2016-09-19 08:51:40 -0400 | [diff] [blame] | 26 | #include <asm/intel-family.h> |
Peter Zijlstra | 653cf76 | 2017-12-22 10:20:11 +0100 | [diff] [blame] | 27 | #include <asm/i8259.h> |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 28 | |
Ingo Molnar | f24ade3a | 2009-03-10 19:02:30 +0100 | [diff] [blame] | 29 | unsigned int __read_mostly cpu_khz; /* TSC clocks / usec, not used here */ |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 30 | EXPORT_SYMBOL(cpu_khz); |
Ingo Molnar | f24ade3a | 2009-03-10 19:02:30 +0100 | [diff] [blame] | 31 | |
| 32 | unsigned int __read_mostly tsc_khz; |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 33 | EXPORT_SYMBOL(tsc_khz); |
| 34 | |
| 35 | /* |
| 36 | * TSC can be unstable due to cpufreq or due to unsynced TSCs |
| 37 | */ |
Ingo Molnar | f24ade3a | 2009-03-10 19:02:30 +0100 | [diff] [blame] | 38 | static int __read_mostly tsc_unstable; |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 39 | |
| 40 | /* native_sched_clock() is called before tsc_init(), so |
| 41 | we must start with the TSC soft disabled to prevent |
Borislav Petkov | 59e21e3 | 2016-04-04 22:24:59 +0200 | [diff] [blame] | 42 | erroneous rdtsc usage on !boot_cpu_has(X86_FEATURE_TSC) processors */ |
Ingo Molnar | f24ade3a | 2009-03-10 19:02:30 +0100 | [diff] [blame] | 43 | static int __read_mostly tsc_disabled = -1; |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 44 | |
Peter Zijlstra | 3bbfafb | 2015-07-24 16:34:32 +0200 | [diff] [blame] | 45 | static DEFINE_STATIC_KEY_FALSE(__use_tsc); |
Peter Zijlstra | 10b033d | 2013-11-28 19:01:40 +0100 | [diff] [blame] | 46 | |
Suresh Siddha | 28a0018 | 2011-11-04 15:42:17 -0700 | [diff] [blame] | 47 | int tsc_clocksource_reliable; |
Peter Zijlstra | 57c67da | 2013-11-29 15:39:25 +0100 | [diff] [blame] | 48 | |
Christopher S. Hall | f9677e0 | 2016-02-29 06:33:47 -0800 | [diff] [blame] | 49 | static u32 art_to_tsc_numerator; |
| 50 | static u32 art_to_tsc_denominator; |
| 51 | static u64 art_to_tsc_offset; |
| 52 | struct clocksource *art_related_clocksource; |
| 53 | |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 54 | /* |
| 55 | * Use a ring-buffer like data structure, where a writer advances the head by |
| 56 | * writing a new data entry and a reader advances the tail when it observes a |
| 57 | * new entry. |
| 58 | * |
| 59 | * Writers are made to wait on readers until there's space to write a new |
| 60 | * entry. |
| 61 | * |
| 62 | * This means that we can always use an {offset, mul} pair to compute a ns |
| 63 | * value that is 'roughly' in the right direction, even if we're writing a new |
| 64 | * {offset, mul} pair during the clock read. |
| 65 | * |
| 66 | * The down-side is that we can no longer guarantee strict monotonicity anymore |
| 67 | * (assuming the TSC was that to begin with), because while we compute the |
| 68 | * intersection point of the two clock slopes and make sure the time is |
| 69 | * continuous at the point of switching; we can no longer guarantee a reader is |
| 70 | * strictly before or after the switch point. |
| 71 | * |
| 72 | * It does mean a reader no longer needs to disable IRQs in order to avoid |
| 73 | * CPU-Freq updates messing with his times, and similarly an NMI reader will |
| 74 | * no longer run the risk of hitting half-written state. |
| 75 | */ |
| 76 | |
| 77 | struct cyc2ns { |
| 78 | struct cyc2ns_data data[2]; /* 0 + 2*24 = 48 */ |
| 79 | struct cyc2ns_data *head; /* 48 + 8 = 56 */ |
| 80 | struct cyc2ns_data *tail; /* 56 + 8 = 64 */ |
| 81 | }; /* exactly fits one cacheline */ |
| 82 | |
| 83 | static DEFINE_PER_CPU_ALIGNED(struct cyc2ns, cyc2ns); |
| 84 | |
| 85 | struct cyc2ns_data *cyc2ns_read_begin(void) |
| 86 | { |
| 87 | struct cyc2ns_data *head; |
| 88 | |
| 89 | preempt_disable(); |
| 90 | |
| 91 | head = this_cpu_read(cyc2ns.head); |
| 92 | /* |
| 93 | * Ensure we observe the entry when we observe the pointer to it. |
| 94 | * matches the wmb from cyc2ns_write_end(). |
| 95 | */ |
| 96 | smp_read_barrier_depends(); |
| 97 | head->__count++; |
| 98 | barrier(); |
| 99 | |
| 100 | return head; |
| 101 | } |
| 102 | |
| 103 | void cyc2ns_read_end(struct cyc2ns_data *head) |
| 104 | { |
| 105 | barrier(); |
| 106 | /* |
| 107 | * If we're the outer most nested read; update the tail pointer |
| 108 | * when we're done. This notifies possible pending writers |
| 109 | * that we've observed the head pointer and that the other |
| 110 | * entry is now free. |
| 111 | */ |
| 112 | if (!--head->__count) { |
| 113 | /* |
| 114 | * x86-TSO does not reorder writes with older reads; |
| 115 | * therefore once this write becomes visible to another |
| 116 | * cpu, we must be finished reading the cyc2ns_data. |
| 117 | * |
| 118 | * matches with cyc2ns_write_begin(). |
| 119 | */ |
| 120 | this_cpu_write(cyc2ns.tail, head); |
| 121 | } |
| 122 | preempt_enable(); |
| 123 | } |
| 124 | |
| 125 | /* |
| 126 | * Begin writing a new @data entry for @cpu. |
| 127 | * |
| 128 | * Assumes some sort of write side lock; currently 'provided' by the assumption |
| 129 | * that cpufreq will call its notifiers sequentially. |
| 130 | */ |
| 131 | static struct cyc2ns_data *cyc2ns_write_begin(int cpu) |
| 132 | { |
| 133 | struct cyc2ns *c2n = &per_cpu(cyc2ns, cpu); |
| 134 | struct cyc2ns_data *data = c2n->data; |
| 135 | |
| 136 | if (data == c2n->head) |
| 137 | data++; |
| 138 | |
| 139 | /* XXX send an IPI to @cpu in order to guarantee a read? */ |
| 140 | |
| 141 | /* |
| 142 | * When we observe the tail write from cyc2ns_read_end(), |
| 143 | * the cpu must be done with that entry and its safe |
| 144 | * to start writing to it. |
| 145 | */ |
| 146 | while (c2n->tail == data) |
| 147 | cpu_relax(); |
| 148 | |
| 149 | return data; |
| 150 | } |
| 151 | |
| 152 | static void cyc2ns_write_end(int cpu, struct cyc2ns_data *data) |
| 153 | { |
| 154 | struct cyc2ns *c2n = &per_cpu(cyc2ns, cpu); |
| 155 | |
| 156 | /* |
| 157 | * Ensure the @data writes are visible before we publish the |
| 158 | * entry. Matches the data-depencency in cyc2ns_read_begin(). |
| 159 | */ |
| 160 | smp_wmb(); |
| 161 | |
| 162 | ACCESS_ONCE(c2n->head) = data; |
| 163 | } |
| 164 | |
| 165 | /* |
| 166 | * Accelerators for sched_clock() |
Peter Zijlstra | 57c67da | 2013-11-29 15:39:25 +0100 | [diff] [blame] | 167 | * convert from cycles(64bits) => nanoseconds (64bits) |
| 168 | * basic equation: |
| 169 | * ns = cycles / (freq / ns_per_sec) |
| 170 | * ns = cycles * (ns_per_sec / freq) |
| 171 | * ns = cycles * (10^9 / (cpu_khz * 10^3)) |
| 172 | * ns = cycles * (10^6 / cpu_khz) |
| 173 | * |
| 174 | * Then we use scaling math (suggested by george@mvista.com) to get: |
| 175 | * ns = cycles * (10^6 * SC / cpu_khz) / SC |
| 176 | * ns = cycles * cyc2ns_scale / SC |
| 177 | * |
| 178 | * And since SC is a constant power of two, we can convert the div |
Adrian Hunter | b20112e | 2015-08-21 12:05:18 +0300 | [diff] [blame] | 179 | * into a shift. The larger SC is, the more accurate the conversion, but |
| 180 | * cyc2ns_scale needs to be a 32-bit value so that 32-bit multiplication |
| 181 | * (64-bit result) can be used. |
Peter Zijlstra | 57c67da | 2013-11-29 15:39:25 +0100 | [diff] [blame] | 182 | * |
Adrian Hunter | b20112e | 2015-08-21 12:05:18 +0300 | [diff] [blame] | 183 | * We can use khz divisor instead of mhz to keep a better precision. |
Peter Zijlstra | 57c67da | 2013-11-29 15:39:25 +0100 | [diff] [blame] | 184 | * (mathieu.desnoyers@polymtl.ca) |
| 185 | * |
| 186 | * -johnstul@us.ibm.com "math is hard, lets go shopping!" |
| 187 | */ |
| 188 | |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 189 | static void cyc2ns_data_init(struct cyc2ns_data *data) |
| 190 | { |
Peter Zijlstra | 5e3c1af | 2014-01-22 22:08:14 +0100 | [diff] [blame] | 191 | data->cyc2ns_mul = 0; |
Adrian Hunter | b20112e | 2015-08-21 12:05:18 +0300 | [diff] [blame] | 192 | data->cyc2ns_shift = 0; |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 193 | data->cyc2ns_offset = 0; |
| 194 | data->__count = 0; |
| 195 | } |
| 196 | |
| 197 | static void cyc2ns_init(int cpu) |
| 198 | { |
| 199 | struct cyc2ns *c2n = &per_cpu(cyc2ns, cpu); |
| 200 | |
| 201 | cyc2ns_data_init(&c2n->data[0]); |
| 202 | cyc2ns_data_init(&c2n->data[1]); |
| 203 | |
| 204 | c2n->head = c2n->data; |
| 205 | c2n->tail = c2n->data; |
| 206 | } |
| 207 | |
Peter Zijlstra | 57c67da | 2013-11-29 15:39:25 +0100 | [diff] [blame] | 208 | static inline unsigned long long cycles_2_ns(unsigned long long cyc) |
| 209 | { |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 210 | struct cyc2ns_data *data, *tail; |
| 211 | unsigned long long ns; |
| 212 | |
| 213 | /* |
| 214 | * See cyc2ns_read_*() for details; replicated in order to avoid |
| 215 | * an extra few instructions that came with the abstraction. |
| 216 | * Notable, it allows us to only do the __count and tail update |
| 217 | * dance when its actually needed. |
| 218 | */ |
| 219 | |
Steven Rostedt | 569d655 | 2014-02-04 14:13:15 -0500 | [diff] [blame] | 220 | preempt_disable_notrace(); |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 221 | data = this_cpu_read(cyc2ns.head); |
| 222 | tail = this_cpu_read(cyc2ns.tail); |
| 223 | |
| 224 | if (likely(data == tail)) { |
| 225 | ns = data->cyc2ns_offset; |
Adrian Hunter | b20112e | 2015-08-21 12:05:18 +0300 | [diff] [blame] | 226 | ns += mul_u64_u32_shr(cyc, data->cyc2ns_mul, data->cyc2ns_shift); |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 227 | } else { |
| 228 | data->__count++; |
| 229 | |
| 230 | barrier(); |
| 231 | |
| 232 | ns = data->cyc2ns_offset; |
Adrian Hunter | b20112e | 2015-08-21 12:05:18 +0300 | [diff] [blame] | 233 | ns += mul_u64_u32_shr(cyc, data->cyc2ns_mul, data->cyc2ns_shift); |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 234 | |
| 235 | barrier(); |
| 236 | |
| 237 | if (!--data->__count) |
| 238 | this_cpu_write(cyc2ns.tail, data); |
| 239 | } |
Steven Rostedt | 569d655 | 2014-02-04 14:13:15 -0500 | [diff] [blame] | 240 | preempt_enable_notrace(); |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 241 | |
Peter Zijlstra | 57c67da | 2013-11-29 15:39:25 +0100 | [diff] [blame] | 242 | return ns; |
| 243 | } |
| 244 | |
Len Brown | aa29729 | 2016-06-17 01:22:51 -0400 | [diff] [blame] | 245 | static void set_cyc2ns_scale(unsigned long khz, int cpu) |
Peter Zijlstra | 57c67da | 2013-11-29 15:39:25 +0100 | [diff] [blame] | 246 | { |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 247 | unsigned long long tsc_now, ns_now; |
| 248 | struct cyc2ns_data *data; |
| 249 | unsigned long flags; |
Peter Zijlstra | 57c67da | 2013-11-29 15:39:25 +0100 | [diff] [blame] | 250 | |
| 251 | local_irq_save(flags); |
| 252 | sched_clock_idle_sleep_event(); |
| 253 | |
Len Brown | aa29729 | 2016-06-17 01:22:51 -0400 | [diff] [blame] | 254 | if (!khz) |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 255 | goto done; |
| 256 | |
| 257 | data = cyc2ns_write_begin(cpu); |
Peter Zijlstra | 57c67da | 2013-11-29 15:39:25 +0100 | [diff] [blame] | 258 | |
Andy Lutomirski | 4ea1636 | 2015-06-25 18:44:07 +0200 | [diff] [blame] | 259 | tsc_now = rdtsc(); |
Peter Zijlstra | 57c67da | 2013-11-29 15:39:25 +0100 | [diff] [blame] | 260 | ns_now = cycles_2_ns(tsc_now); |
| 261 | |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 262 | /* |
| 263 | * Compute a new multiplier as per the above comment and ensure our |
| 264 | * time function is continuous; see the comment near struct |
| 265 | * cyc2ns_data. |
| 266 | */ |
Len Brown | aa29729 | 2016-06-17 01:22:51 -0400 | [diff] [blame] | 267 | clocks_calc_mult_shift(&data->cyc2ns_mul, &data->cyc2ns_shift, khz, |
Adrian Hunter | b20112e | 2015-08-21 12:05:18 +0300 | [diff] [blame] | 268 | NSEC_PER_MSEC, 0); |
| 269 | |
Adrian Hunter | b9511cd | 2015-10-16 16:24:05 +0300 | [diff] [blame] | 270 | /* |
| 271 | * cyc2ns_shift is exported via arch_perf_update_userpage() where it is |
| 272 | * not expected to be greater than 31 due to the original published |
| 273 | * conversion algorithm shifting a 32-bit value (now specifies a 64-bit |
| 274 | * value) - refer perf_event_mmap_page documentation in perf_event.h. |
| 275 | */ |
| 276 | if (data->cyc2ns_shift == 32) { |
| 277 | data->cyc2ns_shift = 31; |
| 278 | data->cyc2ns_mul >>= 1; |
| 279 | } |
| 280 | |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 281 | data->cyc2ns_offset = ns_now - |
Adrian Hunter | b20112e | 2015-08-21 12:05:18 +0300 | [diff] [blame] | 282 | mul_u64_u32_shr(tsc_now, data->cyc2ns_mul, data->cyc2ns_shift); |
Peter Zijlstra | 57c67da | 2013-11-29 15:39:25 +0100 | [diff] [blame] | 283 | |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 284 | cyc2ns_write_end(cpu, data); |
| 285 | |
| 286 | done: |
Peter Zijlstra | 57c67da | 2013-11-29 15:39:25 +0100 | [diff] [blame] | 287 | sched_clock_idle_wakeup_event(0); |
| 288 | local_irq_restore(flags); |
| 289 | } |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 290 | /* |
| 291 | * Scheduler clock - returns current time in nanosec units. |
| 292 | */ |
| 293 | u64 native_sched_clock(void) |
| 294 | { |
Peter Zijlstra | 3bbfafb | 2015-07-24 16:34:32 +0200 | [diff] [blame] | 295 | if (static_branch_likely(&__use_tsc)) { |
| 296 | u64 tsc_now = rdtsc(); |
| 297 | |
| 298 | /* return the value in ns */ |
| 299 | return cycles_2_ns(tsc_now); |
| 300 | } |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 301 | |
| 302 | /* |
| 303 | * Fall back to jiffies if there's no TSC available: |
| 304 | * ( But note that we still use it if the TSC is marked |
| 305 | * unstable. We do this because unlike Time Of Day, |
| 306 | * the scheduler clock tolerates small errors and it's |
| 307 | * very important for it to be as fast as the platform |
Daniel Mack | 3ad2f3f | 2010-02-03 08:01:28 +0800 | [diff] [blame] | 308 | * can achieve it. ) |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 309 | */ |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 310 | |
Peter Zijlstra | 3bbfafb | 2015-07-24 16:34:32 +0200 | [diff] [blame] | 311 | /* No locking but a rare wrong value is not a big deal: */ |
| 312 | return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ); |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 313 | } |
| 314 | |
Andi Kleen | a94cab2 | 2015-05-10 12:22:39 -0700 | [diff] [blame] | 315 | /* |
| 316 | * Generate a sched_clock if you already have a TSC value. |
| 317 | */ |
| 318 | u64 native_sched_clock_from_tsc(u64 tsc) |
| 319 | { |
| 320 | return cycles_2_ns(tsc); |
| 321 | } |
| 322 | |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 323 | /* We need to define a real function for sched_clock, to override the |
| 324 | weak default version */ |
| 325 | #ifdef CONFIG_PARAVIRT |
| 326 | unsigned long long sched_clock(void) |
| 327 | { |
| 328 | return paravirt_sched_clock(); |
| 329 | } |
| 330 | #else |
| 331 | unsigned long long |
| 332 | sched_clock(void) __attribute__((alias("native_sched_clock"))); |
| 333 | #endif |
| 334 | |
| 335 | int check_tsc_unstable(void) |
| 336 | { |
| 337 | return tsc_unstable; |
| 338 | } |
| 339 | EXPORT_SYMBOL_GPL(check_tsc_unstable); |
| 340 | |
| 341 | #ifdef CONFIG_X86_TSC |
| 342 | int __init notsc_setup(char *str) |
| 343 | { |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 344 | pr_warn("Kernel compiled with CONFIG_X86_TSC, cannot disable TSC completely\n"); |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 345 | tsc_disabled = 1; |
| 346 | return 1; |
| 347 | } |
| 348 | #else |
| 349 | /* |
| 350 | * disable flag for tsc. Takes effect by clearing the TSC cpu flag |
| 351 | * in cpu/common.c |
| 352 | */ |
| 353 | int __init notsc_setup(char *str) |
| 354 | { |
| 355 | setup_clear_cpu_cap(X86_FEATURE_TSC); |
| 356 | return 1; |
| 357 | } |
| 358 | #endif |
| 359 | |
| 360 | __setup("notsc", notsc_setup); |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 361 | |
Venkatesh Pallipadi | e82b8e4 | 2010-10-04 17:03:20 -0700 | [diff] [blame] | 362 | static int no_sched_irq_time; |
| 363 | |
Alok Kataria | 395628e | 2008-10-24 17:22:01 -0700 | [diff] [blame] | 364 | static int __init tsc_setup(char *str) |
| 365 | { |
| 366 | if (!strcmp(str, "reliable")) |
| 367 | tsc_clocksource_reliable = 1; |
Venkatesh Pallipadi | e82b8e4 | 2010-10-04 17:03:20 -0700 | [diff] [blame] | 368 | if (!strncmp(str, "noirqtime", 9)) |
| 369 | no_sched_irq_time = 1; |
Peter Zijlstra | c4f8fbc | 2017-04-13 14:56:44 +0200 | [diff] [blame] | 370 | if (!strcmp(str, "unstable")) |
| 371 | mark_tsc_unstable("boot parameter"); |
Alok Kataria | 395628e | 2008-10-24 17:22:01 -0700 | [diff] [blame] | 372 | return 1; |
| 373 | } |
| 374 | |
| 375 | __setup("tsc=", tsc_setup); |
| 376 | |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 377 | #define MAX_RETRIES 5 |
| 378 | #define SMI_TRESHOLD 50000 |
| 379 | |
| 380 | /* |
| 381 | * Read TSC and the reference counters. Take care of SMI disturbance |
| 382 | */ |
Thomas Gleixner | 827014b | 2008-09-04 15:18:53 +0000 | [diff] [blame] | 383 | static u64 tsc_read_refs(u64 *p, int hpet) |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 384 | { |
| 385 | u64 t1, t2; |
| 386 | int i; |
| 387 | |
| 388 | for (i = 0; i < MAX_RETRIES; i++) { |
| 389 | t1 = get_cycles(); |
| 390 | if (hpet) |
Thomas Gleixner | 827014b | 2008-09-04 15:18:53 +0000 | [diff] [blame] | 391 | *p = hpet_readl(HPET_COUNTER) & 0xFFFFFFFF; |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 392 | else |
Thomas Gleixner | 827014b | 2008-09-04 15:18:53 +0000 | [diff] [blame] | 393 | *p = acpi_pm_read_early(); |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 394 | t2 = get_cycles(); |
| 395 | if ((t2 - t1) < SMI_TRESHOLD) |
| 396 | return t2; |
| 397 | } |
| 398 | return ULLONG_MAX; |
| 399 | } |
| 400 | |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame] | 401 | /* |
Thomas Gleixner | d683ef7 | 2008-09-04 15:18:48 +0000 | [diff] [blame] | 402 | * Calculate the TSC frequency from HPET reference |
| 403 | */ |
| 404 | static unsigned long calc_hpet_ref(u64 deltatsc, u64 hpet1, u64 hpet2) |
| 405 | { |
| 406 | u64 tmp; |
| 407 | |
| 408 | if (hpet2 < hpet1) |
| 409 | hpet2 += 0x100000000ULL; |
| 410 | hpet2 -= hpet1; |
| 411 | tmp = ((u64)hpet2 * hpet_readl(HPET_PERIOD)); |
| 412 | do_div(tmp, 1000000); |
Xiaoming Gao | 01eabcd | 2018-04-13 17:48:08 +0800 | [diff] [blame] | 413 | deltatsc = div64_u64(deltatsc, tmp); |
Thomas Gleixner | d683ef7 | 2008-09-04 15:18:48 +0000 | [diff] [blame] | 414 | |
| 415 | return (unsigned long) deltatsc; |
| 416 | } |
| 417 | |
| 418 | /* |
| 419 | * Calculate the TSC frequency from PMTimer reference |
| 420 | */ |
| 421 | static unsigned long calc_pmtimer_ref(u64 deltatsc, u64 pm1, u64 pm2) |
| 422 | { |
| 423 | u64 tmp; |
| 424 | |
| 425 | if (!pm1 && !pm2) |
| 426 | return ULONG_MAX; |
| 427 | |
| 428 | if (pm2 < pm1) |
| 429 | pm2 += (u64)ACPI_PM_OVRRUN; |
| 430 | pm2 -= pm1; |
| 431 | tmp = pm2 * 1000000000LL; |
| 432 | do_div(tmp, PMTMR_TICKS_PER_SEC); |
| 433 | do_div(deltatsc, tmp); |
| 434 | |
| 435 | return (unsigned long) deltatsc; |
| 436 | } |
| 437 | |
Thomas Gleixner | a977c40 | 2008-09-04 15:18:59 +0000 | [diff] [blame] | 438 | #define CAL_MS 10 |
Deepak Saxena | b774397 | 2011-11-01 14:25:07 -0700 | [diff] [blame] | 439 | #define CAL_LATCH (PIT_TICK_RATE / (1000 / CAL_MS)) |
Thomas Gleixner | a977c40 | 2008-09-04 15:18:59 +0000 | [diff] [blame] | 440 | #define CAL_PIT_LOOPS 1000 |
| 441 | |
| 442 | #define CAL2_MS 50 |
Deepak Saxena | b774397 | 2011-11-01 14:25:07 -0700 | [diff] [blame] | 443 | #define CAL2_LATCH (PIT_TICK_RATE / (1000 / CAL2_MS)) |
Thomas Gleixner | a977c40 | 2008-09-04 15:18:59 +0000 | [diff] [blame] | 444 | #define CAL2_PIT_LOOPS 5000 |
| 445 | |
Thomas Gleixner | cce3e05 | 2008-09-04 15:18:44 +0000 | [diff] [blame] | 446 | |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame] | 447 | /* |
| 448 | * Try to calibrate the TSC against the Programmable |
| 449 | * Interrupt Timer and return the frequency of the TSC |
| 450 | * in kHz. |
| 451 | * |
| 452 | * Return ULONG_MAX on failure to calibrate. |
| 453 | */ |
Thomas Gleixner | a977c40 | 2008-09-04 15:18:59 +0000 | [diff] [blame] | 454 | static unsigned long pit_calibrate_tsc(u32 latch, unsigned long ms, int loopmin) |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame] | 455 | { |
| 456 | u64 tsc, t1, t2, delta; |
| 457 | unsigned long tscmin, tscmax; |
| 458 | int pitcnt; |
| 459 | |
Peter Zijlstra | 653cf76 | 2017-12-22 10:20:11 +0100 | [diff] [blame] | 460 | if (!has_legacy_pic()) { |
| 461 | /* |
| 462 | * Relies on tsc_early_delay_calibrate() to have given us semi |
| 463 | * usable udelay(), wait for the same 50ms we would have with |
| 464 | * the PIT loop below. |
| 465 | */ |
| 466 | udelay(10 * USEC_PER_MSEC); |
| 467 | udelay(10 * USEC_PER_MSEC); |
| 468 | udelay(10 * USEC_PER_MSEC); |
| 469 | udelay(10 * USEC_PER_MSEC); |
| 470 | udelay(10 * USEC_PER_MSEC); |
| 471 | return ULONG_MAX; |
| 472 | } |
| 473 | |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame] | 474 | /* Set the Gate high, disable speaker */ |
| 475 | outb((inb(0x61) & ~0x02) | 0x01, 0x61); |
| 476 | |
| 477 | /* |
| 478 | * Setup CTC channel 2* for mode 0, (interrupt on terminal |
| 479 | * count mode), binary count. Set the latch register to 50ms |
| 480 | * (LSB then MSB) to begin countdown. |
| 481 | */ |
| 482 | outb(0xb0, 0x43); |
Thomas Gleixner | a977c40 | 2008-09-04 15:18:59 +0000 | [diff] [blame] | 483 | outb(latch & 0xff, 0x42); |
| 484 | outb(latch >> 8, 0x42); |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame] | 485 | |
| 486 | tsc = t1 = t2 = get_cycles(); |
| 487 | |
| 488 | pitcnt = 0; |
| 489 | tscmax = 0; |
| 490 | tscmin = ULONG_MAX; |
| 491 | while ((inb(0x61) & 0x20) == 0) { |
| 492 | t2 = get_cycles(); |
| 493 | delta = t2 - tsc; |
| 494 | tsc = t2; |
| 495 | if ((unsigned long) delta < tscmin) |
| 496 | tscmin = (unsigned int) delta; |
| 497 | if ((unsigned long) delta > tscmax) |
| 498 | tscmax = (unsigned int) delta; |
| 499 | pitcnt++; |
| 500 | } |
| 501 | |
| 502 | /* |
| 503 | * Sanity checks: |
| 504 | * |
Thomas Gleixner | a977c40 | 2008-09-04 15:18:59 +0000 | [diff] [blame] | 505 | * If we were not able to read the PIT more than loopmin |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame] | 506 | * times, then we have been hit by a massive SMI |
| 507 | * |
| 508 | * If the maximum is 10 times larger than the minimum, |
| 509 | * then we got hit by an SMI as well. |
| 510 | */ |
Thomas Gleixner | a977c40 | 2008-09-04 15:18:59 +0000 | [diff] [blame] | 511 | if (pitcnt < loopmin || tscmax > 10 * tscmin) |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame] | 512 | return ULONG_MAX; |
| 513 | |
| 514 | /* Calculate the PIT value */ |
| 515 | delta = t2 - t1; |
Thomas Gleixner | a977c40 | 2008-09-04 15:18:59 +0000 | [diff] [blame] | 516 | do_div(delta, ms); |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame] | 517 | return delta; |
| 518 | } |
| 519 | |
Linus Torvalds | 6ac40ed | 2008-09-04 10:41:22 -0700 | [diff] [blame] | 520 | /* |
| 521 | * This reads the current MSB of the PIT counter, and |
| 522 | * checks if we are running on sufficiently fast and |
| 523 | * non-virtualized hardware. |
| 524 | * |
| 525 | * Our expectations are: |
| 526 | * |
| 527 | * - the PIT is running at roughly 1.19MHz |
| 528 | * |
| 529 | * - each IO is going to take about 1us on real hardware, |
| 530 | * but we allow it to be much faster (by a factor of 10) or |
| 531 | * _slightly_ slower (ie we allow up to a 2us read+counter |
| 532 | * update - anything else implies a unacceptably slow CPU |
| 533 | * or PIT for the fast calibration to work. |
| 534 | * |
| 535 | * - with 256 PIT ticks to read the value, we have 214us to |
| 536 | * see the same MSB (and overhead like doing a single TSC |
| 537 | * read per MSB value etc). |
| 538 | * |
| 539 | * - We're doing 2 reads per loop (LSB, MSB), and we expect |
| 540 | * them each to take about a microsecond on real hardware. |
| 541 | * So we expect a count value of around 100. But we'll be |
| 542 | * generous, and accept anything over 50. |
| 543 | * |
| 544 | * - if the PIT is stuck, and we see *many* more reads, we |
| 545 | * return early (and the next caller of pit_expect_msb() |
| 546 | * then consider it a failure when they don't see the |
| 547 | * next expected value). |
| 548 | * |
| 549 | * These expectations mean that we know that we have seen the |
| 550 | * transition from one expected value to another with a fairly |
| 551 | * high accuracy, and we didn't miss any events. We can thus |
| 552 | * use the TSC value at the transitions to calculate a pretty |
| 553 | * good value for the TSC frequencty. |
| 554 | */ |
Linus Torvalds | b6e61ee | 2009-07-31 12:45:41 -0700 | [diff] [blame] | 555 | static inline int pit_verify_msb(unsigned char val) |
| 556 | { |
| 557 | /* Ignore LSB */ |
| 558 | inb(0x42); |
| 559 | return inb(0x42) == val; |
| 560 | } |
| 561 | |
Linus Torvalds | 9e8912e | 2009-03-17 08:13:17 -0700 | [diff] [blame] | 562 | static inline int pit_expect_msb(unsigned char val, u64 *tscp, unsigned long *deltap) |
Linus Torvalds | 6ac40ed | 2008-09-04 10:41:22 -0700 | [diff] [blame] | 563 | { |
Linus Torvalds | 9e8912e | 2009-03-17 08:13:17 -0700 | [diff] [blame] | 564 | int count; |
Linus Torvalds | 68f30fb | 2012-01-17 15:35:37 -0800 | [diff] [blame] | 565 | u64 tsc = 0, prev_tsc = 0; |
Linus Torvalds | 6ac40ed | 2008-09-04 10:41:22 -0700 | [diff] [blame] | 566 | |
| 567 | for (count = 0; count < 50000; count++) { |
Linus Torvalds | b6e61ee | 2009-07-31 12:45:41 -0700 | [diff] [blame] | 568 | if (!pit_verify_msb(val)) |
Linus Torvalds | 6ac40ed | 2008-09-04 10:41:22 -0700 | [diff] [blame] | 569 | break; |
Linus Torvalds | 68f30fb | 2012-01-17 15:35:37 -0800 | [diff] [blame] | 570 | prev_tsc = tsc; |
Linus Torvalds | 9e8912e | 2009-03-17 08:13:17 -0700 | [diff] [blame] | 571 | tsc = get_cycles(); |
Linus Torvalds | 6ac40ed | 2008-09-04 10:41:22 -0700 | [diff] [blame] | 572 | } |
Linus Torvalds | 68f30fb | 2012-01-17 15:35:37 -0800 | [diff] [blame] | 573 | *deltap = get_cycles() - prev_tsc; |
Linus Torvalds | 9e8912e | 2009-03-17 08:13:17 -0700 | [diff] [blame] | 574 | *tscp = tsc; |
| 575 | |
| 576 | /* |
| 577 | * We require _some_ success, but the quality control |
| 578 | * will be based on the error terms on the TSC values. |
| 579 | */ |
| 580 | return count > 5; |
Linus Torvalds | 6ac40ed | 2008-09-04 10:41:22 -0700 | [diff] [blame] | 581 | } |
| 582 | |
| 583 | /* |
Linus Torvalds | 9e8912e | 2009-03-17 08:13:17 -0700 | [diff] [blame] | 584 | * How many MSB values do we want to see? We aim for |
| 585 | * a maximum error rate of 500ppm (in practice the |
| 586 | * real error is much smaller), but refuse to spend |
Linus Torvalds | 68f30fb | 2012-01-17 15:35:37 -0800 | [diff] [blame] | 587 | * more than 50ms on it. |
Linus Torvalds | 6ac40ed | 2008-09-04 10:41:22 -0700 | [diff] [blame] | 588 | */ |
Linus Torvalds | 68f30fb | 2012-01-17 15:35:37 -0800 | [diff] [blame] | 589 | #define MAX_QUICK_PIT_MS 50 |
Linus Torvalds | 9e8912e | 2009-03-17 08:13:17 -0700 | [diff] [blame] | 590 | #define MAX_QUICK_PIT_ITERATIONS (MAX_QUICK_PIT_MS * PIT_TICK_RATE / 1000 / 256) |
Linus Torvalds | 6ac40ed | 2008-09-04 10:41:22 -0700 | [diff] [blame] | 591 | |
| 592 | static unsigned long quick_pit_calibrate(void) |
| 593 | { |
Linus Torvalds | 9e8912e | 2009-03-17 08:13:17 -0700 | [diff] [blame] | 594 | int i; |
| 595 | u64 tsc, delta; |
| 596 | unsigned long d1, d2; |
| 597 | |
Peter Zijlstra | 653cf76 | 2017-12-22 10:20:11 +0100 | [diff] [blame] | 598 | if (!has_legacy_pic()) |
| 599 | return 0; |
| 600 | |
Linus Torvalds | 6ac40ed | 2008-09-04 10:41:22 -0700 | [diff] [blame] | 601 | /* Set the Gate high, disable speaker */ |
| 602 | outb((inb(0x61) & ~0x02) | 0x01, 0x61); |
| 603 | |
| 604 | /* |
| 605 | * Counter 2, mode 0 (one-shot), binary count |
| 606 | * |
| 607 | * NOTE! Mode 2 decrements by two (and then the |
| 608 | * output is flipped each time, giving the same |
| 609 | * final output frequency as a decrement-by-one), |
| 610 | * so mode 0 is much better when looking at the |
| 611 | * individual counts. |
| 612 | */ |
| 613 | outb(0xb0, 0x43); |
| 614 | |
| 615 | /* Start at 0xffff */ |
| 616 | outb(0xff, 0x42); |
| 617 | outb(0xff, 0x42); |
| 618 | |
Linus Torvalds | a6a80e1 | 2009-03-17 07:58:26 -0700 | [diff] [blame] | 619 | /* |
| 620 | * The PIT starts counting at the next edge, so we |
| 621 | * need to delay for a microsecond. The easiest way |
| 622 | * to do that is to just read back the 16-bit counter |
| 623 | * once from the PIT. |
| 624 | */ |
Linus Torvalds | b6e61ee | 2009-07-31 12:45:41 -0700 | [diff] [blame] | 625 | pit_verify_msb(0); |
Linus Torvalds | a6a80e1 | 2009-03-17 07:58:26 -0700 | [diff] [blame] | 626 | |
Linus Torvalds | 9e8912e | 2009-03-17 08:13:17 -0700 | [diff] [blame] | 627 | if (pit_expect_msb(0xff, &tsc, &d1)) { |
| 628 | for (i = 1; i <= MAX_QUICK_PIT_ITERATIONS; i++) { |
| 629 | if (!pit_expect_msb(0xff-i, &delta, &d2)) |
| 630 | break; |
Linus Torvalds | 6ac40ed | 2008-09-04 10:41:22 -0700 | [diff] [blame] | 631 | |
Adrian Hunter | 5aac644 | 2015-06-03 10:39:46 +0300 | [diff] [blame] | 632 | delta -= tsc; |
| 633 | |
| 634 | /* |
| 635 | * Extrapolate the error and fail fast if the error will |
| 636 | * never be below 500 ppm. |
| 637 | */ |
| 638 | if (i == 1 && |
| 639 | d1 + d2 >= (delta * MAX_QUICK_PIT_ITERATIONS) >> 11) |
| 640 | return 0; |
| 641 | |
Linus Torvalds | 9e8912e | 2009-03-17 08:13:17 -0700 | [diff] [blame] | 642 | /* |
| 643 | * Iterate until the error is less than 500 ppm |
| 644 | */ |
Linus Torvalds | b6e61ee | 2009-07-31 12:45:41 -0700 | [diff] [blame] | 645 | if (d1+d2 >= delta >> 11) |
| 646 | continue; |
| 647 | |
| 648 | /* |
| 649 | * Check the PIT one more time to verify that |
| 650 | * all TSC reads were stable wrt the PIT. |
| 651 | * |
| 652 | * This also guarantees serialization of the |
| 653 | * last cycle read ('d2') in pit_expect_msb. |
| 654 | */ |
| 655 | if (!pit_verify_msb(0xfe - i)) |
| 656 | break; |
| 657 | goto success; |
Linus Torvalds | 6ac40ed | 2008-09-04 10:41:22 -0700 | [diff] [blame] | 658 | } |
Linus Torvalds | 6ac40ed | 2008-09-04 10:41:22 -0700 | [diff] [blame] | 659 | } |
Alexandre Demers | 5204521 | 2014-12-09 01:27:50 -0500 | [diff] [blame] | 660 | pr_info("Fast TSC calibration failed\n"); |
Linus Torvalds | 6ac40ed | 2008-09-04 10:41:22 -0700 | [diff] [blame] | 661 | return 0; |
Linus Torvalds | 9e8912e | 2009-03-17 08:13:17 -0700 | [diff] [blame] | 662 | |
| 663 | success: |
| 664 | /* |
| 665 | * Ok, if we get here, then we've seen the |
| 666 | * MSB of the PIT decrement 'i' times, and the |
| 667 | * error has shrunk to less than 500 ppm. |
| 668 | * |
| 669 | * As a result, we can depend on there not being |
| 670 | * any odd delays anywhere, and the TSC reads are |
Linus Torvalds | 68f30fb | 2012-01-17 15:35:37 -0800 | [diff] [blame] | 671 | * reliable (within the error). |
Linus Torvalds | 9e8912e | 2009-03-17 08:13:17 -0700 | [diff] [blame] | 672 | * |
| 673 | * kHz = ticks / time-in-seconds / 1000; |
| 674 | * kHz = (t2 - t1) / (I * 256 / PIT_TICK_RATE) / 1000 |
| 675 | * kHz = ((t2 - t1) * PIT_TICK_RATE) / (I * 256 * 1000) |
| 676 | */ |
Linus Torvalds | 9e8912e | 2009-03-17 08:13:17 -0700 | [diff] [blame] | 677 | delta *= PIT_TICK_RATE; |
| 678 | do_div(delta, i*256*1000); |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 679 | pr_info("Fast TSC calibration using PIT\n"); |
Linus Torvalds | 9e8912e | 2009-03-17 08:13:17 -0700 | [diff] [blame] | 680 | return delta; |
Linus Torvalds | 6ac40ed | 2008-09-04 10:41:22 -0700 | [diff] [blame] | 681 | } |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame] | 682 | |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 683 | /** |
Len Brown | aa29729 | 2016-06-17 01:22:51 -0400 | [diff] [blame] | 684 | * native_calibrate_tsc |
| 685 | * Determine TSC frequency via CPUID, else return 0. |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 686 | */ |
Alok Kataria | e93ef94 | 2008-07-01 11:43:36 -0700 | [diff] [blame] | 687 | unsigned long native_calibrate_tsc(void) |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 688 | { |
Len Brown | aa29729 | 2016-06-17 01:22:51 -0400 | [diff] [blame] | 689 | unsigned int eax_denominator, ebx_numerator, ecx_hz, edx; |
| 690 | unsigned int crystal_khz; |
| 691 | |
| 692 | if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) |
| 693 | return 0; |
| 694 | |
| 695 | if (boot_cpu_data.cpuid_level < 0x15) |
| 696 | return 0; |
| 697 | |
| 698 | eax_denominator = ebx_numerator = ecx_hz = edx = 0; |
| 699 | |
| 700 | /* CPUID 15H TSC/Crystal ratio, plus optionally Crystal Hz */ |
| 701 | cpuid(0x15, &eax_denominator, &ebx_numerator, &ecx_hz, &edx); |
| 702 | |
| 703 | if (ebx_numerator == 0 || eax_denominator == 0) |
| 704 | return 0; |
| 705 | |
| 706 | crystal_khz = ecx_hz / 1000; |
| 707 | |
| 708 | if (crystal_khz == 0) { |
| 709 | switch (boot_cpu_data.x86_model) { |
Prarit Bhargava | 655e52d | 2016-09-19 08:51:40 -0400 | [diff] [blame] | 710 | case INTEL_FAM6_SKYLAKE_MOBILE: |
| 711 | case INTEL_FAM6_SKYLAKE_DESKTOP: |
Prarit Bhargava | 6baf3d6 | 2016-09-19 08:51:41 -0400 | [diff] [blame] | 712 | case INTEL_FAM6_KABYLAKE_MOBILE: |
| 713 | case INTEL_FAM6_KABYLAKE_DESKTOP: |
Len Brown | ff4c866 | 2016-06-17 01:22:52 -0400 | [diff] [blame] | 714 | crystal_khz = 24000; /* 24.0 MHz */ |
| 715 | break; |
Len Brown | 28399407 | 2017-01-13 01:11:18 -0500 | [diff] [blame] | 716 | case INTEL_FAM6_ATOM_DENVERTON: |
Prarit Bhargava | 6baf3d6 | 2016-09-19 08:51:41 -0400 | [diff] [blame] | 717 | crystal_khz = 25000; /* 25.0 MHz */ |
| 718 | break; |
Prarit Bhargava | 655e52d | 2016-09-19 08:51:40 -0400 | [diff] [blame] | 719 | case INTEL_FAM6_ATOM_GOLDMONT: |
Len Brown | ff4c866 | 2016-06-17 01:22:52 -0400 | [diff] [blame] | 720 | crystal_khz = 19200; /* 19.2 MHz */ |
| 721 | break; |
Len Brown | aa29729 | 2016-06-17 01:22:51 -0400 | [diff] [blame] | 722 | } |
| 723 | } |
| 724 | |
| 725 | return crystal_khz * ebx_numerator / eax_denominator; |
| 726 | } |
| 727 | |
| 728 | static unsigned long cpu_khz_from_cpuid(void) |
| 729 | { |
| 730 | unsigned int eax_base_mhz, ebx_max_mhz, ecx_bus_mhz, edx; |
| 731 | |
| 732 | if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) |
| 733 | return 0; |
| 734 | |
| 735 | if (boot_cpu_data.cpuid_level < 0x16) |
| 736 | return 0; |
| 737 | |
| 738 | eax_base_mhz = ebx_max_mhz = ecx_bus_mhz = edx = 0; |
| 739 | |
| 740 | cpuid(0x16, &eax_base_mhz, &ebx_max_mhz, &ecx_bus_mhz, &edx); |
| 741 | |
| 742 | return eax_base_mhz * 1000; |
| 743 | } |
| 744 | |
| 745 | /** |
| 746 | * native_calibrate_cpu - calibrate the cpu on boot |
| 747 | */ |
| 748 | unsigned long native_calibrate_cpu(void) |
| 749 | { |
Thomas Gleixner | 827014b | 2008-09-04 15:18:53 +0000 | [diff] [blame] | 750 | u64 tsc1, tsc2, delta, ref1, ref2; |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 751 | unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX; |
Thomas Gleixner | 2d82640 | 2009-08-20 17:06:25 +0200 | [diff] [blame] | 752 | unsigned long flags, latch, ms, fast_calibrate; |
Thomas Gleixner | a977c40 | 2008-09-04 15:18:59 +0000 | [diff] [blame] | 753 | int hpet = is_hpet_enabled(), i, loopmin; |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 754 | |
Len Brown | aa29729 | 2016-06-17 01:22:51 -0400 | [diff] [blame] | 755 | fast_calibrate = cpu_khz_from_cpuid(); |
| 756 | if (fast_calibrate) |
| 757 | return fast_calibrate; |
| 758 | |
Len Brown | 02c0cd2 | 2016-06-17 01:22:50 -0400 | [diff] [blame] | 759 | fast_calibrate = cpu_khz_from_msr(); |
Thomas Gleixner | 5f0e030 | 2014-02-19 13:52:29 +0200 | [diff] [blame] | 760 | if (fast_calibrate) |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 761 | return fast_calibrate; |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 762 | |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 763 | local_irq_save(flags); |
Linus Torvalds | 6ac40ed | 2008-09-04 10:41:22 -0700 | [diff] [blame] | 764 | fast_calibrate = quick_pit_calibrate(); |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 765 | local_irq_restore(flags); |
Linus Torvalds | 6ac40ed | 2008-09-04 10:41:22 -0700 | [diff] [blame] | 766 | if (fast_calibrate) |
| 767 | return fast_calibrate; |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 768 | |
| 769 | /* |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 770 | * Run 5 calibration loops to get the lowest frequency value |
| 771 | * (the best estimate). We use two different calibration modes |
| 772 | * here: |
| 773 | * |
| 774 | * 1) PIT loop. We set the PIT Channel 2 to oneshot mode and |
| 775 | * load a timeout of 50ms. We read the time right after we |
| 776 | * started the timer and wait until the PIT count down reaches |
| 777 | * zero. In each wait loop iteration we read the TSC and check |
| 778 | * the delta to the previous read. We keep track of the min |
| 779 | * and max values of that delta. The delta is mostly defined |
| 780 | * by the IO time of the PIT access, so we can detect when a |
Lucas De Marchi | 0d2eb44 | 2011-03-17 16:24:16 -0300 | [diff] [blame] | 781 | * SMI/SMM disturbance happened between the two reads. If the |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 782 | * maximum time is significantly larger than the minimum time, |
| 783 | * then we discard the result and have another try. |
| 784 | * |
| 785 | * 2) Reference counter. If available we use the HPET or the |
| 786 | * PMTIMER as a reference to check the sanity of that value. |
| 787 | * We use separate TSC readouts and check inside of the |
| 788 | * reference read for a SMI/SMM disturbance. We dicard |
| 789 | * disturbed values here as well. We do that around the PIT |
| 790 | * calibration delay loop as we have to wait for a certain |
| 791 | * amount of time anyway. |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 792 | */ |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 793 | |
Thomas Gleixner | a977c40 | 2008-09-04 15:18:59 +0000 | [diff] [blame] | 794 | /* Preset PIT loop values */ |
| 795 | latch = CAL_LATCH; |
| 796 | ms = CAL_MS; |
| 797 | loopmin = CAL_PIT_LOOPS; |
| 798 | |
| 799 | for (i = 0; i < 3; i++) { |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame] | 800 | unsigned long tsc_pit_khz; |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 801 | |
| 802 | /* |
| 803 | * Read the start value and the reference count of |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame] | 804 | * hpet/pmtimer when available. Then do the PIT |
| 805 | * calibration, which will take at least 50ms, and |
| 806 | * read the end value. |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 807 | */ |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame] | 808 | local_irq_save(flags); |
Thomas Gleixner | 827014b | 2008-09-04 15:18:53 +0000 | [diff] [blame] | 809 | tsc1 = tsc_read_refs(&ref1, hpet); |
Thomas Gleixner | a977c40 | 2008-09-04 15:18:59 +0000 | [diff] [blame] | 810 | tsc_pit_khz = pit_calibrate_tsc(latch, ms, loopmin); |
Thomas Gleixner | 827014b | 2008-09-04 15:18:53 +0000 | [diff] [blame] | 811 | tsc2 = tsc_read_refs(&ref2, hpet); |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 812 | local_irq_restore(flags); |
| 813 | |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame] | 814 | /* Pick the lowest PIT TSC calibration so far */ |
| 815 | tsc_pit_min = min(tsc_pit_min, tsc_pit_khz); |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 816 | |
| 817 | /* hpet or pmtimer available ? */ |
John Stultz | 62627be | 2011-01-14 09:06:28 -0800 | [diff] [blame] | 818 | if (ref1 == ref2) |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 819 | continue; |
| 820 | |
| 821 | /* Check, whether the sampling was disturbed by an SMI */ |
| 822 | if (tsc1 == ULLONG_MAX || tsc2 == ULLONG_MAX) |
| 823 | continue; |
| 824 | |
| 825 | tsc2 = (tsc2 - tsc1) * 1000000LL; |
Thomas Gleixner | d683ef7 | 2008-09-04 15:18:48 +0000 | [diff] [blame] | 826 | if (hpet) |
Thomas Gleixner | 827014b | 2008-09-04 15:18:53 +0000 | [diff] [blame] | 827 | tsc2 = calc_hpet_ref(tsc2, ref1, ref2); |
Thomas Gleixner | d683ef7 | 2008-09-04 15:18:48 +0000 | [diff] [blame] | 828 | else |
Thomas Gleixner | 827014b | 2008-09-04 15:18:53 +0000 | [diff] [blame] | 829 | tsc2 = calc_pmtimer_ref(tsc2, ref1, ref2); |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 830 | |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 831 | tsc_ref_min = min(tsc_ref_min, (unsigned long) tsc2); |
Thomas Gleixner | a977c40 | 2008-09-04 15:18:59 +0000 | [diff] [blame] | 832 | |
| 833 | /* Check the reference deviation */ |
| 834 | delta = ((u64) tsc_pit_min) * 100; |
| 835 | do_div(delta, tsc_ref_min); |
| 836 | |
| 837 | /* |
| 838 | * If both calibration results are inside a 10% window |
| 839 | * then we can be sure, that the calibration |
| 840 | * succeeded. We break out of the loop right away. We |
| 841 | * use the reference value, as it is more precise. |
| 842 | */ |
| 843 | if (delta >= 90 && delta <= 110) { |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 844 | pr_info("PIT calibration matches %s. %d loops\n", |
| 845 | hpet ? "HPET" : "PMTIMER", i + 1); |
Thomas Gleixner | a977c40 | 2008-09-04 15:18:59 +0000 | [diff] [blame] | 846 | return tsc_ref_min; |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 847 | } |
| 848 | |
Thomas Gleixner | a977c40 | 2008-09-04 15:18:59 +0000 | [diff] [blame] | 849 | /* |
| 850 | * Check whether PIT failed more than once. This |
| 851 | * happens in virtualized environments. We need to |
| 852 | * give the virtual PC a slightly longer timeframe for |
| 853 | * the HPET/PMTIMER to make the result precise. |
| 854 | */ |
| 855 | if (i == 1 && tsc_pit_min == ULONG_MAX) { |
| 856 | latch = CAL2_LATCH; |
| 857 | ms = CAL2_MS; |
| 858 | loopmin = CAL2_PIT_LOOPS; |
| 859 | } |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 860 | } |
| 861 | |
| 862 | /* |
| 863 | * Now check the results. |
| 864 | */ |
| 865 | if (tsc_pit_min == ULONG_MAX) { |
| 866 | /* PIT gave no useful value */ |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 867 | pr_warn("Unable to calibrate against PIT\n"); |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 868 | |
| 869 | /* We don't have an alternative source, disable TSC */ |
Thomas Gleixner | 827014b | 2008-09-04 15:18:53 +0000 | [diff] [blame] | 870 | if (!hpet && !ref1 && !ref2) { |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 871 | pr_notice("No reference (HPET/PMTIMER) available\n"); |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 872 | return 0; |
| 873 | } |
| 874 | |
| 875 | /* The alternative source failed as well, disable TSC */ |
| 876 | if (tsc_ref_min == ULONG_MAX) { |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 877 | pr_warn("HPET/PMTIMER calibration failed\n"); |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 878 | return 0; |
| 879 | } |
| 880 | |
| 881 | /* Use the alternative source */ |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 882 | pr_info("using %s reference calibration\n", |
| 883 | hpet ? "HPET" : "PMTIMER"); |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 884 | |
| 885 | return tsc_ref_min; |
| 886 | } |
| 887 | |
| 888 | /* We don't have an alternative source, use the PIT calibration value */ |
Thomas Gleixner | 827014b | 2008-09-04 15:18:53 +0000 | [diff] [blame] | 889 | if (!hpet && !ref1 && !ref2) { |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 890 | pr_info("Using PIT calibration value\n"); |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 891 | return tsc_pit_min; |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 892 | } |
| 893 | |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 894 | /* The alternative source failed, use the PIT calibration value */ |
| 895 | if (tsc_ref_min == ULONG_MAX) { |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 896 | pr_warn("HPET/PMTIMER calibration failed. Using PIT calibration.\n"); |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 897 | return tsc_pit_min; |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 898 | } |
| 899 | |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 900 | /* |
| 901 | * The calibration values differ too much. In doubt, we use |
| 902 | * the PIT value as we know that there are PMTIMERs around |
Thomas Gleixner | a977c40 | 2008-09-04 15:18:59 +0000 | [diff] [blame] | 903 | * running at double speed. At least we let the user know: |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 904 | */ |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 905 | pr_warn("PIT calibration deviates from %s: %lu %lu\n", |
| 906 | hpet ? "HPET" : "PMTIMER", tsc_pit_min, tsc_ref_min); |
| 907 | pr_info("Using PIT calibration value\n"); |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 908 | return tsc_pit_min; |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 909 | } |
| 910 | |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 911 | int recalibrate_cpu_khz(void) |
| 912 | { |
| 913 | #ifndef CONFIG_SMP |
| 914 | unsigned long cpu_khz_old = cpu_khz; |
| 915 | |
Borislav Petkov | eff4677 | 2016-04-05 08:29:53 +0200 | [diff] [blame] | 916 | if (!boot_cpu_has(X86_FEATURE_TSC)) |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 917 | return -ENODEV; |
Borislav Petkov | eff4677 | 2016-04-05 08:29:53 +0200 | [diff] [blame] | 918 | |
Len Brown | aa29729 | 2016-06-17 01:22:51 -0400 | [diff] [blame] | 919 | cpu_khz = x86_platform.calibrate_cpu(); |
Borislav Petkov | eff4677 | 2016-04-05 08:29:53 +0200 | [diff] [blame] | 920 | tsc_khz = x86_platform.calibrate_tsc(); |
Len Brown | aa29729 | 2016-06-17 01:22:51 -0400 | [diff] [blame] | 921 | if (tsc_khz == 0) |
| 922 | tsc_khz = cpu_khz; |
Len Brown | ff4c866 | 2016-06-17 01:22:52 -0400 | [diff] [blame] | 923 | else if (abs(cpu_khz - tsc_khz) * 10 > tsc_khz) |
| 924 | cpu_khz = tsc_khz; |
Borislav Petkov | eff4677 | 2016-04-05 08:29:53 +0200 | [diff] [blame] | 925 | cpu_data(0).loops_per_jiffy = cpufreq_scale(cpu_data(0).loops_per_jiffy, |
| 926 | cpu_khz_old, cpu_khz); |
| 927 | |
| 928 | return 0; |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 929 | #else |
| 930 | return -ENODEV; |
| 931 | #endif |
| 932 | } |
| 933 | |
| 934 | EXPORT_SYMBOL(recalibrate_cpu_khz); |
| 935 | |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 936 | |
Suresh Siddha | cd7240c | 2010-08-19 17:03:38 -0700 | [diff] [blame] | 937 | static unsigned long long cyc2ns_suspend; |
| 938 | |
Marcelo Tosatti | b74f05d | 2012-02-13 11:07:27 -0200 | [diff] [blame] | 939 | void tsc_save_sched_clock_state(void) |
Suresh Siddha | cd7240c | 2010-08-19 17:03:38 -0700 | [diff] [blame] | 940 | { |
Peter Zijlstra | 35af99e | 2013-11-28 19:38:42 +0100 | [diff] [blame] | 941 | if (!sched_clock_stable()) |
Suresh Siddha | cd7240c | 2010-08-19 17:03:38 -0700 | [diff] [blame] | 942 | return; |
| 943 | |
| 944 | cyc2ns_suspend = sched_clock(); |
| 945 | } |
| 946 | |
| 947 | /* |
| 948 | * Even on processors with invariant TSC, TSC gets reset in some the |
| 949 | * ACPI system sleep states. And in some systems BIOS seem to reinit TSC to |
| 950 | * arbitrary value (still sync'd across cpu's) during resume from such sleep |
| 951 | * states. To cope up with this, recompute the cyc2ns_offset for each cpu so |
| 952 | * that sched_clock() continues from the point where it was left off during |
| 953 | * suspend. |
| 954 | */ |
Marcelo Tosatti | b74f05d | 2012-02-13 11:07:27 -0200 | [diff] [blame] | 955 | void tsc_restore_sched_clock_state(void) |
Suresh Siddha | cd7240c | 2010-08-19 17:03:38 -0700 | [diff] [blame] | 956 | { |
| 957 | unsigned long long offset; |
| 958 | unsigned long flags; |
| 959 | int cpu; |
| 960 | |
Peter Zijlstra | 35af99e | 2013-11-28 19:38:42 +0100 | [diff] [blame] | 961 | if (!sched_clock_stable()) |
Suresh Siddha | cd7240c | 2010-08-19 17:03:38 -0700 | [diff] [blame] | 962 | return; |
| 963 | |
| 964 | local_irq_save(flags); |
| 965 | |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 966 | /* |
Adam Buchbinder | 6a6256f | 2016-02-23 15:34:30 -0800 | [diff] [blame] | 967 | * We're coming out of suspend, there's no concurrency yet; don't |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 968 | * bother being nice about the RCU stuff, just write to both |
| 969 | * data fields. |
| 970 | */ |
| 971 | |
| 972 | this_cpu_write(cyc2ns.data[0].cyc2ns_offset, 0); |
| 973 | this_cpu_write(cyc2ns.data[1].cyc2ns_offset, 0); |
| 974 | |
Suresh Siddha | cd7240c | 2010-08-19 17:03:38 -0700 | [diff] [blame] | 975 | offset = cyc2ns_suspend - sched_clock(); |
| 976 | |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 977 | for_each_possible_cpu(cpu) { |
| 978 | per_cpu(cyc2ns.data[0].cyc2ns_offset, cpu) = offset; |
| 979 | per_cpu(cyc2ns.data[1].cyc2ns_offset, cpu) = offset; |
| 980 | } |
Suresh Siddha | cd7240c | 2010-08-19 17:03:38 -0700 | [diff] [blame] | 981 | |
| 982 | local_irq_restore(flags); |
| 983 | } |
| 984 | |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 985 | #ifdef CONFIG_CPU_FREQ |
| 986 | |
| 987 | /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency |
| 988 | * changes. |
| 989 | * |
| 990 | * RED-PEN: On SMP we assume all CPUs run with the same frequency. It's |
| 991 | * not that important because current Opteron setups do not support |
| 992 | * scaling on SMP anyroads. |
| 993 | * |
| 994 | * Should fix up last_tsc too. Currently gettimeofday in the |
| 995 | * first tick after the change will be slightly wrong. |
| 996 | */ |
| 997 | |
| 998 | static unsigned int ref_freq; |
| 999 | static unsigned long loops_per_jiffy_ref; |
| 1000 | static unsigned long tsc_khz_ref; |
| 1001 | |
| 1002 | static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, |
| 1003 | void *data) |
| 1004 | { |
| 1005 | struct cpufreq_freqs *freq = data; |
Dave Jones | 931db6a | 2009-06-01 12:29:55 -0400 | [diff] [blame] | 1006 | unsigned long *lpj; |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 1007 | |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 1008 | lpj = &boot_cpu_data.loops_per_jiffy; |
Dave Jones | 931db6a | 2009-06-01 12:29:55 -0400 | [diff] [blame] | 1009 | #ifdef CONFIG_SMP |
| 1010 | if (!(freq->flags & CPUFREQ_CONST_LOOPS)) |
| 1011 | lpj = &cpu_data(freq->cpu).loops_per_jiffy; |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 1012 | #endif |
| 1013 | |
| 1014 | if (!ref_freq) { |
| 1015 | ref_freq = freq->old; |
| 1016 | loops_per_jiffy_ref = *lpj; |
| 1017 | tsc_khz_ref = tsc_khz; |
| 1018 | } |
| 1019 | if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) || |
Viresh Kumar | 0b443ea | 2014-03-19 11:24:58 +0530 | [diff] [blame] | 1020 | (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) { |
Felipe Contreras | 878f4f5 | 2009-09-17 00:38:38 +0300 | [diff] [blame] | 1021 | *lpj = cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new); |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 1022 | |
| 1023 | tsc_khz = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new); |
| 1024 | if (!(freq->flags & CPUFREQ_CONST_LOOPS)) |
| 1025 | mark_tsc_unstable("cpufreq changes"); |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 1026 | |
Peter Zijlstra | 3896c32 | 2014-06-24 14:48:19 +0200 | [diff] [blame] | 1027 | set_cyc2ns_scale(tsc_khz, freq->cpu); |
| 1028 | } |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 1029 | |
| 1030 | return 0; |
| 1031 | } |
| 1032 | |
| 1033 | static struct notifier_block time_cpufreq_notifier_block = { |
| 1034 | .notifier_call = time_cpufreq_notifier |
| 1035 | }; |
| 1036 | |
Borislav Petkov | a841cca | 2016-04-05 08:29:52 +0200 | [diff] [blame] | 1037 | static int __init cpufreq_register_tsc_scaling(void) |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 1038 | { |
Borislav Petkov | 59e21e3 | 2016-04-04 22:24:59 +0200 | [diff] [blame] | 1039 | if (!boot_cpu_has(X86_FEATURE_TSC)) |
Linus Torvalds | 060700b | 2008-08-24 11:52:06 -0700 | [diff] [blame] | 1040 | return 0; |
| 1041 | if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) |
| 1042 | return 0; |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 1043 | cpufreq_register_notifier(&time_cpufreq_notifier_block, |
| 1044 | CPUFREQ_TRANSITION_NOTIFIER); |
| 1045 | return 0; |
| 1046 | } |
| 1047 | |
Borislav Petkov | a841cca | 2016-04-05 08:29:52 +0200 | [diff] [blame] | 1048 | core_initcall(cpufreq_register_tsc_scaling); |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 1049 | |
| 1050 | #endif /* CONFIG_CPU_FREQ */ |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1051 | |
Christopher S. Hall | f9677e0 | 2016-02-29 06:33:47 -0800 | [diff] [blame] | 1052 | #define ART_CPUID_LEAF (0x15) |
| 1053 | #define ART_MIN_DENOMINATOR (1) |
| 1054 | |
| 1055 | |
| 1056 | /* |
| 1057 | * If ART is present detect the numerator:denominator to convert to TSC |
| 1058 | */ |
| 1059 | static void detect_art(void) |
| 1060 | { |
| 1061 | unsigned int unused[2]; |
| 1062 | |
| 1063 | if (boot_cpu_data.cpuid_level < ART_CPUID_LEAF) |
| 1064 | return; |
| 1065 | |
| 1066 | cpuid(ART_CPUID_LEAF, &art_to_tsc_denominator, |
| 1067 | &art_to_tsc_numerator, unused, unused+1); |
| 1068 | |
| 1069 | /* Don't enable ART in a VM, non-stop TSC required */ |
| 1070 | if (boot_cpu_has(X86_FEATURE_HYPERVISOR) || |
| 1071 | !boot_cpu_has(X86_FEATURE_NONSTOP_TSC) || |
| 1072 | art_to_tsc_denominator < ART_MIN_DENOMINATOR) |
| 1073 | return; |
| 1074 | |
| 1075 | if (rdmsrl_safe(MSR_IA32_TSC_ADJUST, &art_to_tsc_offset)) |
| 1076 | return; |
| 1077 | |
| 1078 | /* Make this sticky over multiple CPU init calls */ |
| 1079 | setup_force_cpu_cap(X86_FEATURE_ART); |
| 1080 | } |
| 1081 | |
| 1082 | |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1083 | /* clocksource code */ |
| 1084 | |
| 1085 | static struct clocksource clocksource_tsc; |
| 1086 | |
| 1087 | /* |
Thomas Gleixner | 09ec544 | 2014-07-16 21:05:12 +0000 | [diff] [blame] | 1088 | * We used to compare the TSC to the cycle_last value in the clocksource |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1089 | * structure to avoid a nasty time-warp. This can be observed in a |
| 1090 | * very small window right after one CPU updated cycle_last under |
| 1091 | * xtime/vsyscall_gtod lock and the other CPU reads a TSC value which |
| 1092 | * is smaller than the cycle_last reference value due to a TSC which |
| 1093 | * is slighty behind. This delta is nowhere else observable, but in |
| 1094 | * that case it results in a forward time jump in the range of hours |
| 1095 | * due to the unsigned delta calculation of the time keeping core |
| 1096 | * code, which is necessary to support wrapping clocksources like pm |
| 1097 | * timer. |
Thomas Gleixner | 09ec544 | 2014-07-16 21:05:12 +0000 | [diff] [blame] | 1098 | * |
| 1099 | * This sanity check is now done in the core timekeeping code. |
| 1100 | * checking the result of read_tsc() - cycle_last for being negative. |
| 1101 | * That works because CLOCKSOURCE_MASK(64) does not mask out any bit. |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1102 | */ |
Magnus Damm | 8e19608 | 2009-04-21 12:24:00 -0700 | [diff] [blame] | 1103 | static cycle_t read_tsc(struct clocksource *cs) |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1104 | { |
Andy Lutomirski | 27c6340 | 2015-06-25 18:44:10 +0200 | [diff] [blame] | 1105 | return (cycle_t)rdtsc_ordered(); |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1106 | } |
| 1107 | |
Thomas Gleixner | 09ec544 | 2014-07-16 21:05:12 +0000 | [diff] [blame] | 1108 | /* |
| 1109 | * .mask MUST be CLOCKSOURCE_MASK(64). See comment above read_tsc() |
| 1110 | */ |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1111 | static struct clocksource clocksource_tsc = { |
| 1112 | .name = "tsc", |
| 1113 | .rating = 300, |
| 1114 | .read = read_tsc, |
| 1115 | .mask = CLOCKSOURCE_MASK(64), |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1116 | .flags = CLOCK_SOURCE_IS_CONTINUOUS | |
| 1117 | CLOCK_SOURCE_MUST_VERIFY, |
Andy Lutomirski | 98d0ac3 | 2011-07-14 06:47:22 -0400 | [diff] [blame] | 1118 | .archdata = { .vclock_mode = VCLOCK_TSC }, |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1119 | }; |
| 1120 | |
| 1121 | void mark_tsc_unstable(char *reason) |
| 1122 | { |
| 1123 | if (!tsc_unstable) { |
| 1124 | tsc_unstable = 1; |
Peter Zijlstra | 35af99e | 2013-11-28 19:38:42 +0100 | [diff] [blame] | 1125 | clear_sched_clock_stable(); |
Venkatesh Pallipadi | e82b8e4 | 2010-10-04 17:03:20 -0700 | [diff] [blame] | 1126 | disable_sched_clock_irqtime(); |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 1127 | pr_info("Marking TSC unstable due to %s\n", reason); |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1128 | /* Change only the rating, when not registered */ |
| 1129 | if (clocksource_tsc.mult) |
Thomas Gleixner | 7285dd7 | 2009-08-28 20:25:24 +0200 | [diff] [blame] | 1130 | clocksource_mark_unstable(&clocksource_tsc); |
| 1131 | else { |
| 1132 | clocksource_tsc.flags |= CLOCK_SOURCE_UNSTABLE; |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1133 | clocksource_tsc.rating = 0; |
Thomas Gleixner | 7285dd7 | 2009-08-28 20:25:24 +0200 | [diff] [blame] | 1134 | } |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1135 | } |
| 1136 | } |
| 1137 | |
| 1138 | EXPORT_SYMBOL_GPL(mark_tsc_unstable); |
| 1139 | |
Alok Kataria | 395628e | 2008-10-24 17:22:01 -0700 | [diff] [blame] | 1140 | static void __init check_system_tsc_reliable(void) |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1141 | { |
David Woodhouse | 03da3ff | 2015-09-16 14:10:03 +0100 | [diff] [blame] | 1142 | #if defined(CONFIG_MGEODEGX1) || defined(CONFIG_MGEODE_LX) || defined(CONFIG_X86_GENERIC) |
| 1143 | if (is_geode_lx()) { |
| 1144 | /* RTSC counts during suspend */ |
Alok Kataria | 395628e | 2008-10-24 17:22:01 -0700 | [diff] [blame] | 1145 | #define RTSC_SUSP 0x100 |
David Woodhouse | 03da3ff | 2015-09-16 14:10:03 +0100 | [diff] [blame] | 1146 | unsigned long res_low, res_high; |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1147 | |
David Woodhouse | 03da3ff | 2015-09-16 14:10:03 +0100 | [diff] [blame] | 1148 | rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high); |
| 1149 | /* Geode_LX - the OLPC CPU has a very reliable TSC */ |
| 1150 | if (res_low & RTSC_SUSP) |
| 1151 | tsc_clocksource_reliable = 1; |
| 1152 | } |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1153 | #endif |
Alok Kataria | 395628e | 2008-10-24 17:22:01 -0700 | [diff] [blame] | 1154 | if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE)) |
| 1155 | tsc_clocksource_reliable = 1; |
| 1156 | } |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1157 | |
| 1158 | /* |
| 1159 | * Make an educated guess if the TSC is trustworthy and synchronized |
| 1160 | * over all CPUs. |
| 1161 | */ |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 1162 | int unsynchronized_tsc(void) |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1163 | { |
Borislav Petkov | 59e21e3 | 2016-04-04 22:24:59 +0200 | [diff] [blame] | 1164 | if (!boot_cpu_has(X86_FEATURE_TSC) || tsc_unstable) |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1165 | return 1; |
| 1166 | |
Ingo Molnar | 3e5095d | 2009-01-27 17:07:08 +0100 | [diff] [blame] | 1167 | #ifdef CONFIG_SMP |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1168 | if (apic_is_clustered_box()) |
| 1169 | return 1; |
| 1170 | #endif |
| 1171 | |
| 1172 | if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) |
| 1173 | return 0; |
john stultz | d3b8f88 | 2009-08-17 16:40:47 -0700 | [diff] [blame] | 1174 | |
| 1175 | if (tsc_clocksource_reliable) |
| 1176 | return 0; |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1177 | /* |
| 1178 | * Intel systems are normally all synchronized. |
| 1179 | * Exceptions must mark TSC as unstable: |
| 1180 | */ |
| 1181 | if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) { |
| 1182 | /* assume multi socket systems are not synchronized: */ |
| 1183 | if (num_possible_cpus() > 1) |
john stultz | d3b8f88 | 2009-08-17 16:40:47 -0700 | [diff] [blame] | 1184 | return 1; |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1185 | } |
| 1186 | |
john stultz | d3b8f88 | 2009-08-17 16:40:47 -0700 | [diff] [blame] | 1187 | return 0; |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1188 | } |
| 1189 | |
Christopher S. Hall | f9677e0 | 2016-02-29 06:33:47 -0800 | [diff] [blame] | 1190 | /* |
| 1191 | * Convert ART to TSC given numerator/denominator found in detect_art() |
| 1192 | */ |
| 1193 | struct system_counterval_t convert_art_to_tsc(cycle_t art) |
| 1194 | { |
| 1195 | u64 tmp, res, rem; |
| 1196 | |
| 1197 | rem = do_div(art, art_to_tsc_denominator); |
| 1198 | |
| 1199 | res = art * art_to_tsc_numerator; |
| 1200 | tmp = rem * art_to_tsc_numerator; |
| 1201 | |
| 1202 | do_div(tmp, art_to_tsc_denominator); |
| 1203 | res += tmp + art_to_tsc_offset; |
| 1204 | |
| 1205 | return (struct system_counterval_t) {.cs = art_related_clocksource, |
| 1206 | .cycles = res}; |
| 1207 | } |
| 1208 | EXPORT_SYMBOL(convert_art_to_tsc); |
John Stultz | 08ec0c5 | 2010-07-27 17:00:00 -0700 | [diff] [blame] | 1209 | |
| 1210 | static void tsc_refine_calibration_work(struct work_struct *work); |
| 1211 | static DECLARE_DELAYED_WORK(tsc_irqwork, tsc_refine_calibration_work); |
| 1212 | /** |
| 1213 | * tsc_refine_calibration_work - Further refine tsc freq calibration |
| 1214 | * @work - ignored. |
| 1215 | * |
| 1216 | * This functions uses delayed work over a period of a |
| 1217 | * second to further refine the TSC freq value. Since this is |
| 1218 | * timer based, instead of loop based, we don't block the boot |
| 1219 | * process while this longer calibration is done. |
| 1220 | * |
Lucas De Marchi | 0d2eb44 | 2011-03-17 16:24:16 -0300 | [diff] [blame] | 1221 | * If there are any calibration anomalies (too many SMIs, etc), |
John Stultz | 08ec0c5 | 2010-07-27 17:00:00 -0700 | [diff] [blame] | 1222 | * or the refined calibration is off by 1% of the fast early |
| 1223 | * calibration, we throw out the new calibration and use the |
| 1224 | * early calibration. |
| 1225 | */ |
| 1226 | static void tsc_refine_calibration_work(struct work_struct *work) |
| 1227 | { |
| 1228 | static u64 tsc_start = -1, ref_start; |
| 1229 | static int hpet; |
| 1230 | u64 tsc_stop, ref_stop, delta; |
| 1231 | unsigned long freq; |
| 1232 | |
| 1233 | /* Don't bother refining TSC on unstable systems */ |
| 1234 | if (check_tsc_unstable()) |
| 1235 | goto out; |
| 1236 | |
| 1237 | /* |
| 1238 | * Since the work is started early in boot, we may be |
| 1239 | * delayed the first time we expire. So set the workqueue |
| 1240 | * again once we know timers are working. |
| 1241 | */ |
| 1242 | if (tsc_start == -1) { |
| 1243 | /* |
| 1244 | * Only set hpet once, to avoid mixing hardware |
| 1245 | * if the hpet becomes enabled later. |
| 1246 | */ |
| 1247 | hpet = is_hpet_enabled(); |
| 1248 | schedule_delayed_work(&tsc_irqwork, HZ); |
| 1249 | tsc_start = tsc_read_refs(&ref_start, hpet); |
| 1250 | return; |
| 1251 | } |
| 1252 | |
| 1253 | tsc_stop = tsc_read_refs(&ref_stop, hpet); |
| 1254 | |
| 1255 | /* hpet or pmtimer available ? */ |
John Stultz | 62627be | 2011-01-14 09:06:28 -0800 | [diff] [blame] | 1256 | if (ref_start == ref_stop) |
John Stultz | 08ec0c5 | 2010-07-27 17:00:00 -0700 | [diff] [blame] | 1257 | goto out; |
| 1258 | |
| 1259 | /* Check, whether the sampling was disturbed by an SMI */ |
| 1260 | if (tsc_start == ULLONG_MAX || tsc_stop == ULLONG_MAX) |
| 1261 | goto out; |
| 1262 | |
| 1263 | delta = tsc_stop - tsc_start; |
| 1264 | delta *= 1000000LL; |
| 1265 | if (hpet) |
| 1266 | freq = calc_hpet_ref(delta, ref_start, ref_stop); |
| 1267 | else |
| 1268 | freq = calc_pmtimer_ref(delta, ref_start, ref_stop); |
| 1269 | |
| 1270 | /* Make sure we're within 1% */ |
| 1271 | if (abs(tsc_khz - freq) > tsc_khz/100) |
| 1272 | goto out; |
| 1273 | |
| 1274 | tsc_khz = freq; |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 1275 | pr_info("Refined TSC clocksource calibration: %lu.%03lu MHz\n", |
| 1276 | (unsigned long)tsc_khz / 1000, |
| 1277 | (unsigned long)tsc_khz % 1000); |
John Stultz | 08ec0c5 | 2010-07-27 17:00:00 -0700 | [diff] [blame] | 1278 | |
Nicolai Stange | 6731b0d | 2016-07-14 17:22:55 +0200 | [diff] [blame] | 1279 | /* Inform the TSC deadline clockevent devices about the recalibration */ |
| 1280 | lapic_update_tsc_freq(); |
| 1281 | |
John Stultz | 08ec0c5 | 2010-07-27 17:00:00 -0700 | [diff] [blame] | 1282 | out: |
Christopher S. Hall | f9677e0 | 2016-02-29 06:33:47 -0800 | [diff] [blame] | 1283 | if (boot_cpu_has(X86_FEATURE_ART)) |
| 1284 | art_related_clocksource = &clocksource_tsc; |
John Stultz | 08ec0c5 | 2010-07-27 17:00:00 -0700 | [diff] [blame] | 1285 | clocksource_register_khz(&clocksource_tsc, tsc_khz); |
| 1286 | } |
| 1287 | |
| 1288 | |
| 1289 | static int __init init_tsc_clocksource(void) |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1290 | { |
Borislav Petkov | 59e21e3 | 2016-04-04 22:24:59 +0200 | [diff] [blame] | 1291 | if (!boot_cpu_has(X86_FEATURE_TSC) || tsc_disabled > 0 || !tsc_khz) |
Thomas Gleixner | a8760ec | 2010-12-13 11:28:02 +0100 | [diff] [blame] | 1292 | return 0; |
| 1293 | |
Alok Kataria | 395628e | 2008-10-24 17:22:01 -0700 | [diff] [blame] | 1294 | if (tsc_clocksource_reliable) |
| 1295 | clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY; |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1296 | /* lower the rating if we already know its unstable: */ |
| 1297 | if (check_tsc_unstable()) { |
| 1298 | clocksource_tsc.rating = 0; |
| 1299 | clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS; |
| 1300 | } |
Alok Kataria | 57779dc | 2012-02-21 18:19:55 -0800 | [diff] [blame] | 1301 | |
Feng Tang | 82f9c08 | 2013-03-12 11:56:47 +0800 | [diff] [blame] | 1302 | if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC_S3)) |
| 1303 | clocksource_tsc.flags |= CLOCK_SOURCE_SUSPEND_NONSTOP; |
| 1304 | |
Alok Kataria | 57779dc | 2012-02-21 18:19:55 -0800 | [diff] [blame] | 1305 | /* |
| 1306 | * Trust the results of the earlier calibration on systems |
| 1307 | * exporting a reliable TSC. |
| 1308 | */ |
| 1309 | if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE)) { |
Peter Zijlstra | 5ec98e6 | 2017-03-13 15:57:12 +0100 | [diff] [blame] | 1310 | if (boot_cpu_has(X86_FEATURE_ART)) |
| 1311 | art_related_clocksource = &clocksource_tsc; |
Alok Kataria | 57779dc | 2012-02-21 18:19:55 -0800 | [diff] [blame] | 1312 | clocksource_register_khz(&clocksource_tsc, tsc_khz); |
| 1313 | return 0; |
| 1314 | } |
| 1315 | |
John Stultz | 08ec0c5 | 2010-07-27 17:00:00 -0700 | [diff] [blame] | 1316 | schedule_delayed_work(&tsc_irqwork, 0); |
| 1317 | return 0; |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1318 | } |
John Stultz | 08ec0c5 | 2010-07-27 17:00:00 -0700 | [diff] [blame] | 1319 | /* |
| 1320 | * We use device_initcall here, to ensure we run after the hpet |
| 1321 | * is fully initialized, which may occur at fs_initcall time. |
| 1322 | */ |
| 1323 | device_initcall(init_tsc_clocksource); |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1324 | |
| 1325 | void __init tsc_init(void) |
| 1326 | { |
| 1327 | u64 lpj; |
| 1328 | int cpu; |
| 1329 | |
Borislav Petkov | 59e21e3 | 2016-04-04 22:24:59 +0200 | [diff] [blame] | 1330 | if (!boot_cpu_has(X86_FEATURE_TSC)) { |
Andy Lutomirski | b47dcbd | 2014-10-15 10:12:07 -0700 | [diff] [blame] | 1331 | setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER); |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1332 | return; |
Andy Lutomirski | b47dcbd | 2014-10-15 10:12:07 -0700 | [diff] [blame] | 1333 | } |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1334 | |
Len Brown | aa29729 | 2016-06-17 01:22:51 -0400 | [diff] [blame] | 1335 | cpu_khz = x86_platform.calibrate_cpu(); |
Thomas Gleixner | 2d82640 | 2009-08-20 17:06:25 +0200 | [diff] [blame] | 1336 | tsc_khz = x86_platform.calibrate_tsc(); |
Len Brown | ff4c866 | 2016-06-17 01:22:52 -0400 | [diff] [blame] | 1337 | |
| 1338 | /* |
| 1339 | * Trust non-zero tsc_khz as authorative, |
| 1340 | * and use it to sanity check cpu_khz, |
| 1341 | * which will be off if system timer is off. |
| 1342 | */ |
Len Brown | aa29729 | 2016-06-17 01:22:51 -0400 | [diff] [blame] | 1343 | if (tsc_khz == 0) |
| 1344 | tsc_khz = cpu_khz; |
Len Brown | ff4c866 | 2016-06-17 01:22:52 -0400 | [diff] [blame] | 1345 | else if (abs(cpu_khz - tsc_khz) * 10 > tsc_khz) |
| 1346 | cpu_khz = tsc_khz; |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1347 | |
Alok Kataria | e93ef94 | 2008-07-01 11:43:36 -0700 | [diff] [blame] | 1348 | if (!tsc_khz) { |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1349 | mark_tsc_unstable("could not calculate TSC khz"); |
Andy Lutomirski | b47dcbd | 2014-10-15 10:12:07 -0700 | [diff] [blame] | 1350 | setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER); |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1351 | return; |
| 1352 | } |
| 1353 | |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 1354 | pr_info("Detected %lu.%03lu MHz processor\n", |
| 1355 | (unsigned long)cpu_khz / 1000, |
| 1356 | (unsigned long)cpu_khz % 1000); |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1357 | |
| 1358 | /* |
| 1359 | * Secondary CPUs do not run through tsc_init(), so set up |
| 1360 | * all the scale factors for all CPUs, assuming the same |
| 1361 | * speed as the bootup CPU. (cpufreq notifiers will fix this |
| 1362 | * up if their speed diverges) |
| 1363 | */ |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 1364 | for_each_possible_cpu(cpu) { |
| 1365 | cyc2ns_init(cpu); |
Len Brown | aa29729 | 2016-06-17 01:22:51 -0400 | [diff] [blame] | 1366 | set_cyc2ns_scale(tsc_khz, cpu); |
Peter Zijlstra | 20d1c86 | 2013-11-29 15:40:29 +0100 | [diff] [blame] | 1367 | } |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1368 | |
| 1369 | if (tsc_disabled > 0) |
| 1370 | return; |
| 1371 | |
| 1372 | /* now allow native_sched_clock() to use rdtsc */ |
Peter Zijlstra | 10b033d | 2013-11-28 19:01:40 +0100 | [diff] [blame] | 1373 | |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1374 | tsc_disabled = 0; |
Peter Zijlstra | 3bbfafb | 2015-07-24 16:34:32 +0200 | [diff] [blame] | 1375 | static_branch_enable(&__use_tsc); |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1376 | |
Venkatesh Pallipadi | e82b8e4 | 2010-10-04 17:03:20 -0700 | [diff] [blame] | 1377 | if (!no_sched_irq_time) |
| 1378 | enable_sched_clock_irqtime(); |
| 1379 | |
Alok Kataria | 70de9a97 | 2008-11-03 11:18:47 -0800 | [diff] [blame] | 1380 | lpj = ((u64)tsc_khz * 1000); |
| 1381 | do_div(lpj, HZ); |
| 1382 | lpj_fine = lpj; |
| 1383 | |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1384 | use_tsc_delay(); |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1385 | |
| 1386 | if (unsynchronized_tsc()) |
| 1387 | mark_tsc_unstable("TSCs unsynchronized"); |
| 1388 | |
Alok Kataria | 395628e | 2008-10-24 17:22:01 -0700 | [diff] [blame] | 1389 | check_system_tsc_reliable(); |
Christopher S. Hall | f9677e0 | 2016-02-29 06:33:47 -0800 | [diff] [blame] | 1390 | |
| 1391 | detect_art(); |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 1392 | } |
| 1393 | |
Jack Steiner | b565201 | 2011-11-15 15:33:56 -0800 | [diff] [blame] | 1394 | #ifdef CONFIG_SMP |
| 1395 | /* |
| 1396 | * If we have a constant TSC and are using the TSC for the delay loop, |
| 1397 | * we can skip clock calibration if another cpu in the same socket has already |
| 1398 | * been calibrated. This assumes that CONSTANT_TSC applies to all |
| 1399 | * cpus in the socket - this should be a safe assumption. |
| 1400 | */ |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 1401 | unsigned long calibrate_delay_is_known(void) |
Jack Steiner | b565201 | 2011-11-15 15:33:56 -0800 | [diff] [blame] | 1402 | { |
Thomas Gleixner | c25323c | 2016-02-18 20:53:43 +0100 | [diff] [blame] | 1403 | int sibling, cpu = smp_processor_id(); |
Pavel Tatashin | 9d5e599 | 2017-10-27 20:11:00 -0400 | [diff] [blame] | 1404 | int constant_tsc = cpu_has(&cpu_data(cpu), X86_FEATURE_CONSTANT_TSC); |
| 1405 | const struct cpumask *mask = topology_core_cpumask(cpu); |
Jack Steiner | b565201 | 2011-11-15 15:33:56 -0800 | [diff] [blame] | 1406 | |
Pavel Tatashin | 9d5e599 | 2017-10-27 20:11:00 -0400 | [diff] [blame] | 1407 | if (tsc_disabled || !constant_tsc || !mask) |
Thomas Gleixner | f508a5b | 2016-03-18 08:35:29 +0100 | [diff] [blame] | 1408 | return 0; |
| 1409 | |
| 1410 | sibling = cpumask_any_but(mask, cpu); |
Thomas Gleixner | c25323c | 2016-02-18 20:53:43 +0100 | [diff] [blame] | 1411 | if (sibling < nr_cpu_ids) |
| 1412 | return cpu_data(sibling).loops_per_jiffy; |
Jack Steiner | b565201 | 2011-11-15 15:33:56 -0800 | [diff] [blame] | 1413 | return 0; |
| 1414 | } |
| 1415 | #endif |