Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 1 | config PPC64 |
| 2 | bool "64-bit kernel" |
| 3 | default n |
Paul Mackerras | 105988c | 2009-06-17 21:50:04 +1000 | [diff] [blame] | 4 | select PPC_HAVE_PMU_SUPPORT |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 5 | help |
| 6 | This option selects whether a 32-bit or a 64-bit kernel |
| 7 | will be built. |
| 8 | |
| 9 | menu "Processor support" |
| 10 | choice |
| 11 | prompt "Processor Type" |
| 12 | depends on PPC32 |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 13 | help |
Arnd Bergmann | b9fd305 | 2007-06-18 01:06:52 +0200 | [diff] [blame] | 14 | There are five families of 32 bit PowerPC chips supported. |
| 15 | The most common ones are the desktop and server CPUs (601, 603, |
| 16 | 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their |
John Rigby | e177edc | 2008-01-29 04:28:53 +1100 | [diff] [blame] | 17 | embedded 512x/52xx/82xx/83xx/86xx counterparts. |
Arnd Bergmann | b9fd305 | 2007-06-18 01:06:52 +0200 | [diff] [blame] | 18 | The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500 |
| 19 | (85xx) each form a family of their own that is not compatible |
| 20 | with the others. |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 21 | |
Arnd Bergmann | b9fd305 | 2007-06-18 01:06:52 +0200 | [diff] [blame] | 22 | If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 23 | |
Benjamin Herrenschmidt | 48c9311 | 2009-06-14 14:45:50 +0000 | [diff] [blame] | 24 | config PPC_BOOK3S_32 |
John Rigby | e177edc | 2008-01-29 04:28:53 +1100 | [diff] [blame] | 25 | bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 26 | select PPC_FPU |
| 27 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 28 | config PPC_85xx |
| 29 | bool "Freescale 85xx" |
| 30 | select E500 |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 31 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 32 | config PPC_8xx |
| 33 | bool "Freescale 8xx" |
| 34 | select FSL_SOC |
| 35 | select 8xx |
Sylvain Munaut | 1088a20 | 2007-09-16 20:53:25 +1000 | [diff] [blame] | 36 | select PPC_LIB_RHEAP |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 37 | |
| 38 | config 40x |
| 39 | bool "AMCC 40x" |
| 40 | select PPC_DCR_NATIVE |
Benjamin Herrenschmidt | 9dae8af | 2007-12-21 15:39:26 +1100 | [diff] [blame] | 41 | select PPC_UDBG_16550 |
Stefan Roese | 93173ce | 2008-03-28 01:43:31 +1100 | [diff] [blame] | 42 | select 4xx_SOC |
John Rigby | b500563 | 2008-06-26 11:07:56 -0600 | [diff] [blame] | 43 | select PPC_PCI_CHOICE |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 44 | |
| 45 | config 44x |
Dave Kleikamp | e7f75ad | 2010-03-05 10:43:12 +0000 | [diff] [blame] | 46 | bool "AMCC 44x, 46x or 47x" |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 47 | select PPC_DCR_NATIVE |
Valentine Barshak | 1d5499b | 2007-10-18 22:55:13 +1000 | [diff] [blame] | 48 | select PPC_UDBG_16550 |
Stefan Roese | 93173ce | 2008-03-28 01:43:31 +1100 | [diff] [blame] | 49 | select 4xx_SOC |
John Rigby | b500563 | 2008-06-26 11:07:56 -0600 | [diff] [blame] | 50 | select PPC_PCI_CHOICE |
Becky Bruce | 4ee7084 | 2008-09-24 11:01:24 -0500 | [diff] [blame] | 51 | select PHYS_64BIT |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 52 | |
| 53 | config E200 |
| 54 | bool "Freescale e200" |
| 55 | |
| 56 | endchoice |
| 57 | |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 58 | choice |
| 59 | prompt "Processor Type" |
Benjamin Herrenschmidt | 5b7c3c9 | 2009-06-02 21:17:37 +0000 | [diff] [blame] | 60 | depends on PPC64 |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 61 | help |
| 62 | There are two families of 64 bit PowerPC chips supported. |
| 63 | The most common ones are the desktop and server CPUs |
| 64 | (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...) |
| 65 | |
| 66 | The other are the "embedded" processors compliant with the |
| 67 | "Book 3E" variant of the architecture |
| 68 | |
| 69 | config PPC_BOOK3S_64 |
| 70 | bool "Server processors" |
Benjamin Herrenschmidt | 5b7c3c9 | 2009-06-02 21:17:37 +0000 | [diff] [blame] | 71 | select PPC_FPU |
| 72 | |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 73 | config PPC_BOOK3E_64 |
| 74 | bool "Embedded processors" |
| 75 | select PPC_FPU # Make it a choice ? |
Milton Miller | 1ece355 | 2011-05-10 19:29:42 +0000 | [diff] [blame] | 76 | select PPC_SMP_MUXED_IPI |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 77 | |
| 78 | endchoice |
| 79 | |
Benjamin Herrenschmidt | 48c9311 | 2009-06-14 14:45:50 +0000 | [diff] [blame] | 80 | config PPC_BOOK3S |
| 81 | def_bool y |
| 82 | depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 83 | |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 84 | config PPC_BOOK3E |
| 85 | def_bool y |
| 86 | depends on PPC_BOOK3E_64 |
| 87 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 88 | config POWER4_ONLY |
| 89 | bool "Optimize for POWER4" |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 90 | depends on PPC64 && PPC_BOOK3S |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 91 | default n |
| 92 | ---help--- |
| 93 | Cause the compiler to optimize for POWER4/POWER5/PPC970 processors. |
| 94 | The resulting binary will not work on POWER3 or RS64 processors |
| 95 | when compiled with binutils 2.15 or later. |
| 96 | |
Benjamin Herrenschmidt | 5b7c3c9 | 2009-06-02 21:17:37 +0000 | [diff] [blame] | 97 | config 6xx |
| 98 | def_bool y |
| 99 | depends on PPC32 && PPC_BOOK3S |
Paul Mackerras | 7325927 | 2009-06-17 21:53:51 +1000 | [diff] [blame] | 100 | select PPC_HAVE_PMU_SUPPORT |
Benjamin Herrenschmidt | 5b7c3c9 | 2009-06-02 21:17:37 +0000 | [diff] [blame] | 101 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 102 | config POWER3 |
| 103 | bool |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 104 | depends on PPC64 && PPC_BOOK3S |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 105 | default y if !POWER4_ONLY |
| 106 | |
| 107 | config POWER4 |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 108 | depends on PPC64 && PPC_BOOK3S |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 109 | def_bool y |
| 110 | |
Benjamin Herrenschmidt | 76b4eda | 2011-04-14 22:32:01 +0000 | [diff] [blame] | 111 | config PPC_A2 |
| 112 | bool |
| 113 | depends on PPC_BOOK3E_64 |
| 114 | |
Arnd Bergmann | 3164ccc | 2007-09-15 10:21:57 +1000 | [diff] [blame] | 115 | config TUNE_CELL |
| 116 | bool "Optimize for Cell Broadband Engine" |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 117 | depends on PPC64 && PPC_BOOK3S |
Arnd Bergmann | 3164ccc | 2007-09-15 10:21:57 +1000 | [diff] [blame] | 118 | help |
| 119 | Cause the compiler to optimize for the PPE of the Cell Broadband |
| 120 | Engine. This will make the code run considerably faster on Cell |
| 121 | but somewhat slower on other machines. This option only changes |
| 122 | the scheduling of instructions, not the selection of instructions |
| 123 | itself, so the resulting kernel will keep running on all other |
| 124 | machines. When building a kernel that is supposed to run only |
| 125 | on Cell, you should also select the POWER4_ONLY option. |
| 126 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 127 | # this is temp to handle compat with arch=ppc |
| 128 | config 8xx |
| 129 | bool |
| 130 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 131 | config E500 |
Andy Fleming | 39aef68 | 2008-02-04 18:27:55 -0600 | [diff] [blame] | 132 | select FSL_EMB_PERFMON |
Kumar Gala | 4490c06 | 2010-10-08 08:32:11 -0500 | [diff] [blame] | 133 | select PPC_FSL_BOOK3E |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 134 | bool |
| 135 | |
Kumar Gala | 3dfa877 | 2008-06-16 09:41:32 -0500 | [diff] [blame] | 136 | config PPC_E500MC |
| 137 | bool "e500mc Support" |
| 138 | select PPC_FPU |
| 139 | depends on E500 |
| 140 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 141 | config PPC_FPU |
| 142 | bool |
| 143 | default y if PPC64 |
| 144 | |
Kumar Gala | 5753c08 | 2009-10-16 18:31:48 -0500 | [diff] [blame] | 145 | config FSL_EMB_PERFMON |
| 146 | bool "Freescale Embedded Perfmon" |
| 147 | depends on E500 || PPC_83xx |
| 148 | help |
| 149 | This is the Performance Monitor support found on the e500 core |
| 150 | and some e300 cores (c3 and c4). Select this only if your |
| 151 | core supports the Embedded Performance Monitor APU |
| 152 | |
Scott Wood | a111065 | 2010-02-25 18:09:45 -0600 | [diff] [blame] | 153 | config FSL_EMB_PERF_EVENT |
| 154 | bool |
| 155 | depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS |
| 156 | default y |
| 157 | |
| 158 | config FSL_EMB_PERF_EVENT_E500 |
| 159 | bool |
| 160 | depends on FSL_EMB_PERF_EVENT && E500 |
| 161 | default y |
| 162 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 163 | config 4xx |
| 164 | bool |
| 165 | depends on 40x || 44x |
| 166 | default y |
| 167 | |
| 168 | config BOOKE |
| 169 | bool |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 170 | depends on E200 || E500 || 44x || PPC_BOOK3E |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 171 | default y |
| 172 | |
| 173 | config FSL_BOOKE |
| 174 | bool |
Kumar Gala | 4490c06 | 2010-10-08 08:32:11 -0500 | [diff] [blame] | 175 | depends on (E200 || E500) && PPC32 |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 176 | default y |
| 177 | |
Kumar Gala | 4490c06 | 2010-10-08 08:32:11 -0500 | [diff] [blame] | 178 | # this is for common code between PPC32 & PPC64 FSL BOOKE |
| 179 | config PPC_FSL_BOOK3E |
| 180 | bool |
| 181 | select FSL_EMB_PERFMON |
Milton Miller | 1ece355 | 2011-05-10 19:29:42 +0000 | [diff] [blame] | 182 | select PPC_SMP_MUXED_IPI |
Kumar Gala | 4490c06 | 2010-10-08 08:32:11 -0500 | [diff] [blame] | 183 | default y if FSL_BOOKE |
Andy Fleming | 39aef68 | 2008-02-04 18:27:55 -0600 | [diff] [blame] | 184 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 185 | config PTE_64BIT |
| 186 | bool |
Becky Bruce | 4ee7084 | 2008-09-24 11:01:24 -0500 | [diff] [blame] | 187 | depends on 44x || E500 || PPC_86xx |
| 188 | default y if PHYS_64BIT |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 189 | |
| 190 | config PHYS_64BIT |
Becky Bruce | 4ee7084 | 2008-09-24 11:01:24 -0500 | [diff] [blame] | 191 | bool 'Large physical address support' if E500 || PPC_86xx |
| 192 | depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 193 | ---help--- |
| 194 | This option enables kernel support for larger than 32-bit physical |
Becky Bruce | 4ee7084 | 2008-09-24 11:01:24 -0500 | [diff] [blame] | 195 | addresses. This feature may not be available on all cores. |
| 196 | |
| 197 | If you have more than 3.5GB of RAM or so, you also need to enable |
| 198 | SWIOTLB under Kernel Options for this to work. The actual number |
| 199 | is platform-dependent. |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 200 | |
| 201 | If in doubt, say N here. |
| 202 | |
| 203 | config ALTIVEC |
| 204 | bool "AltiVec Support" |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 205 | depends on 6xx || POWER4 |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 206 | ---help--- |
| 207 | This option enables kernel support for the Altivec extensions to the |
| 208 | PowerPC processor. The kernel currently supports saving and restoring |
| 209 | altivec registers, and turning on the 'altivec enable' bit so user |
| 210 | processes can execute altivec instructions. |
| 211 | |
| 212 | This option is only usefully if you have a processor that supports |
| 213 | altivec (G4, otherwise known as 74xx series), but does not have |
| 214 | any affect on a non-altivec cpu (it does, however add code to the |
| 215 | kernel). |
| 216 | |
| 217 | If in doubt, say Y here. |
| 218 | |
Michael Neuling | 96d5b52 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 219 | config VSX |
| 220 | bool "VSX Support" |
| 221 | depends on POWER4 && ALTIVEC && PPC_FPU |
| 222 | ---help--- |
| 223 | |
| 224 | This option enables kernel support for the Vector Scaler extensions |
| 225 | to the PowerPC processor. The kernel currently supports saving and |
| 226 | restoring VSX registers, and turning on the 'VSX enable' bit so user |
| 227 | processes can execute VSX instructions. |
| 228 | |
| 229 | This option is only useful if you have a processor that supports |
| 230 | VSX (P7 and above), but does not have any affect on a non-VSX |
| 231 | CPUs (it does, however add code to the kernel). |
| 232 | |
| 233 | If in doubt, say Y here. |
| 234 | |
Tseng-Hui (Frank) Lin | 851d2e2 | 2011-05-02 20:43:04 +0000 | [diff] [blame] | 235 | config PPC_ICSWX |
| 236 | bool "Support for PowerPC icswx coprocessor instruction" |
| 237 | depends on POWER4 |
| 238 | default n |
| 239 | ---help--- |
| 240 | |
| 241 | This option enables kernel support for the PowerPC Initiate |
| 242 | Coprocessor Store Word (icswx) coprocessor instruction on POWER7 |
| 243 | or newer processors. |
| 244 | |
| 245 | This option is only useful if you have a processor that supports |
| 246 | the icswx coprocessor instruction. It does not have any effect |
| 247 | on processors without the icswx coprocessor instruction. |
| 248 | |
| 249 | This option slightly increases kernel memory usage. |
| 250 | |
| 251 | If in doubt, say N here. |
| 252 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 253 | config SPE |
| 254 | bool "SPE Support" |
Kumar Gala | 3dfa877 | 2008-06-16 09:41:32 -0500 | [diff] [blame] | 255 | depends on E200 || (E500 && !PPC_E500MC) |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 256 | default y |
| 257 | ---help--- |
| 258 | This option enables kernel support for the Signal Processing |
| 259 | Extensions (SPE) to the PowerPC processor. The kernel currently |
| 260 | supports saving and restoring SPE registers, and turning on the |
| 261 | 'spe enable' bit so user processes can execute SPE instructions. |
| 262 | |
| 263 | This option is only useful if you have a processor that supports |
| 264 | SPE (e500, otherwise known as 85xx series), but does not have any |
| 265 | effect on a non-spe cpu (it does, however add code to the kernel). |
| 266 | |
| 267 | If in doubt, say Y here. |
| 268 | |
| 269 | config PPC_STD_MMU |
Benjamin Herrenschmidt | 5b7c3c9 | 2009-06-02 21:17:37 +0000 | [diff] [blame] | 270 | def_bool y |
| 271 | depends on PPC_BOOK3S |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 272 | |
| 273 | config PPC_STD_MMU_32 |
| 274 | def_bool y |
| 275 | depends on PPC_STD_MMU && PPC32 |
| 276 | |
Benjamin Herrenschmidt | 5e69661 | 2008-12-18 19:13:24 +0000 | [diff] [blame] | 277 | config PPC_STD_MMU_64 |
| 278 | def_bool y |
| 279 | depends on PPC_STD_MMU && PPC64 |
| 280 | |
| 281 | config PPC_MMU_NOHASH |
| 282 | def_bool y |
| 283 | depends on !PPC_STD_MMU |
| 284 | |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 285 | config PPC_MMU_NOHASH_32 |
| 286 | def_bool y |
| 287 | depends on PPC_MMU_NOHASH && PPC32 |
| 288 | |
| 289 | config PPC_MMU_NOHASH_64 |
| 290 | def_bool y |
| 291 | depends on PPC_MMU_NOHASH && PPC64 |
| 292 | |
Kumar Gala | 70fe3af | 2009-02-12 16:12:40 -0600 | [diff] [blame] | 293 | config PPC_BOOK3E_MMU |
| 294 | def_bool y |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 295 | depends on FSL_BOOKE || PPC_BOOK3E |
Kumar Gala | 70fe3af | 2009-02-12 16:12:40 -0600 | [diff] [blame] | 296 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 297 | config PPC_MM_SLICES |
| 298 | bool |
Ilya Yanok | ca9153a | 2008-12-11 04:55:41 +0300 | [diff] [blame] | 299 | default y if HUGETLB_PAGE || (PPC_STD_MMU_64 && PPC_64K_PAGES) |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 300 | default n |
| 301 | |
| 302 | config VIRT_CPU_ACCOUNTING |
| 303 | bool "Deterministic task and CPU time accounting" |
| 304 | depends on PPC64 |
| 305 | default y |
| 306 | help |
| 307 | Select this option to enable more accurate task and CPU time |
| 308 | accounting. This is done by reading a CPU counter on each |
| 309 | kernel entry and exit and on transitions within the kernel |
| 310 | between system, softirq and hardirq state, so there is a |
| 311 | small performance impact. This also enables accounting of |
| 312 | stolen time on logically-partitioned systems running on |
| 313 | IBM POWER5-based machines. |
| 314 | |
| 315 | If in doubt, say Y here. |
| 316 | |
Paul Mackerras | 105988c | 2009-06-17 21:50:04 +1000 | [diff] [blame] | 317 | config PPC_HAVE_PMU_SUPPORT |
| 318 | bool |
| 319 | |
| 320 | config PPC_PERF_CTRS |
| 321 | def_bool y |
Ingo Molnar | cdd6c48 | 2009-09-21 12:02:48 +0200 | [diff] [blame] | 322 | depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT |
Paul Mackerras | 105988c | 2009-06-17 21:50:04 +1000 | [diff] [blame] | 323 | help |
Ingo Molnar | cdd6c48 | 2009-09-21 12:02:48 +0200 | [diff] [blame] | 324 | This enables the powerpc-specific perf_event back-end. |
Paul Mackerras | 105988c | 2009-06-17 21:50:04 +1000 | [diff] [blame] | 325 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 326 | config SMP |
Dave Kleikamp | e7f75ad | 2010-03-05 10:43:12 +0000 | [diff] [blame] | 327 | depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 328 | bool "Symmetric multi-processing support" |
| 329 | ---help--- |
| 330 | This enables support for systems with more than one CPU. If you have |
| 331 | a system with only one CPU, say N. If you have a system with more |
| 332 | than one CPU, say Y. Note that the kernel does not currently |
| 333 | support SMP machines with 603/603e/603ev or PPC750 ("G3") processors |
| 334 | since they have inadequate hardware support for multiprocessor |
| 335 | operation. |
| 336 | |
| 337 | If you say N here, the kernel will run on single and multiprocessor |
| 338 | machines, but will use only one CPU of a multiprocessor machine. If |
| 339 | you say Y here, the kernel will run on single-processor machines. |
| 340 | On a single-processor machine, the kernel will run faster if you say |
| 341 | N here. |
| 342 | |
| 343 | If you don't know what to do here, say N. |
| 344 | |
| 345 | config NR_CPUS |
Michael Neuling | 2d8ae63 | 2009-05-17 15:13:16 +0000 | [diff] [blame] | 346 | int "Maximum number of CPUs (2-8192)" |
| 347 | range 2 8192 |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 348 | depends on SMP |
| 349 | default "32" if PPC64 |
| 350 | default "4" |
| 351 | |
| 352 | config NOT_COHERENT_CACHE |
| 353 | bool |
Albert Herranz | b91a143 | 2009-12-12 06:31:38 +0000 | [diff] [blame] | 354 | depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON |
Dave Kleikamp | e7f75ad | 2010-03-05 10:43:12 +0000 | [diff] [blame] | 355 | default n if PPC_47x |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 356 | default y |
| 357 | |
Robert P. J. Day | f8eb77d | 2007-07-18 08:21:29 +1000 | [diff] [blame] | 358 | config CHECK_CACHE_COHERENCY |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 359 | bool |
| 360 | |
| 361 | endmenu |