blob: 1f8ec72c5dcb7be1064f75c476ec7cc45c6f886b [file] [log] [blame]
James Smartda0436e2009-05-22 14:51:39 -04001/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2009 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com *
7 * *
8 * This program is free software; you can redistribute it and/or *
9 * modify it under the terms of version 2 of the GNU General *
10 * Public License as published by the Free Software Foundation. *
11 * This program is distributed in the hope that it will be useful. *
12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
16 * TO BE LEGALLY INVALID. See the GNU General Public License for *
17 * more details, a copy of which can be found in the file COPYING *
18 * included with this package. *
19 *******************************************************************/
20
21#define LPFC_ACTIVE_MBOX_WAIT_CNT 100
22#define LPFC_RELEASE_NOTIFICATION_INTERVAL 32
23#define LPFC_GET_QE_REL_INT 32
24#define LPFC_RPI_LOW_WATER_MARK 10
James Smartecfd03c2010-02-12 14:41:27 -050025
26/* Amount of time in seconds for waiting FCF rediscovery to complete */
27#define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */
28
James Smartda0436e2009-05-22 14:51:39 -040029/* Number of SGL entries can be posted in a 4KB nonembedded mbox command */
30#define LPFC_NEMBED_MBOX_SGL_CNT 254
31
32/* Multi-queue arrangement for fast-path FCP work queues */
33#define LPFC_FN_EQN_MAX 8
34#define LPFC_SP_EQN_DEF 1
James Smartdef9c7a2009-12-21 17:02:28 -050035#define LPFC_FP_EQN_DEF 4
James Smartda0436e2009-05-22 14:51:39 -040036#define LPFC_FP_EQN_MIN 1
37#define LPFC_FP_EQN_MAX (LPFC_FN_EQN_MAX - LPFC_SP_EQN_DEF)
38
39#define LPFC_FN_WQN_MAX 32
40#define LPFC_SP_WQN_DEF 1
41#define LPFC_FP_WQN_DEF 4
42#define LPFC_FP_WQN_MIN 1
43#define LPFC_FP_WQN_MAX (LPFC_FN_WQN_MAX - LPFC_SP_WQN_DEF)
44
45/*
46 * Provide the default FCF Record attributes used by the driver
47 * when nonFIP mode is configured and there is no other default
48 * FCF Record attributes.
49 */
50#define LPFC_FCOE_FCF_DEF_INDEX 0
51#define LPFC_FCOE_FCF_GET_FIRST 0xFFFF
52#define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF
53
54/* First 3 bytes of default FCF MAC is specified by FC_MAP */
55#define LPFC_FCOE_FCF_MAC3 0xFF
56#define LPFC_FCOE_FCF_MAC4 0xFF
57#define LPFC_FCOE_FCF_MAC5 0xFE
58#define LPFC_FCOE_FCF_MAP0 0x0E
59#define LPFC_FCOE_FCF_MAP1 0xFC
60#define LPFC_FCOE_FCF_MAP2 0x00
James Smart98fc5dd2010-06-07 15:24:29 -040061#define LPFC_FCOE_MAX_RCV_SIZE 0x800
James Smartda0436e2009-05-22 14:51:39 -040062#define LPFC_FCOE_FKA_ADV_PER 0
63#define LPFC_FCOE_FIP_PRIORITY 0x80
64
James Smart6669f9b2009-10-02 15:16:45 -040065#define sli4_sid_from_fc_hdr(fc_hdr) \
66 ((fc_hdr)->fh_s_id[0] << 16 | \
67 (fc_hdr)->fh_s_id[1] << 8 | \
68 (fc_hdr)->fh_s_id[2])
69
James Smart5ffc2662009-11-18 15:39:44 -050070#define sli4_fctl_from_fc_hdr(fc_hdr) \
71 ((fc_hdr)->fh_f_ctl[0] << 16 | \
72 (fc_hdr)->fh_f_ctl[1] << 8 | \
73 (fc_hdr)->fh_f_ctl[2])
74
James Smartda0436e2009-05-22 14:51:39 -040075enum lpfc_sli4_queue_type {
76 LPFC_EQ,
77 LPFC_GCQ,
78 LPFC_MCQ,
79 LPFC_WCQ,
80 LPFC_RCQ,
81 LPFC_MQ,
82 LPFC_WQ,
83 LPFC_HRQ,
84 LPFC_DRQ
85};
86
87/* The queue sub-type defines the functional purpose of the queue */
88enum lpfc_sli4_queue_subtype {
89 LPFC_NONE,
90 LPFC_MBOX,
91 LPFC_FCP,
92 LPFC_ELS,
93 LPFC_USOL
94};
95
96union sli4_qe {
97 void *address;
98 struct lpfc_eqe *eqe;
99 struct lpfc_cqe *cqe;
100 struct lpfc_mcqe *mcqe;
101 struct lpfc_wcqe_complete *wcqe_complete;
102 struct lpfc_wcqe_release *wcqe_release;
103 struct sli4_wcqe_xri_aborted *wcqe_xri_aborted;
104 struct lpfc_rcqe_complete *rcqe_complete;
105 struct lpfc_mqe *mqe;
106 union lpfc_wqe *wqe;
107 struct lpfc_rqe *rqe;
108};
109
110struct lpfc_queue {
111 struct list_head list;
112 enum lpfc_sli4_queue_type type;
113 enum lpfc_sli4_queue_subtype subtype;
114 struct lpfc_hba *phba;
115 struct list_head child_list;
116 uint32_t entry_count; /* Number of entries to support on the queue */
117 uint32_t entry_size; /* Size of each queue entry. */
118 uint32_t queue_id; /* Queue ID assigned by the hardware */
119 struct list_head page_list;
120 uint32_t page_count; /* Number of pages allocated for this queue */
121
122 uint32_t host_index; /* The host's index for putting or getting */
123 uint32_t hba_index; /* The last known hba index for get or put */
124 union sli4_qe qe[1]; /* array to index entries (must be last) */
125};
126
James Smartda0436e2009-05-22 14:51:39 -0400127struct lpfc_sli4_link {
128 uint8_t speed;
129 uint8_t duplex;
130 uint8_t status;
131 uint8_t physical;
132 uint8_t fault;
James Smart65467b62010-01-26 23:08:29 -0500133 uint16_t logical_speed;
James Smartda0436e2009-05-22 14:51:39 -0400134};
135
James Smartecfd03c2010-02-12 14:41:27 -0500136struct lpfc_fcf_rec {
137 uint8_t fabric_name[8];
138 uint8_t switch_name[8];
James Smartda0436e2009-05-22 14:51:39 -0400139 uint8_t mac_addr[6];
140 uint16_t fcf_indx;
James Smartecfd03c2010-02-12 14:41:27 -0500141 uint32_t priority;
142 uint16_t vlan_id;
143 uint32_t addr_mode;
144 uint32_t flag;
145#define BOOT_ENABLE 0x01
146#define RECORD_VALID 0x02
147};
148
149struct lpfc_fcf {
James Smartda0436e2009-05-22 14:51:39 -0400150 uint16_t fcfi;
151 uint32_t fcf_flag;
152#define FCF_AVAILABLE 0x01 /* FCF available for discovery */
153#define FCF_REGISTERED 0x02 /* FCF registered with FW */
James Smartecfd03c2010-02-12 14:41:27 -0500154#define FCF_SCAN_DONE 0x04 /* FCF table scan done */
155#define FCF_IN_USE 0x08 /* Atleast one discovery completed */
James Smart0c9ab6f2010-02-26 14:15:57 -0500156#define FCF_INIT_DISC 0x10 /* Initial FCF discovery */
157#define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */
158#define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */
159#define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC)
160#define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */
161#define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */
162#define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */
James Smartda0436e2009-05-22 14:51:39 -0400163 uint32_t addr_mode;
James Smart0c9ab6f2010-02-26 14:15:57 -0500164 uint16_t fcf_rr_init_indx;
James Smart999d8132010-03-15 11:24:56 -0400165 uint32_t eligible_fcf_cnt;
James Smartecfd03c2010-02-12 14:41:27 -0500166 struct lpfc_fcf_rec current_rec;
167 struct lpfc_fcf_rec failover_rec;
168 struct timer_list redisc_wait;
James Smart0c9ab6f2010-02-26 14:15:57 -0500169 unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */
James Smartda0436e2009-05-22 14:51:39 -0400170};
171
James Smart0c9ab6f2010-02-26 14:15:57 -0500172/*
173 * Maximum FCF table index, it is for driver internal book keeping, it
174 * just needs to be no less than the supported HBA's FCF table size.
175 */
176#define LPFC_SLI4_FCF_TBL_INDX_MAX 32
177
James Smartda0436e2009-05-22 14:51:39 -0400178#define LPFC_REGION23_SIGNATURE "RG23"
179#define LPFC_REGION23_VERSION 1
180#define LPFC_REGION23_LAST_REC 0xff
James Smarta0c87cb2009-07-19 10:01:10 -0400181#define DRIVER_SPECIFIC_TYPE 0xA2
182#define LINUX_DRIVER_ID 0x20
183#define PORT_STE_TYPE 0x1
184
James Smartda0436e2009-05-22 14:51:39 -0400185struct lpfc_fip_param_hdr {
186 uint8_t type;
187#define FCOE_PARAM_TYPE 0xA0
188 uint8_t length;
189#define FCOE_PARAM_LENGTH 2
190 uint8_t parm_version;
191#define FIPP_VERSION 0x01
192 uint8_t parm_flags;
193#define lpfc_fip_param_hdr_fipp_mode_SHIFT 6
194#define lpfc_fip_param_hdr_fipp_mode_MASK 0x3
195#define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags
James Smart6a9c52c2009-10-02 15:16:51 -0400196#define FIPP_MODE_ON 0x1
James Smartda0436e2009-05-22 14:51:39 -0400197#define FIPP_MODE_OFF 0x0
198#define FIPP_VLAN_VALID 0x1
199};
200
201struct lpfc_fcoe_params {
202 uint8_t fc_map[3];
203 uint8_t reserved1;
204 uint16_t vlan_tag;
205 uint8_t reserved[2];
206};
207
208struct lpfc_fcf_conn_hdr {
209 uint8_t type;
210#define FCOE_CONN_TBL_TYPE 0xA1
211 uint8_t length; /* words */
212 uint8_t reserved[2];
213};
214
215struct lpfc_fcf_conn_rec {
216 uint16_t flags;
217#define FCFCNCT_VALID 0x0001
218#define FCFCNCT_BOOT 0x0002
219#define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */
220#define FCFCNCT_FBNM_VALID 0x0008
221#define FCFCNCT_SWNM_VALID 0x0010
222#define FCFCNCT_VLAN_VALID 0x0020
223#define FCFCNCT_AM_VALID 0x0040
224#define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */
225#define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */
226
227 uint16_t vlan_tag;
228 uint8_t fabric_name[8];
229 uint8_t switch_name[8];
230};
231
232struct lpfc_fcf_conn_entry {
233 struct list_head list;
234 struct lpfc_fcf_conn_rec conn_rec;
235};
236
237/*
238 * Define the host's bootstrap mailbox. This structure contains
239 * the member attributes needed to create, use, and destroy the
240 * bootstrap mailbox region.
241 *
242 * The macro definitions for the bmbx data structure are defined
243 * in lpfc_hw4.h with the register definition.
244 */
245struct lpfc_bmbx {
246 struct lpfc_dmabuf *dmabuf;
247 struct dma_address dma_address;
248 void *avirt;
249 dma_addr_t aphys;
250 uint32_t bmbx_size;
251};
252
253#define LPFC_EQE_SIZE LPFC_EQE_SIZE_4
254
255#define LPFC_EQE_SIZE_4B 4
256#define LPFC_EQE_SIZE_16B 16
257#define LPFC_CQE_SIZE 16
258#define LPFC_WQE_SIZE 64
259#define LPFC_MQE_SIZE 256
260#define LPFC_RQE_SIZE 8
261
262#define LPFC_EQE_DEF_COUNT 1024
263#define LPFC_CQE_DEF_COUNT 256
James Smartf1126682009-06-10 17:22:44 -0400264#define LPFC_WQE_DEF_COUNT 256
James Smartda0436e2009-05-22 14:51:39 -0400265#define LPFC_MQE_DEF_COUNT 16
266#define LPFC_RQE_DEF_COUNT 512
267
268#define LPFC_QUEUE_NOARM false
269#define LPFC_QUEUE_REARM true
270
271
272/*
273 * SLI4 CT field defines
274 */
275#define SLI4_CT_RPI 0
276#define SLI4_CT_VPI 1
277#define SLI4_CT_VFI 2
278#define SLI4_CT_FCFI 3
279
James Smart28baac72010-02-12 14:42:03 -0500280#define LPFC_SLI4_FL1_MAX_SEGMENT_SIZE 0x10000
281#define LPFC_SLI4_FL1_MAX_BUF_SIZE 0X2000
282#define LPFC_SLI4_MIN_BUF_SIZE 0x400
283#define LPFC_SLI4_MAX_BUF_SIZE 0x20000
James Smartda0436e2009-05-22 14:51:39 -0400284
285/*
286 * SLI4 specific data structures
287 */
288struct lpfc_max_cfg_param {
289 uint16_t max_xri;
290 uint16_t xri_base;
291 uint16_t xri_used;
292 uint16_t max_rpi;
293 uint16_t rpi_base;
294 uint16_t rpi_used;
295 uint16_t max_vpi;
296 uint16_t vpi_base;
297 uint16_t vpi_used;
298 uint16_t max_vfi;
299 uint16_t vfi_base;
300 uint16_t vfi_used;
301 uint16_t max_fcfi;
302 uint16_t fcfi_base;
303 uint16_t fcfi_used;
304 uint16_t max_eq;
305 uint16_t max_rq;
306 uint16_t max_cq;
307 uint16_t max_wq;
308};
309
310struct lpfc_hba;
311/* SLI4 HBA multi-fcp queue handler struct */
312struct lpfc_fcp_eq_hdl {
313 uint32_t idx;
314 struct lpfc_hba *phba;
315};
316
James Smart28baac72010-02-12 14:42:03 -0500317/* Port Capabilities for SLI4 Parameters */
318struct lpfc_pc_sli4_params {
319 uint32_t supported;
320 uint32_t if_type;
321 uint32_t sli_rev;
322 uint32_t sli_family;
323 uint32_t featurelevel_1;
324 uint32_t featurelevel_2;
325 uint32_t proto_types;
326#define LPFC_SLI4_PROTO_FCOE 0x0000001
327#define LPFC_SLI4_PROTO_FC 0x0000002
328#define LPFC_SLI4_PROTO_NIC 0x0000004
329#define LPFC_SLI4_PROTO_ISCSI 0x0000008
330#define LPFC_SLI4_PROTO_RDMA 0x0000010
331 uint32_t sge_supp_len;
332 uint32_t if_page_sz;
333 uint32_t rq_db_window;
334 uint32_t loopbk_scope;
335 uint32_t eq_pages_max;
336 uint32_t eqe_size;
337 uint32_t cq_pages_max;
338 uint32_t cqe_size;
339 uint32_t mq_pages_max;
340 uint32_t mqe_size;
341 uint32_t mq_elem_cnt;
342 uint32_t wq_pages_max;
343 uint32_t wqe_size;
344 uint32_t rq_pages_max;
345 uint32_t rqe_size;
346 uint32_t hdr_pages_max;
347 uint32_t hdr_size;
348 uint32_t hdr_pp_align;
349 uint32_t sgl_pages_max;
350 uint32_t sgl_pp_align;
351};
352
James Smartda0436e2009-05-22 14:51:39 -0400353/* SLI4 HBA data structure entries */
354struct lpfc_sli4_hba {
355 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for
356 PCI BAR0, config space registers */
357 void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for
358 PCI BAR1, control registers */
359 void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for
360 PCI BAR2, doorbell registers */
361 /* BAR0 PCI config space register memory map */
362 void __iomem *UERRLOregaddr; /* Address to UERR_STATUS_LO register */
363 void __iomem *UERRHIregaddr; /* Address to UERR_STATUS_HI register */
James Smarta747c9c2009-11-18 15:41:10 -0500364 void __iomem *UEMASKLOregaddr; /* Address to UE_MASK_LO register */
365 void __iomem *UEMASKHIregaddr; /* Address to UE_MASK_HI register */
James Smart28baac72010-02-12 14:42:03 -0500366 void __iomem *SLIINTFregaddr; /* Address to SLI_INTF register */
James Smartda0436e2009-05-22 14:51:39 -0400367 /* BAR1 FCoE function CSR register memory map */
368 void __iomem *STAregaddr; /* Address to HST_STATE register */
369 void __iomem *ISRregaddr; /* Address to HST_ISR register */
370 void __iomem *IMRregaddr; /* Address to HST_IMR register */
371 void __iomem *ISCRregaddr; /* Address to HST_ISCR register */
372 /* BAR2 VF-0 doorbell register memory map */
373 void __iomem *RQDBregaddr; /* Address to RQ_DOORBELL register */
374 void __iomem *WQDBregaddr; /* Address to WQ_DOORBELL register */
375 void __iomem *EQCQDBregaddr; /* Address to EQCQ_DOORBELL register */
376 void __iomem *MQDBregaddr; /* Address to MQ_DOORBELL register */
377 void __iomem *BMBXregaddr; /* Address to BootStrap MBX register */
378
James Smarta747c9c2009-11-18 15:41:10 -0500379 uint32_t ue_mask_lo;
380 uint32_t ue_mask_hi;
James Smart28baac72010-02-12 14:42:03 -0500381 struct lpfc_register sli_intf;
382 struct lpfc_pc_sli4_params pc_sli4_params;
James Smartda0436e2009-05-22 14:51:39 -0400383 struct msix_entry *msix_entries;
384 uint32_t cfg_eqn;
385 struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */
386 /* Pointers to the constructed SLI4 queues */
387 struct lpfc_queue **fp_eq; /* Fast-path event queue */
388 struct lpfc_queue *sp_eq; /* Slow-path event queue */
389 struct lpfc_queue **fcp_wq;/* Fast-path FCP work queue */
390 struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */
391 struct lpfc_queue *els_wq; /* Slow-path ELS work queue */
392 struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */
393 struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */
394 struct lpfc_queue **fcp_cq;/* Fast-path FCP compl queue */
395 struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */
396 struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */
James Smartda0436e2009-05-22 14:51:39 -0400397
398 /* Setup information for various queue parameters */
399 int eq_esize;
400 int eq_ecount;
401 int cq_esize;
402 int cq_ecount;
403 int wq_esize;
404 int wq_ecount;
405 int mq_esize;
406 int mq_ecount;
407 int rq_esize;
408 int rq_ecount;
409#define LPFC_SP_EQ_MAX_INTR_SEC 10000
410#define LPFC_FP_EQ_MAX_INTR_SEC 10000
411
412 uint32_t intr_enable;
413 struct lpfc_bmbx bmbx;
414 struct lpfc_max_cfg_param max_cfg_param;
415 uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */
416 uint16_t next_rpi;
417 uint16_t scsi_xri_max;
418 uint16_t scsi_xri_cnt;
419 struct list_head lpfc_free_sgl_list;
420 struct list_head lpfc_sgl_list;
421 struct lpfc_sglq **lpfc_els_sgl_array;
422 struct list_head lpfc_abts_els_sgl_list;
423 struct lpfc_scsi_buf **lpfc_scsi_psb_array;
424 struct list_head lpfc_abts_scsi_buf_list;
425 uint32_t total_sglq_bufs;
426 struct lpfc_sglq **lpfc_sglq_active_list;
427 struct list_head lpfc_rpi_hdr_list;
428 unsigned long *rpi_bmask;
429 uint16_t rpi_count;
430 struct lpfc_sli4_flags sli4_flags;
James Smart45ed1192009-10-02 15:17:02 -0400431 struct list_head sp_queue_event;
James Smartda0436e2009-05-22 14:51:39 -0400432 struct list_head sp_cqe_event_pool;
433 struct list_head sp_asynce_work_queue;
434 struct list_head sp_fcp_xri_aborted_work_queue;
435 struct list_head sp_els_xri_aborted_work_queue;
436 struct list_head sp_unsol_work_queue;
437 struct lpfc_sli4_link link_state;
438 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */
439 spinlock_t abts_sgl_list_lock; /* list of aborted els IOs */
440};
441
442enum lpfc_sge_type {
443 GEN_BUFF_TYPE,
444 SCSI_BUFF_TYPE
445};
446
James Smart0f65ff62010-02-26 14:14:23 -0500447enum lpfc_sgl_state {
448 SGL_FREED,
449 SGL_ALLOCATED,
450 SGL_XRI_ABORTED
451};
452
James Smartda0436e2009-05-22 14:51:39 -0400453struct lpfc_sglq {
454 /* lpfc_sglqs are used in double linked lists */
455 struct list_head list;
456 struct list_head clist;
457 enum lpfc_sge_type buff_type; /* is this a scsi sgl */
James Smart0f65ff62010-02-26 14:14:23 -0500458 enum lpfc_sgl_state state;
James Smartda0436e2009-05-22 14:51:39 -0400459 uint16_t iotag; /* pre-assigned IO tag */
460 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */
461 struct sli4_sge *sgl; /* pre-assigned SGL */
462 void *virt; /* virtual address. */
463 dma_addr_t phys; /* physical address */
464};
465
466struct lpfc_rpi_hdr {
467 struct list_head list;
468 uint32_t len;
469 struct lpfc_dmabuf *dmabuf;
470 uint32_t page_count;
471 uint32_t start_rpi;
472};
473
474/*
475 * SLI4 specific function prototypes
476 */
477int lpfc_pci_function_reset(struct lpfc_hba *);
478int lpfc_sli4_hba_setup(struct lpfc_hba *);
479int lpfc_sli4_hba_down(struct lpfc_hba *);
480int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t,
481 uint8_t, uint32_t, bool);
482void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *);
483void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t);
484void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t,
485 struct lpfc_mbx_sge *);
James Smart0c9ab6f2010-02-26 14:15:57 -0500486int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *,
487 uint16_t);
James Smartda0436e2009-05-22 14:51:39 -0400488
489void lpfc_sli4_hba_reset(struct lpfc_hba *);
490struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t,
491 uint32_t);
492void lpfc_sli4_queue_free(struct lpfc_queue *);
493uint32_t lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint16_t);
494uint32_t lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *,
495 struct lpfc_queue *, uint32_t, uint32_t);
James Smartb19a0612010-04-06 14:48:51 -0400496int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *,
497 struct lpfc_queue *, uint32_t);
James Smartda0436e2009-05-22 14:51:39 -0400498uint32_t lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *,
499 struct lpfc_queue *, uint32_t);
500uint32_t lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *,
501 struct lpfc_queue *, struct lpfc_queue *, uint32_t);
502uint32_t lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *);
503uint32_t lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *);
504uint32_t lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *);
505uint32_t lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *);
506uint32_t lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *,
507 struct lpfc_queue *);
508int lpfc_sli4_queue_setup(struct lpfc_hba *);
509void lpfc_sli4_queue_unset(struct lpfc_hba *);
510int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t);
511int lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *);
512int lpfc_sli4_remove_all_sgl_pages(struct lpfc_hba *);
513uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *);
514int lpfc_sli4_post_async_mbox(struct lpfc_hba *);
515int lpfc_sli4_post_sgl_list(struct lpfc_hba *phba);
516int lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *, struct list_head *, int);
517struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
518struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
519void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
520void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
521int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *);
522int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *);
523int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *);
524struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *);
525void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *);
526int lpfc_sli4_alloc_rpi(struct lpfc_hba *);
527void lpfc_sli4_free_rpi(struct lpfc_hba *, int);
528void lpfc_sli4_remove_rpis(struct lpfc_hba *);
529void lpfc_sli4_async_event_proc(struct lpfc_hba *);
James Smartecfd03c2010-02-12 14:41:27 -0500530void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *);
James Smartda0436e2009-05-22 14:51:39 -0400531int lpfc_sli4_resume_rpi(struct lpfc_nodelist *);
532void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *);
533void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *);
534void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *,
535 struct sli4_wcqe_xri_aborted *);
536void lpfc_sli4_els_xri_aborted(struct lpfc_hba *,
537 struct sli4_wcqe_xri_aborted *);
538int lpfc_sli4_brdreset(struct lpfc_hba *);
539int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *);
540void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *);
541int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *);
542int lpfc_sli4_init_vpi(struct lpfc_hba *, uint16_t);
543uint32_t lpfc_sli4_cq_release(struct lpfc_queue *, bool);
544uint32_t lpfc_sli4_eq_release(struct lpfc_queue *, bool);
545void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t);
James Smart0c9ab6f2010-02-26 14:15:57 -0500546int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t);
547int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t);
548int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t);
549void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
550void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
551void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
552int lpfc_sli4_unregister_fcf(struct lpfc_hba *);
James Smartda0436e2009-05-22 14:51:39 -0400553int lpfc_sli4_post_status_check(struct lpfc_hba *);
554uint8_t lpfc_sli4_mbox_opcode_get(struct lpfc_hba *, struct lpfcMboxq *);
555