Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1 | Qualcomm Technologies, Inc. SDE KMS |
| 2 | |
| 3 | Snapdragon Display Engine implements Linux DRM/KMS APIs to drive user |
| 4 | interface to different panel interfaces. SDE driver is the core of |
| 5 | display subsystem which manage all data paths to different panel interfaces. |
| 6 | |
| 7 | Required properties |
| 8 | - compatible: Must be "qcom,sde-kms" |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 9 | - compatible: "msm-hdmi-audio-codec-rx"; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 10 | - reg: Offset and length of the register set for the device. |
| 11 | - reg-names : Names to refer to register sets related to this device |
| 12 | - clocks: List of Phandles for clock device nodes |
| 13 | needed by the device. |
| 14 | - clock-names: List of clock names needed by the device. |
| 15 | - mmagic-supply: Phandle for mmagic mdss supply regulator device node. |
| 16 | - vdd-supply: Phandle for vdd regulator device node. |
| 17 | - interrupt-parent: Must be core interrupt controller. |
| 18 | - interrupts: Interrupt associated with MDSS. |
| 19 | - interrupt-controller: Mark the device node as an interrupt controller. |
| 20 | - #interrupt-cells: Should be one. The first cell is interrupt number. |
| 21 | - iommus: Specifies the SID's used by this context bank. |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 22 | - qcom,sde-sspp-type: Array of strings for SDE source surface pipes type information. |
| 23 | A source pipe can be "vig", "rgb", "dma" or "cursor" type. |
| 24 | Number of xin ids defined should match the number of offsets |
| 25 | defined in property: qcom,sde-sspp-off. |
| 26 | - qcom,sde-sspp-off: Array of offset for SDE source surface pipes. The offsets |
| 27 | are calculated from register "mdp_phys" defined in |
| 28 | reg property + "sde-off". The number of offsets defined here should |
| 29 | reflect the amount of pipes that can be active in SDE for |
| 30 | this configuration. |
| 31 | - qcom,sde-sspp-xin-id: Array of VBIF clients ids (xins) corresponding |
| 32 | to the respective source pipes. Number of xin ids |
| 33 | defined should match the number of offsets |
| 34 | defined in property: qcom,sde-sspp-off. |
| 35 | - qcom,sde-ctl-off: Array of offset addresses for the available ctl |
| 36 | hw blocks within SDE, these offsets are |
| 37 | calculated from register "mdp_phys" defined in |
| 38 | reg property. The number of ctl offsets defined |
| 39 | here should reflect the number of control paths |
| 40 | that can be configured concurrently on SDE for |
| 41 | this configuration. |
| 42 | - qcom,sde-wb-off: Array of offset addresses for the programmable |
| 43 | writeback blocks within SDE. |
| 44 | - qcom,sde-wb-xin-id: Array of VBIF clients ids (xins) corresponding |
| 45 | to the respective writeback. Number of xin ids |
| 46 | defined should match the number of offsets |
| 47 | defined in property: qcom,sde-wb-off. |
| 48 | - qcom,sde-mixer-off: Array of offset addresses for the available |
| 49 | mixer blocks that can drive data to panel |
| 50 | interfaces. These offsets are be calculated from |
| 51 | register "mdp_phys" defined in reg property. |
| 52 | The number of offsets defined should reflect the |
| 53 | amount of mixers that can drive data to a panel |
| 54 | interface. |
Rajesh Yadav | ec93afb | 2017-06-08 19:28:33 +0530 | [diff] [blame] | 55 | - qcom,sde-dspp-top-off: Offset address for the dspp top block. |
| 56 | The offset is calculated from register "mdp_phys" |
| 57 | defined in reg property. |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 58 | - qcom,sde-dspp-off: Array of offset addresses for the available dspp |
| 59 | blocks. These offsets are calculated from |
| 60 | register "mdp_phys" defined in reg property. |
| 61 | - qcom,sde-pp-off: Array of offset addresses for the available |
| 62 | pingpong blocks. These offsets are calculated |
| 63 | from register "mdp_phys" defined in reg property. |
Clarence Ip | 8e69ad0 | 2016-12-09 09:43:57 -0500 | [diff] [blame] | 64 | - qcom,sde-pp-slave: Array of flags indicating whether each ping pong |
| 65 | block may be configured as a pp slave. |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 66 | - qcom,sde-intf-off: Array of offset addresses for the available SDE |
| 67 | interface blocks that can drive data to a |
| 68 | panel controller. The offsets are calculated |
| 69 | from "mdp_phys" defined in reg property. The number |
| 70 | of offsets defined should reflect the number of |
| 71 | programmable interface blocks available in hardware. |
Veera Sundaram Sankaran | 370b991 | 2017-01-10 18:03:42 -0800 | [diff] [blame] | 72 | - qcom,sde-mixer-blend-op-off Array of offset addresses for the available |
| 73 | blending stages. The offsets are relative to |
| 74 | qcom,sde-mixer-off. |
| 75 | - qcom,sde-mixer-pair-mask Array of mixer numbers that can be paired with |
| 76 | mixer number corresponding to the array index. |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 77 | |
Dhaval Patel | 480dc52 | 2016-07-27 18:36:59 -0700 | [diff] [blame] | 78 | Optional properties: |
| 79 | - clock-rate: List of clock rates in Hz. |
Alan Kwong | 83b6cbe | 2016-09-17 20:08:37 -0400 | [diff] [blame] | 80 | - clock-max-rate: List of maximum clock rate in Hz that this device supports. |
Dhaval Patel | 480dc52 | 2016-07-27 18:36:59 -0700 | [diff] [blame] | 81 | - qcom,platform-supply-entries: A node that lists the elements of the supply. There |
| 82 | can be more than one instance of this binding, |
| 83 | in which case the entry would be appended with |
| 84 | the supply entry index. |
| 85 | e.g. qcom,platform-supply-entry@0 |
| 86 | -- reg: offset and length of the register set for the device. |
| 87 | -- qcom,supply-name: name of the supply (vdd/vdda/vddio) |
| 88 | -- qcom,supply-min-voltage: minimum voltage level (uV) |
| 89 | -- qcom,supply-max-voltage: maximum voltage level (uV) |
| 90 | -- qcom,supply-enable-load: load drawn (uA) from enabled supply |
| 91 | -- qcom,supply-disable-load: load drawn (uA) from disabled supply |
| 92 | -- qcom,supply-pre-on-sleep: time to sleep (ms) before turning on |
| 93 | -- qcom,supply-post-on-sleep: time to sleep (ms) after turning on |
| 94 | -- qcom,supply-pre-off-sleep: time to sleep (ms) before turning off |
| 95 | -- qcom,supply-post-off-sleep: time to sleep (ms) after turning off |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 96 | - qcom,sde-sspp-src-size: A u32 value indicates the address range for each sspp. |
| 97 | - qcom,sde-mixer-size: A u32 value indicates the address range for each mixer. |
| 98 | - qcom,sde-ctl-size: A u32 value indicates the address range for each ctl. |
| 99 | - qcom,sde-dspp-size: A u32 value indicates the address range for each dspp. |
| 100 | - qcom,sde-intf-size: A u32 value indicates the address range for each intf. |
| 101 | - qcom,sde-dsc-size: A u32 value indicates the address range for each dsc. |
| 102 | - qcom,sde-cdm-size: A u32 value indicates the address range for each cdm. |
| 103 | - qcom,sde-pp-size: A u32 value indicates the address range for each pingpong. |
| 104 | - qcom,sde-wb-size: A u32 value indicates the address range for each writeback. |
| 105 | - qcom,sde-len: A u32 entry for SDE address range. |
| 106 | - qcom,sde-intf-max-prefetch-lines: Array of u32 values for max prefetch lines on |
| 107 | each interface. |
| 108 | - qcom,sde-sspp-linewidth: A u32 value indicates the max sspp line width. |
| 109 | - qcom,sde-mixer-linewidth: A u32 value indicates the max mixer line width. |
| 110 | - qcom,sde-wb-linewidth: A u32 value indicates the max writeback line width. |
| 111 | - qcom,sde-sspp-scale-size: A u32 value indicates the scaling block size on sspp. |
| 112 | - qcom,sde-mixer-blendstages: A u32 value indicates the max mixer blend stages for |
| 113 | alpha blending. |
| 114 | - qcom,sde-qseed-type: A string entry indiates qseed support on sspp and wb. |
| 115 | It supports "qssedv3" and "qseedv2" entries for qseed |
| 116 | type. By default "qseedv2" is used if this optional property |
| 117 | is not defined. |
Dhaval Patel | 5aad745 | 2017-01-12 09:59:31 -0800 | [diff] [blame] | 118 | - qcom,sde-csc-type: A string entry indicates csc support on sspp and wb. |
| 119 | It supports "csc" and "csc-10bit" entries for csc |
| 120 | type. |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 121 | - qcom,sde-highest-bank-bit: A u32 property to indicate GPU/Camera/Video highest memory |
| 122 | bank bit used for tile format buffers. |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 123 | - qcom,sde-ubwc-version: Property to specify the UBWC feature version. |
| 124 | - qcom,sde-ubwc-static: Property to specify the default UBWC static |
| 125 | configuration value. |
| 126 | - qcom,sde-ubwc-swizzle: Property to specify the default UBWC swizzle |
| 127 | configuration value. |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 128 | - qcom,sde-panic-per-pipe: Boolean property to indicate if panic signal |
| 129 | control feature is available on each source pipe. |
| 130 | - qcom,sde-has-src-split: Boolean property to indicate if source split |
| 131 | feature is available or not. |
Veera Sundaram Sankaran | 3171ff8 | 2017-01-04 14:34:47 -0800 | [diff] [blame] | 132 | - qcom,sde-has-dim-layer: Boolean property to indicate if mixer has dim layer |
| 133 | feature is available or not. |
Veera Sundaram Sankaran | c9efbec | 2017-03-29 18:59:05 -0700 | [diff] [blame] | 134 | - qcom,sde-has-idle-pc: Boolean property to indicate if target has idle |
| 135 | power collapse feature available or not. |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 136 | - qcom,sde-has-mixer-gc: Boolean property to indicate if mixer has gamma correction |
| 137 | feature available or not. |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 138 | - qcom,sde-has-dest-scaler: Boolean property to indicate if destination scaler |
| 139 | feature is available or not. |
| 140 | - qcom,sde-max-dest-scaler-input-linewidth: A u32 value indicates the |
| 141 | maximum input line width to destination scaler. |
| 142 | - qcom,sde-max-dest-scaler-output-linewidth: A u32 value indicates the |
| 143 | maximum output line width of destination scaler. |
| 144 | - qcom,sde-dest-scaler-top-off: A u32 value provides the |
| 145 | offset from mdp base to destination scaler block. |
| 146 | - qcom,sde-dest-scaler-top-size: A u32 value indicates the address range for ds top |
| 147 | - qcom,sde-dest-scaler-off: Array of u32 offsets indicate the qseed3 scaler blocks |
| 148 | offset from destination scaler top offset. |
| 149 | - qcom,sde-dest-scaler-size: A u32 value indicates the address range for each scaler block |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 150 | - qcom,sde-sspp-clk-ctrl: Array of offsets describing clk control |
| 151 | offsets for dynamic clock gating. 1st value |
| 152 | in the array represents offset of the control |
| 153 | register. 2nd value represents bit offset within |
| 154 | control register. Number of offsets defined should |
| 155 | match the number of offsets defined in |
| 156 | property: qcom,sde-sspp-off |
| 157 | - qcom,sde-sspp-clk-status: Array of offsets describing clk status |
| 158 | offsets for dynamic clock gating. 1st value |
| 159 | in the array represents offset of the status |
| 160 | register. 2nd value represents bit offset within |
| 161 | control register. Number of offsets defined should |
| 162 | match the number of offsets defined in |
| 163 | property: qcom,sde-sspp-off. |
Veera Sundaram Sankaran | 02dd6ac | 2016-12-22 15:08:29 -0800 | [diff] [blame] | 164 | - qcom,sde-sspp-excl-rect: Array of u32 values indicating exclusion rectangle |
| 165 | support on each sspp. |
Jeykumar Sankaran | 2e65503 | 2017-02-04 14:05:45 -0800 | [diff] [blame] | 166 | - qcom,sde-sspp-smart-dma-priority: Array of u32 values indicating hw pipe |
| 167 | priority of secondary rectangles when smart dma |
| 168 | is supported. Number of priority values should |
| 169 | match the number of offsets defined in |
| 170 | qcom,sde-sspp-off node. Zero indicates no support |
| 171 | for smart dma for the sspp. |
| 172 | - qcom,sde-smart-dma-rev: A string entry indicating the smart dma version |
| 173 | supported on the device. Supported entries are |
| 174 | "smart_dma_v1" and "smart_dma_v2". |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 175 | - qcom,sde-intf-type: Array of string provides the interface type information. |
| 176 | Possible string values |
| 177 | "dsi" - dsi display interface |
| 178 | "dp" - Display Port interface |
| 179 | "hdmi" - HDMI display interface |
| 180 | An interface is considered as "none" if interface type |
| 181 | is not defined. |
| 182 | - qcom,sde-off: SDE offset from "mdp_phys" defined in reg property. |
| 183 | - qcom,sde-cdm-off: Array of offset addresses for the available |
| 184 | cdm blocks. These offsets will be calculated from |
| 185 | register "mdp_phys" defined in reg property. |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 186 | - qcom,sde-vbif-off: Array of offset addresses for the available |
| 187 | vbif blocks. These offsets will be calculated from |
| 188 | register "vbif_phys" defined in reg property. |
| 189 | - qcom,sde-vbif-size: A u32 value indicates the vbif block address range. |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 190 | - qcom,sde-te-off: A u32 offset indicates the te block offset on pingpong. |
| 191 | This offset is 0x0 by default. |
| 192 | - qcom,sde-te2-off: A u32 offset indicates the te2 block offset on pingpong. |
| 193 | - qcom,sde-te-size: A u32 value indicates the te block address range. |
| 194 | - qcom,sde-te2-size: A u32 value indicates the te2 block address range. |
| 195 | - qcom,sde-dsc-off: A u32 offset indicates the dsc block offset on pingpong. |
Ping Li | 8430ee1 | 2017-02-24 14:14:44 -0800 | [diff] [blame] | 196 | - qcom,sde-dither-off: A u32 offset indicates the dither block offset on pingpong. |
| 197 | - qcom,sde-dither-version: A u32 value indicates the dither block version. |
| 198 | - qcom,sde-dither-size: A u32 value indicates the dither block address range. |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 199 | - qcom,sde-sspp-vig-blocks: A node that lists the blocks inside the VIG hardware. The |
| 200 | block entries will contain the offset and version (if needed) |
| 201 | of each feature block. The presence of a block entry |
| 202 | indicates that the SSPP VIG contains that feature hardware. |
| 203 | e.g. qcom,sde-sspp-vig-blocks |
| 204 | -- qcom,sde-vig-csc-off: offset of CSC hardware |
| 205 | -- qcom,sde-vig-qseed-off: offset of QSEED hardware |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 206 | -- qcom,sde-vig-qseed-size: A u32 address range for qseed scaler. |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 207 | -- qcom,sde-vig-pcc: offset and version of PCC hardware |
| 208 | -- qcom,sde-vig-hsic: offset and version of global PA adjustment |
| 209 | -- qcom,sde-vig-memcolor: offset and version of PA memcolor hardware |
| 210 | - qcom,sde-sspp-rgb-blocks: A node that lists the blocks inside the RGB hardware. The |
| 211 | block entries will contain the offset and version (if needed) |
| 212 | of each feature block. The presence of a block entry |
| 213 | indicates that the SSPP RGB contains that feature hardware. |
| 214 | e.g. qcom,sde-sspp-vig-blocks |
| 215 | -- qcom,sde-rgb-scaler-off: offset of RGB scaler hardware |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 216 | -- qcom,sde-rgb-scaler-size: A u32 address range for scaler. |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 217 | -- qcom,sde-rgb-pcc: offset and version of PCC hardware |
| 218 | - qcom,sde-dspp-blocks: A node that lists the blocks inside the DSPP hardware. The |
| 219 | block entries will contain the offset and version of each |
| 220 | feature block. The presence of a block entry indicates that |
| 221 | the DSPP contains that feature hardware. |
| 222 | e.g. qcom,sde-dspp-blocks |
| 223 | -- qcom,sde-dspp-pcc: offset and version of PCC hardware |
| 224 | -- qcom,sde-dspp-gc: offset and version of GC hardware |
Rajesh Yadav | ec93afb | 2017-06-08 19:28:33 +0530 | [diff] [blame] | 225 | -- qcom,sde-dspp-igc: offset and version of IGC hardware |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 226 | -- qcom,sde-dspp-hsic: offset and version of global PA adjustment |
| 227 | -- qcom,sde-dspp-memcolor: offset and version of PA memcolor hardware |
| 228 | -- qcom,sde-dspp-sixzone: offset and version of PA sixzone hardware |
| 229 | -- qcom,sde-dspp-gamut: offset and version of Gamut mapping hardware |
| 230 | -- qcom,sde-dspp-dither: offset and version of dither hardware |
| 231 | -- qcom,sde-dspp-hist: offset and version of histogram hardware |
| 232 | -- qcom,sde-dspp-vlut: offset and version of PA vLUT hardware |
| 233 | - qcom,sde-mixer-blocks: A node that lists the blocks inside the layer mixer hardware. The |
| 234 | block entries will contain the offset and version (if needed) |
| 235 | of each feature block. The presence of a block entry |
| 236 | indicates that the layer mixer contains that feature hardware. |
| 237 | e.g. qcom,sde-mixer-blocks |
| 238 | -- qcom,sde-mixer-gc: offset and version of mixer GC hardware |
| 239 | - qcom,sde-dspp-ad-off: Array of u32 offsets indicate the ad block offset from the |
| 240 | DSPP offset. Since AD hardware is represented as part of |
| 241 | DSPP block, the AD offsets must be offset from the |
| 242 | corresponding DSPP base. |
| 243 | - qcom,sde-dspp-ad-version A u32 value indicating the version of the AD hardware |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 244 | - qcom,sde-vbif-id: Array of vbif ids corresponding to the |
| 245 | offsets defined in property: qcom,sde-vbif-off. |
| 246 | - qcom,sde-vbif-default-ot-rd-limit: A u32 value indicates the default read OT limit |
| 247 | - qcom,sde-vbif-default-ot-wr-limit: A u32 value indicates the default write OT limit |
| 248 | - qcom,sde-vbif-dynamic-ot-rd-limit: A series of 2 cell property, with a format |
| 249 | of (pps, OT limit), where pps is pixel per second and |
| 250 | OT limit is the read limit to apply if the given |
| 251 | pps is not exceeded. |
| 252 | - qcom,sde-vbif-dynamic-ot-wr-limit: A series of 2 cell property, with a format |
| 253 | of (pps, OT limit), where pps is pixel per second and |
| 254 | OT limit is the write limit to apply if the given |
| 255 | pps is not exceeded. |
Clarence Ip | 7f0de63 | 2017-05-31 14:59:14 -0400 | [diff] [blame] | 256 | - qcom,sde-vbif-memtype-0: Array of u32 vbif memory type settings, group 0 |
| 257 | - qcom,sde-vbif-memtype-1: Array of u32 vbif memory type settings, group 1 |
Alan Kwong | 1462733 | 2016-10-12 16:44:00 -0400 | [diff] [blame] | 258 | - qcom,sde-wb-id: Array of writeback ids corresponding to the |
| 259 | offsets defined in property: qcom,sde-wb-off. |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 260 | - qcom,sde-wb-clk-ctrl: Array of 2 cell property describing clk control |
| 261 | offsets for dynamic clock gating. 1st value |
| 262 | in the array represents offset of the control |
| 263 | register. 2nd value represents bit offset within |
| 264 | control register. Number of offsets defined should |
| 265 | match the number of offsets defined in |
| 266 | property: qcom,sde-wb-off |
Gopikrishnaiah Anandan | 031d8ff | 2016-12-15 16:58:45 -0800 | [diff] [blame] | 267 | - qcom,sde-reg-dma-off: Offset of the register dma hardware block from |
| 268 | "regdma_phys" defined in reg property. |
| 269 | - qcom,sde-reg-dma-version: Version of the reg dma hardware block. |
| 270 | - qcom,sde-reg-dma-trigger-off: Offset of the lut dma trigger reg from "mdp_phys" |
| 271 | defined in reg property. |
Alan Kwong | 67a3f79 | 2016-11-01 23:16:53 -0400 | [diff] [blame] | 272 | - qcom,sde-dram-channels: This represents the number of channels in the |
| 273 | Bus memory controller. |
| 274 | - qcom,sde-num-nrt-paths: Integer property represents the number of non-realtime |
| 275 | paths in each Bus Scaling Usecase. This value depends on |
| 276 | number of AXI ports that are dedicated to non-realtime VBIF |
| 277 | for particular chipset. |
| 278 | These paths must be defined after rt-paths in |
| 279 | "qcom,msm-bus,vectors-KBps" vector request. |
Alan Kwong | 9aa061c | 2016-11-06 21:17:12 -0500 | [diff] [blame] | 280 | - qcom,sde-max-bw-low-kbps: This value indicates the max bandwidth in Kbps |
| 281 | that can be supported without underflow. |
| 282 | This is a low bandwidth threshold which should |
| 283 | be applied in most scenarios to be safe from |
| 284 | underflows when unable to satisfy bandwidth |
| 285 | requirements. |
| 286 | - qcom,sde-max-bw-high-kbps: This value indicates the max bandwidth in Kbps |
| 287 | that can be supported without underflow. |
| 288 | This is a high bandwidth threshold which can be |
| 289 | applied in scenarios where panel interface can |
| 290 | be more tolerant to memory latency such as |
| 291 | command mode panels. |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 292 | - qcom,sde-core-ib-ff: A string entry indicating the fudge factor for |
| 293 | core ib calculation. |
| 294 | - qcom,sde-core-clk-ff: A string entry indicating the fudge factor for |
| 295 | core clock calculation. |
Narendra Muppalla | a50934b | 2017-08-15 19:43:37 -0700 | [diff] [blame] | 296 | - qcom,sde-min-core-ib-kbps: This u32 value indicates the minimum mnoc ib |
| 297 | vote in Kbps that can be reduced without hitting underflow. |
| 298 | BW calculation logic will choose the IB bandwidth requirement |
| 299 | based on usecase if this floor value is not defined. |
| 300 | - qcom,sde-min-llcc-ib-kbps: This u32 value indicates the minimum llcc ib |
| 301 | vote in Kbps that can be reduced without hitting underflow. |
| 302 | BW calculation logic will choose the IB bandwidth requirement |
| 303 | based on usecase if this floor value is not defined. |
| 304 | - qcom,sde-min-dram-ib-kbps: This u32 value indicates the minimum dram ib |
| 305 | vote in Kbps that can be reduced without hitting underflow. |
| 306 | BW calculation logic will choose the IB bandwidth requirement |
| 307 | based on usecase if this floor value is not defined. |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 308 | - qcom,sde-comp-ratio-rt: A string entry indicating the compression ratio |
| 309 | for each supported compressed format on realtime interface. |
| 310 | The string is composed of one or more of |
| 311 | <fourcc code>/<vendor code>/<modifier>/<compression ratio> |
| 312 | separated with spaces. |
| 313 | - qcom,sde-comp-ratio-nrt: A string entry indicating the compression ratio |
| 314 | for each supported compressed format on non-realtime interface. |
| 315 | The string is composed of one or more of |
| 316 | <fourcc code>/<vendor code>/<modifier>/<compression ratio> |
| 317 | separated with spaces. |
| 318 | - qcom,sde-undersized-prefill-lines: A u32 value indicates the size of undersized prefill in lines. |
| 319 | - qcom,sde-xtra-prefill-lines: A u32 value indicates the extra prefill in lines. |
| 320 | - qcom,sde-dest-scale-prefill-lines: A u32 value indicates the latency of destination scaler in lines. |
| 321 | - qcom,sde-macrotile-prefill-lines: A u32 value indicates the latency of macrotile in lines. |
| 322 | - qcom,sde-yuv-nv12-prefill-lines: A u32 value indicates the latency of yuv/nv12 in lines. |
| 323 | - qcom,sde-linear-prefill-lines: A u32 value indicates the latency of linear in lines. |
| 324 | - qcom,sde-downscaling-prefill-lines: A u32 value indicates the latency of downscaling in lines. |
| 325 | - qcom,sde-max-per-pipe-bw-kbps: Array of u32 value indicates the max per pipe bandwidth in Kbps. |
| 326 | - qcom,sde-amortizable-threshold: This value indicates the min for traffic shaping in lines. |
Alan Kwong | a62eeb8 | 2017-04-19 08:57:55 -0700 | [diff] [blame] | 327 | - qcom,sde-vbif-qos-rt-remap: This array is used to program vbif qos remapper register |
| 328 | priority for realtime clients. |
| 329 | - qcom,sde-vbif-qos-nrt-remap: This array is used to program vbif qos remapper register |
| 330 | priority for non-realtime clients. |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 331 | - qcom,sde-danger-lut: A 4 cell property, with a format of <linear, |
| 332 | tile, nrt, cwb>, |
| 333 | indicating the danger luts on sspp. |
Ingrid Gallardo | 3b720fc | 2017-10-06 17:23:55 -0700 | [diff] [blame] | 334 | - qcom,sde-safe-lut-linear: Array of 2 cell property, with a format of |
| 335 | <fill level, lut> in ascending fill level |
| 336 | indicating the safe luts for linear format on sspp. |
| 337 | Zero fill level on the last entry identifies the default lut. |
| 338 | - qcom,sde-safe-lut-macrotile: Array of 2 cell property, with a format of |
| 339 | <fill level, lut> in ascending fill level |
| 340 | indicating the safe luts for macrotile format on sspp. |
| 341 | Zero fill level on the last entry identifies the default lut. |
| 342 | - qcom,sde-safe-lut-nrt: Array of 2 cell property, with a format of |
| 343 | <fill level, lut> in ascending fill level |
| 344 | indicating the safe luts for nrt (e.g wfd) on sspp. |
| 345 | Zero fill level on the last entry identifies the default lut. |
| 346 | - qcom,sde-safe-lut-cwb: Array of 2 cell property, with a format of |
| 347 | <fill level, lut> in ascending fill level |
| 348 | indicating the safe luts for cwb on sspp. |
| 349 | Zero fill level on the last entry identifies the default lut. |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 350 | - qcom,sde-qos-lut-linear: Array of 3 cell property, with a format of |
| 351 | <fill level, lut hi, lut lo> in ascending fill level |
| 352 | indicating the qos luts for linear format on sspp. |
| 353 | Zero fill level on the last entry identifies the default lut. |
| 354 | - qcom,sde-qos-lut-macrotile: Array of 3 cell property, with a format of |
| 355 | <fill level, lut hi, lut lo> in ascending fill level |
| 356 | indicating the qos luts for macrotile format on sspp. |
| 357 | Zero fill level on the last entry identifies the default lut. |
| 358 | - qcom,sde-qos-lut-nrt: Array of 3 cell property, with a format of |
| 359 | <fill level, lut hi, lut lo> in ascending fill level |
| 360 | indicating the qos luts for nrt (e.g wfd) on sspp. |
| 361 | Zero fill level on the last entry identifies the default lut. |
| 362 | - qcom,sde-qos-lut-cwb: Array of 3 cell property, with a format of |
| 363 | <fill level, lut hi, lut lo> in ascending fill level |
| 364 | indicating the qos luts for cwb on sspp. |
| 365 | Zero fill level on the last entry identifies the default lut. |
Alan Kwong | 143f50c | 2017-04-28 07:34:28 -0700 | [diff] [blame] | 366 | - qcom,sde-cdp-setting: Array of 2 cell property, with a format of |
| 367 | <read enable, write enable> for cdp use cases in |
| 368 | order of <real_time>, and <non_real_time>. |
Veera Sundaram Sankaran | 1e71ccb | 2017-05-24 18:48:50 -0700 | [diff] [blame] | 369 | - qcom,sde-inline-rot-xin: An integer array of xin-ids related to inline |
| 370 | rotation. |
| 371 | - qcom,sde-inline-rot-xin-type: A string array indicating the type of xin, |
| 372 | namely sspp or wb. Number of entries should match |
| 373 | the number of xin-ids defined in |
| 374 | property: qcom,sde-inline-rot-xin |
| 375 | - qcom,sde-inline-rot-clk-ctrl: Array of offsets describing clk control |
| 376 | offsets for dynamic clock gating. 1st value |
| 377 | in the array represents offset of the control |
| 378 | register. 2nd value represents bit offset within |
| 379 | control register. Number of offsets defined should |
| 380 | match the number of xin-ids defined in |
| 381 | property: qcom,sde-inline-rot-xin |
Alan Kwong | 23afc2d9 | 2017-09-15 10:59:06 -0400 | [diff] [blame] | 382 | - #power-domain-cells: Number of cells in a power-domain specifier and should contain 0. |
Jeykumar Sankaran | 6f215d4 | 2017-09-12 16:15:23 -0700 | [diff] [blame] | 383 | - qcom,sde-mixer-display-pref: A string array indicating the preferred display type |
| 384 | for the mixer block. Possible values: |
| 385 | "primary" - preferred for primary display |
| 386 | "none" - no preference on display |
| 387 | - qcom,sde-ctl-display-pref: A string array indicating the preferred display type |
| 388 | for the ctl block. Possible values: |
| 389 | "primary" - preferred for primary display |
| 390 | "none" - no preference on display |
Alan Kwong | 67a3f79 | 2016-11-01 23:16:53 -0400 | [diff] [blame] | 391 | |
| 392 | Bus Scaling Subnodes: |
| 393 | - qcom,sde-reg-bus: Property to provide Bus scaling for register access for |
| 394 | mdss blocks. |
| 395 | - qcom,sde-data-bus: Property to provide Bus scaling for data bus access for |
| 396 | mdss blocks. |
Alan Kwong | 0230a10 | 2017-05-16 11:36:44 -0700 | [diff] [blame] | 397 | - qcom,sde-llcc-bus: Property to provide Bus scaling for data bus access for |
| 398 | mnoc to llcc. |
| 399 | - qcom,sde-ebi-bus: Property to provide Bus scaling for data bus access for |
| 400 | llcc to ebi. |
Alan Kwong | 67a3f79 | 2016-11-01 23:16:53 -0400 | [diff] [blame] | 401 | |
Alan Kwong | 4dd64c8 | 2017-02-04 18:41:51 -0800 | [diff] [blame] | 402 | - qcom,sde-inline-rotator: A 2 cell property, with format of (rotator phandle, |
| 403 | instance id), of inline rotator device. |
| 404 | |
Dhaval Patel | 480dc52 | 2016-07-27 18:36:59 -0700 | [diff] [blame] | 405 | Bus Scaling Data: |
| 406 | - qcom,msm-bus,name: String property describing client name. |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 407 | - qcom,msm-bus,num-cases: This is the number of Bus Scaling use cases |
Dhaval Patel | 480dc52 | 2016-07-27 18:36:59 -0700 | [diff] [blame] | 408 | defined in the vectors property. |
| 409 | - qcom,msm-bus,num-paths: This represents the number of paths in each |
| 410 | Bus Scaling Usecase. |
| 411 | - qcom,msm-bus,vectors-KBps: * A series of 4 cell properties, with a format |
| 412 | of (src, dst, ab, ib) which is defined at |
| 413 | Documentation/devicetree/bindings/arm/msm/msm_bus.txt |
| 414 | * Current values of src & dst are defined at |
| 415 | include/linux/msm-bus-board.h |
| 416 | |
Abhijit Kulkarni | 1774dac | 2017-05-01 10:51:02 -0700 | [diff] [blame] | 417 | SMMU Subnodes: |
| 418 | - smmu_sde_****: Child nodes representing sde smmu virtual |
| 419 | devices |
| 420 | |
Adrian Salido-Moreno | 48ebb79 | 2015-10-02 15:54:46 -0700 | [diff] [blame] | 421 | Subnode properties: |
Abhijit Kulkarni | 1774dac | 2017-05-01 10:51:02 -0700 | [diff] [blame] | 422 | - compatible: Compatible names used for smmu devices. |
| 423 | names should be: |
| 424 | "qcom,smmu_sde_unsec": smmu context bank device |
| 425 | for unsecure sde real time domain. |
| 426 | "qcom,smmu_sde_sec": smmu context bank device |
| 427 | for secure sde real time domain. |
| 428 | "qcom,smmu_sde_nrt_unsec": smmu context bank device |
| 429 | for unsecure sde non-real time domain. |
| 430 | "qcom,smmu_sde_nrt_sec": smmu context bank device |
| 431 | for secure sde non-real time domain. |
| 432 | |
| 433 | |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 434 | Please refer to ../../interrupt-controller/interrupts.txt for a general |
| 435 | description of interrupt bindings. |
| 436 | |
| 437 | Example: |
| 438 | mdss_mdp: qcom,mdss_mdp@900000 { |
| 439 | compatible = "qcom,sde-kms"; |
| 440 | reg = <0x00900000 0x90000>, |
| 441 | <0x009b0000 0x1040>, |
Gopikrishnaiah Anandan | 031d8ff | 2016-12-15 16:58:45 -0800 | [diff] [blame] | 442 | <0x009b8000 0x1040>, |
| 443 | <0x0aeac000 0x00f0>; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 444 | reg-names = "mdp_phys", |
| 445 | "vbif_phys", |
Gopikrishnaiah Anandan | 031d8ff | 2016-12-15 16:58:45 -0800 | [diff] [blame] | 446 | "vbif_nrt_phys", |
| 447 | "regdma_phys"; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 448 | clocks = <&clock_mmss clk_mdss_ahb_clk>, |
| 449 | <&clock_mmss clk_mdss_axi_clk>, |
| 450 | <&clock_mmss clk_mdp_clk_src>, |
| 451 | <&clock_mmss clk_mdss_mdp_vote_clk>, |
| 452 | <&clock_mmss clk_smmu_mdp_axi_clk>, |
| 453 | <&clock_mmss clk_mmagic_mdss_axi_clk>, |
| 454 | <&clock_mmss clk_mdss_vsync_clk>; |
| 455 | clock-names = "iface_clk", |
| 456 | "bus_clk", |
| 457 | "core_clk_src", |
| 458 | "core_clk", |
| 459 | "iommu_clk", |
| 460 | "mmagic_clk", |
| 461 | "vsync_clk"; |
Dhaval Patel | 480dc52 | 2016-07-27 18:36:59 -0700 | [diff] [blame] | 462 | clock-rate = <0>, <0>, <0>; |
Alan Kwong | 83b6cbe | 2016-09-17 20:08:37 -0400 | [diff] [blame] | 463 | clock-max-rate= <0 320000000 0>; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 464 | mmagic-supply = <&gdsc_mmagic_mdss>; |
| 465 | vdd-supply = <&gdsc_mdss>; |
| 466 | interrupt-parent = <&intc>; |
| 467 | interrupts = <0 83 0>; |
| 468 | interrupt-controller; |
| 469 | #interrupt-cells = <1>; |
| 470 | iommus = <&mdp_smmu 0>; |
Alan Kwong | 23afc2d9 | 2017-09-15 10:59:06 -0400 | [diff] [blame] | 471 | #power-domain-cells = <0>; |
Dhaval Patel | 480dc52 | 2016-07-27 18:36:59 -0700 | [diff] [blame] | 472 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 473 | qcom,sde-off = <0x1000>; |
| 474 | qcom,sde-ctl-off = <0x00002000 0x00002200 0x00002400 |
| 475 | 0x00002600 0x00002800>; |
Jeykumar Sankaran | 6f215d4 | 2017-09-12 16:15:23 -0700 | [diff] [blame] | 476 | qcom,sde-ctl-display-pref = "primary", "none", "none", |
| 477 | "none", "none"; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 478 | qcom,sde-mixer-off = <0x00045000 0x00046000 |
| 479 | 0x00047000 0x0004a000>; |
Jeykumar Sankaran | 6f215d4 | 2017-09-12 16:15:23 -0700 | [diff] [blame] | 480 | qcom,sde-mixer-display-pref = "primary", "none", |
| 481 | "none", "none"; |
Rajesh Yadav | ec93afb | 2017-06-08 19:28:33 +0530 | [diff] [blame] | 482 | qcom,sde-dspp-top-off = <0x1300>; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 483 | qcom,sde-dspp-off = <0x00055000 0x00057000>; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 484 | qcom,sde-dspp-ad-off = <0x24000 0x22800>; |
| 485 | qcom,sde-dspp-ad-version = <0x00030000>; |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 486 | qcom,sde-dest-scaler-top-off = <0x00061000>; |
| 487 | qcom,sde-dest-scaler-off = <0x800 0x1000>; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 488 | qcom,sde-wb-off = <0x00066000>; |
| 489 | qcom,sde-wb-xin-id = <6>; |
| 490 | qcom,sde-intf-off = <0x0006b000 0x0006b800 |
| 491 | 0x0006c000 0x0006c800>; |
| 492 | qcom,sde-intf-type = "none", "dsi", "dsi", "hdmi"; |
| 493 | qcom,sde-pp-off = <0x00071000 0x00071800 |
| 494 | 0x00072000 0x00072800>; |
Clarence Ip | 8e69ad0 | 2016-12-09 09:43:57 -0500 | [diff] [blame] | 495 | qcom,sde-pp-slave = <0x0 0x0 0x0 0x0>; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 496 | qcom,sde-cdm-off = <0x0007a200>; |
| 497 | qcom,sde-dsc-off = <0x00081000 0x00081400>; |
| 498 | qcom,sde-intf-max-prefetch-lines = <0x15 0x15 0x15 0x15>; |
| 499 | |
Veera Sundaram Sankaran | 370b991 | 2017-01-10 18:03:42 -0800 | [diff] [blame] | 500 | qcom,sde-mixer-pair-mask = <2 1 6 0 0 3>; |
| 501 | qcom,sde-mixer-blend-op-off = <0x20 0x38 0x50 0x68 0x80 0x98 |
| 502 | 0xb0 0xc8 0xe0 0xf8 0x110>; |
| 503 | |
| 504 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 505 | qcom,sde-sspp-type = "vig", "vig", "vig", |
| 506 | "vig", "rgb", "rgb", |
| 507 | "rgb", "rgb", "dma", |
| 508 | "dma", "cursor", "cursor"; |
| 509 | |
| 510 | qcom,sde-sspp-off = <0x00005000 0x00007000 0x00009000 |
| 511 | 0x0000b000 0x00015000 0x00017000 |
| 512 | 0x00019000 0x0001b000 0x00025000 |
| 513 | 0x00027000 0x00035000 0x00037000>; |
| 514 | |
| 515 | qcom,sde-sspp-xin-id = <0 4 8 |
| 516 | 12 1 5 |
| 517 | 9 13 2 |
| 518 | 10 7 7>; |
| 519 | |
| 520 | /* offsets are relative to "mdp_phys + qcom,sde-off */ |
| 521 | qcom,sde-sspp-clk-ctrl = <0x2ac 0>, <0x2b4 0>, <0x2bc 0>, |
| 522 | <0x2c4 0>, <0x2ac 4>, <0x2b4 4>, <0x2bc 4>, |
| 523 | <0x2c4 4>, <0x2ac 8>, <0x2b4 8>, <0x3a8 16>, |
| 524 | <0x3b0 16>; |
| 525 | qcom,sde-sspp-clk-status = <0x2ac 0>, <0x2b4 0>, <0x2bc 0>, |
| 526 | <0x2c4 0>, <0x2ac 4>, <0x2b4 4>, <0x2bc 4>, |
| 527 | <0x2c4 4>, <0x2ac 8>, <0x2b4 8>, <0x3a8 16>, |
| 528 | <0x3b0 16>; |
| 529 | qcom,sde-mixer-linewidth = <2560>; |
| 530 | qcom,sde-sspp-linewidth = <2560>; |
| 531 | qcom,sde-mixer-blendstages = <0x7>; |
| 532 | qcom,sde-highest-bank-bit = <0x2>; |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 533 | qcom,sde-ubwc-version = <0x100>; |
| 534 | qcom,sde-ubwc-static = <0x100>; |
| 535 | qcom,sde-ubwc-swizzle = <0>; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 536 | qcom,sde-panic-per-pipe; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 537 | qcom,sde-has-src-split; |
Veera Sundaram Sankaran | 3171ff8 | 2017-01-04 14:34:47 -0800 | [diff] [blame] | 538 | qcom,sde-has-dim-layer; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 539 | qcom,sde-sspp-src-size = <0x100>; |
| 540 | qcom,sde-mixer-size = <0x100>; |
| 541 | qcom,sde-ctl-size = <0x100>; |
Rajesh Yadav | ec93afb | 2017-06-08 19:28:33 +0530 | [diff] [blame] | 542 | qcom,sde-dspp-top-size = <0xc>; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 543 | qcom,sde-dspp-size = <0x100>; |
| 544 | qcom,sde-intf-size = <0x100>; |
| 545 | qcom,sde-dsc-size = <0x100>; |
| 546 | qcom,sde-cdm-size = <0x100>; |
| 547 | qcom,sde-pp-size = <0x100>; |
| 548 | qcom,sde-wb-size = <0x100>; |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 549 | qcom,sde-dest-scaler-top-size = <0xc>; |
| 550 | qcom,sde-dest-scaler-size = <0x800>; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 551 | qcom,sde-len = <0x100>; |
| 552 | qcom,sde-wb-linewidth = <2560>; |
| 553 | qcom,sde-sspp-scale-size = <0x100>; |
| 554 | qcom,sde-mixer-blendstages = <0x8>; |
| 555 | qcom,sde-qseed-type = "qseedv2"; |
Dhaval Patel | 5aad745 | 2017-01-12 09:59:31 -0800 | [diff] [blame] | 556 | qcom,sde-csc-type = "csc-10bit"; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 557 | qcom,sde-highest-bank-bit = <15>; |
| 558 | qcom,sde-has-mixer-gc; |
Veera Sundaram Sankaran | c9efbec | 2017-03-29 18:59:05 -0700 | [diff] [blame] | 559 | qcom,sde-has-idle-pc; |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 560 | qcom,sde-has-dest-scaler; |
| 561 | qcom,sde-max-dest-scaler-input-linewidth = <2048>; |
| 562 | qcom,sde-max-dest-scaler-output-linewidth = <2560>; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 563 | qcom,sde-sspp-max-rects = <1 1 1 1 |
| 564 | 1 1 1 1 |
| 565 | 1 1 |
| 566 | 1 1>; |
Veera Sundaram Sankaran | 02dd6ac | 2016-12-22 15:08:29 -0800 | [diff] [blame] | 567 | qcom,sde-sspp-excl-rect = <1 1 1 1 |
| 568 | 1 1 1 1 |
| 569 | 1 1 |
| 570 | 1 1>; |
Jeykumar Sankaran | 2e65503 | 2017-02-04 14:05:45 -0800 | [diff] [blame] | 571 | qcom,sde-sspp-smart-dma-priority = <0 0 0 0 |
| 572 | 0 0 0 0 |
| 573 | 0 0 |
| 574 | 1 2>; |
| 575 | qcom,sde-smart-dma-rev = "smart_dma_v2"; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 576 | qcom,sde-te-off = <0x100>; |
| 577 | qcom,sde-te2-off = <0x100>; |
| 578 | qcom,sde-te-size = <0xffff>; |
| 579 | qcom,sde-te2-size = <0xffff>; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 580 | |
Alan Kwong | 1462733 | 2016-10-12 16:44:00 -0400 | [diff] [blame] | 581 | qcom,sde-wb-id = <2>; |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 582 | qcom,sde-wb-clk-ctrl = <0x2bc 16>; |
Alan Kwong | 1462733 | 2016-10-12 16:44:00 -0400 | [diff] [blame] | 583 | |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 584 | qcom,sde-danger-lut = <0x0000000f 0x0000ffff 0x00000000 |
| 585 | 0x00000000>; |
| 586 | qcom,sde-safe-lut = <0xfffc 0xff00 0xffff 0xffff>; |
| 587 | qcom,sde-qos-lut-linear = |
| 588 | <4 0x00000000 0x00000357>, |
| 589 | <5 0x00000000 0x00003357>, |
| 590 | <6 0x00000000 0x00023357>, |
| 591 | <7 0x00000000 0x00223357>, |
| 592 | <8 0x00000000 0x02223357>, |
| 593 | <9 0x00000000 0x22223357>, |
| 594 | <10 0x00000002 0x22223357>, |
| 595 | <11 0x00000022 0x22223357>, |
| 596 | <12 0x00000222 0x22223357>, |
| 597 | <13 0x00002222 0x22223357>, |
| 598 | <14 0x00012222 0x22223357>, |
| 599 | <0 0x00112222 0x22223357>; |
| 600 | qcom,sde-qos-lut-macrotile = |
| 601 | <10 0x00000003 0x44556677>, |
| 602 | <11 0x00000033 0x44556677>, |
| 603 | <12 0x00000233 0x44556677>, |
| 604 | <13 0x00002233 0x44556677>, |
| 605 | <14 0x00012233 0x44556677>, |
| 606 | <0 0x00112233 0x44556677>; |
| 607 | qcom,sde-qos-lut-nrt = |
| 608 | <0 0x00000000 0x00000000>; |
| 609 | qcom,sde-qos-lut-cwb = |
| 610 | <0 0x75300000 0x00000000>; |
Alan Kwong | 41b099e | 2016-10-12 17:10:11 -0400 | [diff] [blame] | 611 | |
Alan Kwong | 143f50c | 2017-04-28 07:34:28 -0700 | [diff] [blame] | 612 | qcom,sde-cdp-setting = <1 1>, <1 0>; |
| 613 | |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 614 | qcom,sde-vbif-off = <0 0>; |
| 615 | qcom,sde-vbif-id = <0 1>; |
| 616 | qcom,sde-vbif-default-ot-rd-limit = <32>; |
| 617 | qcom,sde-vbif-default-ot-wr-limit = <16>; |
| 618 | qcom,sde-vbif-dynamic-ot-rd-limit = <62208000 2>, |
| 619 | <124416000 4>, <248832000 16>; |
| 620 | qcom,sde-vbif-dynamic-ot-wr-limit = <62208000 2>, |
| 621 | <124416000 4>, <248832000 16>; |
Clarence Ip | 7f0de63 | 2017-05-31 14:59:14 -0400 | [diff] [blame] | 622 | qcom,sde-vbif-memtype-0 = <3 3 3 3 3 3 3 3>; |
| 623 | qcom,sde-vbif-memtype-1 = <3 3 3 3 3 3>; |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 624 | |
Alan Kwong | 67a3f79 | 2016-11-01 23:16:53 -0400 | [diff] [blame] | 625 | qcom,sde-dram-channels = <2>; |
| 626 | qcom,sde-num-nrt-paths = <1>; |
| 627 | |
Alan Kwong | 9aa061c | 2016-11-06 21:17:12 -0500 | [diff] [blame] | 628 | qcom,sde-max-bw-high-kbps = <9000000>; |
| 629 | qcom,sde-max-bw-low-kbps = <9000000>; |
| 630 | |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 631 | qcom,sde-core-ib-ff = "1.1"; |
| 632 | qcom,sde-core-clk-ff = "1.0"; |
Narendra Muppalla | a50934b | 2017-08-15 19:43:37 -0700 | [diff] [blame] | 633 | qcom,sde-min-core-ib-kbps = <2400000>; |
| 634 | qcom,sde-min-llcc-ib-kbps = <800000>; |
| 635 | qcom,sde-min-dram-ib-kbps = <800000>; |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 636 | qcom,sde-comp-ratio-rt = "NV12/5/1/1.1 AB24/5/1/1.2 XB24/5/1/1.3"; |
| 637 | qcom,sde-comp-ratio-nrt = "NV12/5/1/1.1 AB24/5/1/1.2 XB24/5/1/1.3"; |
| 638 | qcom,sde-undersized-prefill-lines = <4>; |
| 639 | qcom,sde-xtra-prefill-lines = <5>; |
| 640 | qcom,sde-dest-scale-prefill-lines = <6>; |
| 641 | qcom,sde-macrotile-prefill-lines = <7>; |
| 642 | qcom,sde-yuv-nv12-prefill-lines = <8>; |
| 643 | qcom,sde-linear-prefill-lines = <9>; |
| 644 | qcom,sde-downscaling-prefill-lines = <10>; |
| 645 | qcom,sde-max-per-pipe-bw-kbps = <2400000 2400000 2400000 2400000 |
| 646 | 2400000 2400000 2400000 2400000>; |
| 647 | qcom,sde-amortizable-threshold = <11>; |
| 648 | |
Alan Kwong | a62eeb8 | 2017-04-19 08:57:55 -0700 | [diff] [blame] | 649 | qcom,sde-vbif-qos-rt-remap = <3 3 4 4 5 5 6 6>; |
| 650 | qcom,sde-vbif-qos-nrt-remap = <3 3 3 3 3 3 3 3>; |
| 651 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 652 | qcom,sde-sspp-vig-blocks { |
| 653 | qcom,sde-vig-csc-off = <0x320>; |
| 654 | qcom,sde-vig-qseed-off = <0x200>; |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 655 | qcom,sde-vig-qseed-size = <0x74>; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 656 | /* Offset from vig top, version of HSIC */ |
| 657 | qcom,sde-vig-hsic = <0x200 0x00010000>; |
| 658 | qcom,sde-vig-memcolor = <0x200 0x00010000>; |
| 659 | qcom,sde-vig-pcc = <0x1780 0x00010000>; |
| 660 | }; |
| 661 | |
| 662 | qcom,sde-sspp-rgb-blocks { |
| 663 | qcom,sde-rgb-scaler-off = <0x200>; |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 664 | qcom,sde-rgb-scaler-size = <0x74>; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 665 | qcom,sde-rgb-pcc = <0x380 0x00010000>; |
| 666 | }; |
| 667 | |
| 668 | qcom,sde-dspp-blocks { |
Rajesh Yadav | ec93afb | 2017-06-08 19:28:33 +0530 | [diff] [blame] | 669 | qcom,sde-dspp-igc = <0x0 0x00010000>; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 670 | qcom,sde-dspp-pcc = <0x1700 0x00010000>; |
| 671 | qcom,sde-dspp-gc = <0x17c0 0x00010000>; |
| 672 | qcom,sde-dspp-hsic = <0x0 0x00010000>; |
| 673 | qcom,sde-dspp-memcolor = <0x0 0x00010000>; |
| 674 | qcom,sde-dspp-sixzone = <0x0 0x00010000>; |
| 675 | qcom,sde-dspp-gamut = <0x1600 0x00010000>; |
| 676 | qcom,sde-dspp-dither = <0x0 0x00010000>; |
| 677 | qcom,sde-dspp-hist = <0x0 0x00010000>; |
| 678 | qcom,sde-dspp-vlut = <0x0 0x00010000>; |
| 679 | }; |
| 680 | |
| 681 | qcom,sde-mixer-blocks { |
| 682 | qcom,sde-mixer-gc = <0x3c0 0x00010000>; |
| 683 | }; |
| 684 | |
| 685 | qcom,msm-hdmi-audio-rx { |
| 686 | compatible = "qcom,msm-hdmi-audio-codec-rx"; |
| 687 | }; |
| 688 | |
Alan Kwong | 4dd64c8 | 2017-02-04 18:41:51 -0800 | [diff] [blame] | 689 | qcom,sde-inline-rotator = <&mdss_rotator 0>; |
Veera Sundaram Sankaran | 1e71ccb | 2017-05-24 18:48:50 -0700 | [diff] [blame] | 690 | qcom,sde-inline-rot-xin = <10 11>; |
| 691 | qcom,sde-inline-rot-xin-type = "sspp", "wb"; |
| 692 | qcom,sde-inline-rot-clk-ctrl = <0x2bc 0x8>, <0x2bc 0xc>; |
Alan Kwong | 4dd64c8 | 2017-02-04 18:41:51 -0800 | [diff] [blame] | 693 | |
Dhaval Patel | 480dc52 | 2016-07-27 18:36:59 -0700 | [diff] [blame] | 694 | qcom,platform-supply-entries { |
| 695 | #address-cells = <1>; |
| 696 | #size-cells = <0>; |
| 697 | qcom,platform-supply-entry@0 { |
| 698 | reg = <0>; |
| 699 | qcom,supply-name = "vdd"; |
| 700 | qcom,supply-min-voltage = <0>; |
| 701 | qcom,supply-max-voltage = <0>; |
| 702 | qcom,supply-enable-load = <0>; |
| 703 | qcom,supply-disable-load = <0>; |
| 704 | qcom,supply-pre-on-sleep = <0>; |
| 705 | qcom,supply-post-on-sleep = <0>; |
| 706 | qcom,supply-pre-off-sleep = <0>; |
| 707 | qcom,supply-post-off-sleep = <0>; |
| 708 | }; |
| 709 | }; |
| 710 | |
Alan Kwong | 67a3f79 | 2016-11-01 23:16:53 -0400 | [diff] [blame] | 711 | qcom,sde-data-bus { |
| 712 | qcom,msm-bus,name = "mdss_sde"; |
| 713 | qcom,msm-bus,num-cases = <3>; |
| 714 | qcom,msm-bus,num-paths = <3>; |
| 715 | qcom,msm-bus,vectors-KBps = |
| 716 | <22 512 0 0>, <23 512 0 0>, <25 512 0 0>, |
| 717 | <22 512 0 6400000>, <23 512 0 6400000>, |
| 718 | <25 512 0 6400000>, |
| 719 | <22 512 0 6400000>, <23 512 0 6400000>, |
| 720 | <25 512 0 6400000>; |
| 721 | }; |
Alan Kwong | 0230a10 | 2017-05-16 11:36:44 -0700 | [diff] [blame] | 722 | qcom,sde-llcc-bus { |
| 723 | qcom,msm-bus,name = "mdss_sde_llcc"; |
| 724 | qcom,msm-bus,num-cases = <3>; |
| 725 | qcom,msm-bus,num-paths = <1>; |
| 726 | qcom,msm-bus,vectors-KBps = |
| 727 | <132 770 0 0>, |
| 728 | <132 770 0 6400000>, |
| 729 | <132 770 0 6400000>; |
| 730 | }; |
| 731 | qcom,sde-ebi-bus { |
| 732 | qcom,msm-bus,name = "mdss_sde_ebi"; |
| 733 | qcom,msm-bus,num-cases = <3>; |
| 734 | qcom,msm-bus,num-paths = <1>; |
| 735 | qcom,msm-bus,vectors-KBps = |
| 736 | <129 512 0 0>, |
| 737 | <129 512 0 6400000>, |
| 738 | <129 512 0 6400000>; |
| 739 | }; |
Alan Kwong | 67a3f79 | 2016-11-01 23:16:53 -0400 | [diff] [blame] | 740 | |
Dhaval Patel | 480dc52 | 2016-07-27 18:36:59 -0700 | [diff] [blame] | 741 | qcom,sde-reg-bus { |
| 742 | /* Reg Bus Scale Settings */ |
| 743 | qcom,msm-bus,name = "mdss_reg"; |
| 744 | qcom,msm-bus,num-cases = <4>; |
| 745 | qcom,msm-bus,num-paths = <1>; |
| 746 | qcom,msm-bus,active-only; |
| 747 | qcom,msm-bus,vectors-KBps = |
| 748 | <1 590 0 0>, |
| 749 | <1 590 0 76800>, |
| 750 | <1 590 0 160000>, |
| 751 | <1 590 0 320000>; |
| 752 | }; |
Abhijit Kulkarni | 1774dac | 2017-05-01 10:51:02 -0700 | [diff] [blame] | 753 | |
| 754 | smmu_kms_unsec: qcom,smmu_kms_unsec_cb { |
| 755 | compatible = "qcom,smmu_sde_unsec"; |
| 756 | iommus = <&mmss_smmu 0>; |
| 757 | }; |
| 758 | |
| 759 | smmu_kms_sec: qcom,smmu_kms_sec_cb { |
| 760 | compatible = "qcom,smmu_sde_sec"; |
| 761 | iommus = <&mmss_smmu 1>; |
| 762 | }; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 763 | }; |