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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/arm/mm/flush.c
3 *
4 * Copyright (C) 1995-2002 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/module.h>
11#include <linux/mm.h>
12#include <linux/pagemap.h>
13
14#include <asm/cacheflush.h>
Russell King46097c72008-08-10 18:10:19 +010015#include <asm/cachetype.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070016#include <asm/system.h>
Russell King8d802d22005-05-10 17:31:43 +010017#include <asm/tlbflush.h>
18
Russell King1b2e2b72006-08-21 17:06:38 +010019#include "mm.h"
20
Russell King8d802d22005-05-10 17:31:43 +010021#ifdef CONFIG_CPU_CACHE_VIPT
Russell Kingd7b6b352005-09-08 15:32:23 +010022
Catalin Marinas481467d2005-09-30 16:07:04 +010023#define ALIAS_FLUSH_START 0xffff4000
24
Catalin Marinas481467d2005-09-30 16:07:04 +010025static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
26{
27 unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
Catalin Marinas141fa402006-03-10 22:26:47 +000028 const int zero = 0;
Catalin Marinas481467d2005-09-30 16:07:04 +010029
Russell Kingad1ae2f2006-12-13 14:34:43 +000030 set_pte_ext(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL), 0);
Catalin Marinas481467d2005-09-30 16:07:04 +010031 flush_tlb_kernel_page(to);
32
33 asm( "mcrr p15, 0, %1, %0, c14\n"
Russell Kingdf71dfd2009-10-24 22:36:36 +010034 " mcr p15, 0, %2, c7, c10, 4"
Catalin Marinas481467d2005-09-30 16:07:04 +010035 :
Catalin Marinas141fa402006-03-10 22:26:47 +000036 : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero)
Catalin Marinas481467d2005-09-30 16:07:04 +010037 : "cc");
38}
39
Russell Kingd7b6b352005-09-08 15:32:23 +010040void flush_cache_mm(struct mm_struct *mm)
41{
42 if (cache_is_vivt()) {
Russell King2f0b1922009-10-25 10:40:02 +000043 vivt_flush_cache_mm(mm);
Russell Kingd7b6b352005-09-08 15:32:23 +010044 return;
45 }
46
47 if (cache_is_vipt_aliasing()) {
48 asm( "mcr p15, 0, %0, c7, c14, 0\n"
Russell Kingdf71dfd2009-10-24 22:36:36 +010049 " mcr p15, 0, %0, c7, c10, 4"
Russell Kingd7b6b352005-09-08 15:32:23 +010050 :
51 : "r" (0)
52 : "cc");
Russell Kingdf71dfd2009-10-24 22:36:36 +010053 __flush_icache_all();
Russell Kingd7b6b352005-09-08 15:32:23 +010054 }
55}
56
57void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
58{
59 if (cache_is_vivt()) {
Russell King2f0b1922009-10-25 10:40:02 +000060 vivt_flush_cache_range(vma, start, end);
Russell Kingd7b6b352005-09-08 15:32:23 +010061 return;
62 }
63
64 if (cache_is_vipt_aliasing()) {
65 asm( "mcr p15, 0, %0, c7, c14, 0\n"
Russell Kingdf71dfd2009-10-24 22:36:36 +010066 " mcr p15, 0, %0, c7, c10, 4"
Russell Kingd7b6b352005-09-08 15:32:23 +010067 :
68 : "r" (0)
69 : "cc");
Russell Kingdf71dfd2009-10-24 22:36:36 +010070 __flush_icache_all();
Russell Kingd7b6b352005-09-08 15:32:23 +010071 }
Russell King9e959222009-10-25 13:35:13 +000072
73 if (vma->vm_flags & VM_EXEC && icache_is_vivt_asid_tagged())
74 __flush_icache_all();
Russell Kingd7b6b352005-09-08 15:32:23 +010075}
76
77void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
78{
79 if (cache_is_vivt()) {
Russell King2f0b1922009-10-25 10:40:02 +000080 vivt_flush_cache_page(vma, user_addr, pfn);
Russell Kingd7b6b352005-09-08 15:32:23 +010081 return;
82 }
83
Russell King2df341e2009-10-24 22:58:40 +010084 if (cache_is_vipt_aliasing()) {
Russell Kingd7b6b352005-09-08 15:32:23 +010085 flush_pfn_alias(pfn, user_addr);
Russell King2df341e2009-10-24 22:58:40 +010086 __flush_icache_all();
87 }
Russell King9e959222009-10-25 13:35:13 +000088
89 if (vma->vm_flags & VM_EXEC && icache_is_vivt_asid_tagged())
90 __flush_icache_all();
Russell Kingd7b6b352005-09-08 15:32:23 +010091}
George G. Davisa188ad22006-09-02 18:43:20 +010092
93void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
94 unsigned long uaddr, void *kaddr,
95 unsigned long len, int write)
96{
97 if (cache_is_vivt()) {
Russell King2f0b1922009-10-25 10:40:02 +000098 vivt_flush_ptrace_access(vma, page, uaddr, kaddr, len, write);
George G. Davisa188ad22006-09-02 18:43:20 +010099 return;
100 }
101
102 if (cache_is_vipt_aliasing()) {
103 flush_pfn_alias(page_to_pfn(page), uaddr);
Russell King2df341e2009-10-24 22:58:40 +0100104 __flush_icache_all();
George G. Davisa188ad22006-09-02 18:43:20 +0100105 return;
106 }
107
108 /* VIPT non-aliasing cache */
Rusty Russell56f8ba82009-09-24 09:34:49 -0600109 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm)) &&
George G. Davisa71ebdf2006-09-21 03:57:04 +0100110 vma->vm_flags & VM_EXEC) {
George G. Davisa188ad22006-09-02 18:43:20 +0100111 unsigned long addr = (unsigned long)kaddr;
112 /* only flushing the kernel mapping on non-aliasing VIPT */
113 __cpuc_coherent_kern_range(addr, addr + len);
114 }
115}
Russell King8d802d22005-05-10 17:31:43 +0100116#else
117#define flush_pfn_alias(pfn,vaddr) do { } while (0)
118#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119
Russell King8830f042005-06-20 09:51:03 +0100120void __flush_dcache_page(struct address_space *mapping, struct page *page)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121{
Russell Kingb7dc0b22009-10-25 11:25:50 +0000122 void *addr = page_address(page);
123
Linus Torvalds1da177e2005-04-16 15:20:36 -0700124 /*
125 * Writeback any data associated with the kernel mapping of this
126 * page. This ensures that data in the physical page is mutually
127 * coherent with the kernels mapping.
128 */
Nicolas Pitre13f96d82009-09-01 22:01:27 +0100129#ifdef CONFIG_HIGHMEM
130 /*
131 * kmap_atomic() doesn't set the page virtual address, and
132 * kunmap_atomic() takes care of cache flushing already.
133 */
Russell Kingb7dc0b22009-10-25 11:25:50 +0000134 if (addr)
Nicolas Pitre13f96d82009-09-01 22:01:27 +0100135#endif
Russell Kingb7dc0b22009-10-25 11:25:50 +0000136 __cpuc_flush_dcache_page(addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137
138 /*
Russell King8830f042005-06-20 09:51:03 +0100139 * If this is a page cache page, and we have an aliasing VIPT cache,
140 * we only need to do one flush - which would be at the relevant
Russell King8d802d22005-05-10 17:31:43 +0100141 * userspace colour, which is congruent with page->index.
142 */
Russell Kingf91fb052009-10-24 23:05:34 +0100143 if (mapping && cache_is_vipt_aliasing())
Russell King8830f042005-06-20 09:51:03 +0100144 flush_pfn_alias(page_to_pfn(page),
145 page->index << PAGE_CACHE_SHIFT);
146}
147
148static void __flush_dcache_aliases(struct address_space *mapping, struct page *page)
149{
150 struct mm_struct *mm = current->active_mm;
151 struct vm_area_struct *mpnt;
152 struct prio_tree_iter iter;
153 pgoff_t pgoff;
Russell King8d802d22005-05-10 17:31:43 +0100154
155 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156 * There are possible user space mappings of this page:
157 * - VIVT cache: we need to also write back and invalidate all user
158 * data in the current VM view associated with this page.
159 * - aliasing VIPT: we only need to find one mapping of this page.
160 */
161 pgoff = page->index << (PAGE_CACHE_SHIFT - PAGE_SHIFT);
162
163 flush_dcache_mmap_lock(mapping);
164 vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
165 unsigned long offset;
166
167 /*
168 * If this VMA is not in our MM, we can ignore it.
169 */
170 if (mpnt->vm_mm != mm)
171 continue;
172 if (!(mpnt->vm_flags & VM_MAYSHARE))
173 continue;
174 offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
175 flush_cache_page(mpnt, mpnt->vm_start + offset, page_to_pfn(page));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176 }
177 flush_dcache_mmap_unlock(mapping);
178}
179
180/*
181 * Ensure cache coherency between kernel mapping and userspace mapping
182 * of this page.
183 *
184 * We have three cases to consider:
185 * - VIPT non-aliasing cache: fully coherent so nothing required.
186 * - VIVT: fully aliasing, so we need to handle every alias in our
187 * current VM view.
188 * - VIPT aliasing: need to handle one alias in our current VM view.
189 *
190 * If we need to handle aliasing:
191 * If the page only exists in the page cache and there are no user
192 * space mappings, we can be lazy and remember that we may have dirty
193 * kernel cache lines for later. Otherwise, we assume we have
194 * aliasing mappings.
Russell Kingdf2f5e72005-11-30 16:02:54 +0000195 *
196 * Note that we disable the lazy flush for SMP.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197 */
198void flush_dcache_page(struct page *page)
199{
Russell King421fe932009-10-25 10:23:04 +0000200 struct address_space *mapping;
201
202 /*
203 * The zero page is never written to, so never has any dirty
204 * cache lines, and therefore never needs to be flushed.
205 */
206 if (page == ZERO_PAGE(0))
207 return;
208
209 mapping = page_mapping(page);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210
Russell Kingdf2f5e72005-11-30 16:02:54 +0000211#ifndef CONFIG_SMP
Nicolas Pitred73cd422008-09-15 16:44:55 -0400212 if (!PageHighMem(page) && mapping && !mapping_mapped(mapping))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213 set_bit(PG_dcache_dirty, &page->flags);
Russell Kingdf2f5e72005-11-30 16:02:54 +0000214 else
215#endif
216 {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700217 __flush_dcache_page(mapping, page);
Russell King8830f042005-06-20 09:51:03 +0100218 if (mapping && cache_is_vivt())
219 __flush_dcache_aliases(mapping, page);
Catalin Marinas826cbda2008-06-13 10:28:36 +0100220 else if (mapping)
221 __flush_icache_all();
Russell King8830f042005-06-20 09:51:03 +0100222 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700223}
224EXPORT_SYMBOL(flush_dcache_page);
Russell King6020dff2006-12-30 23:17:40 +0000225
226/*
227 * Flush an anonymous page so that users of get_user_pages()
228 * can safely access the data. The expected sequence is:
229 *
230 * get_user_pages()
231 * -> flush_anon_page
232 * memcpy() to/from page
233 * if written to page, flush_dcache_page()
234 */
235void __flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
236{
237 unsigned long pfn;
238
239 /* VIPT non-aliasing caches need do nothing */
240 if (cache_is_vipt_nonaliasing())
241 return;
242
243 /*
244 * Write back and invalidate userspace mapping.
245 */
246 pfn = page_to_pfn(page);
247 if (cache_is_vivt()) {
248 flush_cache_page(vma, vmaddr, pfn);
249 } else {
250 /*
251 * For aliasing VIPT, we can flush an alias of the
252 * userspace address only.
253 */
254 flush_pfn_alias(pfn, vmaddr);
Russell King2df341e2009-10-24 22:58:40 +0100255 __flush_icache_all();
Russell King6020dff2006-12-30 23:17:40 +0000256 }
257
258 /*
259 * Invalidate kernel mapping. No data should be contained
260 * in this mapping of the page. FIXME: this is overkill
261 * since we actually ask for a write-back and invalidate.
262 */
263 __cpuc_flush_dcache_page(page_address(page));
264}