Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * Intel Management Engine Interface (Intel MEI) Linux driver |
Tomas Winkler | 733ba91 | 2012-02-09 19:25:53 +0200 | [diff] [blame] | 4 | * Copyright (c) 2003-2012, Intel Corporation. |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms and conditions of the GNU General Public License, |
| 8 | * version 2, as published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | * more details. |
| 14 | * |
| 15 | */ |
| 16 | |
| 17 | #include <linux/pci.h> |
Tomas Winkler | 4f3afe1 | 2012-05-09 16:38:59 +0300 | [diff] [blame] | 18 | #include <linux/mei.h> |
Tomas Winkler | 47a7380 | 2012-12-25 19:06:03 +0200 | [diff] [blame] | 19 | |
| 20 | #include "mei_dev.h" |
Tomas Winkler | 9dc64d6 | 2013-01-08 23:07:17 +0200 | [diff] [blame] | 21 | #include "hw-me.h" |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 22 | |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 23 | /** |
| 24 | * mei_reg_read - Reads 32bit data from the mei device |
| 25 | * |
| 26 | * @dev: the device structure |
| 27 | * @offset: offset from which to read the data |
| 28 | * |
| 29 | * returns register value (u32) |
| 30 | */ |
| 31 | static inline u32 mei_reg_read(const struct mei_device *dev, |
| 32 | unsigned long offset) |
| 33 | { |
| 34 | return ioread32(dev->mem_addr + offset); |
| 35 | } |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 36 | |
| 37 | |
| 38 | /** |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 39 | * mei_reg_write - Writes 32bit data to the mei device |
| 40 | * |
| 41 | * @dev: the device structure |
| 42 | * @offset: offset from which to write the data |
| 43 | * @value: register value to write (u32) |
| 44 | */ |
| 45 | static inline void mei_reg_write(const struct mei_device *dev, |
| 46 | unsigned long offset, u32 value) |
| 47 | { |
| 48 | iowrite32(value, dev->mem_addr + offset); |
| 49 | } |
| 50 | |
| 51 | /** |
Tomas Winkler | d025284 | 2013-01-08 23:07:24 +0200 | [diff] [blame] | 52 | * mei_mecbrw_read - Reads 32bit data from ME circular buffer |
| 53 | * read window register |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 54 | * |
| 55 | * @dev: the device structure |
| 56 | * |
Tomas Winkler | d025284 | 2013-01-08 23:07:24 +0200 | [diff] [blame] | 57 | * returns ME_CB_RW register value (u32) |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 58 | */ |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 59 | u32 mei_mecbrw_read(const struct mei_device *dev) |
| 60 | { |
| 61 | return mei_reg_read(dev, ME_CB_RW); |
| 62 | } |
| 63 | /** |
| 64 | * mei_mecsr_read - Reads 32bit data from the ME CSR |
| 65 | * |
| 66 | * @dev: the device structure |
| 67 | * |
| 68 | * returns ME_CSR_HA register value (u32) |
| 69 | */ |
| 70 | u32 mei_mecsr_read(const struct mei_device *dev) |
| 71 | { |
| 72 | return mei_reg_read(dev, ME_CSR_HA); |
| 73 | } |
| 74 | |
| 75 | /** |
Tomas Winkler | d025284 | 2013-01-08 23:07:24 +0200 | [diff] [blame] | 76 | * mei_hcsr_read - Reads 32bit data from the host CSR |
| 77 | * |
| 78 | * @dev: the device structure |
| 79 | * |
| 80 | * returns H_CSR register value (u32) |
| 81 | */ |
| 82 | u32 mei_hcsr_read(const struct mei_device *dev) |
| 83 | { |
| 84 | return mei_reg_read(dev, H_CSR); |
| 85 | } |
| 86 | |
| 87 | /** |
| 88 | * mei_hcsr_set - writes H_CSR register to the mei device, |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 89 | * and ignores the H_IS bit for it is write-one-to-zero. |
| 90 | * |
| 91 | * @dev: the device structure |
| 92 | */ |
| 93 | void mei_hcsr_set(struct mei_device *dev) |
| 94 | { |
Tomas Winkler | d025284 | 2013-01-08 23:07:24 +0200 | [diff] [blame] | 95 | |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 96 | if ((dev->host_hw_state & H_IS) == H_IS) |
| 97 | dev->host_hw_state &= ~H_IS; |
| 98 | mei_reg_write(dev, H_CSR, dev->host_hw_state); |
| 99 | dev->host_hw_state = mei_hcsr_read(dev); |
| 100 | } |
| 101 | |
| 102 | /** |
Tomas Winkler | d025284 | 2013-01-08 23:07:24 +0200 | [diff] [blame] | 103 | * mei_clear_interrupts - clear and stop interrupts |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 104 | * |
| 105 | * @dev: the device structure |
| 106 | */ |
| 107 | void mei_clear_interrupts(struct mei_device *dev) |
| 108 | { |
Tomas Winkler | 9ea73dd | 2013-01-08 23:07:28 +0200 | [diff] [blame^] | 109 | u32 hcsr = mei_hcsr_read(dev); |
| 110 | if ((hcsr & H_IS) == H_IS) |
| 111 | mei_reg_write(dev, H_CSR, hcsr); |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 112 | } |
| 113 | |
| 114 | /** |
| 115 | * mei_enable_interrupts - enables mei device interrupts |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 116 | * |
| 117 | * @dev: the device structure |
| 118 | */ |
| 119 | void mei_enable_interrupts(struct mei_device *dev) |
| 120 | { |
Tomas Winkler | 9ea73dd | 2013-01-08 23:07:28 +0200 | [diff] [blame^] | 121 | u32 hcsr = mei_hcsr_read(dev); |
| 122 | hcsr |= H_IE; |
| 123 | hcsr &= ~H_IS; |
| 124 | mei_reg_write(dev, H_CSR, hcsr); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 125 | } |
| 126 | |
| 127 | /** |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 128 | * mei_disable_interrupts - disables mei device interrupts |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 129 | * |
| 130 | * @dev: the device structure |
| 131 | */ |
| 132 | void mei_disable_interrupts(struct mei_device *dev) |
| 133 | { |
Tomas Winkler | 9ea73dd | 2013-01-08 23:07:28 +0200 | [diff] [blame^] | 134 | u32 hcsr = mei_hcsr_read(dev); |
| 135 | hcsr &= ~H_IE; |
| 136 | hcsr &= ~H_IS; |
| 137 | mei_reg_write(dev, H_CSR, hcsr); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 138 | } |
| 139 | |
Tomas Winkler | adfba32 | 2013-01-08 23:07:27 +0200 | [diff] [blame] | 140 | /** |
| 141 | * mei_hw_reset - resets fw via mei csr register. |
| 142 | * |
| 143 | * @dev: the device structure |
| 144 | * @interrupts_enabled: if interrupt should be enabled after reset. |
| 145 | */ |
| 146 | void mei_hw_reset(struct mei_device *dev, bool intr_enable) |
| 147 | { |
| 148 | u32 hcsr = mei_hcsr_read(dev); |
| 149 | |
| 150 | dev_dbg(&dev->pdev->dev, "before reset HCSR = 0x%08x.\n", hcsr); |
| 151 | |
| 152 | hcsr |= (H_RST | H_IG); |
| 153 | |
| 154 | if (intr_enable) |
| 155 | hcsr |= H_IE; |
| 156 | else |
| 157 | hcsr &= ~H_IE; |
| 158 | |
| 159 | hcsr &= ~H_IS; |
| 160 | |
| 161 | mei_reg_write(dev, H_CSR, hcsr); |
| 162 | hcsr = mei_hcsr_read(dev); |
| 163 | |
| 164 | hcsr &= ~H_RST; |
| 165 | hcsr |= H_IG; |
| 166 | hcsr &= ~H_IS; |
| 167 | |
| 168 | mei_reg_write(dev, H_CSR, hcsr); |
| 169 | |
| 170 | hcsr = mei_hcsr_read(dev); |
| 171 | |
| 172 | dev_dbg(&dev->pdev->dev, "current HCSR = 0x%08x.\n", hcsr); |
| 173 | } |
| 174 | |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 175 | |
| 176 | /** |
| 177 | * mei_interrupt_quick_handler - The ISR of the MEI device |
| 178 | * |
| 179 | * @irq: The irq number |
| 180 | * @dev_id: pointer to the device structure |
| 181 | * |
| 182 | * returns irqreturn_t |
| 183 | */ |
| 184 | irqreturn_t mei_interrupt_quick_handler(int irq, void *dev_id) |
| 185 | { |
| 186 | struct mei_device *dev = (struct mei_device *) dev_id; |
| 187 | u32 csr_reg = mei_hcsr_read(dev); |
| 188 | |
| 189 | if ((csr_reg & H_IS) != H_IS) |
| 190 | return IRQ_NONE; |
| 191 | |
| 192 | /* clear H_IS bit in H_CSR */ |
| 193 | mei_reg_write(dev, H_CSR, csr_reg); |
| 194 | |
| 195 | return IRQ_WAKE_THREAD; |
| 196 | } |
| 197 | |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 198 | /** |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 199 | * mei_hbuf_filled_slots - gets number of device filled buffer slots |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 200 | * |
| 201 | * @device: the device structure |
| 202 | * |
| 203 | * returns number of filled slots |
| 204 | */ |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 205 | static unsigned char mei_hbuf_filled_slots(struct mei_device *dev) |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 206 | { |
| 207 | char read_ptr, write_ptr; |
| 208 | |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 209 | dev->host_hw_state = mei_hcsr_read(dev); |
| 210 | |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 211 | read_ptr = (char) ((dev->host_hw_state & H_CBRP) >> 8); |
| 212 | write_ptr = (char) ((dev->host_hw_state & H_CBWP) >> 16); |
| 213 | |
| 214 | return (unsigned char) (write_ptr - read_ptr); |
| 215 | } |
| 216 | |
| 217 | /** |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 218 | * mei_hbuf_is_empty - checks if host buffer is empty. |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 219 | * |
| 220 | * @dev: the device structure |
| 221 | * |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 222 | * returns true if empty, false - otherwise. |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 223 | */ |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 224 | bool mei_hbuf_is_empty(struct mei_device *dev) |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 225 | { |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 226 | return mei_hbuf_filled_slots(dev) == 0; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 227 | } |
| 228 | |
| 229 | /** |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 230 | * mei_hbuf_empty_slots - counts write empty slots. |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 231 | * |
| 232 | * @dev: the device structure |
| 233 | * |
| 234 | * returns -1(ESLOTS_OVERFLOW) if overflow, otherwise empty slots count |
| 235 | */ |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 236 | int mei_hbuf_empty_slots(struct mei_device *dev) |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 237 | { |
Tomas Winkler | 24aadc8 | 2012-06-25 23:46:27 +0300 | [diff] [blame] | 238 | unsigned char filled_slots, empty_slots; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 239 | |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 240 | filled_slots = mei_hbuf_filled_slots(dev); |
Tomas Winkler | 24aadc8 | 2012-06-25 23:46:27 +0300 | [diff] [blame] | 241 | empty_slots = dev->hbuf_depth - filled_slots; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 242 | |
| 243 | /* check for overflow */ |
Tomas Winkler | 24aadc8 | 2012-06-25 23:46:27 +0300 | [diff] [blame] | 244 | if (filled_slots > dev->hbuf_depth) |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 245 | return -EOVERFLOW; |
| 246 | |
| 247 | return empty_slots; |
| 248 | } |
| 249 | |
| 250 | /** |
| 251 | * mei_write_message - writes a message to mei device. |
| 252 | * |
| 253 | * @dev: the device structure |
Tomas Winkler | 438763f | 2012-12-25 19:05:59 +0200 | [diff] [blame] | 254 | * @hader: mei HECI header of message |
| 255 | * @buf: message payload will be written |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 256 | * |
Tomas Winkler | 1ccb7b6 | 2012-03-14 14:39:42 +0200 | [diff] [blame] | 257 | * This function returns -EIO if write has failed |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 258 | */ |
Tomas Winkler | 169d133 | 2012-06-19 09:13:35 +0300 | [diff] [blame] | 259 | int mei_write_message(struct mei_device *dev, struct mei_msg_hdr *header, |
Tomas Winkler | 438763f | 2012-12-25 19:05:59 +0200 | [diff] [blame] | 260 | unsigned char *buf) |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 261 | { |
Tomas Winkler | 169d133 | 2012-06-19 09:13:35 +0300 | [diff] [blame] | 262 | unsigned long rem, dw_cnt; |
Tomas Winkler | 438763f | 2012-12-25 19:05:59 +0200 | [diff] [blame] | 263 | unsigned long length = header->length; |
Tomas Winkler | 169d133 | 2012-06-19 09:13:35 +0300 | [diff] [blame] | 264 | u32 *reg_buf = (u32 *)buf; |
| 265 | int i; |
| 266 | int empty_slots; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 267 | |
Tomas Winkler | 15d4acc | 2012-12-25 19:06:00 +0200 | [diff] [blame] | 268 | dev_dbg(&dev->pdev->dev, MEI_HDR_FMT, MEI_HDR_PRM(header)); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 269 | |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 270 | empty_slots = mei_hbuf_empty_slots(dev); |
Tomas Winkler | 169d133 | 2012-06-19 09:13:35 +0300 | [diff] [blame] | 271 | dev_dbg(&dev->pdev->dev, "empty slots = %hu.\n", empty_slots); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 272 | |
Tomas Winkler | 7bdf72d | 2012-07-04 19:24:52 +0300 | [diff] [blame] | 273 | dw_cnt = mei_data2slots(length); |
Tomas Winkler | 169d133 | 2012-06-19 09:13:35 +0300 | [diff] [blame] | 274 | if (empty_slots < 0 || dw_cnt > empty_slots) |
Tomas Winkler | 1ccb7b6 | 2012-03-14 14:39:42 +0200 | [diff] [blame] | 275 | return -EIO; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 276 | |
| 277 | mei_reg_write(dev, H_CB_WW, *((u32 *) header)); |
| 278 | |
Tomas Winkler | 169d133 | 2012-06-19 09:13:35 +0300 | [diff] [blame] | 279 | for (i = 0; i < length / 4; i++) |
| 280 | mei_reg_write(dev, H_CB_WW, reg_buf[i]); |
| 281 | |
| 282 | rem = length & 0x3; |
| 283 | if (rem > 0) { |
| 284 | u32 reg = 0; |
| 285 | memcpy(®, &buf[length - rem], rem); |
| 286 | mei_reg_write(dev, H_CB_WW, reg); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 287 | } |
| 288 | |
Tomas Winkler | 169d133 | 2012-06-19 09:13:35 +0300 | [diff] [blame] | 289 | dev->host_hw_state = mei_hcsr_read(dev); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 290 | dev->host_hw_state |= H_IG; |
| 291 | mei_hcsr_set(dev); |
| 292 | dev->me_hw_state = mei_mecsr_read(dev); |
| 293 | if ((dev->me_hw_state & ME_RDY_HRA) != ME_RDY_HRA) |
Tomas Winkler | 1ccb7b6 | 2012-03-14 14:39:42 +0200 | [diff] [blame] | 294 | return -EIO; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 295 | |
Tomas Winkler | 1ccb7b6 | 2012-03-14 14:39:42 +0200 | [diff] [blame] | 296 | return 0; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 297 | } |
| 298 | |
| 299 | /** |
| 300 | * mei_count_full_read_slots - counts read full slots. |
| 301 | * |
| 302 | * @dev: the device structure |
| 303 | * |
| 304 | * returns -1(ESLOTS_OVERFLOW) if overflow, otherwise filled slots count |
| 305 | */ |
| 306 | int mei_count_full_read_slots(struct mei_device *dev) |
| 307 | { |
| 308 | char read_ptr, write_ptr; |
| 309 | unsigned char buffer_depth, filled_slots; |
| 310 | |
| 311 | dev->me_hw_state = mei_mecsr_read(dev); |
| 312 | buffer_depth = (unsigned char)((dev->me_hw_state & ME_CBD_HRA) >> 24); |
| 313 | read_ptr = (char) ((dev->me_hw_state & ME_CBRP_HRA) >> 8); |
| 314 | write_ptr = (char) ((dev->me_hw_state & ME_CBWP_HRA) >> 16); |
| 315 | filled_slots = (unsigned char) (write_ptr - read_ptr); |
| 316 | |
| 317 | /* check for overflow */ |
| 318 | if (filled_slots > buffer_depth) |
| 319 | return -EOVERFLOW; |
| 320 | |
| 321 | dev_dbg(&dev->pdev->dev, "filled_slots =%08x\n", filled_slots); |
| 322 | return (int)filled_slots; |
| 323 | } |
| 324 | |
| 325 | /** |
| 326 | * mei_read_slots - reads a message from mei device. |
| 327 | * |
| 328 | * @dev: the device structure |
| 329 | * @buffer: message buffer will be written |
| 330 | * @buffer_length: message size will be read |
| 331 | */ |
Tomas Winkler | edf1eed | 2012-02-09 19:25:54 +0200 | [diff] [blame] | 332 | void mei_read_slots(struct mei_device *dev, unsigned char *buffer, |
| 333 | unsigned long buffer_length) |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 334 | { |
Tomas Winkler | edf1eed | 2012-02-09 19:25:54 +0200 | [diff] [blame] | 335 | u32 *reg_buf = (u32 *)buffer; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 336 | |
Tomas Winkler | edf1eed | 2012-02-09 19:25:54 +0200 | [diff] [blame] | 337 | for (; buffer_length >= sizeof(u32); buffer_length -= sizeof(u32)) |
| 338 | *reg_buf++ = mei_mecbrw_read(dev); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 339 | |
| 340 | if (buffer_length > 0) { |
Tomas Winkler | edf1eed | 2012-02-09 19:25:54 +0200 | [diff] [blame] | 341 | u32 reg = mei_mecbrw_read(dev); |
| 342 | memcpy(reg_buf, ®, buffer_length); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 343 | } |
| 344 | |
| 345 | dev->host_hw_state |= H_IG; |
| 346 | mei_hcsr_set(dev); |
| 347 | } |
| 348 | |