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Douglas Thompson7c9281d2007-07-19 01:49:33 -07001/*
2 * Defines, structures, APIs for edac_core module
3 *
4 * (C) 2007 Linux Networx (http://lnxi.com)
5 * This file may be distributed under the terms of the
6 * GNU General Public License.
7 *
8 * Written by Thayne Harbaugh
9 * Based on work by Dan Hollis <goemon at anime dot net> and others.
10 * http://www.anime.net/~goemon/linux-ecc/
11 *
12 * NMI handling support added by
13 * Dave Peterson <dsp@llnl.gov> <dave_peterson@pobox.com>
14 *
15 * Refactored for multi-source files:
16 * Doug Thompson <norsk5@xmission.com>
17 *
18 */
19
20#ifndef _EDAC_CORE_H_
21#define _EDAC_CORE_H_
22
23#include <linux/kernel.h>
24#include <linux/types.h>
25#include <linux/module.h>
26#include <linux/spinlock.h>
27#include <linux/smp.h>
28#include <linux/pci.h>
29#include <linux/time.h>
30#include <linux/nmi.h>
31#include <linux/rcupdate.h>
32#include <linux/completion.h>
33#include <linux/kobject.h>
34#include <linux/platform_device.h>
Douglas Thompsone27e3da2007-07-19 01:49:36 -070035#include <linux/sysdev.h>
36#include <linux/workqueue.h>
37#include <linux/version.h>
Douglas Thompson7c9281d2007-07-19 01:49:33 -070038
39#define EDAC_MC_LABEL_LEN 31
Douglas Thompsone27e3da2007-07-19 01:49:36 -070040#define EDAC_DEVICE_NAME_LEN 31
41#define EDAC_ATTRIB_VALUE_LEN 15
42#define MC_PROC_NAME_MAX_LEN 7
Douglas Thompson7c9281d2007-07-19 01:49:33 -070043
44#if PAGE_SHIFT < 20
45#define PAGES_TO_MiB( pages ) ( ( pages ) >> ( 20 - PAGE_SHIFT ) )
46#else /* PAGE_SHIFT > 20 */
47#define PAGES_TO_MiB( pages ) ( ( pages ) << ( PAGE_SHIFT - 20 ) )
48#endif
49
50#define edac_printk(level, prefix, fmt, arg...) \
51 printk(level "EDAC " prefix ": " fmt, ##arg)
52
53#define edac_mc_printk(mci, level, fmt, arg...) \
54 printk(level "EDAC MC%d: " fmt, mci->mc_idx, ##arg)
55
56#define edac_mc_chipset_printk(mci, level, prefix, fmt, arg...) \
57 printk(level "EDAC " prefix " MC%d: " fmt, mci->mc_idx, ##arg)
58
Douglas Thompsone27e3da2007-07-19 01:49:36 -070059/* edac_device printk */
60#define edac_device_printk(ctl, level, fmt, arg...) \
61 printk(level "EDAC DEVICE%d: " fmt, ctl->dev_idx, ##arg)
62
Dave Jiang91b99042007-07-19 01:49:52 -070063/* edac_pci printk */
64#define edac_pci_printk(ctl, level, fmt, arg...) \
65 printk(level "EDAC PCI%d: " fmt, ctl->pci_idx, ##arg)
66
Douglas Thompson7c9281d2007-07-19 01:49:33 -070067/* prefixes for edac_printk() and edac_mc_printk() */
68#define EDAC_MC "MC"
69#define EDAC_PCI "PCI"
70#define EDAC_DEBUG "DEBUG"
71
72#ifdef CONFIG_EDAC_DEBUG
73extern int edac_debug_level;
74
75#define edac_debug_printk(level, fmt, arg...) \
76 do { \
77 if (level <= edac_debug_level) \
Douglas Thompsone27e3da2007-07-19 01:49:36 -070078 edac_printk(KERN_EMERG, EDAC_DEBUG, fmt, ##arg); \
Douglas Thompson7c9281d2007-07-19 01:49:33 -070079 } while(0)
80
81#define debugf0( ... ) edac_debug_printk(0, __VA_ARGS__ )
82#define debugf1( ... ) edac_debug_printk(1, __VA_ARGS__ )
83#define debugf2( ... ) edac_debug_printk(2, __VA_ARGS__ )
84#define debugf3( ... ) edac_debug_printk(3, __VA_ARGS__ )
85#define debugf4( ... ) edac_debug_printk(4, __VA_ARGS__ )
86
Douglas Thompson079708b2007-07-19 01:49:58 -070087#else /* !CONFIG_EDAC_DEBUG */
Douglas Thompson7c9281d2007-07-19 01:49:33 -070088
89#define debugf0( ... )
90#define debugf1( ... )
91#define debugf2( ... )
92#define debugf3( ... )
93#define debugf4( ... )
94
Douglas Thompson079708b2007-07-19 01:49:58 -070095#endif /* !CONFIG_EDAC_DEBUG */
Douglas Thompson7c9281d2007-07-19 01:49:33 -070096
97#define BIT(x) (1 << (x))
98
99#define PCI_VEND_DEV(vend, dev) PCI_VENDOR_ID_ ## vend, \
100 PCI_DEVICE_ID_ ## vend ## _ ## dev
101
Dave Jiangc4192702007-07-19 01:49:47 -0700102#define dev_name(dev) (dev)->dev_name
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700103
104/* memory devices */
105enum dev_type {
106 DEV_UNKNOWN = 0,
107 DEV_X1,
108 DEV_X2,
109 DEV_X4,
110 DEV_X8,
111 DEV_X16,
112 DEV_X32, /* Do these parts exist? */
113 DEV_X64 /* Do these parts exist? */
114};
115
116#define DEV_FLAG_UNKNOWN BIT(DEV_UNKNOWN)
117#define DEV_FLAG_X1 BIT(DEV_X1)
118#define DEV_FLAG_X2 BIT(DEV_X2)
119#define DEV_FLAG_X4 BIT(DEV_X4)
120#define DEV_FLAG_X8 BIT(DEV_X8)
121#define DEV_FLAG_X16 BIT(DEV_X16)
122#define DEV_FLAG_X32 BIT(DEV_X32)
123#define DEV_FLAG_X64 BIT(DEV_X64)
124
125/* memory types */
126enum mem_type {
127 MEM_EMPTY = 0, /* Empty csrow */
128 MEM_RESERVED, /* Reserved csrow type */
129 MEM_UNKNOWN, /* Unknown csrow type */
130 MEM_FPM, /* Fast page mode */
131 MEM_EDO, /* Extended data out */
132 MEM_BEDO, /* Burst Extended data out */
133 MEM_SDR, /* Single data rate SDRAM */
134 MEM_RDR, /* Registered single data rate SDRAM */
135 MEM_DDR, /* Double data rate SDRAM */
136 MEM_RDDR, /* Registered Double data rate SDRAM */
137 MEM_RMBS, /* Rambus DRAM */
Douglas Thompson079708b2007-07-19 01:49:58 -0700138 MEM_DDR2, /* DDR2 RAM */
139 MEM_FB_DDR2, /* fully buffered DDR2 */
140 MEM_RDDR2, /* Registered DDR2 RAM */
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700141};
142
143#define MEM_FLAG_EMPTY BIT(MEM_EMPTY)
144#define MEM_FLAG_RESERVED BIT(MEM_RESERVED)
145#define MEM_FLAG_UNKNOWN BIT(MEM_UNKNOWN)
146#define MEM_FLAG_FPM BIT(MEM_FPM)
147#define MEM_FLAG_EDO BIT(MEM_EDO)
148#define MEM_FLAG_BEDO BIT(MEM_BEDO)
149#define MEM_FLAG_SDR BIT(MEM_SDR)
150#define MEM_FLAG_RDR BIT(MEM_RDR)
151#define MEM_FLAG_DDR BIT(MEM_DDR)
152#define MEM_FLAG_RDDR BIT(MEM_RDDR)
153#define MEM_FLAG_RMBS BIT(MEM_RMBS)
154#define MEM_FLAG_DDR2 BIT(MEM_DDR2)
155#define MEM_FLAG_FB_DDR2 BIT(MEM_FB_DDR2)
156#define MEM_FLAG_RDDR2 BIT(MEM_RDDR2)
157
158/* chipset Error Detection and Correction capabilities and mode */
159enum edac_type {
160 EDAC_UNKNOWN = 0, /* Unknown if ECC is available */
161 EDAC_NONE, /* Doesnt support ECC */
162 EDAC_RESERVED, /* Reserved ECC type */
163 EDAC_PARITY, /* Detects parity errors */
164 EDAC_EC, /* Error Checking - no correction */
165 EDAC_SECDED, /* Single bit error correction, Double detection */
166 EDAC_S2ECD2ED, /* Chipkill x2 devices - do these exist? */
167 EDAC_S4ECD4ED, /* Chipkill x4 devices */
168 EDAC_S8ECD8ED, /* Chipkill x8 devices */
169 EDAC_S16ECD16ED, /* Chipkill x16 devices */
170};
171
172#define EDAC_FLAG_UNKNOWN BIT(EDAC_UNKNOWN)
173#define EDAC_FLAG_NONE BIT(EDAC_NONE)
174#define EDAC_FLAG_PARITY BIT(EDAC_PARITY)
175#define EDAC_FLAG_EC BIT(EDAC_EC)
176#define EDAC_FLAG_SECDED BIT(EDAC_SECDED)
177#define EDAC_FLAG_S2ECD2ED BIT(EDAC_S2ECD2ED)
178#define EDAC_FLAG_S4ECD4ED BIT(EDAC_S4ECD4ED)
179#define EDAC_FLAG_S8ECD8ED BIT(EDAC_S8ECD8ED)
180#define EDAC_FLAG_S16ECD16ED BIT(EDAC_S16ECD16ED)
181
182/* scrubbing capabilities */
183enum scrub_type {
184 SCRUB_UNKNOWN = 0, /* Unknown if scrubber is available */
185 SCRUB_NONE, /* No scrubber */
186 SCRUB_SW_PROG, /* SW progressive (sequential) scrubbing */
187 SCRUB_SW_SRC, /* Software scrub only errors */
188 SCRUB_SW_PROG_SRC, /* Progressive software scrub from an error */
189 SCRUB_SW_TUNABLE, /* Software scrub frequency is tunable */
190 SCRUB_HW_PROG, /* HW progressive (sequential) scrubbing */
191 SCRUB_HW_SRC, /* Hardware scrub only errors */
192 SCRUB_HW_PROG_SRC, /* Progressive hardware scrub from an error */
193 SCRUB_HW_TUNABLE /* Hardware scrub frequency is tunable */
194};
195
196#define SCRUB_FLAG_SW_PROG BIT(SCRUB_SW_PROG)
Douglas Thompson522a94b2007-07-19 01:49:41 -0700197#define SCRUB_FLAG_SW_SRC BIT(SCRUB_SW_SRC)
198#define SCRUB_FLAG_SW_PROG_SRC BIT(SCRUB_SW_PROG_SRC)
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700199#define SCRUB_FLAG_SW_TUN BIT(SCRUB_SW_SCRUB_TUNABLE)
200#define SCRUB_FLAG_HW_PROG BIT(SCRUB_HW_PROG)
Douglas Thompson522a94b2007-07-19 01:49:41 -0700201#define SCRUB_FLAG_HW_SRC BIT(SCRUB_HW_SRC)
202#define SCRUB_FLAG_HW_PROG_SRC BIT(SCRUB_HW_PROG_SRC)
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700203#define SCRUB_FLAG_HW_TUN BIT(SCRUB_HW_TUNABLE)
204
205/* FIXME - should have notify capabilities: NMI, LOG, PROC, etc */
206
Dave Jiang91b99042007-07-19 01:49:52 -0700207/* EDAC internal operation states */
208#define OP_ALLOC 0x100
209#define OP_RUNNING_POLL 0x201
210#define OP_RUNNING_INTERRUPT 0x202
211#define OP_RUNNING_POLL_INTR 0x203
212#define OP_OFFLINE 0x300
213
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700214/*
215 * There are several things to be aware of that aren't at all obvious:
216 *
217 *
218 * SOCKETS, SOCKET SETS, BANKS, ROWS, CHIP-SELECT ROWS, CHANNELS, etc..
219 *
220 * These are some of the many terms that are thrown about that don't always
221 * mean what people think they mean (Inconceivable!). In the interest of
222 * creating a common ground for discussion, terms and their definitions
223 * will be established.
224 *
225 * Memory devices: The individual chip on a memory stick. These devices
226 * commonly output 4 and 8 bits each. Grouping several
227 * of these in parallel provides 64 bits which is common
228 * for a memory stick.
229 *
230 * Memory Stick: A printed circuit board that agregates multiple
231 * memory devices in parallel. This is the atomic
232 * memory component that is purchaseable by Joe consumer
233 * and loaded into a memory socket.
234 *
235 * Socket: A physical connector on the motherboard that accepts
236 * a single memory stick.
237 *
238 * Channel: Set of memory devices on a memory stick that must be
239 * grouped in parallel with one or more additional
240 * channels from other memory sticks. This parallel
241 * grouping of the output from multiple channels are
242 * necessary for the smallest granularity of memory access.
243 * Some memory controllers are capable of single channel -
244 * which means that memory sticks can be loaded
245 * individually. Other memory controllers are only
246 * capable of dual channel - which means that memory
247 * sticks must be loaded as pairs (see "socket set").
248 *
249 * Chip-select row: All of the memory devices that are selected together.
250 * for a single, minimum grain of memory access.
251 * This selects all of the parallel memory devices across
252 * all of the parallel channels. Common chip-select rows
253 * for single channel are 64 bits, for dual channel 128
254 * bits.
255 *
256 * Single-Ranked stick: A Single-ranked stick has 1 chip-select row of memmory.
257 * Motherboards commonly drive two chip-select pins to
258 * a memory stick. A single-ranked stick, will occupy
259 * only one of those rows. The other will be unused.
260 *
261 * Double-Ranked stick: A double-ranked stick has two chip-select rows which
262 * access different sets of memory devices. The two
263 * rows cannot be accessed concurrently.
264 *
265 * Double-sided stick: DEPRECATED TERM, see Double-Ranked stick.
266 * A double-sided stick has two chip-select rows which
267 * access different sets of memory devices. The two
268 * rows cannot be accessed concurrently. "Double-sided"
269 * is irrespective of the memory devices being mounted
270 * on both sides of the memory stick.
271 *
272 * Socket set: All of the memory sticks that are required for for
273 * a single memory access or all of the memory sticks
274 * spanned by a chip-select row. A single socket set
275 * has two chip-select rows and if double-sided sticks
276 * are used these will occupy those chip-select rows.
277 *
278 * Bank: This term is avoided because it is unclear when
279 * needing to distinguish between chip-select rows and
280 * socket sets.
281 *
282 * Controller pages:
283 *
284 * Physical pages:
285 *
286 * Virtual pages:
287 *
288 *
289 * STRUCTURE ORGANIZATION AND CHOICES
290 *
291 *
292 *
293 * PS - I enjoyed writing all that about as much as you enjoyed reading it.
294 */
295
296struct channel_info {
297 int chan_idx; /* channel index */
298 u32 ce_count; /* Correctable Errors for this CHANNEL */
Douglas Thompson079708b2007-07-19 01:49:58 -0700299 char label[EDAC_MC_LABEL_LEN + 1]; /* DIMM label on motherboard */
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700300 struct csrow_info *csrow; /* the parent */
301};
302
303struct csrow_info {
304 unsigned long first_page; /* first page number in dimm */
305 unsigned long last_page; /* last page number in dimm */
306 unsigned long page_mask; /* used for interleaving -
307 * 0UL for non intlv
308 */
309 u32 nr_pages; /* number of pages in csrow */
310 u32 grain; /* granularity of reported error in bytes */
311 int csrow_idx; /* the chip-select row */
312 enum dev_type dtype; /* memory device type */
313 u32 ue_count; /* Uncorrectable Errors for this csrow */
314 u32 ce_count; /* Correctable Errors for this csrow */
315 enum mem_type mtype; /* memory csrow type */
316 enum edac_type edac_mode; /* EDAC mode for this csrow */
317 struct mem_ctl_info *mci; /* the parent */
318
319 struct kobject kobj; /* sysfs kobject for this csrow */
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700320
Doug Thompson8096cfa2007-07-19 01:50:27 -0700321 /* channel information for this csrow */
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700322 u32 nr_channels;
323 struct channel_info *channels;
324};
325
Douglas Thompson42a8e392007-07-19 01:50:10 -0700326/* mcidev_sysfs_attribute structure
327 * used for driver sysfs attributes and in mem_ctl_info
328 * sysfs top level entries
329 */
330struct mcidev_sysfs_attribute {
331 struct attribute attr;
332 ssize_t (*show)(struct mem_ctl_info *,char *);
333 ssize_t (*store)(struct mem_ctl_info *, const char *,size_t);
334};
335
336/* MEMORY controller information structure
337 */
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700338struct mem_ctl_info {
Douglas Thompson079708b2007-07-19 01:49:58 -0700339 struct list_head link; /* for global list of mem_ctl_info structs */
Douglas Thompson1c3631f2007-07-19 01:50:29 -0700340
341 struct module *owner; /* Module owner of this control struct */
342
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700343 unsigned long mtype_cap; /* memory types supported by mc */
344 unsigned long edac_ctl_cap; /* Mem controller EDAC capabilities */
345 unsigned long edac_cap; /* configuration capabilities - this is
346 * closely related to edac_ctl_cap. The
347 * difference is that the controller may be
348 * capable of s4ecd4ed which would be listed
349 * in edac_ctl_cap, but if channels aren't
350 * capable of s4ecd4ed then the edac_cap would
351 * not have that capability.
352 */
353 unsigned long scrub_cap; /* chipset scrub capabilities */
354 enum scrub_type scrub_mode; /* current scrub mode */
355
356 /* Translates sdram memory scrub rate given in bytes/sec to the
357 internal representation and configures whatever else needs
358 to be configured.
Douglas Thompson079708b2007-07-19 01:49:58 -0700359 */
360 int (*set_sdram_scrub_rate) (struct mem_ctl_info * mci, u32 * bw);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700361
362 /* Get the current sdram memory scrub rate from the internal
363 representation and converts it to the closest matching
364 bandwith in bytes/sec.
Douglas Thompson079708b2007-07-19 01:49:58 -0700365 */
366 int (*get_sdram_scrub_rate) (struct mem_ctl_info * mci, u32 * bw);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700367
Douglas Thompson42a8e392007-07-19 01:50:10 -0700368
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700369 /* pointer to edac checking routine */
370 void (*edac_check) (struct mem_ctl_info * mci);
371
372 /*
373 * Remaps memory pages: controller pages to physical pages.
374 * For most MC's, this will be NULL.
375 */
376 /* FIXME - why not send the phys page to begin with? */
377 unsigned long (*ctl_page_to_phys) (struct mem_ctl_info * mci,
Douglas Thompson079708b2007-07-19 01:49:58 -0700378 unsigned long page);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700379 int mc_idx;
380 int nr_csrows;
381 struct csrow_info *csrows;
382 /*
383 * FIXME - what about controllers on other busses? - IDs must be
384 * unique. dev pointer should be sufficiently unique, but
385 * BUS:SLOT.FUNC numbers may not be unique.
386 */
387 struct device *dev;
388 const char *mod_name;
389 const char *mod_ver;
390 const char *ctl_name;
Dave Jiangc4192702007-07-19 01:49:47 -0700391 const char *dev_name;
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700392 char proc_name[MC_PROC_NAME_MAX_LEN + 1];
393 void *pvt_info;
394 u32 ue_noinfo_count; /* Uncorrectable Errors w/o info */
395 u32 ce_noinfo_count; /* Correctable Errors w/o info */
396 u32 ue_count; /* Total Uncorrectable Errors for this MC */
397 u32 ce_count; /* Total Correctable Errors for this MC */
398 unsigned long start_time; /* mci load start time (in jiffies) */
399
400 /* this stuff is for safe removal of mc devices from global list while
401 * NMI handlers may be traversing list
402 */
403 struct rcu_head rcu;
404 struct completion complete;
405
406 /* edac sysfs device control */
407 struct kobject edac_mci_kobj;
Dave Jiang81d87cb2007-07-19 01:49:52 -0700408
Douglas Thompson42a8e392007-07-19 01:50:10 -0700409 /* Additional top controller level attributes, but specified
410 * by the low level driver.
411 *
412 * Set by the low level driver to provide attributes at the
413 * controller level, same level as 'ue_count' and 'ce_count' above.
414 * An array of structures, NULL terminated
415 *
416 * If attributes are desired, then set to array of attributes
417 * If no attributes are desired, leave NULL
418 */
419 struct mcidev_sysfs_attribute *mc_driver_sysfs_attributes;
420
Dave Jiang81d87cb2007-07-19 01:49:52 -0700421 /* work struct for this MC */
Dave Jiang81d87cb2007-07-19 01:49:52 -0700422 struct delayed_work work;
Douglas Thompson86aa8cb2007-07-19 01:50:01 -0700423
Dave Jiang81d87cb2007-07-19 01:49:52 -0700424 /* the internal state of this controller instance */
425 int op_state;
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700426};
427
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700428/*
Douglas Thompson42a8e392007-07-19 01:50:10 -0700429 * The following are the structures to provide for a generic
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700430 * or abstract 'edac_device'. This set of structures and the
431 * code that implements the APIs for the same, provide for
432 * registering EDAC type devices which are NOT standard memory.
433 *
434 * CPU caches (L1 and L2)
435 * DMA engines
436 * Core CPU swithces
437 * Fabric switch units
438 * PCIe interface controllers
439 * other EDAC/ECC type devices that can be monitored for
440 * errors, etc.
441 *
442 * It allows for a 2 level set of hiearchry. For example:
443 *
444 * cache could be composed of L1, L2 and L3 levels of cache.
445 * Each CPU core would have its own L1 cache, while sharing
446 * L2 and maybe L3 caches.
447 *
448 * View them arranged, via the sysfs presentation:
449 * /sys/devices/system/edac/..
450 *
451 * mc/ <existing memory device directory>
452 * cpu/cpu0/.. <L1 and L2 block directory>
453 * /L1-cache/ce_count
454 * /ue_count
455 * /L2-cache/ce_count
456 * /ue_count
457 * cpu/cpu1/.. <L1 and L2 block directory>
458 * /L1-cache/ce_count
459 * /ue_count
460 * /L2-cache/ce_count
461 * /ue_count
462 * ...
463 *
464 * the L1 and L2 directories would be "edac_device_block's"
465 */
466
467struct edac_device_counter {
Douglas Thompson079708b2007-07-19 01:49:58 -0700468 u32 ue_count;
469 u32 ce_count;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700470};
471
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700472/* forward reference */
473struct edac_device_ctl_info;
474struct edac_device_block;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700475
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700476/* edac_dev_sysfs_attribute structure
477 * used for driver sysfs attributes in mem_ctl_info
478 * for extra controls and attributes:
479 * like high level error Injection controls
480 */
481struct edac_dev_sysfs_attribute {
482 struct attribute attr;
483 ssize_t (*show)(struct edac_device_ctl_info *, char *);
484 ssize_t (*store)(struct edac_device_ctl_info *, const char *, size_t);
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700485};
486
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700487/* edac_dev_sysfs_block_attribute structure
Doug Thompsonb2a4ac02007-07-19 01:50:33 -0700488 *
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700489 * used in leaf 'block' nodes for adding controls/attributes
Doug Thompsonb2a4ac02007-07-19 01:50:33 -0700490 *
491 * each block in each instance of the containing control structure
492 * can have an array of the following. The show and store functions
493 * will be filled in with the show/store function in the
494 * low level driver.
495 *
496 * The 'value' field will be the actual value field used for
497 * counting
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700498 */
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700499struct edac_dev_sysfs_block_attribute {
500 struct attribute attr;
501 ssize_t (*show)(struct kobject *, struct attribute *, char *);
502 ssize_t (*store)(struct kobject *, struct attribute *,
503 const char *, size_t);
504 struct edac_device_block *block;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700505
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700506 unsigned int value;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700507};
508
509/* device block control structure */
510struct edac_device_block {
511 struct edac_device_instance *instance; /* Up Pointer */
Douglas Thompson079708b2007-07-19 01:49:58 -0700512 char name[EDAC_DEVICE_NAME_LEN + 1];
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700513
514 struct edac_device_counter counters; /* basic UE and CE counters */
515
Douglas Thompson079708b2007-07-19 01:49:58 -0700516 int nr_attribs; /* how many attributes */
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700517
518 /* this block's attributes, could be NULL */
519 struct edac_dev_sysfs_block_attribute *block_attributes;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700520
521 /* edac sysfs device control */
522 struct kobject kobj;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700523};
524
525/* device instance control structure */
526struct edac_device_instance {
527 struct edac_device_ctl_info *ctl; /* Up pointer */
528 char name[EDAC_DEVICE_NAME_LEN + 4];
529
530 struct edac_device_counter counters; /* instance counters */
531
Douglas Thompson079708b2007-07-19 01:49:58 -0700532 u32 nr_blocks; /* how many blocks */
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700533 struct edac_device_block *blocks; /* block array */
534
535 /* edac sysfs device control */
536 struct kobject kobj;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700537};
538
Douglas Thompson42a8e392007-07-19 01:50:10 -0700539
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700540/*
541 * Abstract edac_device control info structure
542 *
543 */
544struct edac_device_ctl_info {
545 /* for global list of edac_device_ctl_info structs */
546 struct list_head link;
547
Douglas Thompson1c3631f2007-07-19 01:50:29 -0700548 struct module *owner; /* Module owner of this control struct */
549
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700550 int dev_idx;
551
552 /* Per instance controls for this edac_device */
553 int log_ue; /* boolean for logging UEs */
554 int log_ce; /* boolean for logging CEs */
555 int panic_on_ue; /* boolean for panic'ing on an UE */
556 unsigned poll_msec; /* number of milliseconds to poll interval */
557 unsigned long delay; /* number of jiffies for poll_msec */
558
Douglas Thompson42a8e392007-07-19 01:50:10 -0700559 /* Additional top controller level attributes, but specified
560 * by the low level driver.
561 *
562 * Set by the low level driver to provide attributes at the
563 * controller level, same level as 'ue_count' and 'ce_count' above.
564 * An array of structures, NULL terminated
565 *
566 * If attributes are desired, then set to array of attributes
567 * If no attributes are desired, leave NULL
568 */
569 struct edac_dev_sysfs_attribute *sysfs_attributes;
570
571 /* pointer to main 'edac' class in sysfs */
572 struct sysdev_class *edac_class;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700573
574 /* the internal state of this controller instance */
575 int op_state;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700576 /* work struct for this instance */
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700577 struct delayed_work work;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700578
579 /* pointer to edac polling checking routine:
Douglas Thompson079708b2007-07-19 01:49:58 -0700580 * If NOT NULL: points to polling check routine
581 * If NULL: Then assumes INTERRUPT operation, where
582 * MC driver will receive events
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700583 */
584 void (*edac_check) (struct edac_device_ctl_info * edac_dev);
585
586 struct device *dev; /* pointer to device structure */
587
588 const char *mod_name; /* module name */
589 const char *ctl_name; /* edac controller name */
Dave Jiangc4192702007-07-19 01:49:47 -0700590 const char *dev_name; /* pci/platform/etc... name */
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700591
592 void *pvt_info; /* pointer to 'private driver' info */
593
Douglas Thompson079708b2007-07-19 01:49:58 -0700594 unsigned long start_time; /* edac_device load start time (jiffies) */
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700595
596 /* these are for safe removal of mc devices from global list while
597 * NMI handlers may be traversing list
598 */
599 struct rcu_head rcu;
Douglas Thompson1c3631f2007-07-19 01:50:29 -0700600 struct completion removal_complete;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700601
602 /* sysfs top name under 'edac' directory
603 * and instance name:
Douglas Thompson079708b2007-07-19 01:49:58 -0700604 * cpu/cpu0/...
605 * cpu/cpu1/...
606 * cpu/cpu2/...
607 * ...
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700608 */
609 char name[EDAC_DEVICE_NAME_LEN + 1];
610
611 /* Number of instances supported on this control structure
612 * and the array of those instances
613 */
614 u32 nr_instances;
615 struct edac_device_instance *instances;
616
617 /* Event counters for the this whole EDAC Device */
618 struct edac_device_counter counters;
619
620 /* edac sysfs device control for the 'name'
621 * device this structure controls
622 */
623 struct kobject kobj;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700624};
625
626/* To get from the instance's wq to the beginning of the ctl structure */
Dave Jiang81d87cb2007-07-19 01:49:52 -0700627#define to_edac_mem_ctl_work(w) \
628 container_of(w, struct mem_ctl_info, work)
629
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700630#define to_edac_device_ctl_work(w) \
631 container_of(w,struct edac_device_ctl_info,work)
632
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700633/*
634 * The alloc() and free() functions for the 'edac_device' control info
635 * structure. A MC driver will allocate one of these for each edac_device
636 * it is going to control/register with the EDAC CORE.
637 */
638extern struct edac_device_ctl_info *edac_device_alloc_ctl_info(
Douglas Thompson079708b2007-07-19 01:49:58 -0700639 unsigned sizeof_private,
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700640 char *edac_device_name, unsigned nr_instances,
641 char *edac_block_name, unsigned nr_blocks,
Douglas Thompson079708b2007-07-19 01:49:58 -0700642 unsigned offset_value,
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700643 struct edac_dev_sysfs_block_attribute *block_attributes,
Doug Thompsond45e7822007-07-19 01:50:27 -0700644 unsigned nr_attribs,
645 int device_index);
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700646
647/* The offset value can be:
648 * -1 indicating no offset value
649 * 0 for zero-based block numbers
650 * 1 for 1-based block number
651 * other for other-based block number
652 */
653#define BLOCK_OFFSET_VALUE_OFF ((unsigned) -1)
654
Douglas Thompson079708b2007-07-19 01:49:58 -0700655extern void edac_device_free_ctl_info(struct edac_device_ctl_info *ctl_info);
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700656
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700657#ifdef CONFIG_PCI
658
Dave Jiang91b99042007-07-19 01:49:52 -0700659struct edac_pci_counter {
Douglas Thompson079708b2007-07-19 01:49:58 -0700660 atomic_t pe_count;
661 atomic_t npe_count;
Dave Jiang91b99042007-07-19 01:49:52 -0700662};
663
664/*
665 * Abstract edac_pci control info structure
666 *
667 */
668struct edac_pci_ctl_info {
669 /* for global list of edac_pci_ctl_info structs */
670 struct list_head link;
671
672 int pci_idx;
673
Dave Jiang91b99042007-07-19 01:49:52 -0700674 struct sysdev_class *edac_class; /* pointer to class */
675
676 /* the internal state of this controller instance */
677 int op_state;
678 /* work struct for this instance */
Dave Jiang91b99042007-07-19 01:49:52 -0700679 struct delayed_work work;
Dave Jiang91b99042007-07-19 01:49:52 -0700680
681 /* pointer to edac polling checking routine:
Douglas Thompson079708b2007-07-19 01:49:58 -0700682 * If NOT NULL: points to polling check routine
683 * If NULL: Then assumes INTERRUPT operation, where
684 * MC driver will receive events
Dave Jiang91b99042007-07-19 01:49:52 -0700685 */
686 void (*edac_check) (struct edac_pci_ctl_info * edac_dev);
687
688 struct device *dev; /* pointer to device structure */
689
690 const char *mod_name; /* module name */
691 const char *ctl_name; /* edac controller name */
692 const char *dev_name; /* pci/platform/etc... name */
693
694 void *pvt_info; /* pointer to 'private driver' info */
695
Douglas Thompson079708b2007-07-19 01:49:58 -0700696 unsigned long start_time; /* edac_pci load start time (jiffies) */
Dave Jiang91b99042007-07-19 01:49:52 -0700697
698 /* these are for safe removal of devices from global list while
699 * NMI handlers may be traversing list
700 */
701 struct rcu_head rcu;
702 struct completion complete;
703
704 /* sysfs top name under 'edac' directory
705 * and instance name:
Douglas Thompson079708b2007-07-19 01:49:58 -0700706 * cpu/cpu0/...
707 * cpu/cpu1/...
708 * cpu/cpu2/...
709 * ...
Dave Jiang91b99042007-07-19 01:49:52 -0700710 */
711 char name[EDAC_DEVICE_NAME_LEN + 1];
712
713 /* Event counters for the this whole EDAC Device */
714 struct edac_pci_counter counters;
715
716 /* edac sysfs device control for the 'name'
717 * device this structure controls
718 */
719 struct kobject kobj;
720 struct completion kobj_complete;
721};
722
723#define to_edac_pci_ctl_work(w) \
724 container_of(w, struct edac_pci_ctl_info,work)
725
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700726/* write all or some bits in a byte-register*/
727static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value,
Douglas Thompson079708b2007-07-19 01:49:58 -0700728 u8 mask)
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700729{
730 if (mask != 0xff) {
731 u8 buf;
732
733 pci_read_config_byte(pdev, offset, &buf);
734 value &= mask;
735 buf &= ~mask;
736 value |= buf;
737 }
738
739 pci_write_config_byte(pdev, offset, value);
740}
741
742/* write all or some bits in a word-register*/
743static inline void pci_write_bits16(struct pci_dev *pdev, int offset,
Douglas Thompson079708b2007-07-19 01:49:58 -0700744 u16 value, u16 mask)
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700745{
746 if (mask != 0xffff) {
747 u16 buf;
748
749 pci_read_config_word(pdev, offset, &buf);
750 value &= mask;
751 buf &= ~mask;
752 value |= buf;
753 }
754
755 pci_write_config_word(pdev, offset, value);
756}
757
758/* write all or some bits in a dword-register*/
759static inline void pci_write_bits32(struct pci_dev *pdev, int offset,
Douglas Thompson079708b2007-07-19 01:49:58 -0700760 u32 value, u32 mask)
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700761{
762 if (mask != 0xffff) {
763 u32 buf;
764
765 pci_read_config_dword(pdev, offset, &buf);
766 value &= mask;
767 buf &= ~mask;
768 value |= buf;
769 }
770
771 pci_write_config_dword(pdev, offset, value);
772}
773
Douglas Thompson079708b2007-07-19 01:49:58 -0700774#endif /* CONFIG_PCI */
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700775
Doug Thompsonb8f6f972007-07-19 01:50:26 -0700776extern struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
777 unsigned nr_chans, int edac_index);
778extern int edac_mc_add_mc(struct mem_ctl_info *mci);
779extern void edac_mc_free(struct mem_ctl_info *mci);
Douglas Thompson079708b2007-07-19 01:49:58 -0700780extern struct mem_ctl_info *edac_mc_find(int idx);
Douglas Thompson079708b2007-07-19 01:49:58 -0700781extern struct mem_ctl_info *edac_mc_del_mc(struct device *dev);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700782extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci,
Douglas Thompson079708b2007-07-19 01:49:58 -0700783 unsigned long page);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700784
785/*
786 * The no info errors are used when error overflows are reported.
787 * There are a limited number of error logging registers that can
788 * be exausted. When all registers are exhausted and an additional
789 * error occurs then an error overflow register records that an
790 * error occured and the type of error, but doesn't have any
791 * further information. The ce/ue versions make for cleaner
792 * reporting logic and function interface - reduces conditional
793 * statement clutter and extra function arguments.
794 */
795extern void edac_mc_handle_ce(struct mem_ctl_info *mci,
Douglas Thompson079708b2007-07-19 01:49:58 -0700796 unsigned long page_frame_number,
797 unsigned long offset_in_page,
798 unsigned long syndrome, int row, int channel,
799 const char *msg);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700800extern void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci,
Douglas Thompson079708b2007-07-19 01:49:58 -0700801 const char *msg);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700802extern void edac_mc_handle_ue(struct mem_ctl_info *mci,
Douglas Thompson079708b2007-07-19 01:49:58 -0700803 unsigned long page_frame_number,
804 unsigned long offset_in_page, int row,
805 const char *msg);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700806extern void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci,
Douglas Thompson079708b2007-07-19 01:49:58 -0700807 const char *msg);
808extern void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, unsigned int csrow,
809 unsigned int channel0, unsigned int channel1,
810 char *msg);
811extern void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, unsigned int csrow,
812 unsigned int channel, char *msg);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700813
814/*
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700815 * edac_device APIs
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700816 */
Doug Thompsond45e7822007-07-19 01:50:27 -0700817extern int edac_device_add_device(struct edac_device_ctl_info *edac_dev);
Douglas Thompson079708b2007-07-19 01:49:58 -0700818extern struct edac_device_ctl_info *edac_device_del_device(struct device *dev);
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700819extern void edac_device_handle_ue(struct edac_device_ctl_info *edac_dev,
Doug Thompsonb8f6f972007-07-19 01:50:26 -0700820 int inst_nr, int block_nr, const char *msg);
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700821extern void edac_device_handle_ce(struct edac_device_ctl_info *edac_dev,
Doug Thompsonb8f6f972007-07-19 01:50:26 -0700822 int inst_nr, int block_nr, const char *msg);
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700823
Dave Jiang91b99042007-07-19 01:49:52 -0700824/*
825 * edac_pci APIs
826 */
Doug Thompsonb8f6f972007-07-19 01:50:26 -0700827extern struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
828 const char *edac_pci_name);
Dave Jiang91b99042007-07-19 01:49:52 -0700829
830extern void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci);
831
Doug Thompsonb8f6f972007-07-19 01:50:26 -0700832extern void edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci,
833 unsigned long value);
Dave Jiang91b99042007-07-19 01:49:52 -0700834
835extern int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx);
Douglas Thompson079708b2007-07-19 01:49:58 -0700836extern struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev);
Dave Jiang91b99042007-07-19 01:49:52 -0700837
Doug Thompsonb8f6f972007-07-19 01:50:26 -0700838extern struct edac_pci_ctl_info *edac_pci_create_generic_ctl(
839 struct device *dev,
840 const char *mod_name);
Dave Jiang91b99042007-07-19 01:49:52 -0700841
842extern void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci);
843extern int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci);
844extern void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci);
845
846/*
847 * edac misc APIs
848 */
Douglas Thompson494d0d52007-07-19 01:50:21 -0700849extern char *edac_op_state_to_string(int op_state);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700850
851#endif /* _EDAC_CORE_H_ */