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Renaud CERRATOe6bb42e2008-06-23 17:05:49 +02001/*
2 * Watchdog driver for Atmel AT91SAM9x processors.
3 *
4 * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12/*
13 * The Watchdog Timer Mode Register can be only written to once. If the
14 * timeout need to be set from Linux, be sure that the bootstrap or the
15 * bootloader doesn't write to this register.
16 */
17
Joe Perches27c766a2012-02-15 15:06:19 -080018#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020020#include <linux/errno.h>
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020021#include <linux/init.h>
Boris BREZILLON5161b312013-10-04 09:24:12 +020022#include <linux/interrupt.h>
Andrew Victor2af29b72009-02-11 21:23:10 +010023#include <linux/io.h>
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020024#include <linux/kernel.h>
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020025#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/platform_device.h>
Boris BREZILLON5161b312013-10-04 09:24:12 +020028#include <linux/reboot.h>
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020029#include <linux/types.h>
30#include <linux/watchdog.h>
31#include <linux/jiffies.h>
32#include <linux/timer.h>
33#include <linux/bitops.h>
34#include <linux/uaccess.h>
Fabio Porceddabe49bba2012-11-12 09:37:25 +010035#include <linux/of.h>
Boris BREZILLON5161b312013-10-04 09:24:12 +020036#include <linux/of_irq.h>
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020037
Jean-Christophe Plagniol-Villarde7b39142011-07-15 01:52:05 +020038#include "at91sam9_wdt.h"
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020039
40#define DRV_NAME "AT91SAM9 Watchdog"
41
Boris BREZILLON5161b312013-10-04 09:24:12 +020042#define wdt_read(wdt, field) \
43 __raw_readl((wdt)->base + (field))
44#define wdt_write(wtd, field, val) \
45 __raw_writel((val), (wdt)->base + (field))
Jean-Christophe PLAGNIOL-VILLARDc1c30a22011-11-02 01:43:31 +080046
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020047/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
48 * use this to convert a watchdog
49 * value from/to milliseconds.
50 */
Boris BREZILLON5161b312013-10-04 09:24:12 +020051#define ticks_to_hz_rounddown(t) ((((t) + 1) * HZ) >> 8)
52#define ticks_to_hz_roundup(t) (((((t) + 1) * HZ) + 255) >> 8)
53#define ticks_to_secs(t) (((t) + 1) >> 8)
Boris BREZILLON14447972013-11-03 18:52:42 +010054#define secs_to_ticks(s) ((s) ? (((s) << 8) - 1) : 0)
Boris BREZILLON5161b312013-10-04 09:24:12 +020055
56#define WDT_MR_RESET 0x3FFF2FFF
57
58/* Watchdog max counter value in ticks */
59#define WDT_COUNTER_MAX_TICKS 0xFFF
60
61/* Watchdog max delta/value in secs */
62#define WDT_COUNTER_MAX_SECS ticks_to_secs(WDT_COUNTER_MAX_TICKS)
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020063
64/* Hardware timeout in seconds */
65#define WDT_HW_TIMEOUT 2
66
67/* Timer heartbeat (500ms) */
68#define WDT_TIMEOUT (HZ/2)
69
70/* User land timeout */
71#define WDT_HEARTBEAT 15
Fabio Porceddac1fd5f62013-02-14 09:14:25 +010072static int heartbeat;
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020073module_param(heartbeat, int, 0);
74MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
75 "(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
76
Wim Van Sebroeck86a1e182012-03-05 16:51:11 +010077static bool nowayout = WATCHDOG_NOWAYOUT;
78module_param(nowayout, bool, 0);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020079MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
80 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
81
Boris BREZILLON5161b312013-10-04 09:24:12 +020082#define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd)
83struct at91wdt {
84 struct watchdog_device wdd;
Jean-Christophe PLAGNIOL-VILLARDc1c30a22011-11-02 01:43:31 +080085 void __iomem *base;
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020086 unsigned long next_heartbeat; /* the next_heartbeat for the timer */
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020087 struct timer_list timer; /* The timer that pings the watchdog */
Boris BREZILLON5161b312013-10-04 09:24:12 +020088 u32 mr;
89 u32 mr_mask;
90 unsigned long heartbeat; /* WDT heartbeat in jiffies */
91 bool nowayout;
92 unsigned int irq;
93};
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020094
95/* ......................................................................... */
96
Boris BREZILLON5161b312013-10-04 09:24:12 +020097static irqreturn_t wdt_interrupt(int irq, void *dev_id)
98{
99 struct at91wdt *wdt = (struct at91wdt *)dev_id;
100
101 if (wdt_read(wdt, AT91_WDT_SR)) {
102 pr_crit("at91sam9 WDT software reset\n");
103 emergency_restart();
104 pr_crit("Reboot didn't ?????\n");
105 }
106
107 return IRQ_HANDLED;
108}
109
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200110/*
111 * Reload the watchdog timer. (ie, pat the watchdog)
112 */
Boris BREZILLON5161b312013-10-04 09:24:12 +0200113static inline void at91_wdt_reset(struct at91wdt *wdt)
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200114{
Boris BREZILLON5161b312013-10-04 09:24:12 +0200115 wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200116}
117
118/*
119 * Timer tick
120 */
121static void at91_ping(unsigned long data)
122{
Boris BREZILLON5161b312013-10-04 09:24:12 +0200123 struct at91wdt *wdt = (struct at91wdt *)data;
124 if (time_before(jiffies, wdt->next_heartbeat) ||
125 !watchdog_active(&wdt->wdd)) {
126 at91_wdt_reset(wdt);
127 mod_timer(&wdt->timer, jiffies + wdt->heartbeat);
128 } else {
Joe Perches27c766a2012-02-15 15:06:19 -0800129 pr_crit("I will reset your machine !\n");
Boris BREZILLON5161b312013-10-04 09:24:12 +0200130 }
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200131}
132
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800133static int at91_wdt_start(struct watchdog_device *wdd)
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200134{
Boris BREZILLON5161b312013-10-04 09:24:12 +0200135 struct at91wdt *wdt = to_wdt(wdd);
136 /* calculate when the next userspace timeout will be */
137 wdt->next_heartbeat = jiffies + wdd->timeout * HZ;
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800138 return 0;
139}
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200140
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800141static int at91_wdt_stop(struct watchdog_device *wdd)
142{
143 /* The watchdog timer hardware can not be stopped... */
144 return 0;
145}
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200146
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800147static int at91_wdt_set_timeout(struct watchdog_device *wdd, unsigned int new_timeout)
148{
149 wdd->timeout = new_timeout;
Boris BREZILLON5161b312013-10-04 09:24:12 +0200150 return at91_wdt_start(wdd);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200151}
152
Boris BREZILLON5161b312013-10-04 09:24:12 +0200153static int at91_wdt_init(struct platform_device *pdev, struct at91wdt *wdt)
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200154{
Boris BREZILLON5161b312013-10-04 09:24:12 +0200155 u32 tmp;
156 u32 delta;
157 u32 value;
158 int err;
159 u32 mask = wdt->mr_mask;
160 unsigned long min_heartbeat = 1;
161 struct device *dev = &pdev->dev;
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200162
Boris BREZILLON5161b312013-10-04 09:24:12 +0200163 tmp = wdt_read(wdt, AT91_WDT_MR);
164 if ((tmp & mask) != (wdt->mr & mask)) {
165 if (tmp == WDT_MR_RESET) {
166 wdt_write(wdt, AT91_WDT_MR, wdt->mr);
167 tmp = wdt_read(wdt, AT91_WDT_MR);
168 }
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200169 }
170
Boris BREZILLON5161b312013-10-04 09:24:12 +0200171 if (tmp & AT91_WDT_WDDIS) {
172 if (wdt->mr & AT91_WDT_WDDIS)
173 return 0;
174 dev_err(dev, "watchdog is disabled\n");
175 return -EINVAL;
176 }
177
178 value = tmp & AT91_WDT_WDV;
179 delta = (tmp & AT91_WDT_WDD) >> 16;
180
181 if (delta < value)
182 min_heartbeat = ticks_to_hz_roundup(value - delta);
183
184 wdt->heartbeat = ticks_to_hz_rounddown(value);
185 if (!wdt->heartbeat) {
186 dev_err(dev,
187 "heartbeat is too small for the system to handle it correctly\n");
188 return -EINVAL;
189 }
190
191 if (wdt->heartbeat < min_heartbeat + 4) {
192 wdt->heartbeat = min_heartbeat;
193 dev_warn(dev,
194 "min heartbeat and max heartbeat might be too close for the system to handle it correctly\n");
195 if (wdt->heartbeat < 4)
196 dev_warn(dev,
197 "heartbeat might be too small for the system to handle it correctly\n");
198 } else {
199 wdt->heartbeat -= 4;
200 }
201
202 if ((tmp & AT91_WDT_WDFIEN) && wdt->irq) {
203 err = request_irq(wdt->irq, wdt_interrupt,
204 IRQF_SHARED | IRQF_IRQPOLL,
205 pdev->name, wdt);
206 if (err)
207 return err;
208 }
209
210 if ((tmp & wdt->mr_mask) != (wdt->mr & wdt->mr_mask))
211 dev_warn(dev,
212 "watchdog already configured differently (mr = %x expecting %x)\n",
213 tmp & wdt->mr_mask, wdt->mr & wdt->mr_mask);
214
215 setup_timer(&wdt->timer, at91_ping, (unsigned long)wdt);
Boris BREZILLONa04c3f02013-11-03 18:52:43 +0100216
217 /*
218 * Use min_heartbeat the first time to avoid spurious watchdog reset:
219 * we don't know for how long the watchdog counter is running, and
220 * - resetting it right now might trigger a watchdog fault reset
221 * - waiting for heartbeat time might lead to a watchdog timeout
222 * reset
223 */
224 mod_timer(&wdt->timer, jiffies + min_heartbeat);
Boris BREZILLON5161b312013-10-04 09:24:12 +0200225
226 /* Try to set timeout from device tree first */
227 if (watchdog_init_timeout(&wdt->wdd, 0, dev))
228 watchdog_init_timeout(&wdt->wdd, heartbeat, dev);
229 watchdog_set_nowayout(&wdt->wdd, wdt->nowayout);
230 err = watchdog_register_device(&wdt->wdd);
231 if (err)
232 goto out_stop_timer;
233
234 wdt->next_heartbeat = jiffies + wdt->wdd.timeout * HZ;
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200235
236 return 0;
Boris BREZILLON5161b312013-10-04 09:24:12 +0200237
238out_stop_timer:
239 del_timer(&wdt->timer);
240 return err;
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200241}
242
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800243/* ......................................................................... */
244
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200245static const struct watchdog_info at91_wdt_info = {
246 .identity = DRV_NAME,
Wim Van Sebroecke73a7802009-05-11 18:33:00 +0000247 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
248 WDIOF_MAGICCLOSE,
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200249};
250
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800251static const struct watchdog_ops at91_wdt_ops = {
252 .owner = THIS_MODULE,
253 .start = at91_wdt_start,
254 .stop = at91_wdt_stop,
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800255 .set_timeout = at91_wdt_set_timeout,
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200256};
257
Boris BREZILLON5161b312013-10-04 09:24:12 +0200258#if defined(CONFIG_OF)
259static int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt)
260{
261 u32 min = 0;
262 u32 max = WDT_COUNTER_MAX_SECS;
263 const char *tmp;
264
265 /* Get the interrupts property */
266 wdt->irq = irq_of_parse_and_map(np, 0);
267 if (!wdt->irq)
268 dev_warn(wdt->wdd.parent, "failed to get IRQ from DT\n");
269
270 if (!of_property_read_u32_index(np, "atmel,max-heartbeat-sec", 0,
271 &max)) {
272 if (!max || max > WDT_COUNTER_MAX_SECS)
273 max = WDT_COUNTER_MAX_SECS;
274
275 if (!of_property_read_u32_index(np, "atmel,min-heartbeat-sec",
276 0, &min)) {
277 if (min >= max)
278 min = max - 1;
279 }
280 }
281
282 min = secs_to_ticks(min);
283 max = secs_to_ticks(max);
284
285 wdt->mr_mask = 0x3FFFFFFF;
286 wdt->mr = 0;
287 if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
288 !strcmp(tmp, "software")) {
289 wdt->mr |= AT91_WDT_WDFIEN;
290 wdt->mr_mask &= ~AT91_WDT_WDRPROC;
291 } else {
292 wdt->mr |= AT91_WDT_WDRSTEN;
293 }
294
295 if (!of_property_read_string(np, "atmel,reset-type", &tmp) &&
296 !strcmp(tmp, "proc"))
297 wdt->mr |= AT91_WDT_WDRPROC;
298
299 if (of_property_read_bool(np, "atmel,disable")) {
300 wdt->mr |= AT91_WDT_WDDIS;
301 wdt->mr_mask &= AT91_WDT_WDDIS;
302 }
303
304 if (of_property_read_bool(np, "atmel,idle-halt"))
305 wdt->mr |= AT91_WDT_WDIDLEHLT;
306
307 if (of_property_read_bool(np, "atmel,dbg-halt"))
308 wdt->mr |= AT91_WDT_WDDBGHLT;
309
310 wdt->mr |= max | ((max - min) << 16);
311
312 return 0;
313}
314#else
315static inline int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt)
316{
317 return 0;
318}
319#endif
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200320
321static int __init at91wdt_probe(struct platform_device *pdev)
322{
Jean-Christophe PLAGNIOL-VILLARDc1c30a22011-11-02 01:43:31 +0800323 struct resource *r;
Boris BREZILLON5161b312013-10-04 09:24:12 +0200324 int err;
325 struct at91wdt *wdt;
326
327 wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
328 if (!wdt)
329 return -ENOMEM;
330
331 wdt->mr = (WDT_HW_TIMEOUT * 256) | AT91_WDT_WDRSTEN | AT91_WDT_WDD |
332 AT91_WDT_WDDBGHLT | AT91_WDT_WDIDLEHLT;
333 wdt->mr_mask = 0x3FFFFFFF;
334 wdt->nowayout = nowayout;
335 wdt->wdd.parent = &pdev->dev;
336 wdt->wdd.info = &at91_wdt_info;
337 wdt->wdd.ops = &at91_wdt_ops;
338 wdt->wdd.timeout = WDT_HEARTBEAT;
339 wdt->wdd.min_timeout = 1;
340 wdt->wdd.max_timeout = 0xFFFF;
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200341
Jean-Christophe PLAGNIOL-VILLARDc1c30a22011-11-02 01:43:31 +0800342 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Boris BREZILLON5161b312013-10-04 09:24:12 +0200343 wdt->base = devm_ioremap_resource(&pdev->dev, r);
344 if (IS_ERR(wdt->base))
345 return PTR_ERR(wdt->base);
346
347 if (pdev->dev.of_node) {
348 err = of_at91wdt_init(pdev->dev.of_node, wdt);
349 if (err)
350 return err;
Jean-Christophe PLAGNIOL-VILLARDc1c30a22011-11-02 01:43:31 +0800351 }
352
Boris BREZILLON5161b312013-10-04 09:24:12 +0200353 err = at91_wdt_init(pdev, wdt);
354 if (err)
355 return err;
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800356
Boris BREZILLON5161b312013-10-04 09:24:12 +0200357 platform_set_drvdata(pdev, wdt);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200358
Joe Perches27c766a2012-02-15 15:06:19 -0800359 pr_info("enabled (heartbeat=%d sec, nowayout=%d)\n",
Boris BREZILLON5161b312013-10-04 09:24:12 +0200360 wdt->wdd.timeout, wdt->nowayout);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200361
362 return 0;
363}
364
365static int __exit at91wdt_remove(struct platform_device *pdev)
366{
Boris BREZILLON5161b312013-10-04 09:24:12 +0200367 struct at91wdt *wdt = platform_get_drvdata(pdev);
368 watchdog_unregister_device(&wdt->wdd);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200369
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800370 pr_warn("I quit now, hardware will probably reboot!\n");
Boris BREZILLON5161b312013-10-04 09:24:12 +0200371 del_timer(&wdt->timer);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200372
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800373 return 0;
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200374}
375
Fabio Porceddabe49bba2012-11-12 09:37:25 +0100376#if defined(CONFIG_OF)
Arnd Bergmann6c41e472013-01-25 14:14:27 +0000377static const struct of_device_id at91_wdt_dt_ids[] = {
Fabio Porceddabe49bba2012-11-12 09:37:25 +0100378 { .compatible = "atmel,at91sam9260-wdt" },
379 { /* sentinel */ }
380};
381
382MODULE_DEVICE_TABLE(of, at91_wdt_dt_ids);
383#endif
384
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200385static struct platform_driver at91wdt_driver = {
386 .remove = __exit_p(at91wdt_remove),
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200387 .driver = {
388 .name = "at91_wdt",
389 .owner = THIS_MODULE,
Fabio Porceddabe49bba2012-11-12 09:37:25 +0100390 .of_match_table = of_match_ptr(at91_wdt_dt_ids),
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200391 },
392};
393
Fabio Porcedda1cb92042013-01-09 12:15:27 +0100394module_platform_driver_probe(at91wdt_driver, at91wdt_probe);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200395
396MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
397MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
398MODULE_LICENSE("GPL");