blob: 3508321c4501ba0c21890a1b79be0722778eff8b [file] [log] [blame]
Benjamin Herrenschmidt0b05ac62011-04-04 13:46:58 +10001/*
2 * Copyright 2011 IBM Corporation.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 */
David Gibsona1d0d982011-04-14 22:32:06 +000010
Benjamin Herrenschmidt0b05ac62011-04-04 13:46:58 +100011#include <linux/types.h>
12#include <linux/kernel.h>
13#include <linux/irq.h>
14#include <linux/smp.h>
15#include <linux/interrupt.h>
16#include <linux/init.h>
17#include <linux/cpu.h>
18#include <linux/of.h>
19#include <linux/spinlock.h>
20
21#include <asm/prom.h>
22#include <asm/io.h>
23#include <asm/smp.h>
24#include <asm/irq.h>
25#include <asm/errno.h>
26#include <asm/xics.h>
27
28struct icp_ipl {
29 union {
30 u32 word;
31 u8 bytes[4];
32 } xirr_poll;
33 union {
34 u32 word;
35 u8 bytes[4];
36 } xirr;
37 u32 dummy;
38 union {
39 u32 word;
40 u8 bytes[4];
41 } qirr;
42 u32 link_a;
43 u32 link_b;
44 u32 link_c;
45};
46
47static struct icp_ipl __iomem *icp_native_regs[NR_CPUS];
48
49static inline unsigned int icp_native_get_xirr(void)
50{
51 int cpu = smp_processor_id();
52
53 return in_be32(&icp_native_regs[cpu]->xirr.word);
54}
55
56static inline void icp_native_set_xirr(unsigned int value)
57{
58 int cpu = smp_processor_id();
59
60 out_be32(&icp_native_regs[cpu]->xirr.word, value);
61}
62
63static inline void icp_native_set_cppr(u8 value)
64{
65 int cpu = smp_processor_id();
66
67 out_8(&icp_native_regs[cpu]->xirr.bytes[0], value);
68}
69
70static inline void icp_native_set_qirr(int n_cpu, u8 value)
71{
72 out_8(&icp_native_regs[n_cpu]->qirr.bytes[0], value);
73}
74
75static void icp_native_set_cpu_priority(unsigned char cppr)
76{
77 xics_set_base_cppr(cppr);
78 icp_native_set_cppr(cppr);
79 iosync();
80}
81
82static void icp_native_eoi(struct irq_data *d)
83{
Grant Likely476eb492011-05-04 15:02:15 +100084 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
Benjamin Herrenschmidt0b05ac62011-04-04 13:46:58 +100085
86 iosync();
87 icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq);
88}
89
90static void icp_native_teardown_cpu(void)
91{
92 int cpu = smp_processor_id();
93
94 /* Clear any pending IPI */
95 icp_native_set_qirr(cpu, 0xff);
96}
97
98static void icp_native_flush_ipi(void)
99{
100 /* We take the ipi irq but and never return so we
101 * need to EOI the IPI, but want to leave our priority 0
102 *
103 * should we check all the other interrupts too?
104 * should we be flagging idle loop instead?
105 * or creating some task to be scheduled?
106 */
107
108 icp_native_set_xirr((0x00 << 24) | XICS_IPI);
109}
110
111static unsigned int icp_native_get_irq(void)
112{
113 unsigned int xirr = icp_native_get_xirr();
114 unsigned int vec = xirr & 0x00ffffff;
115 unsigned int irq;
116
117 if (vec == XICS_IRQ_SPURIOUS)
118 return NO_IRQ;
119
120 irq = irq_radix_revmap_lookup(xics_host, vec);
121 if (likely(irq != NO_IRQ)) {
122 xics_push_cppr(vec);
123 return irq;
124 }
125
126 /* We don't have a linux mapping, so have rtas mask it. */
127 xics_mask_unknown_vec(vec);
128
129 /* We might learn about it later, so EOI it */
130 icp_native_set_xirr(xirr);
131
132 return NO_IRQ;
133}
134
135#ifdef CONFIG_SMP
136
137static inline void icp_native_do_message(int cpu, int msg)
138{
139 unsigned long *tgt = &per_cpu(xics_ipi_message, cpu);
140
141 set_bit(msg, tgt);
142 mb();
143 icp_native_set_qirr(cpu, IPI_PRIORITY);
144}
145
146static void icp_native_message_pass(int target, int msg)
147{
148 unsigned int i;
149
150 if (target < NR_CPUS) {
151 icp_native_do_message(target, msg);
152 } else {
153 for_each_online_cpu(i) {
154 if (target == MSG_ALL_BUT_SELF
155 && i == smp_processor_id())
156 continue;
157 icp_native_do_message(i, msg);
158 }
159 }
160}
161
162static irqreturn_t icp_native_ipi_action(int irq, void *dev_id)
163{
164 int cpu = smp_processor_id();
165
166 icp_native_set_qirr(cpu, 0xff);
167
168 return xics_ipi_dispatch(cpu);
169}
170
171#endif /* CONFIG_SMP */
172
173static int __init icp_native_map_one_cpu(int hw_id, unsigned long addr,
174 unsigned long size)
175{
176 char *rname;
177 int i, cpu = -1;
178
179 /* This may look gross but it's good enough for now, we don't quite
180 * have a hard -> linux processor id matching.
181 */
182 for_each_possible_cpu(i) {
183 if (!cpu_present(i))
184 continue;
185 if (hw_id == get_hard_smp_processor_id(i)) {
186 cpu = i;
187 break;
188 }
189 }
190
191 /* Fail, skip that CPU. Don't print, it's normal, some XICS come up
192 * with way more entries in there than you have CPUs
193 */
194 if (cpu == -1)
195 return 0;
196
197 rname = kasprintf(GFP_KERNEL, "CPU %d [0x%x] Interrupt Presentation",
198 cpu, hw_id);
199
200 if (!request_mem_region(addr, size, rname)) {
201 pr_warning("icp_native: Could not reserve ICP MMIO"
202 " for CPU %d, interrupt server #0x%x\n",
203 cpu, hw_id);
204 return -EBUSY;
205 }
206
207 icp_native_regs[cpu] = ioremap(addr, size);
208 if (!icp_native_regs[cpu]) {
209 pr_warning("icp_native: Failed ioremap for CPU %d, "
210 "interrupt server #0x%x, addr %#lx\n",
211 cpu, hw_id, addr);
212 release_mem_region(addr, size);
213 return -ENOMEM;
214 }
215 return 0;
216}
217
218static int __init icp_native_init_one_node(struct device_node *np,
219 unsigned int *indx)
220{
221 unsigned int ilen;
222 const u32 *ireg;
223 int i;
224 int reg_tuple_size;
225 int num_servers = 0;
226
227 /* This code does the theorically broken assumption that the interrupt
228 * server numbers are the same as the hard CPU numbers.
229 * This happens to be the case so far but we are playing with fire...
230 * should be fixed one of these days. -BenH.
231 */
232 ireg = of_get_property(np, "ibm,interrupt-server-ranges", &ilen);
233
234 /* Do that ever happen ? we'll know soon enough... but even good'old
235 * f80 does have that property ..
236 */
237 WARN_ON((ireg == NULL) || (ilen != 2*sizeof(u32)));
238
239 if (ireg) {
240 *indx = of_read_number(ireg, 1);
241 if (ilen >= 2*sizeof(u32))
242 num_servers = of_read_number(ireg + 1, 1);
243 }
244
245 ireg = of_get_property(np, "reg", &ilen);
246 if (!ireg) {
247 pr_err("icp_native: Can't find interrupt reg property");
248 return -1;
249 }
250
251 reg_tuple_size = (of_n_addr_cells(np) + of_n_size_cells(np)) * 4;
252 if (((ilen % reg_tuple_size) != 0)
253 || (num_servers && (num_servers != (ilen / reg_tuple_size)))) {
254 pr_err("icp_native: ICP reg len (%d) != num servers (%d)",
255 ilen / reg_tuple_size, num_servers);
256 return -1;
257 }
258
259 for (i = 0; i < (ilen / reg_tuple_size); i++) {
260 struct resource r;
261 int err;
262
263 err = of_address_to_resource(np, i, &r);
264 if (err) {
265 pr_err("icp_native: Could not translate ICP MMIO"
266 " for interrupt server 0x%x (%d)\n", *indx, err);
267 return -1;
268 }
269
270 if (icp_native_map_one_cpu(*indx, r.start, r.end - r.start))
271 return -1;
272
273 (*indx)++;
274 }
275 return 0;
276}
277
278static const struct icp_ops icp_native_ops = {
279 .get_irq = icp_native_get_irq,
280 .eoi = icp_native_eoi,
281 .set_priority = icp_native_set_cpu_priority,
282 .teardown_cpu = icp_native_teardown_cpu,
283 .flush_ipi = icp_native_flush_ipi,
284#ifdef CONFIG_SMP
285 .ipi_action = icp_native_ipi_action,
286 .message_pass = icp_native_message_pass,
287#endif
288};
289
290int icp_native_init(void)
291{
292 struct device_node *np;
293 u32 indx = 0;
294 int found = 0;
295
296 for_each_compatible_node(np, NULL, "ibm,ppc-xicp")
297 if (icp_native_init_one_node(np, &indx) == 0)
298 found = 1;
299 if (!found) {
300 for_each_node_by_type(np,
301 "PowerPC-External-Interrupt-Presentation") {
302 if (icp_native_init_one_node(np, &indx) == 0)
303 found = 1;
304 }
305 }
306
307 if (found == 0)
308 return -ENODEV;
309
310 icp_ops = &icp_native_ops;
311
312 return 0;
313}