Channagoud Kadabi | 459f011 | 2017-03-20 12:42:15 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2017, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #include "sdm845.dtsi" |
| 14 | |
| 15 | / { |
| 16 | model = "Qualcomm Technologies, Inc. SDM845 V2"; |
| 17 | qcom,msm-id = <321 0x20000>; |
| 18 | }; |
David Collins | 3605018 | 2017-04-26 11:41:22 -0700 | [diff] [blame] | 19 | |
Subhash Jadavani | 0842b27 | 2017-07-19 17:05:13 -0700 | [diff] [blame] | 20 | &sdhc_2 { |
| 21 | qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 |
| 22 | 100000000 200000000 4294967295>; |
| 23 | qcom,clk-rates = <400000 20000000 25000000 50000000 |
| 24 | 100000000 200000000>; |
| 25 | qcom,devfreq,freq-table = <50000000 200000000>; |
Subhash Jadavani | 3497a96 | 2017-07-31 13:57:47 -0700 | [diff] [blame] | 26 | /delete-property/ qcom,sdr104-wa; |
Subhash Jadavani | 0842b27 | 2017-07-19 17:05:13 -0700 | [diff] [blame] | 27 | }; |
| 28 | |
David Collins | f576476 | 2017-07-20 16:42:42 -0700 | [diff] [blame] | 29 | /delete-node/ &apc0_cpr; |
| 30 | /delete-node/ &apc1_cpr; |
| 31 | |
| 32 | &soc { |
| 33 | /* CPR controller regulators */ |
| 34 | apc0_cpr: cprh-ctrl@17dc0000 { |
| 35 | compatible = "qcom,cprh-sdm845-v2-kbss-regulator"; |
| 36 | reg = <0x17dc0000 0x4000>, |
| 37 | <0x00784000 0x1000>, |
| 38 | <0x17840000 0x1000>; |
| 39 | reg-names = "cpr_ctrl", "fuse_base", "saw"; |
| 40 | clocks = <&clock_gcc GCC_CPUSS_RBCPR_CLK>; |
| 41 | clock-names = "core_clk"; |
| 42 | qcom,cpr-ctrl-name = "apc0"; |
| 43 | qcom,cpr-controller-id = <0>; |
| 44 | |
| 45 | qcom,cpr-sensor-time = <1000>; |
| 46 | qcom,cpr-loop-time = <5000000>; |
| 47 | qcom,cpr-idle-cycles = <15>; |
| 48 | qcom,cpr-up-down-delay-time = <3000>; |
| 49 | qcom,cpr-step-quot-init-min = <11>; |
| 50 | qcom,cpr-step-quot-init-max = <12>; |
| 51 | qcom,cpr-count-mode = <0>; /* All at once */ |
| 52 | qcom,cpr-count-repeat = <20>; |
| 53 | qcom,cpr-down-error-step-limit = <1>; |
| 54 | qcom,cpr-up-error-step-limit = <1>; |
| 55 | qcom,cpr-corner-switch-delay-time = <1042>; |
| 56 | qcom,cpr-voltage-settling-time = <1760>; |
| 57 | qcom,cpr-reset-step-quot-loop-en; |
| 58 | |
| 59 | qcom,voltage-step = <4000>; |
| 60 | qcom,voltage-base = <352000>; |
| 61 | qcom,cpr-saw-use-unit-mV; |
| 62 | |
| 63 | qcom,saw-avs-ctrl = <0x101C031>; |
| 64 | qcom,saw-avs-limit = <0x3B803B8>; |
| 65 | |
| 66 | qcom,cpr-enable; |
| 67 | qcom,cpr-hw-closed-loop; |
| 68 | |
| 69 | qcom,cpr-panic-reg-addr-list = |
| 70 | <0x17dc3a84 0x17dc3a88 0x17840c18>; |
| 71 | qcom,cpr-panic-reg-name-list = |
| 72 | "APSS_SILVER_CPRH_STATUS_0", |
| 73 | "APSS_SILVER_CPRH_STATUS_1", |
| 74 | "SILVER_SAW4_PMIC_STS"; |
| 75 | |
| 76 | qcom,cpr-aging-ref-voltage = <952000>; |
| 77 | vdd-supply = <&pm8998_s13>; |
| 78 | |
| 79 | thread@0 { |
| 80 | qcom,cpr-thread-id = <0>; |
| 81 | qcom,cpr-consecutive-up = <0>; |
| 82 | qcom,cpr-consecutive-down = <0>; |
| 83 | qcom,cpr-up-threshold = <2>; |
| 84 | qcom,cpr-down-threshold = <2>; |
| 85 | |
| 86 | apc0_pwrcl_vreg: regulator { |
| 87 | regulator-name = "apc0_pwrcl_corner"; |
| 88 | regulator-min-microvolt = <1>; |
| 89 | regulator-max-microvolt = <18>; |
| 90 | |
| 91 | qcom,cpr-fuse-corners = <4>; |
| 92 | qcom,cpr-fuse-combos = <16>; |
| 93 | qcom,cpr-speed-bins = <2>; |
| 94 | qcom,cpr-speed-bin-corners = <18 18>; |
| 95 | qcom,cpr-corners = <18>; |
| 96 | |
| 97 | qcom,cpr-corner-fmax-map = <6 12 15 18>; |
| 98 | |
| 99 | qcom,cpr-voltage-ceiling = |
| 100 | <828000 828000 828000 828000 828000 |
| 101 | 828000 828000 828000 828000 828000 |
| 102 | 828000 828000 828000 828000 828000 |
| 103 | 884000 952000 952000>; |
| 104 | |
| 105 | qcom,cpr-voltage-floor = |
| 106 | <568000 568000 568000 568000 568000 |
| 107 | 568000 568000 568000 568000 568000 |
| 108 | 568000 568000 568000 568000 568000 |
| 109 | 568000 568000 568000>; |
| 110 | |
| 111 | qcom,cpr-floor-to-ceiling-max-range = |
| 112 | <32000 32000 32000 32000 32000 |
| 113 | 32000 32000 32000 32000 32000 |
| 114 | 32000 32000 32000 32000 32000 |
| 115 | 32000 40000 40000>; |
| 116 | |
| 117 | qcom,corner-frequencies = |
| 118 | <300000000 403200000 480000000 |
| 119 | 576000000 652800000 748800000 |
| 120 | 825600000 902400000 979200000 |
| 121 | 1056000000 1132800000 1228800000 |
| 122 | 1324800000 1420800000 1516800000 |
| 123 | 1612800000 1689600000 1766400000>; |
| 124 | |
| 125 | qcom,cpr-ro-scaling-factor = |
| 126 | <2594 2795 2576 2761 2469 2673 2198 |
| 127 | 2553 3188 3255 3191 2962 3055 2984 |
| 128 | 2043 2947>, |
| 129 | <2594 2795 2576 2761 2469 2673 2198 |
| 130 | 2553 3188 3255 3191 2962 3055 2984 |
| 131 | 2043 2947>, |
| 132 | <2259 2389 2387 2531 2294 2464 2218 |
| 133 | 2476 2525 2855 2817 2836 2740 2490 |
| 134 | 1950 2632>, |
| 135 | <2259 2389 2387 2531 2294 2464 2218 |
| 136 | 2476 2525 2855 2817 2836 2740 2490 |
| 137 | 1950 2632>; |
| 138 | |
| 139 | qcom,cpr-open-loop-voltage-fuse-adjustment = |
| 140 | <100000 100000 100000 100000>; |
| 141 | |
| 142 | qcom,cpr-closed-loop-voltage-fuse-adjustment = |
| 143 | <100000 100000 100000 100000>; |
| 144 | |
| 145 | qcom,allow-voltage-interpolation; |
| 146 | qcom,allow-quotient-interpolation; |
| 147 | qcom,cpr-scaled-open-loop-voltage-as-ceiling; |
| 148 | |
| 149 | qcom,cpr-aging-max-voltage-adjustment = <15000>; |
| 150 | qcom,cpr-aging-ref-corner = <18>; |
| 151 | qcom,cpr-aging-ro-scaling-factor = <1620>; |
| 152 | qcom,allow-aging-voltage-adjustment = |
| 153 | /* Speed bin 0 */ |
| 154 | <0 1 1 1 1 1 1 1>, |
| 155 | /* Speed bin 1 */ |
| 156 | <0 1 1 1 1 1 1 1>; |
| 157 | qcom,allow-aging-open-loop-voltage-adjustment = |
| 158 | <1>; |
| 159 | }; |
| 160 | }; |
| 161 | |
| 162 | thread@1 { |
| 163 | qcom,cpr-thread-id = <1>; |
| 164 | qcom,cpr-consecutive-up = <0>; |
| 165 | qcom,cpr-consecutive-down = <0>; |
| 166 | qcom,cpr-up-threshold = <2>; |
| 167 | qcom,cpr-down-threshold = <2>; |
| 168 | |
| 169 | apc0_l3_vreg: regulator { |
| 170 | regulator-name = "apc0_l3_corner"; |
| 171 | regulator-min-microvolt = <1>; |
| 172 | regulator-max-microvolt = <14>; |
| 173 | |
| 174 | qcom,cpr-fuse-corners = <4>; |
| 175 | qcom,cpr-fuse-combos = <16>; |
| 176 | qcom,cpr-speed-bins = <2>; |
| 177 | qcom,cpr-speed-bin-corners = <14 14>; |
| 178 | qcom,cpr-corners = <14>; |
| 179 | |
| 180 | qcom,cpr-corner-fmax-map = <4 8 11 14>; |
| 181 | |
| 182 | qcom,cpr-voltage-ceiling = |
| 183 | <828000 828000 828000 828000 828000 |
| 184 | 828000 828000 828000 828000 828000 |
| 185 | 828000 884000 884000 952000>; |
| 186 | |
| 187 | qcom,cpr-voltage-floor = |
| 188 | <568000 568000 568000 568000 568000 |
| 189 | 568000 568000 568000 568000 568000 |
| 190 | 568000 568000 568000 568000>; |
| 191 | |
| 192 | qcom,cpr-floor-to-ceiling-max-range = |
| 193 | <32000 32000 32000 32000 32000 |
| 194 | 32000 32000 32000 32000 32000 |
| 195 | 32000 32000 32000 40000>; |
| 196 | |
| 197 | qcom,corner-frequencies = |
| 198 | <300000000 403200000 480000000 |
| 199 | 576000000 652800000 748800000 |
| 200 | 844800000 940800000 1036800000 |
| 201 | 1132800000 1209600000 1305600000 |
| 202 | 1401600000 1478400000>; |
| 203 | |
| 204 | qcom,cpr-ro-scaling-factor = |
| 205 | <2857 3056 2828 2952 2699 2796 2447 |
| 206 | 2631 2630 2579 2244 3343 3287 3137 |
| 207 | 3164 2656>, |
| 208 | <2857 3056 2828 2952 2699 2796 2447 |
| 209 | 2631 2630 2579 2244 3343 3287 3137 |
| 210 | 3164 2656>, |
| 211 | <2439 2577 2552 2667 2461 2577 2394 |
| 212 | 2536 2132 2307 2191 2903 2838 2912 |
| 213 | 2501 2095>, |
| 214 | <2439 2577 2552 2667 2461 2577 2394 |
| 215 | 2536 2132 2307 2191 2903 2838 2912 |
| 216 | 2501 2095>; |
| 217 | |
| 218 | qcom,cpr-open-loop-voltage-fuse-adjustment = |
| 219 | <100000 100000 100000 100000>; |
| 220 | |
| 221 | qcom,cpr-closed-loop-voltage-fuse-adjustment = |
| 222 | <100000 100000 100000 100000>; |
| 223 | |
| 224 | qcom,allow-voltage-interpolation; |
| 225 | qcom,allow-quotient-interpolation; |
| 226 | qcom,cpr-scaled-open-loop-voltage-as-ceiling; |
| 227 | |
| 228 | qcom,cpr-aging-max-voltage-adjustment = <15000>; |
| 229 | qcom,cpr-aging-ref-corner = <14>; |
| 230 | qcom,cpr-aging-ro-scaling-factor = <1620>; |
| 231 | qcom,allow-aging-voltage-adjustment = |
| 232 | /* Speed bin 0 */ |
| 233 | <0 1 1 1 1 1 1 1>, |
| 234 | /* Speed bin 1 */ |
| 235 | <0 1 1 1 1 1 1 1>; |
| 236 | qcom,allow-aging-open-loop-voltage-adjustment = |
| 237 | <1>; |
| 238 | }; |
| 239 | }; |
| 240 | }; |
| 241 | |
| 242 | apc1_cpr: cprh-ctrl@17db0000 { |
| 243 | compatible = "qcom,cprh-sdm845-v2-kbss-regulator"; |
| 244 | reg = <0x17db0000 0x4000>, |
| 245 | <0x00784000 0x1000>, |
| 246 | <0x17830000 0x1000>; |
| 247 | reg-names = "cpr_ctrl", "fuse_base", "saw"; |
| 248 | clocks = <&clock_gcc GCC_CPUSS_RBCPR_CLK>; |
| 249 | clock-names = "core_clk"; |
| 250 | qcom,cpr-ctrl-name = "apc1"; |
| 251 | qcom,cpr-controller-id = <1>; |
| 252 | |
| 253 | qcom,cpr-sensor-time = <1000>; |
| 254 | qcom,cpr-loop-time = <5000000>; |
| 255 | qcom,cpr-idle-cycles = <15>; |
| 256 | qcom,cpr-up-down-delay-time = <3000>; |
| 257 | qcom,cpr-step-quot-init-min = <9>; |
| 258 | qcom,cpr-step-quot-init-max = <14>; |
| 259 | qcom,cpr-count-mode = <0>; /* All at once */ |
| 260 | qcom,cpr-count-repeat = <20>; |
| 261 | qcom,cpr-down-error-step-limit = <1>; |
| 262 | qcom,cpr-up-error-step-limit = <1>; |
| 263 | qcom,cpr-corner-switch-delay-time = <1042>; |
| 264 | qcom,cpr-voltage-settling-time = <1760>; |
| 265 | qcom,cpr-reset-step-quot-loop-en; |
| 266 | |
| 267 | qcom,apm-threshold-voltage = <800000>; |
| 268 | qcom,apm-crossover-voltage = <880000>; |
| 269 | qcom,mem-acc-threshold-voltage = <852000>; |
| 270 | qcom,mem-acc-crossover-voltage = <852000>; |
| 271 | |
| 272 | qcom,voltage-step = <4000>; |
| 273 | qcom,voltage-base = <352000>; |
| 274 | qcom,cpr-saw-use-unit-mV; |
| 275 | |
| 276 | qcom,saw-avs-ctrl = <0x101C031>; |
| 277 | qcom,saw-avs-limit = <0x4700470>; |
| 278 | |
| 279 | qcom,cpr-enable; |
| 280 | qcom,cpr-hw-closed-loop; |
| 281 | |
| 282 | qcom,cpr-panic-reg-addr-list = |
| 283 | <0x17db3a84 0x17830c18>; |
| 284 | qcom,cpr-panic-reg-name-list = |
| 285 | "APSS_GOLD_CPRH_STATUS_0", "GOLD_SAW4_PMIC_STS"; |
| 286 | |
| 287 | qcom,cpr-aging-ref-voltage = <1136000>; |
| 288 | vdd-supply = <&pm8998_s12>; |
| 289 | |
| 290 | thread@0 { |
| 291 | qcom,cpr-thread-id = <0>; |
| 292 | qcom,cpr-consecutive-up = <0>; |
| 293 | qcom,cpr-consecutive-down = <0>; |
| 294 | qcom,cpr-up-threshold = <2>; |
| 295 | qcom,cpr-down-threshold = <2>; |
| 296 | |
| 297 | apc1_perfcl_vreg: regulator { |
| 298 | regulator-name = "apc1_perfcl_corner"; |
| 299 | regulator-min-microvolt = <1>; |
| 300 | regulator-max-microvolt = <33>; |
| 301 | |
| 302 | qcom,cpr-fuse-corners = <5>; |
| 303 | qcom,cpr-fuse-combos = <16>; |
| 304 | qcom,cpr-speed-bins = <2>; |
| 305 | qcom,cpr-speed-bin-corners = <28 31>; |
| 306 | qcom,cpr-corners = |
| 307 | /* Speed bin 0 */ |
| 308 | <28 28 28 28 28 28 28 28>, |
| 309 | /* Speed bin 1 */ |
| 310 | <31 31 31 31 31 31 31 31>; |
| 311 | |
| 312 | qcom,cpr-corner-fmax-map = |
| 313 | /* Speed bin 0 */ |
| 314 | <7 14 22 27 28>, |
| 315 | /* Speed bin 1 */ |
| 316 | <7 14 22 27 31>; |
| 317 | |
| 318 | qcom,cpr-voltage-ceiling = |
| 319 | /* Speed bin 0 */ |
| 320 | <828000 828000 828000 828000 828000 |
| 321 | 828000 828000 828000 828000 828000 |
| 322 | 828000 828000 828000 828000 828000 |
| 323 | 828000 828000 828000 884000 884000 |
| 324 | 884000 884000 1104000 1104000 1104000 |
| 325 | 1104000 1136000 1136000>, |
| 326 | /* Speed bin 1 */ |
| 327 | <828000 828000 828000 828000 828000 |
| 328 | 828000 828000 828000 828000 828000 |
| 329 | 828000 828000 828000 828000 828000 |
| 330 | 828000 828000 828000 884000 884000 |
| 331 | 884000 884000 1104000 1104000 1104000 |
| 332 | 1104000 1136000 1136000 1136000 1136000 |
| 333 | 1136000>; |
| 334 | |
| 335 | qcom,cpr-voltage-floor = |
| 336 | /* Speed bin 0 */ |
| 337 | <568000 568000 568000 568000 568000 |
| 338 | 568000 568000 568000 568000 568000 |
| 339 | 568000 568000 568000 568000 568000 |
| 340 | 568000 568000 568000 568000 568000 |
| 341 | 568000 568000 568000 568000 568000 |
| 342 | 568000 568000 568000>, |
| 343 | /* Speed bin 1 */ |
| 344 | <568000 568000 568000 568000 568000 |
| 345 | 568000 568000 568000 568000 568000 |
| 346 | 568000 568000 568000 568000 568000 |
| 347 | 568000 568000 568000 568000 568000 |
| 348 | 568000 568000 568000 568000 568000 |
| 349 | 568000 568000 568000 568000 568000 |
| 350 | 568000>; |
| 351 | |
| 352 | qcom,cpr-floor-to-ceiling-max-range = |
| 353 | /* Speed bin 0 */ |
| 354 | <32000 32000 32000 32000 32000 |
| 355 | 32000 32000 32000 32000 32000 |
| 356 | 32000 32000 32000 32000 32000 |
| 357 | 32000 32000 32000 32000 32000 |
| 358 | 32000 32000 32000 32000 32000 |
| 359 | 32000 32000 32000>, |
| 360 | /* Speed bin 1 */ |
| 361 | <32000 32000 32000 32000 32000 |
| 362 | 32000 32000 32000 32000 32000 |
| 363 | 32000 32000 32000 32000 32000 |
| 364 | 32000 32000 32000 32000 32000 |
| 365 | 32000 32000 32000 32000 32000 |
| 366 | 32000 32000 40000 40000 40000 |
| 367 | 40000>; |
| 368 | |
| 369 | qcom,corner-frequencies = |
| 370 | /* Speed bin 0 */ |
| 371 | <300000000 403200000 480000000 |
| 372 | 576000000 652800000 748800000 |
| 373 | 825600000 902400000 979200000 |
| 374 | 1056000000 1132800000 1209600000 |
| 375 | 1286400000 1363200000 1459200000 |
| 376 | 1536000000 1612800000 1689600000 |
| 377 | 1766400000 1843200000 1920000000 |
| 378 | 1996800000 2092800000 2169600000 |
| 379 | 2246400000 2323200000 2400000000 |
| 380 | 2400000000>, |
| 381 | /* Speed bin 1 */ |
| 382 | <300000000 403200000 480000000 |
| 383 | 576000000 652800000 748800000 |
| 384 | 825600000 902400000 979200000 |
| 385 | 1056000000 1132800000 1209600000 |
| 386 | 1286400000 1363200000 1459200000 |
| 387 | 1536000000 1612800000 1689600000 |
| 388 | 1766400000 1843200000 1920000000 |
| 389 | 1996800000 2092800000 2169600000 |
| 390 | 2246400000 2323200000 2400000000 |
| 391 | 2476800000 2553600000 2630400000 |
| 392 | 2707200000>; |
| 393 | |
| 394 | qcom,cpr-ro-scaling-factor = |
| 395 | <2857 3056 2828 2952 2699 2796 2447 |
| 396 | 2631 2630 2579 2244 3343 3287 3137 |
| 397 | 3164 2656>, |
| 398 | <2857 3056 2828 2952 2699 2796 2447 |
| 399 | 2631 2630 2579 2244 3343 3287 3137 |
| 400 | 3164 2656>, |
| 401 | <2086 2208 2273 2408 2203 2327 2213 |
| 402 | 2340 1755 2039 2049 2474 2437 2618 |
| 403 | 2003 1675>, |
| 404 | <2086 2208 2273 2408 2203 2327 2213 |
| 405 | 2340 1755 2039 2049 2474 2437 2618 |
| 406 | 2003 1675>, |
| 407 | <2086 2208 2273 2408 2203 2327 2213 |
| 408 | 2340 1755 2039 2049 2474 2437 2618 |
| 409 | 2003 1675>; |
| 410 | |
| 411 | qcom,cpr-open-loop-voltage-fuse-adjustment = |
| 412 | <100000 100000 100000 100000 100000>; |
| 413 | |
| 414 | qcom,cpr-closed-loop-voltage-fuse-adjustment = |
| 415 | <100000 100000 100000 100000 100000>; |
| 416 | |
| 417 | qcom,allow-voltage-interpolation; |
| 418 | qcom,allow-quotient-interpolation; |
| 419 | qcom,cpr-scaled-open-loop-voltage-as-ceiling; |
| 420 | |
| 421 | qcom,cpr-aging-max-voltage-adjustment = <15000>; |
| 422 | qcom,cpr-aging-ref-corner = <27 31>; |
| 423 | qcom,cpr-aging-ro-scaling-factor = <1700>; |
| 424 | qcom,allow-aging-voltage-adjustment = |
| 425 | /* Speed bin 0 */ |
| 426 | <0 1 1 1 1 1 1 1>, |
| 427 | /* Speed bin 1 */ |
| 428 | <0 1 1 1 1 1 1 1>; |
| 429 | qcom,allow-aging-open-loop-voltage-adjustment = |
| 430 | <1>; |
| 431 | }; |
| 432 | }; |
| 433 | }; |
| 434 | }; |
| 435 | |
| 436 | &clock_cpucc { |
| 437 | vdd-l3-supply = <&apc0_l3_vreg>; |
| 438 | vdd-pwrcl-supply = <&apc0_pwrcl_vreg>; |
| 439 | }; |
| 440 | |
Deepak Katragadda | da47ee9 | 2017-06-07 14:15:09 -0700 | [diff] [blame] | 441 | &clock_gcc { |
| 442 | compatible = "qcom,gcc-sdm845-v2"; |
| 443 | }; |
| 444 | |
| 445 | &clock_camcc { |
| 446 | compatible = "qcom,cam_cc-sdm845-v2"; |
| 447 | }; |
| 448 | |
| 449 | &clock_dispcc { |
| 450 | compatible = "qcom,dispcc-sdm845-v2"; |
| 451 | }; |
| 452 | |
| 453 | &clock_videocc { |
| 454 | compatible = "qcom,video_cc-sdm845-v2"; |
| 455 | }; |
Praneeth Paladugu | 5538121 | 2017-07-05 15:02:44 -0700 | [diff] [blame] | 456 | |
| 457 | &msm_vidc { |
| 458 | qcom,allowed-clock-rates = <100000000 200000000 330000000 |
| 459 | 404000000 444000000 533000000>; |
| 460 | }; |
Reut Zysman | 861fd6c | 2017-07-30 15:39:13 +0300 | [diff] [blame] | 461 | |
| 462 | &spss_utils { |
| 463 | qcom,spss-dev-firmware-name = "spss2d"; /* 8 chars max */ |
| 464 | qcom,spss-test-firmware-name = "spss2t"; /* 8 chars max */ |
| 465 | qcom,spss-prod-firmware-name = "spss2p"; /* 8 chars max */ |
| 466 | }; |