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gerrit-public.fairphone.software / kernel / msm-4.9 / f57647676d4ba276f056b28b5c32d3f411b3ccf8 / . / arch / arm64 / boot / dts / qcom / sdm845-v2.dtsi
blob: 8f498b1aeb2fc36be4215315b08489dae087e7aa [file] [log] [blame]
Channagoud Kadabi459f0112017-03-20 12:42:15 -0700[diff] [blame]1/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include "sdm845.dtsi"
14
15/ {
16 model = "Qualcomm Technologies, Inc. SDM845 V2";
17 qcom,msm-id = <321 0x20000>;
18};
David Collins36050182017-04-26 11:41:22 -0700[diff] [blame]19
Subhash Jadavani0842b272017-07-19 17:05:13 -0700[diff] [blame]20&sdhc_2 {
21 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
22 100000000 200000000 4294967295>;
23 qcom,clk-rates = <400000 20000000 25000000 50000000
24 100000000 200000000>;
25 qcom,devfreq,freq-table = <50000000 200000000>;
26};
27
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame^]28/delete-node/ &apc0_cpr;
29/delete-node/ &apc1_cpr;
30
31&soc {
32 /* CPR controller regulators */
33 apc0_cpr: cprh-ctrl@17dc0000 {
34 compatible = "qcom,cprh-sdm845-v2-kbss-regulator";
35 reg = <0x17dc0000 0x4000>,
36 <0x00784000 0x1000>,
37 <0x17840000 0x1000>;
38 reg-names = "cpr_ctrl", "fuse_base", "saw";
39 clocks = <&clock_gcc GCC_CPUSS_RBCPR_CLK>;
40 clock-names = "core_clk";
41 qcom,cpr-ctrl-name = "apc0";
42 qcom,cpr-controller-id = <0>;
43
44 qcom,cpr-sensor-time = <1000>;
45 qcom,cpr-loop-time = <5000000>;
46 qcom,cpr-idle-cycles = <15>;
47 qcom,cpr-up-down-delay-time = <3000>;
48 qcom,cpr-step-quot-init-min = <11>;
49 qcom,cpr-step-quot-init-max = <12>;
50 qcom,cpr-count-mode = <0>; /* All at once */
51 qcom,cpr-count-repeat = <20>;
52 qcom,cpr-down-error-step-limit = <1>;
53 qcom,cpr-up-error-step-limit = <1>;
54 qcom,cpr-corner-switch-delay-time = <1042>;
55 qcom,cpr-voltage-settling-time = <1760>;
56 qcom,cpr-reset-step-quot-loop-en;
57
58 qcom,voltage-step = <4000>;
59 qcom,voltage-base = <352000>;
60 qcom,cpr-saw-use-unit-mV;
61
62 qcom,saw-avs-ctrl = <0x101C031>;
63 qcom,saw-avs-limit = <0x3B803B8>;
64
65 qcom,cpr-enable;
66 qcom,cpr-hw-closed-loop;
67
68 qcom,cpr-panic-reg-addr-list =
69 <0x17dc3a84 0x17dc3a88 0x17840c18>;
70 qcom,cpr-panic-reg-name-list =
71 "APSS_SILVER_CPRH_STATUS_0",
72 "APSS_SILVER_CPRH_STATUS_1",
73 "SILVER_SAW4_PMIC_STS";
74
75 qcom,cpr-aging-ref-voltage = <952000>;
76 vdd-supply = <&pm8998_s13>;
77
78 thread@0 {
79 qcom,cpr-thread-id = <0>;
80 qcom,cpr-consecutive-up = <0>;
81 qcom,cpr-consecutive-down = <0>;
82 qcom,cpr-up-threshold = <2>;
83 qcom,cpr-down-threshold = <2>;
84
85 apc0_pwrcl_vreg: regulator {
86 regulator-name = "apc0_pwrcl_corner";
87 regulator-min-microvolt = <1>;
88 regulator-max-microvolt = <18>;
89
90 qcom,cpr-fuse-corners = <4>;
91 qcom,cpr-fuse-combos = <16>;
92 qcom,cpr-speed-bins = <2>;
93 qcom,cpr-speed-bin-corners = <18 18>;
94 qcom,cpr-corners = <18>;
95
96 qcom,cpr-corner-fmax-map = <6 12 15 18>;
97
98 qcom,cpr-voltage-ceiling =
99 <828000 828000 828000 828000 828000
100 828000 828000 828000 828000 828000
101 828000 828000 828000 828000 828000
102 884000 952000 952000>;
103
104 qcom,cpr-voltage-floor =
105 <568000 568000 568000 568000 568000
106 568000 568000 568000 568000 568000
107 568000 568000 568000 568000 568000
108 568000 568000 568000>;
109
110 qcom,cpr-floor-to-ceiling-max-range =
111 <32000 32000 32000 32000 32000
112 32000 32000 32000 32000 32000
113 32000 32000 32000 32000 32000
114 32000 40000 40000>;
115
116 qcom,corner-frequencies =
117 <300000000 403200000 480000000
118 576000000 652800000 748800000
119 825600000 902400000 979200000
120 1056000000 1132800000 1228800000
121 1324800000 1420800000 1516800000
122 1612800000 1689600000 1766400000>;
123
124 qcom,cpr-ro-scaling-factor =
125 <2594 2795 2576 2761 2469 2673 2198
126 2553 3188 3255 3191 2962 3055 2984
127 2043 2947>,
128 <2594 2795 2576 2761 2469 2673 2198
129 2553 3188 3255 3191 2962 3055 2984
130 2043 2947>,
131 <2259 2389 2387 2531 2294 2464 2218
132 2476 2525 2855 2817 2836 2740 2490
133 1950 2632>,
134 <2259 2389 2387 2531 2294 2464 2218
135 2476 2525 2855 2817 2836 2740 2490
136 1950 2632>;
137
138 qcom,cpr-open-loop-voltage-fuse-adjustment =
139 <100000 100000 100000 100000>;
140
141 qcom,cpr-closed-loop-voltage-fuse-adjustment =
142 <100000 100000 100000 100000>;
143
144 qcom,allow-voltage-interpolation;
145 qcom,allow-quotient-interpolation;
146 qcom,cpr-scaled-open-loop-voltage-as-ceiling;
147
148 qcom,cpr-aging-max-voltage-adjustment = <15000>;
149 qcom,cpr-aging-ref-corner = <18>;
150 qcom,cpr-aging-ro-scaling-factor = <1620>;
151 qcom,allow-aging-voltage-adjustment =
152 /* Speed bin 0 */
153 <0 1 1 1 1 1 1 1>,
154 /* Speed bin 1 */
155 <0 1 1 1 1 1 1 1>;
156 qcom,allow-aging-open-loop-voltage-adjustment =
157 <1>;
158 };
159 };
160
161 thread@1 {
162 qcom,cpr-thread-id = <1>;
163 qcom,cpr-consecutive-up = <0>;
164 qcom,cpr-consecutive-down = <0>;
165 qcom,cpr-up-threshold = <2>;
166 qcom,cpr-down-threshold = <2>;
167
168 apc0_l3_vreg: regulator {
169 regulator-name = "apc0_l3_corner";
170 regulator-min-microvolt = <1>;
171 regulator-max-microvolt = <14>;
172
173 qcom,cpr-fuse-corners = <4>;
174 qcom,cpr-fuse-combos = <16>;
175 qcom,cpr-speed-bins = <2>;
176 qcom,cpr-speed-bin-corners = <14 14>;
177 qcom,cpr-corners = <14>;
178
179 qcom,cpr-corner-fmax-map = <4 8 11 14>;
180
181 qcom,cpr-voltage-ceiling =
182 <828000 828000 828000 828000 828000
183 828000 828000 828000 828000 828000
184 828000 884000 884000 952000>;
185
186 qcom,cpr-voltage-floor =
187 <568000 568000 568000 568000 568000
188 568000 568000 568000 568000 568000
189 568000 568000 568000 568000>;
190
191 qcom,cpr-floor-to-ceiling-max-range =
192 <32000 32000 32000 32000 32000
193 32000 32000 32000 32000 32000
194 32000 32000 32000 40000>;
195
196 qcom,corner-frequencies =
197 <300000000 403200000 480000000
198 576000000 652800000 748800000
199 844800000 940800000 1036800000
200 1132800000 1209600000 1305600000
201 1401600000 1478400000>;
202
203 qcom,cpr-ro-scaling-factor =
204 <2857 3056 2828 2952 2699 2796 2447
205 2631 2630 2579 2244 3343 3287 3137
206 3164 2656>,
207 <2857 3056 2828 2952 2699 2796 2447
208 2631 2630 2579 2244 3343 3287 3137
209 3164 2656>,
210 <2439 2577 2552 2667 2461 2577 2394
211 2536 2132 2307 2191 2903 2838 2912
212 2501 2095>,
213 <2439 2577 2552 2667 2461 2577 2394
214 2536 2132 2307 2191 2903 2838 2912
215 2501 2095>;
216
217 qcom,cpr-open-loop-voltage-fuse-adjustment =
218 <100000 100000 100000 100000>;
219
220 qcom,cpr-closed-loop-voltage-fuse-adjustment =
221 <100000 100000 100000 100000>;
222
223 qcom,allow-voltage-interpolation;
224 qcom,allow-quotient-interpolation;
225 qcom,cpr-scaled-open-loop-voltage-as-ceiling;
226
227 qcom,cpr-aging-max-voltage-adjustment = <15000>;
228 qcom,cpr-aging-ref-corner = <14>;
229 qcom,cpr-aging-ro-scaling-factor = <1620>;
230 qcom,allow-aging-voltage-adjustment =
231 /* Speed bin 0 */
232 <0 1 1 1 1 1 1 1>,
233 /* Speed bin 1 */
234 <0 1 1 1 1 1 1 1>;
235 qcom,allow-aging-open-loop-voltage-adjustment =
236 <1>;
237 };
238 };
239 };
240
241 apc1_cpr: cprh-ctrl@17db0000 {
242 compatible = "qcom,cprh-sdm845-v2-kbss-regulator";
243 reg = <0x17db0000 0x4000>,
244 <0x00784000 0x1000>,
245 <0x17830000 0x1000>;
246 reg-names = "cpr_ctrl", "fuse_base", "saw";
247 clocks = <&clock_gcc GCC_CPUSS_RBCPR_CLK>;
248 clock-names = "core_clk";
249 qcom,cpr-ctrl-name = "apc1";
250 qcom,cpr-controller-id = <1>;
251
252 qcom,cpr-sensor-time = <1000>;
253 qcom,cpr-loop-time = <5000000>;
254 qcom,cpr-idle-cycles = <15>;
255 qcom,cpr-up-down-delay-time = <3000>;
256 qcom,cpr-step-quot-init-min = <9>;
257 qcom,cpr-step-quot-init-max = <14>;
258 qcom,cpr-count-mode = <0>; /* All at once */
259 qcom,cpr-count-repeat = <20>;
260 qcom,cpr-down-error-step-limit = <1>;
261 qcom,cpr-up-error-step-limit = <1>;
262 qcom,cpr-corner-switch-delay-time = <1042>;
263 qcom,cpr-voltage-settling-time = <1760>;
264 qcom,cpr-reset-step-quot-loop-en;
265
266 qcom,apm-threshold-voltage = <800000>;
267 qcom,apm-crossover-voltage = <880000>;
268 qcom,mem-acc-threshold-voltage = <852000>;
269 qcom,mem-acc-crossover-voltage = <852000>;
270
271 qcom,voltage-step = <4000>;
272 qcom,voltage-base = <352000>;
273 qcom,cpr-saw-use-unit-mV;
274
275 qcom,saw-avs-ctrl = <0x101C031>;
276 qcom,saw-avs-limit = <0x4700470>;
277
278 qcom,cpr-enable;
279 qcom,cpr-hw-closed-loop;
280
281 qcom,cpr-panic-reg-addr-list =
282 <0x17db3a84 0x17830c18>;
283 qcom,cpr-panic-reg-name-list =
284 "APSS_GOLD_CPRH_STATUS_0", "GOLD_SAW4_PMIC_STS";
285
286 qcom,cpr-aging-ref-voltage = <1136000>;
287 vdd-supply = <&pm8998_s12>;
288
289 thread@0 {
290 qcom,cpr-thread-id = <0>;
291 qcom,cpr-consecutive-up = <0>;
292 qcom,cpr-consecutive-down = <0>;
293 qcom,cpr-up-threshold = <2>;
294 qcom,cpr-down-threshold = <2>;
295
296 apc1_perfcl_vreg: regulator {
297 regulator-name = "apc1_perfcl_corner";
298 regulator-min-microvolt = <1>;
299 regulator-max-microvolt = <33>;
300
301 qcom,cpr-fuse-corners = <5>;
302 qcom,cpr-fuse-combos = <16>;
303 qcom,cpr-speed-bins = <2>;
304 qcom,cpr-speed-bin-corners = <28 31>;
305 qcom,cpr-corners =
306 /* Speed bin 0 */
307 <28 28 28 28 28 28 28 28>,
308 /* Speed bin 1 */
309 <31 31 31 31 31 31 31 31>;
310
311 qcom,cpr-corner-fmax-map =
312 /* Speed bin 0 */
313 <7 14 22 27 28>,
314 /* Speed bin 1 */
315 <7 14 22 27 31>;
316
317 qcom,cpr-voltage-ceiling =
318 /* Speed bin 0 */
319 <828000 828000 828000 828000 828000
320 828000 828000 828000 828000 828000
321 828000 828000 828000 828000 828000
322 828000 828000 828000 884000 884000
323 884000 884000 1104000 1104000 1104000
324 1104000 1136000 1136000>,
325 /* Speed bin 1 */
326 <828000 828000 828000 828000 828000
327 828000 828000 828000 828000 828000
328 828000 828000 828000 828000 828000
329 828000 828000 828000 884000 884000
330 884000 884000 1104000 1104000 1104000
331 1104000 1136000 1136000 1136000 1136000
332 1136000>;
333
334 qcom,cpr-voltage-floor =
335 /* Speed bin 0 */
336 <568000 568000 568000 568000 568000
337 568000 568000 568000 568000 568000
338 568000 568000 568000 568000 568000
339 568000 568000 568000 568000 568000
340 568000 568000 568000 568000 568000
341 568000 568000 568000>,
342 /* Speed bin 1 */
343 <568000 568000 568000 568000 568000
344 568000 568000 568000 568000 568000
345 568000 568000 568000 568000 568000
346 568000 568000 568000 568000 568000
347 568000 568000 568000 568000 568000
348 568000 568000 568000 568000 568000
349 568000>;
350
351 qcom,cpr-floor-to-ceiling-max-range =
352 /* Speed bin 0 */
353 <32000 32000 32000 32000 32000
354 32000 32000 32000 32000 32000
355 32000 32000 32000 32000 32000
356 32000 32000 32000 32000 32000
357 32000 32000 32000 32000 32000
358 32000 32000 32000>,
359 /* Speed bin 1 */
360 <32000 32000 32000 32000 32000
361 32000 32000 32000 32000 32000
362 32000 32000 32000 32000 32000
363 32000 32000 32000 32000 32000
364 32000 32000 32000 32000 32000
365 32000 32000 40000 40000 40000
366 40000>;
367
368 qcom,corner-frequencies =
369 /* Speed bin 0 */
370 <300000000 403200000 480000000
371 576000000 652800000 748800000
372 825600000 902400000 979200000
373 1056000000 1132800000 1209600000
374 1286400000 1363200000 1459200000
375 1536000000 1612800000 1689600000
376 1766400000 1843200000 1920000000
377 1996800000 2092800000 2169600000
378 2246400000 2323200000 2400000000
379 2400000000>,
380 /* Speed bin 1 */
381 <300000000 403200000 480000000
382 576000000 652800000 748800000
383 825600000 902400000 979200000
384 1056000000 1132800000 1209600000
385 1286400000 1363200000 1459200000
386 1536000000 1612800000 1689600000
387 1766400000 1843200000 1920000000
388 1996800000 2092800000 2169600000
389 2246400000 2323200000 2400000000
390 2476800000 2553600000 2630400000
391 2707200000>;
392
393 qcom,cpr-ro-scaling-factor =
394 <2857 3056 2828 2952 2699 2796 2447
395 2631 2630 2579 2244 3343 3287 3137
396 3164 2656>,
397 <2857 3056 2828 2952 2699 2796 2447
398 2631 2630 2579 2244 3343 3287 3137
399 3164 2656>,
400 <2086 2208 2273 2408 2203 2327 2213
401 2340 1755 2039 2049 2474 2437 2618
402 2003 1675>,
403 <2086 2208 2273 2408 2203 2327 2213
404 2340 1755 2039 2049 2474 2437 2618
405 2003 1675>,
406 <2086 2208 2273 2408 2203 2327 2213
407 2340 1755 2039 2049 2474 2437 2618
408 2003 1675>;
409
410 qcom,cpr-open-loop-voltage-fuse-adjustment =
411 <100000 100000 100000 100000 100000>;
412
413 qcom,cpr-closed-loop-voltage-fuse-adjustment =
414 <100000 100000 100000 100000 100000>;
415
416 qcom,allow-voltage-interpolation;
417 qcom,allow-quotient-interpolation;
418 qcom,cpr-scaled-open-loop-voltage-as-ceiling;
419
420 qcom,cpr-aging-max-voltage-adjustment = <15000>;
421 qcom,cpr-aging-ref-corner = <27 31>;
422 qcom,cpr-aging-ro-scaling-factor = <1700>;
423 qcom,allow-aging-voltage-adjustment =
424 /* Speed bin 0 */
425 <0 1 1 1 1 1 1 1>,
426 /* Speed bin 1 */
427 <0 1 1 1 1 1 1 1>;
428 qcom,allow-aging-open-loop-voltage-adjustment =
429 <1>;
430 };
431 };
432 };
433};
434
435&clock_cpucc {
436 vdd-l3-supply = <&apc0_l3_vreg>;
437 vdd-pwrcl-supply = <&apc0_pwrcl_vreg>;
438};
439
Deepak Katragaddada47ee92017-06-07 14:15:09 -0700[diff] [blame]440&clock_gcc {
441 compatible = "qcom,gcc-sdm845-v2";
442};
443
444&clock_camcc {
445 compatible = "qcom,cam_cc-sdm845-v2";
446};
447
448&clock_dispcc {
449 compatible = "qcom,dispcc-sdm845-v2";
450};
451
452&clock_videocc {
453 compatible = "qcom,video_cc-sdm845-v2";
454};
Praneeth Paladugu55381212017-07-05 15:02:44 -0700[diff] [blame]455
456&msm_vidc {
457 qcom,allowed-clock-rates = <100000000 200000000 330000000
458 404000000 444000000 533000000>;
459};
Reut Zysman861fd6c2017-07-30 15:39:13 +0300[diff] [blame]460
461&spss_utils {
462 qcom,spss-dev-firmware-name = "spss2d"; /* 8 chars max */
463 qcom,spss-test-firmware-name = "spss2t"; /* 8 chars max */
464 qcom,spss-prod-firmware-name = "spss2p"; /* 8 chars max */
465};