Sebastian Hesselbarth | 80a8b54 | 2012-08-15 19:07:34 +0200 | [diff] [blame] | 1 | /include/ "skeleton.dtsi" |
| 2 | |
| 3 | / { |
| 4 | compatible = "marvell,dove"; |
| 5 | model = "Marvell Armada 88AP510 SoC"; |
| 6 | |
Sebastian Hesselbarth | 138ee96 | 2012-09-25 02:02:16 +0200 | [diff] [blame] | 7 | soc@f1000000 { |
Sebastian Hesselbarth | 80a8b54 | 2012-08-15 19:07:34 +0200 | [diff] [blame] | 8 | compatible = "simple-bus"; |
Sebastian Hesselbarth | 80a8b54 | 2012-08-15 19:07:34 +0200 | [diff] [blame] | 9 | #address-cells = <1>; |
| 10 | #size-cells = <1>; |
Sebastian Hesselbarth | 138ee96 | 2012-09-25 02:02:16 +0200 | [diff] [blame] | 11 | interrupt-parent = <&intc>; |
| 12 | |
| 13 | ranges = <0xc8000000 0xc8000000 0x0100000 /* CESA SRAM 1M */ |
| 14 | 0xe0000000 0xe0000000 0x8000000 /* PCIe0 Mem 128M */ |
| 15 | 0xe8000000 0xe8000000 0x8000000 /* PCIe1 Mem 128M */ |
| 16 | 0xf0000000 0xf0000000 0x0100000 /* ScratchPad 1M */ |
| 17 | 0x00000000 0xf1000000 0x1000000 /* SB/NB regs 16M */ |
| 18 | 0xf2000000 0xf2000000 0x0100000 /* PCIe0 I/O 1M */ |
| 19 | 0xf2100000 0xf2100000 0x0100000 /* PCIe0 I/O 1M */ |
| 20 | 0xf8000000 0xf8000000 0x8000000>; /* BootROM 128M */ |
Sebastian Hesselbarth | 80a8b54 | 2012-08-15 19:07:34 +0200 | [diff] [blame] | 21 | |
Sebastian Hesselbarth | fd57c65 | 2012-09-25 02:02:14 +0200 | [diff] [blame] | 22 | l2: l2-cache { |
| 23 | compatible = "marvell,tauros2-cache"; |
| 24 | marvell,tauros2-cache-features = <0>; |
| 25 | }; |
| 26 | |
Sebastian Hesselbarth | 138ee96 | 2012-09-25 02:02:16 +0200 | [diff] [blame] | 27 | intc: interrupt-controller { |
| 28 | compatible = "marvell,orion-intc"; |
| 29 | interrupt-controller; |
| 30 | #interrupt-cells = <1>; |
| 31 | reg = <0x20204 0x04>, <0x20214 0x04>; |
| 32 | }; |
| 33 | |
Sebastian Hesselbarth | 80a8b54 | 2012-08-15 19:07:34 +0200 | [diff] [blame] | 34 | uart0: serial@12000 { |
| 35 | compatible = "ns16550a"; |
| 36 | reg = <0x12000 0x100>; |
| 37 | reg-shift = <2>; |
| 38 | interrupts = <7>; |
| 39 | clock-frequency = <166666667>; |
| 40 | status = "disabled"; |
| 41 | }; |
| 42 | |
| 43 | uart1: serial@12100 { |
| 44 | compatible = "ns16550a"; |
| 45 | reg = <0x12100 0x100>; |
| 46 | reg-shift = <2>; |
| 47 | interrupts = <8>; |
| 48 | clock-frequency = <166666667>; |
| 49 | status = "disabled"; |
| 50 | }; |
| 51 | |
| 52 | uart2: serial@12200 { |
| 53 | compatible = "ns16550a"; |
| 54 | reg = <0x12000 0x100>; |
| 55 | reg-shift = <2>; |
| 56 | interrupts = <9>; |
| 57 | clock-frequency = <166666667>; |
| 58 | status = "disabled"; |
| 59 | }; |
| 60 | |
| 61 | uart3: serial@12300 { |
| 62 | compatible = "ns16550a"; |
| 63 | reg = <0x12100 0x100>; |
| 64 | reg-shift = <2>; |
| 65 | interrupts = <10>; |
| 66 | clock-frequency = <166666667>; |
| 67 | status = "disabled"; |
| 68 | }; |
| 69 | |
Sebastian Hesselbarth | 80a8b54 | 2012-08-15 19:07:34 +0200 | [diff] [blame] | 70 | gpio0: gpio@d0400 { |
| 71 | compatible = "marvell,orion-gpio"; |
| 72 | #gpio-cells = <2>; |
| 73 | gpio-controller; |
| 74 | reg = <0xd0400 0x20>; |
| 75 | ngpio = <32>; |
| 76 | interrupts = <12>, <13>, <14>, <60>; |
| 77 | }; |
| 78 | |
| 79 | gpio1: gpio@d0420 { |
| 80 | compatible = "marvell,orion-gpio"; |
| 81 | #gpio-cells = <2>; |
| 82 | gpio-controller; |
| 83 | reg = <0xd0420 0x20>; |
| 84 | ngpio = <32>; |
| 85 | interrupts = <61>; |
| 86 | }; |
| 87 | |
| 88 | gpio2: gpio@e8400 { |
| 89 | compatible = "marvell,orion-gpio"; |
| 90 | #gpio-cells = <2>; |
| 91 | gpio-controller; |
| 92 | reg = <0xe8400 0x0c>; |
| 93 | ngpio = <8>; |
| 94 | }; |
| 95 | |
| 96 | spi0: spi@10600 { |
| 97 | compatible = "marvell,orion-spi"; |
| 98 | #address-cells = <1>; |
| 99 | #size-cells = <0>; |
| 100 | cell-index = <0>; |
| 101 | interrupts = <6>; |
| 102 | reg = <0x10600 0x28>; |
| 103 | status = "disabled"; |
| 104 | }; |
| 105 | |
| 106 | spi1: spi@14600 { |
| 107 | compatible = "marvell,orion-spi"; |
| 108 | #address-cells = <1>; |
| 109 | #size-cells = <0>; |
| 110 | cell-index = <1>; |
| 111 | interrupts = <5>; |
| 112 | reg = <0x14600 0x28>; |
| 113 | status = "disabled"; |
| 114 | }; |
| 115 | |
| 116 | i2c0: i2c@11000 { |
| 117 | compatible = "marvell,mv64xxx-i2c"; |
| 118 | reg = <0x11000 0x20>; |
| 119 | #address-cells = <1>; |
| 120 | #size-cells = <0>; |
| 121 | interrupts = <11>; |
| 122 | clock-frequency = <400000>; |
| 123 | timeout-ms = <1000>; |
| 124 | status = "disabled"; |
| 125 | }; |
| 126 | |
| 127 | sdio0: sdio@92000 { |
| 128 | compatible = "marvell,dove-sdhci"; |
| 129 | reg = <0x92000 0x100>; |
| 130 | interrupts = <35>, <37>; |
| 131 | status = "disabled"; |
| 132 | }; |
| 133 | |
| 134 | sdio1: sdio@90000 { |
| 135 | compatible = "marvell,dove-sdhci"; |
| 136 | reg = <0x90000 0x100>; |
| 137 | interrupts = <36>, <38>; |
| 138 | status = "disabled"; |
| 139 | }; |
| 140 | |
| 141 | sata0: sata@a0000 { |
| 142 | compatible = "marvell,orion-sata"; |
| 143 | reg = <0xa0000 0x2400>; |
| 144 | interrupts = <62>; |
| 145 | nr-ports = <1>; |
| 146 | status = "disabled"; |
| 147 | }; |
Sebastian Hesselbarth | a458926 | 2012-09-25 02:02:18 +0200 | [diff] [blame^] | 148 | |
| 149 | crypto: crypto@30000 { |
| 150 | compatible = "marvell,orion-crypto"; |
| 151 | reg = <0x30000 0x10000>, |
| 152 | <0xc8000000 0x800>; |
| 153 | reg-names = "regs", "sram"; |
| 154 | interrupts = <31>; |
| 155 | status = "okay"; |
| 156 | }; |
Sebastian Hesselbarth | 80a8b54 | 2012-08-15 19:07:34 +0200 | [diff] [blame] | 157 | }; |
| 158 | }; |