Maxim Levitsky | e5f710c | 2010-03-19 17:22:54 +0200 | [diff] [blame] | 1 | config MTD_NAND_ECC |
| 2 | tristate |
| 3 | |
| 4 | config MTD_NAND_ECC_SMC |
| 5 | bool "NAND ECC Smart Media byte order" |
| 6 | depends on MTD_NAND_ECC |
| 7 | default n |
| 8 | help |
| 9 | Software ECC according to the Smart Media Specification. |
| 10 | The original Linux implementation had byte 0 and 1 swapped. |
| 11 | |
Maxim Levitsky | 5869d2c | 2010-06-02 18:22:48 +0300 | [diff] [blame] | 12 | |
| 13 | menuconfig MTD_NAND |
| 14 | tristate "NAND Device Support" |
| 15 | depends on MTD |
| 16 | select MTD_NAND_IDS |
| 17 | select MTD_NAND_ECC |
| 18 | help |
| 19 | This enables support for accessing all type of NAND flash |
| 20 | devices. For further information see |
| 21 | <http://www.linux-mtd.infradead.org/doc/nand.html>. |
| 22 | |
Jan Engelhardt | ec98c68 | 2007-04-19 16:21:41 -0500 | [diff] [blame] | 23 | if MTD_NAND |
| 24 | |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 25 | config MTD_NAND_BCH |
| 26 | tristate |
| 27 | select BCH |
| 28 | depends on MTD_NAND_ECC_BCH |
| 29 | default MTD_NAND |
| 30 | |
| 31 | config MTD_NAND_ECC_BCH |
| 32 | bool "Support software BCH ECC" |
| 33 | default n |
| 34 | help |
| 35 | This enables support for software BCH error correction. Binary BCH |
| 36 | codes are more powerful and cpu intensive than traditional Hamming |
| 37 | ECC codes. They are used with NAND devices requiring more than 1 bit |
| 38 | of error correction. |
| 39 | |
Maxim Levitsky | 9fc51a3 | 2010-02-22 20:39:39 +0200 | [diff] [blame] | 40 | config MTD_SM_COMMON |
Maxim Levitsky | 9fc51a3 | 2010-02-22 20:39:39 +0200 | [diff] [blame] | 41 | tristate |
| 42 | default n |
| 43 | |
Jason Roberts | ce08259 | 2010-05-13 15:57:33 +0100 | [diff] [blame] | 44 | config MTD_NAND_DENALI |
Andy Shevchenko | 04868a6 | 2015-08-06 16:04:21 +0300 | [diff] [blame] | 45 | tristate |
Dinh Nguyen | 2a0a288 | 2012-09-27 10:58:05 -0600 | [diff] [blame] | 46 | |
| 47 | config MTD_NAND_DENALI_PCI |
Jason Roberts | ce08259 | 2010-05-13 15:57:33 +0100 | [diff] [blame] | 48 | tristate "Support Denali NAND controller on Intel Moorestown" |
Andy Shevchenko | 04868a6 | 2015-08-06 16:04:21 +0300 | [diff] [blame] | 49 | select MTD_NAND_DENALI |
| 50 | depends on HAS_DMA && PCI |
Jason Roberts | ce08259 | 2010-05-13 15:57:33 +0100 | [diff] [blame] | 51 | help |
| 52 | Enable the driver for NAND flash on Intel Moorestown, using the |
| 53 | Denali NAND controller core. |
Dinh Nguyen | 30f9f2f | 2012-09-27 10:58:06 -0600 | [diff] [blame] | 54 | |
| 55 | config MTD_NAND_DENALI_DT |
| 56 | tristate "Support Denali NAND controller as a DT device" |
Andy Shevchenko | 04868a6 | 2015-08-06 16:04:21 +0300 | [diff] [blame] | 57 | select MTD_NAND_DENALI |
Masahiro Yamada | 0ed6ca3 | 2015-12-16 14:00:09 +0900 | [diff] [blame] | 58 | depends on HAS_DMA && HAVE_CLK && OF |
Dinh Nguyen | 30f9f2f | 2012-09-27 10:58:06 -0600 | [diff] [blame] | 59 | help |
| 60 | Enable the driver for NAND flash on platforms using a Denali NAND |
| 61 | controller as a DT device. |
| 62 | |
Jason Roberts | ce08259 | 2010-05-13 15:57:33 +0100 | [diff] [blame] | 63 | config MTD_NAND_DENALI_SCRATCH_REG_ADDR |
| 64 | hex "Denali NAND size scratch register address" |
| 65 | default "0xFF108018" |
Dinh Nguyen | 2a0a288 | 2012-09-27 10:58:05 -0600 | [diff] [blame] | 66 | depends on MTD_NAND_DENALI_PCI |
Jason Roberts | ce08259 | 2010-05-13 15:57:33 +0100 | [diff] [blame] | 67 | help |
| 68 | Some platforms place the NAND chip size in a scratch register |
| 69 | because (some versions of) the driver aren't able to automatically |
| 70 | determine the size of certain chips. Set the address of the |
| 71 | scratch register here to enable this feature. On Intel Moorestown |
| 72 | boards, the scratch register is at 0xFF108018. |
| 73 | |
Mike Rapoport | aaf7ea2 | 2008-10-15 08:38:49 +0200 | [diff] [blame] | 74 | config MTD_NAND_GPIO |
Gerhard Sittig | c9d79c4 | 2014-08-05 10:37:26 +0200 | [diff] [blame] | 75 | tristate "GPIO assisted NAND Flash driver" |
Geert Uytterhoeven | f650ce2 | 2015-05-05 18:32:29 +0200 | [diff] [blame] | 76 | depends on GPIOLIB || COMPILE_TEST |
Richard Weinberger | 15c0be7 | 2016-01-25 23:24:10 +0100 | [diff] [blame] | 77 | depends on HAS_IOMEM |
Mike Rapoport | aaf7ea2 | 2008-10-15 08:38:49 +0200 | [diff] [blame] | 78 | help |
Gerhard Sittig | c9d79c4 | 2014-08-05 10:37:26 +0200 | [diff] [blame] | 79 | This enables a NAND flash driver where control signals are |
| 80 | connected to GPIO pins, and commands and data are communicated |
| 81 | via a memory mapped interface. |
Mike Rapoport | aaf7ea2 | 2008-10-15 08:38:49 +0200 | [diff] [blame] | 82 | |
Jonathan McDowell | 3d12c0c | 2006-05-21 18:11:55 +0100 | [diff] [blame] | 83 | config MTD_NAND_AMS_DELTA |
| 84 | tristate "NAND Flash device on Amstrad E3" |
Jan Engelhardt | ec98c68 | 2007-04-19 16:21:41 -0500 | [diff] [blame] | 85 | depends on MACH_AMS_DELTA |
Janusz Krzysztofik | 494f45d | 2010-12-15 12:58:15 +0100 | [diff] [blame] | 86 | default y |
Jonathan McDowell | 3d12c0c | 2006-05-21 18:11:55 +0100 | [diff] [blame] | 87 | help |
| 88 | Support for NAND flash on Amstrad E3 (Delta). |
| 89 | |
Vimal Singh | 67ce04b | 2009-05-12 13:47:03 -0700 | [diff] [blame] | 90 | config MTD_NAND_OMAP2 |
Roger Quadros | e13f880 | 2016-08-24 12:25:00 +0300 | [diff] [blame] | 91 | tristate "NAND Flash device on OMAP2, OMAP3, OMAP4 and Keystone" |
| 92 | depends on (ARCH_OMAP2PLUS || ARCH_KEYSTONE) |
Vimal Singh | 67ce04b | 2009-05-12 13:47:03 -0700 | [diff] [blame] | 93 | help |
Roger Quadros | e13f880 | 2016-08-24 12:25:00 +0300 | [diff] [blame] | 94 | Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP4 |
| 95 | and Keystone platforms. |
Vimal Singh | 67ce04b | 2009-05-12 13:47:03 -0700 | [diff] [blame] | 96 | |
Ivan Djelic | 0e618ef | 2012-04-30 12:17:18 +0200 | [diff] [blame] | 97 | config MTD_NAND_OMAP_BCH |
Ezequiel Garcia | 43b7769 | 2013-10-25 07:17:55 -0300 | [diff] [blame] | 98 | depends on MTD_NAND_OMAP2 |
Ezequiel Garcia | e7cd682 | 2014-10-01 14:33:29 +0300 | [diff] [blame] | 99 | bool "Support hardware based BCH error correction" |
Ivan Djelic | 0e618ef | 2012-04-30 12:17:18 +0200 | [diff] [blame] | 100 | default n |
| 101 | select BCH |
Ivan Djelic | 0e618ef | 2012-04-30 12:17:18 +0200 | [diff] [blame] | 102 | help |
Pekon Gupta | 90c9c95 | 2013-10-24 18:20:26 +0530 | [diff] [blame] | 103 | This config enables the ELM hardware engine, which can be used to |
| 104 | locate and correct errors when using BCH ECC scheme. This offloads |
| 105 | the cpu from doing ECC error searching and correction. However some |
| 106 | legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine |
Roger Quadros | 8b3d58e | 2014-10-01 14:33:30 +0300 | [diff] [blame] | 107 | so this is optional for them. |
Ivan Djelic | 0e618ef | 2012-04-30 12:17:18 +0200 | [diff] [blame] | 108 | |
Ezequiel Garcia | e7cd682 | 2014-10-01 14:33:29 +0300 | [diff] [blame] | 109 | config MTD_NAND_OMAP_BCH_BUILD |
| 110 | def_tristate MTD_NAND_OMAP2 && MTD_NAND_OMAP_BCH |
| 111 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 112 | config MTD_NAND_IDS |
| 113 | tristate |
| 114 | |
Maxim Levitsky | 67e054e | 2010-02-22 20:39:42 +0200 | [diff] [blame] | 115 | config MTD_NAND_RICOH |
| 116 | tristate "Ricoh xD card reader" |
| 117 | default n |
Randy Dunlap | f696aa4 | 2010-03-11 09:10:32 -0800 | [diff] [blame] | 118 | depends on PCI |
Maxim Levitsky | 67e054e | 2010-02-22 20:39:42 +0200 | [diff] [blame] | 119 | select MTD_SM_COMMON |
| 120 | help |
| 121 | Enable support for Ricoh R5C852 xD card reader |
| 122 | You also need to enable ether |
| 123 | NAND SSFDC (SmartMedia) read only translation layer' or new |
| 124 | expermental, readwrite |
| 125 | 'SmartMedia/xD new translation layer' |
| 126 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | config MTD_NAND_AU1550 |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 128 | tristate "Au1550/1200 NAND support" |
Manuel Lauss | 376638603 | 2011-08-12 11:39:45 +0200 | [diff] [blame] | 129 | depends on MIPS_ALCHEMY |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | help |
| 131 | This enables the driver for the NAND flash controller on the |
| 132 | AMD/Alchemy 1550 SOC. |
| 133 | |
Bryan Wu | b37bde1 | 2007-10-02 13:56:05 -0700 | [diff] [blame] | 134 | config MTD_NAND_BF5XX |
| 135 | tristate "Blackfin on-chip NAND Flash Controller driver" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 136 | depends on BF54x || BF52x |
Bryan Wu | b37bde1 | 2007-10-02 13:56:05 -0700 | [diff] [blame] | 137 | help |
| 138 | This enables the Blackfin on-chip NAND flash controller |
| 139 | |
| 140 | No board specific support is done by this driver, each board |
| 141 | must advertise a platform_device for the driver to attach. |
| 142 | |
| 143 | This driver can also be built as a module. If so, the module |
| 144 | will be called bf5xx-nand. |
| 145 | |
| 146 | config MTD_NAND_BF5XX_HWECC |
| 147 | bool "BF5XX NAND Hardware ECC" |
Mike Frysinger | a0dd201 | 2008-07-30 12:35:02 -0700 | [diff] [blame] | 148 | default y |
Bryan Wu | b37bde1 | 2007-10-02 13:56:05 -0700 | [diff] [blame] | 149 | depends on MTD_NAND_BF5XX |
| 150 | help |
| 151 | Enable the use of the BF5XX's internal ECC generator when |
| 152 | using NAND. |
| 153 | |
Mike Frysinger | fcb90ba | 2008-07-30 12:35:01 -0700 | [diff] [blame] | 154 | config MTD_NAND_BF5XX_BOOTROM_ECC |
| 155 | bool "Use Blackfin BootROM ECC Layout" |
| 156 | default n |
| 157 | depends on MTD_NAND_BF5XX_HWECC |
| 158 | help |
| 159 | If you wish to modify NAND pages and allow the Blackfin on-chip |
| 160 | BootROM to boot from them, say Y here. This is only necessary |
| 161 | if you are booting U-Boot out of NAND and you wish to update |
| 162 | U-Boot from Linux' userspace. Otherwise, you should say N here. |
| 163 | |
| 164 | If unsure, say N. |
| 165 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 166 | config MTD_NAND_S3C2410 |
Peter Korsgaard | 9dbc090 | 2009-06-07 06:04:23 -0700 | [diff] [blame] | 167 | tristate "NAND Flash support for Samsung S3C SoCs" |
Kukjin Kim | b130d5c | 2012-02-03 14:29:23 +0900 | [diff] [blame] | 168 | depends on ARCH_S3C24XX || ARCH_S3C64XX |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | help |
Peter Korsgaard | 9dbc090 | 2009-06-07 06:04:23 -0700 | [diff] [blame] | 170 | This enables the NAND flash controller on the S3C24xx and S3C64xx |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 171 | SoCs |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 172 | |
Egry Gábor | 4992a9e | 2006-05-12 17:35:02 +0100 | [diff] [blame] | 173 | No board specific support is done by this driver, each board |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 174 | must advertise a platform_device for the driver to attach. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 175 | |
| 176 | config MTD_NAND_S3C2410_DEBUG |
Peter Korsgaard | 9dbc090 | 2009-06-07 06:04:23 -0700 | [diff] [blame] | 177 | bool "Samsung S3C NAND driver debug" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 178 | depends on MTD_NAND_S3C2410 |
| 179 | help |
Peter Korsgaard | 9dbc090 | 2009-06-07 06:04:23 -0700 | [diff] [blame] | 180 | Enable debugging of the S3C NAND driver |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 181 | |
| 182 | config MTD_NAND_S3C2410_HWECC |
Peter Korsgaard | 9dbc090 | 2009-06-07 06:04:23 -0700 | [diff] [blame] | 183 | bool "Samsung S3C NAND Hardware ECC" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 184 | depends on MTD_NAND_S3C2410 |
| 185 | help |
Peter Korsgaard | 9dbc090 | 2009-06-07 06:04:23 -0700 | [diff] [blame] | 186 | Enable the use of the controller's internal ECC generator when |
| 187 | using NAND. Early versions of the chips have had problems with |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 188 | incorrect ECC generation, and if using these, the default of |
| 189 | software ECC is preferable. |
| 190 | |
Sean MacLennan | a808ad3 | 2008-12-10 13:16:34 +0000 | [diff] [blame] | 191 | config MTD_NAND_NDFC |
| 192 | tristate "NDFC NanD Flash Controller" |
| 193 | depends on 4xx |
| 194 | select MTD_NAND_ECC_SMC |
| 195 | help |
| 196 | NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs |
| 197 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 198 | config MTD_NAND_S3C2410_CLKSTOP |
Peter Korsgaard | 9dbc090 | 2009-06-07 06:04:23 -0700 | [diff] [blame] | 199 | bool "Samsung S3C NAND IDLE clock stop" |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 200 | depends on MTD_NAND_S3C2410 |
| 201 | default n |
| 202 | help |
| 203 | Stop the clock to the NAND controller when there is no chip |
| 204 | selected to save power. This will mean there is a small delay |
| 205 | when the is NAND chip selected or released, but will save |
| 206 | approximately 5mA of power when there is nothing happening. |
| 207 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 208 | config MTD_NAND_DISKONCHIP |
Kees Cook | 5d0e137 | 2012-10-02 11:17:53 -0700 | [diff] [blame] | 209 | tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation)" |
Richard Weinberger | 9310da0 | 2012-02-07 01:22:50 +0100 | [diff] [blame] | 210 | depends on HAS_IOMEM |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 211 | select REED_SOLOMON |
| 212 | select REED_SOLOMON_DEC16 |
| 213 | help |
| 214 | This is a reimplementation of M-Systems DiskOnChip 2000, |
| 215 | Millennium and Millennium Plus as a standard NAND device driver, |
| 216 | as opposed to the earlier self-contained MTD device drivers. |
| 217 | This should enable, among other things, proper JFFS2 operation on |
| 218 | these devices. |
| 219 | |
| 220 | config MTD_NAND_DISKONCHIP_PROBE_ADVANCED |
| 221 | bool "Advanced detection options for DiskOnChip" |
| 222 | depends on MTD_NAND_DISKONCHIP |
| 223 | help |
| 224 | This option allows you to specify nonstandard address at which to |
| 225 | probe for a DiskOnChip, or to change the detection options. You |
| 226 | are unlikely to need any of this unless you are using LinuxBIOS. |
| 227 | Say 'N'. |
| 228 | |
| 229 | config MTD_NAND_DISKONCHIP_PROBE_ADDRESS |
| 230 | hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED |
| 231 | depends on MTD_NAND_DISKONCHIP |
| 232 | default "0" |
| 233 | ---help--- |
| 234 | By default, the probe for DiskOnChip devices will look for a |
| 235 | DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. |
| 236 | This option allows you to specify a single address at which to probe |
| 237 | for the device, which is useful if you have other devices in that |
| 238 | range which get upset when they are probed. |
| 239 | |
| 240 | (Note that on PowerPC, the normal probe will only check at |
| 241 | 0xE4000000.) |
| 242 | |
| 243 | Normally, you should leave this set to zero, to allow the probe at |
| 244 | the normal addresses. |
| 245 | |
| 246 | config MTD_NAND_DISKONCHIP_PROBE_HIGH |
| 247 | bool "Probe high addresses" |
| 248 | depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED |
| 249 | help |
| 250 | By default, the probe for DiskOnChip devices will look for a |
| 251 | DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. |
| 252 | This option changes to make it probe between 0xFFFC8000 and |
| 253 | 0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be |
| 254 | useful to you. Say 'N'. |
| 255 | |
| 256 | config MTD_NAND_DISKONCHIP_BBTWRITE |
| 257 | bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP" |
| 258 | depends on MTD_NAND_DISKONCHIP |
| 259 | help |
| 260 | On DiskOnChip devices shipped with the INFTL filesystem (Millennium |
| 261 | and 2000 TSOP/Alon), Linux reserves some space at the end of the |
| 262 | device for the Bad Block Table (BBT). If you have existing INFTL |
| 263 | data on your device (created by non-Linux tools such as M-Systems' |
| 264 | DOS drivers), your data might overlap the area Linux wants to use for |
| 265 | the BBT. If this is a concern for you, leave this option disabled and |
| 266 | Linux will not write BBT data into this area. |
| 267 | The downside of leaving this option disabled is that if bad blocks |
| 268 | are detected by Linux, they will not be recorded in the BBT, which |
| 269 | could cause future problems. |
| 270 | Once you enable this option, new filesystems (INFTL or others, created |
| 271 | in Linux or other operating systems) will not use the reserved area. |
| 272 | The only reason not to enable this option is to prevent damage to |
| 273 | preexisting filesystems. |
| 274 | Even if you leave this disabled, you can enable BBT writes at module |
| 275 | load time (assuming you build diskonchip as a module) with the module |
| 276 | parameter "inftl_bbt_write=1". |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 277 | |
Mike Dunn | 570469f | 2012-01-03 16:05:44 -0800 | [diff] [blame] | 278 | config MTD_NAND_DOCG4 |
Kees Cook | 5d0e137 | 2012-10-02 11:17:53 -0700 | [diff] [blame] | 279 | tristate "Support for DiskOnChip G4" |
| 280 | depends on HAS_IOMEM |
Mike Dunn | 570469f | 2012-01-03 16:05:44 -0800 | [diff] [blame] | 281 | select BCH |
| 282 | select BITREVERSE |
| 283 | help |
| 284 | Support for diskonchip G4 nand flash, found in various smartphones and |
| 285 | PDAs, among them the Palm Treo680, HTC Prophet and Wizard, Toshiba |
| 286 | Portege G900, Asus P526, and O2 XDA Zinc. |
| 287 | |
| 288 | With this driver you will be able to use UBI and create a ubifs on the |
| 289 | device, so you may wish to consider enabling UBI and UBIFS as well. |
| 290 | |
| 291 | These devices ship with the Mys/Sandisk SAFTL formatting, for which |
| 292 | there is currently no mtd parser, so you may want to use command line |
| 293 | partitioning to segregate write-protected blocks. On the Treo680, the |
| 294 | first five erase blocks (256KiB each) are write-protected, followed |
| 295 | by the block containing the saftl partition table. This is probably |
| 296 | typical. |
| 297 | |
Adrian Bunk | 54af6b4 | 2006-03-31 02:29:43 -0800 | [diff] [blame] | 298 | config MTD_NAND_SHARPSL |
| 299 | tristate "Support for NAND Flash on Sharp SL Series (C7xx + others)" |
Jan Engelhardt | ec98c68 | 2007-04-19 16:21:41 -0500 | [diff] [blame] | 300 | depends on ARCH_PXA |
Adrian Bunk | 54af6b4 | 2006-03-31 02:29:43 -0800 | [diff] [blame] | 301 | |
David Woodhouse | c45aa05 | 2006-10-22 02:17:05 +0100 | [diff] [blame] | 302 | config MTD_NAND_CAFE |
Segher Boessenkool | 8c61b7a | 2007-05-02 12:18:49 +0200 | [diff] [blame] | 303 | tristate "NAND support for OLPC CAFÉ chip" |
| 304 | depends on PCI |
| 305 | select REED_SOLOMON |
| 306 | select REED_SOLOMON_DEC16 |
| 307 | help |
Adrian Bunk | 8f46c52 | 2007-06-22 01:52:08 +0200 | [diff] [blame] | 308 | Use NAND flash attached to the CAFÉ chip designed for the OLPC |
Segher Boessenkool | 8c61b7a | 2007-05-02 12:18:49 +0200 | [diff] [blame] | 309 | laptop. |
David Woodhouse | c45aa05 | 2006-10-22 02:17:05 +0100 | [diff] [blame] | 310 | |
David Woodhouse | 179fdc3 | 2006-05-11 22:35:28 +0100 | [diff] [blame] | 311 | config MTD_NAND_CS553X |
| 312 | tristate "NAND support for CS5535/CS5536 (AMD Geode companion chip)" |
Yinghai Lu | 4272ebf | 2009-01-29 15:14:46 -0800 | [diff] [blame] | 313 | depends on X86_32 |
Richard Weinberger | 02c3b0b | 2016-01-25 23:24:20 +0100 | [diff] [blame] | 314 | depends on !UML && HAS_IOMEM |
David Woodhouse | f41a5f8 | 2006-05-16 13:11:47 +0100 | [diff] [blame] | 315 | help |
| 316 | The CS553x companion chips for the AMD Geode processor |
| 317 | include NAND flash controllers with built-in hardware ECC |
| 318 | capabilities; enabling this option will allow you to use |
| 319 | these. The driver will check the MSRs to verify that the |
| 320 | controller is enabled for NAND, and currently requires that |
| 321 | the controller be in MMIO mode. |
| 322 | |
Pavel Machek | 4737f09 | 2009-06-05 00:44:53 +0200 | [diff] [blame] | 323 | If you say "m", the module will be called cs553x_nand. |
David Woodhouse | f41a5f8 | 2006-05-16 13:11:47 +0100 | [diff] [blame] | 324 | |
HÃ¥vard Skinnemoen | d4f4c0a | 2008-06-06 18:04:52 +0200 | [diff] [blame] | 325 | config MTD_NAND_ATMEL |
David Brownell | bd5a438 | 2008-07-03 23:40:19 -0700 | [diff] [blame] | 326 | tristate "Support for NAND Flash / SmartMedia on AT91 and AVR32" |
HÃ¥vard Skinnemoen | 984290d | 2008-06-06 18:04:57 +0200 | [diff] [blame] | 327 | depends on ARCH_AT91 || AVR32 |
Andrew Victor | 42cb140 | 2006-10-19 18:24:35 +0200 | [diff] [blame] | 328 | help |
| 329 | Enables support for NAND Flash / Smart Media Card interface |
HÃ¥vard Skinnemoen | 984290d | 2008-06-06 18:04:57 +0200 | [diff] [blame] | 330 | on Atmel AT91 and AVR32 processors. |
Andrew Victor | 42cb140 | 2006-10-19 18:24:35 +0200 | [diff] [blame] | 331 | |
eric miao | fe69af0 | 2008-02-14 15:48:23 +0800 | [diff] [blame] | 332 | config MTD_NAND_PXA3xx |
Ezequiel Garcia | c5f9967 | 2013-11-07 12:17:11 -0300 | [diff] [blame] | 333 | tristate "NAND support on PXA3xx and Armada 370/XP" |
Ezequiel Garcia | 0d58f6e | 2013-08-12 14:14:59 -0300 | [diff] [blame] | 334 | depends on PXA3xx || ARCH_MMP || PLAT_ORION |
eric miao | fe69af0 | 2008-02-14 15:48:23 +0800 | [diff] [blame] | 335 | help |
| 336 | This enables the driver for the NAND flash device found on |
Ezequiel Garcia | c5f9967 | 2013-11-07 12:17:11 -0300 | [diff] [blame] | 337 | PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2). |
eric miao | fe69af0 | 2008-02-14 15:48:23 +0800 | [diff] [blame] | 338 | |
Roland Stigge | 2944a44 | 2012-06-07 12:22:15 +0200 | [diff] [blame] | 339 | config MTD_NAND_SLC_LPC32XX |
| 340 | tristate "NXP LPC32xx SLC Controller" |
| 341 | depends on ARCH_LPC32XX |
| 342 | help |
| 343 | Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell |
| 344 | chips) NAND controller. This is the default for the PHYTEC 3250 |
| 345 | reference board which contains a NAND256R3A2CZA6 chip. |
| 346 | |
| 347 | Please check the actual NAND chip connected and its support |
| 348 | by the SLC NAND controller. |
| 349 | |
Roland Stigge | 70f7cb7 | 2012-06-30 18:50:38 +0200 | [diff] [blame] | 350 | config MTD_NAND_MLC_LPC32XX |
| 351 | tristate "NXP LPC32xx MLC Controller" |
| 352 | depends on ARCH_LPC32XX |
| 353 | help |
| 354 | Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND |
| 355 | controller. This is the default for the WORK92105 controller |
| 356 | board. |
| 357 | |
| 358 | Please check the actual NAND chip connected and its support |
| 359 | by the MLC NAND controller. |
| 360 | |
Mike Rapoport | 54d33c4 | 2007-04-22 08:53:21 +0300 | [diff] [blame] | 361 | config MTD_NAND_CM_X270 |
| 362 | tristate "Support for NAND Flash on CM-X270 modules" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 363 | depends on MACH_ARMCORE |
Mike Rapoport | 54d33c4 | 2007-04-22 08:53:21 +0300 | [diff] [blame] | 364 | |
Egor Martovetsky | 846fc31 | 2007-11-28 18:37:31 -0600 | [diff] [blame] | 365 | config MTD_NAND_PASEMI |
| 366 | tristate "NAND support for PA Semi PWRficient" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 367 | depends on PPC_PASEMI |
Egor Martovetsky | 846fc31 | 2007-11-28 18:37:31 -0600 | [diff] [blame] | 368 | help |
| 369 | Enables support for NAND Flash interface on PA Semi PWRficient |
| 370 | based boards |
Mike Rapoport | 54d33c4 | 2007-04-22 08:53:21 +0300 | [diff] [blame] | 371 | |
Ian Molton | ec43b81 | 2008-07-15 16:04:22 +0100 | [diff] [blame] | 372 | config MTD_NAND_TMIO |
| 373 | tristate "NAND Flash device on Toshiba Mobile IO Controller" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 374 | depends on MFD_TMIO |
Ian Molton | ec43b81 | 2008-07-15 16:04:22 +0100 | [diff] [blame] | 375 | help |
| 376 | Support for NAND flash connected to a Toshiba Mobile IO |
| 377 | Controller in some PDAs, including the Sharp SL6000x. |
| 378 | |
Adrian Bunk | 54af6b4 | 2006-03-31 02:29:43 -0800 | [diff] [blame] | 379 | config MTD_NAND_NANDSIM |
| 380 | tristate "Support for NAND Flash Simulator" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 381 | help |
David Woodhouse | f41a5f8 | 2006-05-16 13:11:47 +0100 | [diff] [blame] | 382 | The simulator may simulate various NAND flash chips for the |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 383 | MTD nand layer. |
Adrian Bunk | 54af6b4 | 2006-03-31 02:29:43 -0800 | [diff] [blame] | 384 | |
Huang Shijie | 157550ff | 2011-09-08 10:47:11 +0800 | [diff] [blame] | 385 | config MTD_NAND_GPMI_NAND |
Fabio Estevam | e1f5b3f | 2012-07-28 19:29:24 -0300 | [diff] [blame] | 386 | tristate "GPMI NAND Flash Controller driver" |
Arnd Bergmann | a334937 | 2012-08-04 10:48:12 +0000 | [diff] [blame] | 387 | depends on MTD_NAND && MXS_DMA |
Huang Shijie | 157550ff | 2011-09-08 10:47:11 +0800 | [diff] [blame] | 388 | help |
Fabio Estevam | 27c84fa | 2012-07-25 08:18:18 -0300 | [diff] [blame] | 389 | Enables NAND Flash support for IMX23, IMX28 or IMX6. |
Huang Shijie | 157550ff | 2011-09-08 10:47:11 +0800 | [diff] [blame] | 390 | The GPMI controller is very powerful, with the help of BCH |
| 391 | module, it can do the hardware ECC. The GPMI supports several |
| 392 | NAND flashs at the same time. The GPMI may conflicts with other |
| 393 | block, such as SD card. So pay attention to it when you enable |
| 394 | the GPMI. |
| 395 | |
Brian Norris | 27c5b17 | 2015-03-06 11:38:08 -0800 | [diff] [blame] | 396 | config MTD_NAND_BRCMNAND |
| 397 | tristate "Broadcom STB NAND controller" |
Anup Patel | ebdee13 | 2015-10-02 23:26:43 +0530 | [diff] [blame] | 398 | depends on ARM || ARM64 || MIPS |
Brian Norris | 27c5b17 | 2015-03-06 11:38:08 -0800 | [diff] [blame] | 399 | help |
| 400 | Enables the Broadcom NAND controller driver. The controller was |
| 401 | originally designed for Set-Top Box but is used on various BCM7xxx, |
| 402 | BCM3xxx, BCM63xxx, iProc/Cygnus and more. |
| 403 | |
Rafał Miłecki | a5401370 | 2012-11-12 13:03:21 +0100 | [diff] [blame] | 404 | config MTD_NAND_BCM47XXNFLASH |
Rafał Miłecki | ecfe57b | 2012-12-03 10:22:35 +0100 | [diff] [blame] | 405 | tristate "Support for NAND flash on BCM4706 BCMA bus" |
Rafał Miłecki | a5401370 | 2012-11-12 13:03:21 +0100 | [diff] [blame] | 406 | depends on BCMA_NFLASH |
| 407 | help |
| 408 | BCMA bus can have various flash memories attached, they are |
| 409 | registered by bcma as platform devices. This enables driver for |
Rafał Miłecki | ecfe57b | 2012-12-03 10:22:35 +0100 | [diff] [blame] | 410 | NAND flash memories. For now only BCM4706 is supported. |
Rafał Miłecki | a5401370 | 2012-11-12 13:03:21 +0100 | [diff] [blame] | 411 | |
Vitaly Wool | 711fdf6 | 2007-05-06 19:31:18 +0400 | [diff] [blame] | 412 | config MTD_NAND_PLATFORM |
| 413 | tristate "Support for generic platform NAND driver" |
Richard Weinberger | 9310da0 | 2012-02-07 01:22:50 +0100 | [diff] [blame] | 414 | depends on HAS_IOMEM |
Vitaly Wool | 711fdf6 | 2007-05-06 19:31:18 +0400 | [diff] [blame] | 415 | help |
| 416 | This implements a generic NAND driver for on-SOC platform |
| 417 | devices. You will need to provide platform-specific functions |
| 418 | via platform_data. |
| 419 | |
Tzachi Perelstein | 2a1dba2 | 2007-10-17 01:10:40 +0200 | [diff] [blame] | 420 | config MTD_NAND_ORION |
| 421 | tristate "NAND Flash support for Marvell Orion SoC" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 422 | depends on PLAT_ORION |
Tzachi Perelstein | 2a1dba2 | 2007-10-17 01:10:40 +0200 | [diff] [blame] | 423 | help |
| 424 | This enables the NAND flash controller on Orion machines. |
| 425 | |
| 426 | No board specific support is done by this driver, each board |
| 427 | must advertise a platform_device for the driver to attach. |
| 428 | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 429 | config MTD_NAND_FSL_ELBC |
| 430 | tristate "NAND support for Freescale eLBC controllers" |
Andrey Smirnov | 107896c | 2016-07-21 14:59:18 -0700 | [diff] [blame] | 431 | depends on FSL_SOC |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 432 | select FSL_LBC |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 433 | help |
| 434 | Various Freescale chips, including the 8313, include a NAND Flash |
| 435 | Controller Module with built-in hardware ECC capabilities. |
| 436 | Enabling this option will enable you to use this to control |
| 437 | external NAND devices. |
| 438 | |
Prabhakar Kushwaha | 8277188 | 2012-03-15 11:04:23 +0530 | [diff] [blame] | 439 | config MTD_NAND_FSL_IFC |
| 440 | tristate "NAND support for Freescale IFC controller" |
Andrey Smirnov | 75c19e5 | 2016-07-21 14:59:19 -0700 | [diff] [blame] | 441 | depends on FSL_SOC || ARCH_LAYERSCAPE |
Prabhakar Kushwaha | 8277188 | 2012-03-15 11:04:23 +0530 | [diff] [blame] | 442 | select FSL_IFC |
Paul Gortmaker | 42d87b1 | 2014-02-19 17:46:40 -0500 | [diff] [blame] | 443 | select MEMORY |
Prabhakar Kushwaha | 8277188 | 2012-03-15 11:04:23 +0530 | [diff] [blame] | 444 | help |
| 445 | Various Freescale chips e.g P1010, include a NAND Flash machine |
| 446 | with built-in hardware ECC capabilities. |
| 447 | Enabling this option will enable you to use this to control |
| 448 | external NAND devices. |
| 449 | |
Anton Vorontsov | 5c249c5 | 2008-03-11 22:33:13 +0300 | [diff] [blame] | 450 | config MTD_NAND_FSL_UPM |
| 451 | tristate "Support for NAND on Freescale UPM" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 452 | depends on PPC_83xx || PPC_85xx |
Anton Vorontsov | 5c249c5 | 2008-03-11 22:33:13 +0300 | [diff] [blame] | 453 | select FSL_LBC |
| 454 | help |
| 455 | Enables support for NAND Flash chips wired onto Freescale PowerPC |
| 456 | processor localbus with User-Programmable Machine support. |
| 457 | |
Anatolij Gustschin | bb315f7 | 2010-02-15 18:35:05 +0100 | [diff] [blame] | 458 | config MTD_NAND_MPC5121_NFC |
| 459 | tristate "MPC5121 built-in NAND Flash Controller support" |
| 460 | depends on PPC_MPC512x |
| 461 | help |
| 462 | This enables the driver for the NAND flash controller on the |
| 463 | MPC5121 SoC. |
| 464 | |
Stefan Agner | 456930d | 2015-09-02 18:06:33 -0700 | [diff] [blame] | 465 | config MTD_NAND_VF610_NFC |
| 466 | tristate "Support for Freescale NFC for VF610/MPC5125" |
| 467 | depends on (SOC_VF610 || COMPILE_TEST) |
Richard Weinberger | 15c0be7 | 2016-01-25 23:24:10 +0100 | [diff] [blame] | 468 | depends on HAS_IOMEM |
Stefan Agner | 456930d | 2015-09-02 18:06:33 -0700 | [diff] [blame] | 469 | help |
| 470 | Enables support for NAND Flash Controller on some Freescale |
| 471 | processors like the VF610, MPC5125, MCF54418 or Kinetis K70. |
Stefan Agner | 049f425 | 2015-09-02 18:06:34 -0700 | [diff] [blame] | 472 | The driver supports a maximum 2k page size. With 2k pages and |
| 473 | 64 bytes or more of OOB, hardware ECC with up to 32-bit error |
| 474 | correction is supported. Hardware ECC is only enabled through |
| 475 | device tree. |
Stefan Agner | 456930d | 2015-09-02 18:06:33 -0700 | [diff] [blame] | 476 | |
Sascha Hauer | 34f6e15 | 2008-09-02 17:16:59 +0200 | [diff] [blame] | 477 | config MTD_NAND_MXC |
| 478 | tristate "MXC NAND support" |
Fabio Estevam | 4d363b5 | 2012-07-02 19:00:19 -0300 | [diff] [blame] | 479 | depends on ARCH_MXC |
Sascha Hauer | 34f6e15 | 2008-09-02 17:16:59 +0200 | [diff] [blame] | 480 | help |
| 481 | This enables the driver for the NAND flash controller on the |
| 482 | MXC processors. |
| 483 | |
Yoshihiro Shimoda | 6028aa0 | 2008-10-14 21:23:26 +0900 | [diff] [blame] | 484 | config MTD_NAND_SH_FLCTL |
| 485 | tristate "Support for NAND on Renesas SuperH FLCTL" |
Geert Uytterhoeven | d5c5620 | 2015-12-08 18:40:59 +0100 | [diff] [blame] | 486 | depends on SUPERH || COMPILE_TEST |
Richard Weinberger | 3d44dc2 | 2014-01-31 13:39:07 +0100 | [diff] [blame] | 487 | depends on HAS_IOMEM |
| 488 | depends on HAS_DMA |
Yoshihiro Shimoda | 6028aa0 | 2008-10-14 21:23:26 +0900 | [diff] [blame] | 489 | help |
| 490 | Several Renesas SuperH CPU has FLCTL. This option enables support |
Magnus Damm | b79c7ad | 2010-02-02 13:01:25 +0900 | [diff] [blame] | 491 | for NAND Flash using FLCTL. |
Yoshihiro Shimoda | 6028aa0 | 2008-10-14 21:23:26 +0900 | [diff] [blame] | 492 | |
David Brownell | ff4569c | 2009-03-04 12:01:37 -0800 | [diff] [blame] | 493 | config MTD_NAND_DAVINCI |
Ivan Khoronzhuk | 458f393 | 2013-12-17 15:38:12 +0200 | [diff] [blame] | 494 | tristate "Support NAND on DaVinci/Keystone SoC" |
| 495 | depends on ARCH_DAVINCI || (ARCH_KEYSTONE && TI_AEMIF) |
David Brownell | ff4569c | 2009-03-04 12:01:37 -0800 | [diff] [blame] | 496 | help |
| 497 | Enable the driver for NAND flash chips on Texas Instruments |
Ivan Khoronzhuk | 458f393 | 2013-12-17 15:38:12 +0200 | [diff] [blame] | 498 | DaVinci/Keystone processors. |
David Brownell | ff4569c | 2009-03-04 12:01:37 -0800 | [diff] [blame] | 499 | |
Atsushi Nemoto | 64fb65b | 2009-03-04 12:01:34 -0800 | [diff] [blame] | 500 | config MTD_NAND_TXX9NDFMC |
| 501 | tristate "NAND Flash support for TXx9 SoC" |
| 502 | depends on SOC_TX4938 || SOC_TX4939 |
| 503 | help |
| 504 | This enables the NAND flash controller on the TXx9 SoCs. |
| 505 | |
Wolfgang Grandegger | 1b57819 | 2009-03-25 11:48:38 +0100 | [diff] [blame] | 506 | config MTD_NAND_SOCRATES |
| 507 | tristate "Support for NAND on Socrates board" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 508 | depends on SOCRATES |
Wolfgang Grandegger | 1b57819 | 2009-03-25 11:48:38 +0100 | [diff] [blame] | 509 | help |
| 510 | Enables support for NAND Flash chips wired onto Socrates board. |
| 511 | |
David Woodhouse | bb6a7755 | 2010-01-01 12:16:47 +0000 | [diff] [blame] | 512 | config MTD_NAND_NUC900 |
| 513 | tristate "Support for NAND on Nuvoton NUC9xx/w90p910 evaluation boards." |
Jamie Iles | 6a8a98b | 2011-05-23 10:23:43 +0100 | [diff] [blame] | 514 | depends on ARCH_W90X900 |
Wan ZongShun | 8bff82c | 2009-07-10 15:17:27 +0800 | [diff] [blame] | 515 | help |
| 516 | This enables the driver for the NAND Flash on evaluation board based |
David Woodhouse | bb6a7755 | 2010-01-01 12:16:47 +0000 | [diff] [blame] | 517 | on w90p910 / NUC9xx. |
Wan ZongShun | 8bff82c | 2009-07-10 15:17:27 +0800 | [diff] [blame] | 518 | |
Lars-Peter Clausen | ba01d6e | 2010-07-17 11:15:29 +0000 | [diff] [blame] | 519 | config MTD_NAND_JZ4740 |
| 520 | tristate "Support for JZ4740 SoC NAND controller" |
| 521 | depends on MACH_JZ4740 |
| 522 | help |
| 523 | Enables support for NAND Flash on JZ4740 SoC based boards. |
| 524 | |
Alex Smith | ae02ab0 | 2016-01-04 12:34:43 +0000 | [diff] [blame] | 525 | config MTD_NAND_JZ4780 |
| 526 | tristate "Support for NAND on JZ4780 SoC" |
| 527 | depends on MACH_JZ4780 && JZ4780_NEMC |
| 528 | help |
| 529 | Enables support for NAND Flash connected to the NEMC on JZ4780 SoC |
| 530 | based boards, using the BCH controller for hardware error correction. |
| 531 | |
Linus Walleij | 6c009ab | 2010-09-13 00:35:22 +0200 | [diff] [blame] | 532 | config MTD_NAND_FSMC |
| 533 | tristate "Support for NAND on ST Micros FSMC" |
Linus Walleij | 694e33a | 2012-10-18 14:01:25 +0200 | [diff] [blame] | 534 | depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || MACH_U300 |
Linus Walleij | 6c009ab | 2010-09-13 00:35:22 +0200 | [diff] [blame] | 535 | help |
| 536 | Enables support for NAND Flash chips on the ST Microelectronics |
| 537 | Flexible Static Memory Controller (FSMC) |
| 538 | |
John Crispin | 99f2b10 | 2012-08-23 20:28:32 +0200 | [diff] [blame] | 539 | config MTD_NAND_XWAY |
Hauke Mehrtens | c8dce6e | 2016-12-05 22:14:36 +0100 | [diff] [blame] | 540 | bool "Support for NAND on Lantiq XWAY SoC" |
John Crispin | 99f2b10 | 2012-08-23 20:28:32 +0200 | [diff] [blame] | 541 | depends on LANTIQ && SOC_TYPE_XWAY |
John Crispin | 99f2b10 | 2012-08-23 20:28:32 +0200 | [diff] [blame] | 542 | help |
| 543 | Enables support for NAND Flash chips on Lantiq XWAY SoCs. NAND is attached |
| 544 | to the External Bus Unit (EBU). |
| 545 | |
Boris BREZILLON | 1fef62c | 2014-10-21 15:08:41 +0200 | [diff] [blame] | 546 | config MTD_NAND_SUNXI |
| 547 | tristate "Support for NAND on Allwinner SoCs" |
| 548 | depends on ARCH_SUNXI |
| 549 | help |
| 550 | Enables support for NAND Flash chips on Allwinner SoCs. |
| 551 | |
Zhou Wang | 54f531f | 2015-01-25 18:53:13 +0800 | [diff] [blame] | 552 | config MTD_NAND_HISI504 |
| 553 | tristate "Support for NAND controller on Hisilicon SoC Hip04" |
Geert Uytterhoeven | 5e0899d | 2015-03-01 10:35:52 +0100 | [diff] [blame] | 554 | depends on HAS_DMA |
Zhou Wang | 54f531f | 2015-01-25 18:53:13 +0800 | [diff] [blame] | 555 | help |
| 556 | Enables support for NAND controller on Hisilicon SoC Hip04. |
| 557 | |
Archit Taneja | c76b78d | 2016-02-03 14:29:50 +0530 | [diff] [blame] | 558 | config MTD_NAND_QCOM |
| 559 | tristate "Support for NAND on QCOM SoCs" |
| 560 | depends on ARCH_QCOM |
| 561 | help |
| 562 | Enables support for NAND flash chips on SoCs containing the EBI2 NAND |
| 563 | controller. This controller is found on IPQ806x SoC. |
| 564 | |
Jorge Ramirez-Ortiz | 1d6b1e4 | 2016-06-14 11:50:51 -0400 | [diff] [blame] | 565 | config MTD_NAND_MTK |
| 566 | tristate "Support for NAND controller on MTK SoCs" |
| 567 | depends on HAS_DMA |
| 568 | help |
| 569 | Enables support for NAND controller on MTK SoCs. |
| 570 | This controller is found on mt27xx, mt81xx, mt65xx SoCs. |
| 571 | |
Jan Engelhardt | ec98c68 | 2007-04-19 16:21:41 -0500 | [diff] [blame] | 572 | endif # MTD_NAND |