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Bryan Wue190d6b2007-07-17 14:43:44 +08001/*
Mike Frysinger2fb9d6f2008-01-30 16:52:24 +08002 * Blackfin On-Chip MAC Driver
Bryan Wue190d6b2007-07-17 14:43:44 +08003 *
Sonic Zhang02460d02010-06-11 10:44:22 +00004 * Copyright 2004-2010 Analog Devices Inc.
Bryan Wue190d6b2007-07-17 14:43:44 +08005 *
Mike Frysinger2fb9d6f2008-01-30 16:52:24 +08006 * Enter bugs at http://blackfin.uclinux.org/
Bryan Wue190d6b2007-07-17 14:43:44 +08007 *
Mike Frysinger2fb9d6f2008-01-30 16:52:24 +08008 * Licensed under the GPL-2 or later.
Bryan Wue190d6b2007-07-17 14:43:44 +08009 */
10
Mike Frysingerc6dd5092011-01-10 02:54:29 +000011#define DRV_VERSION "1.1"
12#define DRV_DESC "Blackfin on-chip Ethernet MAC driver"
13
14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
Bryan Wue190d6b2007-07-17 14:43:44 +080016#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/slab.h>
21#include <linux/delay.h>
22#include <linux/timer.h>
23#include <linux/errno.h>
24#include <linux/irq.h>
25#include <linux/io.h>
26#include <linux/ioport.h>
27#include <linux/crc32.h>
28#include <linux/device.h>
29#include <linux/spinlock.h>
Bryan Wue190d6b2007-07-17 14:43:44 +080030#include <linux/mii.h>
Bryan Wue190d6b2007-07-17 14:43:44 +080031#include <linux/netdevice.h>
32#include <linux/etherdevice.h>
Bryan Wu679dce32008-04-25 11:53:11 +080033#include <linux/ethtool.h>
Bryan Wue190d6b2007-07-17 14:43:44 +080034#include <linux/skbuff.h>
Bryan Wue190d6b2007-07-17 14:43:44 +080035#include <linux/platform_device.h>
Bryan Wue190d6b2007-07-17 14:43:44 +080036
37#include <asm/dma.h>
38#include <linux/dma-mapping.h>
39
Barry Songfe92afe2010-05-17 17:19:40 -070040#include <asm/div64.h>
Mike Frysinger98f672c2010-01-18 21:14:12 +000041#include <asm/dpmc.h>
Bryan Wue190d6b2007-07-17 14:43:44 +080042#include <asm/blackfin.h>
43#include <asm/cacheflush.h>
44#include <asm/portmux.h>
David Howells3dcc1e72010-10-07 14:08:49 +010045#include <mach/pll.h>
Bryan Wue190d6b2007-07-17 14:43:44 +080046
47#include "bfin_mac.h"
48
Mike Frysingerc6dd5092011-01-10 02:54:29 +000049MODULE_AUTHOR("Bryan Wu, Luke Yang");
Bryan Wue190d6b2007-07-17 14:43:44 +080050MODULE_LICENSE("GPL");
51MODULE_DESCRIPTION(DRV_DESC);
Kay Sievers72abb462008-04-18 13:50:44 -070052MODULE_ALIAS("platform:bfin_mac");
Bryan Wue190d6b2007-07-17 14:43:44 +080053
54#if defined(CONFIG_BFIN_MAC_USE_L1)
Sonic Zhang118133e2011-06-16 12:31:58 +000055# define bfin_mac_alloc(dma_handle, size, num) l1_data_sram_zalloc(size*num)
56# define bfin_mac_free(dma_handle, ptr, num) l1_data_sram_free(ptr)
Bryan Wue190d6b2007-07-17 14:43:44 +080057#else
Sonic Zhang118133e2011-06-16 12:31:58 +000058# define bfin_mac_alloc(dma_handle, size, num) \
59 dma_alloc_coherent(NULL, size*num, dma_handle, GFP_KERNEL)
60# define bfin_mac_free(dma_handle, ptr, num) \
61 dma_free_coherent(NULL, sizeof(*ptr)*num, ptr, dma_handle)
Bryan Wue190d6b2007-07-17 14:43:44 +080062#endif
63
64#define PKT_BUF_SZ 1580
65
66#define MAX_TIMEOUT_CNT 500
67
68/* pointers to maintain transmit list */
69static struct net_dma_desc_tx *tx_list_head;
70static struct net_dma_desc_tx *tx_list_tail;
71static struct net_dma_desc_rx *rx_list_head;
72static struct net_dma_desc_rx *rx_list_tail;
73static struct net_dma_desc_rx *current_rx_ptr;
74static struct net_dma_desc_tx *current_tx_ptr;
75static struct net_dma_desc_tx *tx_desc;
76static struct net_dma_desc_rx *rx_desc;
77
78static void desc_list_free(void)
79{
80 struct net_dma_desc_rx *r;
81 struct net_dma_desc_tx *t;
82 int i;
83#if !defined(CONFIG_BFIN_MAC_USE_L1)
84 dma_addr_t dma_handle = 0;
85#endif
86
87 if (tx_desc) {
88 t = tx_list_head;
89 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
90 if (t) {
91 if (t->skb) {
92 dev_kfree_skb(t->skb);
93 t->skb = NULL;
94 }
95 t = t->next;
96 }
97 }
Sonic Zhang118133e2011-06-16 12:31:58 +000098 bfin_mac_free(dma_handle, tx_desc, CONFIG_BFIN_TX_DESC_NUM);
Bryan Wue190d6b2007-07-17 14:43:44 +080099 }
100
101 if (rx_desc) {
102 r = rx_list_head;
103 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
104 if (r) {
105 if (r->skb) {
106 dev_kfree_skb(r->skb);
107 r->skb = NULL;
108 }
109 r = r->next;
110 }
111 }
Sonic Zhang118133e2011-06-16 12:31:58 +0000112 bfin_mac_free(dma_handle, rx_desc, CONFIG_BFIN_RX_DESC_NUM);
Bryan Wue190d6b2007-07-17 14:43:44 +0800113 }
114}
115
Pradeep A. Dalvi1ab0d2e2012-02-06 11:16:48 +0000116static int desc_list_init(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +0800117{
118 int i;
119 struct sk_buff *new_skb;
120#if !defined(CONFIG_BFIN_MAC_USE_L1)
121 /*
122 * This dma_handle is useless in Blackfin dma_alloc_coherent().
123 * The real dma handler is the return value of dma_alloc_coherent().
124 */
125 dma_addr_t dma_handle;
126#endif
127
128 tx_desc = bfin_mac_alloc(&dma_handle,
Sonic Zhang118133e2011-06-16 12:31:58 +0000129 sizeof(struct net_dma_desc_tx),
Bryan Wue190d6b2007-07-17 14:43:44 +0800130 CONFIG_BFIN_TX_DESC_NUM);
131 if (tx_desc == NULL)
132 goto init_error;
133
134 rx_desc = bfin_mac_alloc(&dma_handle,
Sonic Zhang118133e2011-06-16 12:31:58 +0000135 sizeof(struct net_dma_desc_rx),
Bryan Wue190d6b2007-07-17 14:43:44 +0800136 CONFIG_BFIN_RX_DESC_NUM);
137 if (rx_desc == NULL)
138 goto init_error;
139
140 /* init tx_list */
141 tx_list_head = tx_list_tail = tx_desc;
142
143 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
144 struct net_dma_desc_tx *t = tx_desc + i;
145 struct dma_descriptor *a = &(t->desc_a);
146 struct dma_descriptor *b = &(t->desc_b);
147
148 /*
149 * disable DMA
150 * read from memory WNR = 0
151 * wordsize is 32 bits
152 * 6 half words is desc size
153 * large desc flow
154 */
155 a->config = WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
156 a->start_addr = (unsigned long)t->packet;
157 a->x_count = 0;
158 a->next_dma_desc = b;
159
160 /*
161 * enabled DMA
162 * write to memory WNR = 1
163 * wordsize is 32 bits
164 * disable interrupt
165 * 6 half words is desc size
166 * large desc flow
167 */
168 b->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
169 b->start_addr = (unsigned long)(&(t->status));
170 b->x_count = 0;
171
172 t->skb = NULL;
173 tx_list_tail->desc_b.next_dma_desc = a;
174 tx_list_tail->next = t;
175 tx_list_tail = t;
176 }
177 tx_list_tail->next = tx_list_head; /* tx_list is a circle */
178 tx_list_tail->desc_b.next_dma_desc = &(tx_list_head->desc_a);
179 current_tx_ptr = tx_list_head;
180
181 /* init rx_list */
182 rx_list_head = rx_list_tail = rx_desc;
183
184 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
185 struct net_dma_desc_rx *r = rx_desc + i;
186 struct dma_descriptor *a = &(r->desc_a);
187 struct dma_descriptor *b = &(r->desc_b);
188
189 /* allocate a new skb for next time receive */
Pradeep A. Dalvi1ab0d2e2012-02-06 11:16:48 +0000190 new_skb = netdev_alloc_skb(dev, PKT_BUF_SZ + NET_IP_ALIGN);
Joe Perches720a43e2013-03-08 15:03:25 +0000191 if (!new_skb)
Bryan Wue190d6b2007-07-17 14:43:44 +0800192 goto init_error;
Joe Perches720a43e2013-03-08 15:03:25 +0000193
Michael Hennerich015dac82009-05-29 03:41:15 +0000194 skb_reserve(new_skb, NET_IP_ALIGN);
Sonic Zhangf6e1e4f2010-05-10 05:39:08 +0000195 /* Invidate the data cache of skb->data range when it is write back
196 * cache. It will prevent overwritting the new data from DMA
197 */
198 blackfin_dcache_invalidate_range((unsigned long)new_skb->head,
199 (unsigned long)new_skb->end);
Bryan Wue190d6b2007-07-17 14:43:44 +0800200 r->skb = new_skb;
201
202 /*
203 * enabled DMA
204 * write to memory WNR = 1
205 * wordsize is 32 bits
206 * disable interrupt
207 * 6 half words is desc size
208 * large desc flow
209 */
210 a->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
211 /* since RXDWA is enabled */
212 a->start_addr = (unsigned long)new_skb->data - 2;
213 a->x_count = 0;
214 a->next_dma_desc = b;
215
216 /*
217 * enabled DMA
218 * write to memory WNR = 1
219 * wordsize is 32 bits
220 * enable interrupt
221 * 6 half words is desc size
222 * large desc flow
223 */
224 b->config = DMAEN | WNR | WDSIZE_32 | DI_EN |
225 NDSIZE_6 | DMAFLOW_LARGE;
226 b->start_addr = (unsigned long)(&(r->status));
227 b->x_count = 0;
228
229 rx_list_tail->desc_b.next_dma_desc = a;
230 rx_list_tail->next = r;
231 rx_list_tail = r;
232 }
233 rx_list_tail->next = rx_list_head; /* rx_list is a circle */
234 rx_list_tail->desc_b.next_dma_desc = &(rx_list_head->desc_a);
235 current_rx_ptr = rx_list_head;
236
237 return 0;
238
239init_error:
240 desc_list_free();
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000241 pr_err("kmalloc failed\n");
Bryan Wue190d6b2007-07-17 14:43:44 +0800242 return -ENOMEM;
243}
244
245
246/*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
247
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800248/*
249 * MII operations
250 */
Bryan Wue190d6b2007-07-17 14:43:44 +0800251/* Wait until the previous MDC/MDIO transaction has completed */
Mike Frysinger2bfa0f02010-05-10 05:39:13 +0000252static int bfin_mdio_poll(void)
Bryan Wue190d6b2007-07-17 14:43:44 +0800253{
254 int timeout_cnt = MAX_TIMEOUT_CNT;
255
256 /* poll the STABUSY bit */
257 while ((bfin_read_EMAC_STAADD()) & STABUSY) {
Bryan Wu6db9e462008-01-30 16:52:21 +0800258 udelay(1);
Bryan Wue190d6b2007-07-17 14:43:44 +0800259 if (timeout_cnt-- < 0) {
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000260 pr_err("wait MDC/MDIO transaction to complete timeout\n");
Mike Frysinger2bfa0f02010-05-10 05:39:13 +0000261 return -ETIMEDOUT;
Bryan Wue190d6b2007-07-17 14:43:44 +0800262 }
263 }
Mike Frysinger2bfa0f02010-05-10 05:39:13 +0000264
265 return 0;
Bryan Wue190d6b2007-07-17 14:43:44 +0800266}
267
268/* Read an off-chip register in a PHY through the MDC/MDIO port */
Adrian Bunk0ed0563e2008-10-12 21:15:17 -0700269static int bfin_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
Bryan Wue190d6b2007-07-17 14:43:44 +0800270{
Mike Frysinger2bfa0f02010-05-10 05:39:13 +0000271 int ret;
272
273 ret = bfin_mdio_poll();
274 if (ret)
275 return ret;
Bryan Wue190d6b2007-07-17 14:43:44 +0800276
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800277 /* read mode */
278 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
279 SET_REGAD((u16) regnum) |
280 STABUSY);
281
Mike Frysinger2bfa0f02010-05-10 05:39:13 +0000282 ret = bfin_mdio_poll();
283 if (ret)
284 return ret;
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800285
286 return (int) bfin_read_EMAC_STADAT();
Bryan Wue190d6b2007-07-17 14:43:44 +0800287}
288
289/* Write an off-chip register in a PHY through the MDC/MDIO port */
Adrian Bunk0ed0563e2008-10-12 21:15:17 -0700290static int bfin_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
291 u16 value)
Bryan Wue190d6b2007-07-17 14:43:44 +0800292{
Mike Frysinger2bfa0f02010-05-10 05:39:13 +0000293 int ret;
294
295 ret = bfin_mdio_poll();
296 if (ret)
297 return ret;
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800298
299 bfin_write_EMAC_STADAT((u32) value);
Bryan Wue190d6b2007-07-17 14:43:44 +0800300
301 /* write mode */
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800302 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
303 SET_REGAD((u16) regnum) |
Bryan Wue190d6b2007-07-17 14:43:44 +0800304 STAOP |
305 STABUSY);
306
Mike Frysinger2bfa0f02010-05-10 05:39:13 +0000307 return bfin_mdio_poll();
Bryan Wue190d6b2007-07-17 14:43:44 +0800308}
309
Adrian Bunk0ed0563e2008-10-12 21:15:17 -0700310static int bfin_mdiobus_reset(struct mii_bus *bus)
Bryan Wue190d6b2007-07-17 14:43:44 +0800311{
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800312 return 0;
Bryan Wue190d6b2007-07-17 14:43:44 +0800313}
314
Bryan Wu7ef0a7e2008-04-25 11:53:10 +0800315static void bfin_mac_adjust_link(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +0800316{
Bryan Wu7ef0a7e2008-04-25 11:53:10 +0800317 struct bfin_mac_local *lp = netdev_priv(dev);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800318 struct phy_device *phydev = lp->phydev;
319 unsigned long flags;
320 int new_state = 0;
Bryan Wue190d6b2007-07-17 14:43:44 +0800321
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800322 spin_lock_irqsave(&lp->lock, flags);
323 if (phydev->link) {
324 /* Now we make sure that we can be in full duplex mode.
325 * If not, we operate in half-duplex mode. */
326 if (phydev->duplex != lp->old_duplex) {
327 u32 opmode = bfin_read_EMAC_OPMODE();
328 new_state = 1;
Bryan Wue190d6b2007-07-17 14:43:44 +0800329
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800330 if (phydev->duplex)
331 opmode |= FDMODE;
332 else
333 opmode &= ~(FDMODE);
Bryan Wue190d6b2007-07-17 14:43:44 +0800334
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800335 bfin_write_EMAC_OPMODE(opmode);
336 lp->old_duplex = phydev->duplex;
337 }
Bryan Wue190d6b2007-07-17 14:43:44 +0800338
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800339 if (phydev->speed != lp->old_speed) {
Sonic Zhang02460d02010-06-11 10:44:22 +0000340 if (phydev->interface == PHY_INTERFACE_MODE_RMII) {
341 u32 opmode = bfin_read_EMAC_OPMODE();
342 switch (phydev->speed) {
343 case 10:
344 opmode |= RMII_10;
345 break;
346 case 100:
347 opmode &= ~RMII_10;
348 break;
349 default:
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000350 netdev_warn(dev,
351 "Ack! Speed (%d) is not 10/100!\n",
352 phydev->speed);
Sonic Zhang02460d02010-06-11 10:44:22 +0000353 break;
354 }
355 bfin_write_EMAC_OPMODE(opmode);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800356 }
Bryan Wue190d6b2007-07-17 14:43:44 +0800357
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800358 new_state = 1;
359 lp->old_speed = phydev->speed;
360 }
Bryan Wue190d6b2007-07-17 14:43:44 +0800361
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800362 if (!lp->old_link) {
363 new_state = 1;
364 lp->old_link = 1;
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800365 }
366 } else if (lp->old_link) {
367 new_state = 1;
368 lp->old_link = 0;
369 lp->old_speed = 0;
370 lp->old_duplex = -1;
Bryan Wue190d6b2007-07-17 14:43:44 +0800371 }
372
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800373 if (new_state) {
374 u32 opmode = bfin_read_EMAC_OPMODE();
375 phy_print_status(phydev);
376 pr_debug("EMAC_OPMODE = 0x%08x\n", opmode);
Bryan Wue190d6b2007-07-17 14:43:44 +0800377 }
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800378
379 spin_unlock_irqrestore(&lp->lock, flags);
380}
381
Bryan Wu7cc8f382008-01-30 16:52:22 +0800382/* MDC = 2.5 MHz */
383#define MDC_CLK 2500000
384
Sonic Zhang02460d02010-06-11 10:44:22 +0000385static int mii_probe(struct net_device *dev, int phy_mode)
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800386{
Bryan Wu7ef0a7e2008-04-25 11:53:10 +0800387 struct bfin_mac_local *lp = netdev_priv(dev);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800388 struct phy_device *phydev = NULL;
389 unsigned short sysctl;
390 int i;
Bryan Wu7cc8f382008-01-30 16:52:22 +0800391 u32 sclk, mdc_div;
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800392
393 /* Enable PHY output early */
Mike Frysinger98f672c2010-01-18 21:14:12 +0000394 if (!(bfin_read_VR_CTL() & CLKBUFOE))
395 bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800396
Bryan Wu7cc8f382008-01-30 16:52:22 +0800397 sclk = get_sclk();
398 mdc_div = ((sclk / MDC_CLK) / 2) - 1;
399
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800400 sysctl = bfin_read_EMAC_SYSCTL();
Bryan Wu9dc7f302008-01-30 16:52:28 +0800401 sysctl = (sysctl & ~MDCDIV) | SET_MDCDIV(mdc_div);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800402 bfin_write_EMAC_SYSCTL(sysctl);
403
Sonic Zhang02460d02010-06-11 10:44:22 +0000404 /* search for connected PHY device */
405 for (i = 0; i < PHY_MAX_ADDR; ++i) {
Lennert Buytenhek298cf9be2008-10-08 16:29:57 -0700406 struct phy_device *const tmp_phydev = lp->mii_bus->phy_map[i];
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800407
408 if (!tmp_phydev)
409 continue; /* no PHY here... */
410
411 phydev = tmp_phydev;
412 break; /* found it */
413 }
414
415 /* now we are supposed to have a proper phydev, to attach to... */
416 if (!phydev) {
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000417 netdev_err(dev, "no phy device found\n");
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800418 return -ENODEV;
419 }
420
Sonic Zhang02460d02010-06-11 10:44:22 +0000421 if (phy_mode != PHY_INTERFACE_MODE_RMII &&
422 phy_mode != PHY_INTERFACE_MODE_MII) {
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000423 netdev_err(dev, "invalid phy interface mode\n");
Sonic Zhang02460d02010-06-11 10:44:22 +0000424 return -EINVAL;
425 }
426
Florian Fainellif9a8f832013-01-14 00:52:52 +0000427 phydev = phy_connect(dev, dev_name(&phydev->dev),
428 &bfin_mac_adjust_link, phy_mode);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800429
430 if (IS_ERR(phydev)) {
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000431 netdev_err(dev, "could not attach PHY\n");
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800432 return PTR_ERR(phydev);
433 }
434
435 /* mask with MAC supported features */
436 phydev->supported &= (SUPPORTED_10baseT_Half
437 | SUPPORTED_10baseT_Full
438 | SUPPORTED_100baseT_Half
439 | SUPPORTED_100baseT_Full
440 | SUPPORTED_Autoneg
441 | SUPPORTED_Pause | SUPPORTED_Asym_Pause
442 | SUPPORTED_MII
443 | SUPPORTED_TP);
444
445 phydev->advertising = phydev->supported;
446
447 lp->old_link = 0;
448 lp->old_speed = 0;
449 lp->old_duplex = -1;
450 lp->phydev = phydev;
451
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000452 pr_info("attached PHY driver [%s] "
453 "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)@sclk=%dMHz)\n",
454 phydev->drv->name, dev_name(&phydev->dev), phydev->irq,
455 MDC_CLK, mdc_div, sclk/1000000);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800456
457 return 0;
Bryan Wue190d6b2007-07-17 14:43:44 +0800458}
459
Bryan Wu679dce32008-04-25 11:53:11 +0800460/*
461 * Ethtool support
462 */
463
Michael Hennerich53fd3f22010-05-10 05:39:11 +0000464/*
465 * interrupt routine for magic packet wakeup
466 */
467static irqreturn_t bfin_mac_wake_interrupt(int irq, void *dev_id)
468{
469 return IRQ_HANDLED;
470}
471
Bryan Wu679dce32008-04-25 11:53:11 +0800472static int
473bfin_mac_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
474{
475 struct bfin_mac_local *lp = netdev_priv(dev);
476
477 if (lp->phydev)
478 return phy_ethtool_gset(lp->phydev, cmd);
479
480 return -EINVAL;
481}
482
483static int
484bfin_mac_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
485{
486 struct bfin_mac_local *lp = netdev_priv(dev);
487
488 if (!capable(CAP_NET_ADMIN))
489 return -EPERM;
490
491 if (lp->phydev)
492 return phy_ethtool_sset(lp->phydev, cmd);
493
494 return -EINVAL;
495}
496
497static void bfin_mac_ethtool_getdrvinfo(struct net_device *dev,
498 struct ethtool_drvinfo *info)
499{
Jiri Pirko7826d432013-01-06 00:44:26 +0000500 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
501 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
502 strlcpy(info->fw_version, "N/A", sizeof(info->fw_version));
503 strlcpy(info->bus_info, dev_name(&dev->dev), sizeof(info->bus_info));
Bryan Wu679dce32008-04-25 11:53:11 +0800504}
505
Michael Hennerich53fd3f22010-05-10 05:39:11 +0000506static void bfin_mac_ethtool_getwol(struct net_device *dev,
507 struct ethtool_wolinfo *wolinfo)
508{
509 struct bfin_mac_local *lp = netdev_priv(dev);
510
511 wolinfo->supported = WAKE_MAGIC;
512 wolinfo->wolopts = lp->wol;
513}
514
515static int bfin_mac_ethtool_setwol(struct net_device *dev,
516 struct ethtool_wolinfo *wolinfo)
517{
518 struct bfin_mac_local *lp = netdev_priv(dev);
519 int rc;
520
521 if (wolinfo->wolopts & (WAKE_MAGICSECURE |
522 WAKE_UCAST |
523 WAKE_MCAST |
524 WAKE_BCAST |
525 WAKE_ARP))
526 return -EOPNOTSUPP;
527
528 lp->wol = wolinfo->wolopts;
529
530 if (lp->wol && !lp->irq_wake_requested) {
531 /* register wake irq handler */
532 rc = request_irq(IRQ_MAC_WAKEDET, bfin_mac_wake_interrupt,
533 IRQF_DISABLED, "EMAC_WAKE", dev);
534 if (rc)
535 return rc;
536 lp->irq_wake_requested = true;
537 }
538
539 if (!lp->wol && lp->irq_wake_requested) {
540 free_irq(IRQ_MAC_WAKEDET, dev);
541 lp->irq_wake_requested = false;
542 }
543
544 /* Make sure the PHY driver doesn't suspend */
545 device_init_wakeup(&dev->dev, lp->wol);
546
547 return 0;
548}
549
Richard Cochran85c153d2012-10-31 06:27:22 +0000550#ifdef CONFIG_BFIN_MAC_USE_HWSTAMP
Richard Cochrana85bbdd2012-04-03 22:59:20 +0000551static int bfin_mac_ethtool_get_ts_info(struct net_device *dev,
David S. Miller3ffa4292012-04-06 00:17:50 -0400552 struct ethtool_ts_info *info)
Richard Cochrana85bbdd2012-04-03 22:59:20 +0000553{
Richard Cochrandd87b222012-10-31 06:27:24 +0000554 struct bfin_mac_local *lp = netdev_priv(dev);
555
Richard Cochrana85bbdd2012-04-03 22:59:20 +0000556 info->so_timestamping =
557 SOF_TIMESTAMPING_TX_HARDWARE |
558 SOF_TIMESTAMPING_RX_HARDWARE |
Richard Cochranbc3c5f62012-10-31 06:27:23 +0000559 SOF_TIMESTAMPING_RAW_HARDWARE;
Richard Cochrandd87b222012-10-31 06:27:24 +0000560 info->phc_index = lp->phc_index;
Richard Cochrana85bbdd2012-04-03 22:59:20 +0000561 info->tx_types =
562 (1 << HWTSTAMP_TX_OFF) |
563 (1 << HWTSTAMP_TX_ON);
564 info->rx_filters =
565 (1 << HWTSTAMP_FILTER_NONE) |
566 (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
567 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
568 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT);
569 return 0;
570}
Richard Cochran85c153d2012-10-31 06:27:22 +0000571#endif
Richard Cochrana85bbdd2012-04-03 22:59:20 +0000572
Stephen Hemminger0fc0b732009-09-02 01:03:33 -0700573static const struct ethtool_ops bfin_mac_ethtool_ops = {
Bryan Wu679dce32008-04-25 11:53:11 +0800574 .get_settings = bfin_mac_ethtool_getsettings,
575 .set_settings = bfin_mac_ethtool_setsettings,
576 .get_link = ethtool_op_get_link,
577 .get_drvinfo = bfin_mac_ethtool_getdrvinfo,
Michael Hennerich53fd3f22010-05-10 05:39:11 +0000578 .get_wol = bfin_mac_ethtool_getwol,
579 .set_wol = bfin_mac_ethtool_setwol,
Richard Cochran85c153d2012-10-31 06:27:22 +0000580#ifdef CONFIG_BFIN_MAC_USE_HWSTAMP
Richard Cochrana85bbdd2012-04-03 22:59:20 +0000581 .get_ts_info = bfin_mac_ethtool_get_ts_info,
Richard Cochran85c153d2012-10-31 06:27:22 +0000582#endif
Bryan Wu679dce32008-04-25 11:53:11 +0800583};
584
Bryan Wue190d6b2007-07-17 14:43:44 +0800585/**************************************************************************/
Mike Frysinger5ca1bb52011-01-10 02:54:30 +0000586static void setup_system_regs(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +0800587{
Sonic Zhang02460d02010-06-11 10:44:22 +0000588 struct bfin_mac_local *lp = netdev_priv(dev);
589 int i;
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800590 unsigned short sysctl;
Bryan Wue190d6b2007-07-17 14:43:44 +0800591
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800592 /*
593 * Odd word alignment for Receive Frame DMA word
594 * Configure checksum support and rcve frame word alignment
595 */
596 sysctl = bfin_read_EMAC_SYSCTL();
Sonic Zhang02460d02010-06-11 10:44:22 +0000597 /*
598 * check if interrupt is requested for any PHY,
599 * enable PHY interrupt only if needed
600 */
601 for (i = 0; i < PHY_MAX_ADDR; ++i)
602 if (lp->mii_bus->irq[i] != PHY_POLL)
603 break;
604 if (i < PHY_MAX_ADDR)
605 sysctl |= PHYIE;
Bryan Wue190d6b2007-07-17 14:43:44 +0800606 sysctl |= RXDWA;
Sonic Zhang812a9de2010-05-10 05:39:10 +0000607#if defined(BFIN_MAC_CSUM_OFFLOAD)
608 sysctl |= RXCKS;
609#else
610 sysctl &= ~RXCKS;
Bryan Wue190d6b2007-07-17 14:43:44 +0800611#endif
612 bfin_write_EMAC_SYSCTL(sysctl);
Bryan Wue190d6b2007-07-17 14:43:44 +0800613
614 bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
615
Mike Frysingerc599bd62011-01-10 02:54:32 +0000616 /* Set vlan regs to let 1522 bytes long packets pass through */
617 bfin_write_EMAC_VLAN1(lp->vlan1_mask);
618 bfin_write_EMAC_VLAN2(lp->vlan2_mask);
619
Bryan Wue190d6b2007-07-17 14:43:44 +0800620 /* Initialize the TX DMA channel registers */
621 bfin_write_DMA2_X_COUNT(0);
622 bfin_write_DMA2_X_MODIFY(4);
623 bfin_write_DMA2_Y_COUNT(0);
624 bfin_write_DMA2_Y_MODIFY(0);
625
626 /* Initialize the RX DMA channel registers */
627 bfin_write_DMA1_X_COUNT(0);
628 bfin_write_DMA1_X_MODIFY(4);
629 bfin_write_DMA1_Y_COUNT(0);
630 bfin_write_DMA1_Y_MODIFY(0);
631}
632
Alex Landau73f83182007-09-19 23:14:18 +0800633static void setup_mac_addr(u8 *mac_addr)
Bryan Wue190d6b2007-07-17 14:43:44 +0800634{
635 u32 addr_low = le32_to_cpu(*(__le32 *) & mac_addr[0]);
636 u16 addr_hi = le16_to_cpu(*(__le16 *) & mac_addr[4]);
637
638 /* this depends on a little-endian machine */
639 bfin_write_EMAC_ADDRLO(addr_low);
640 bfin_write_EMAC_ADDRHI(addr_hi);
641}
642
Bryan Wu7ef0a7e2008-04-25 11:53:10 +0800643static int bfin_mac_set_mac_address(struct net_device *dev, void *p)
Alex Landau73f83182007-09-19 23:14:18 +0800644{
645 struct sockaddr *addr = p;
646 if (netif_running(dev))
647 return -EBUSY;
648 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
649 setup_mac_addr(dev->dev_addr);
650 return 0;
651}
652
Barry Songfe92afe2010-05-17 17:19:40 -0700653#ifdef CONFIG_BFIN_MAC_USE_HWSTAMP
654#define bfin_mac_hwtstamp_is_none(cfg) ((cfg) == HWTSTAMP_FILTER_NONE)
655
Richard Cochranbc3c5f62012-10-31 06:27:23 +0000656static u32 bfin_select_phc_clock(u32 input_clk, unsigned int *shift_result)
657{
658 u32 ipn = 1000000000UL / input_clk;
659 u32 ppn = 1;
660 unsigned int shift = 0;
661
662 while (ppn <= ipn) {
663 ppn <<= 1;
664 shift++;
665 }
666 *shift_result = shift;
667 return 1000000000UL / ppn;
668}
669
Barry Songfe92afe2010-05-17 17:19:40 -0700670static int bfin_mac_hwtstamp_ioctl(struct net_device *netdev,
671 struct ifreq *ifr, int cmd)
672{
673 struct hwtstamp_config config;
674 struct bfin_mac_local *lp = netdev_priv(netdev);
675 u16 ptpctl;
676 u32 ptpfv1, ptpfv2, ptpfv3, ptpfoff;
677
678 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
679 return -EFAULT;
680
681 pr_debug("%s config flag:0x%x, tx_type:0x%x, rx_filter:0x%x\n",
682 __func__, config.flags, config.tx_type, config.rx_filter);
683
684 /* reserved for future extensions */
685 if (config.flags)
686 return -EINVAL;
687
688 if ((config.tx_type != HWTSTAMP_TX_OFF) &&
689 (config.tx_type != HWTSTAMP_TX_ON))
690 return -ERANGE;
691
692 ptpctl = bfin_read_EMAC_PTP_CTL();
693
694 switch (config.rx_filter) {
695 case HWTSTAMP_FILTER_NONE:
696 /*
697 * Dont allow any timestamping
698 */
699 ptpfv3 = 0xFFFFFFFF;
700 bfin_write_EMAC_PTP_FV3(ptpfv3);
701 break;
702 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
703 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
704 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
705 /*
706 * Clear the five comparison mask bits (bits[12:8]) in EMAC_PTP_CTL)
707 * to enable all the field matches.
708 */
709 ptpctl &= ~0x1F00;
710 bfin_write_EMAC_PTP_CTL(ptpctl);
711 /*
712 * Keep the default values of the EMAC_PTP_FOFF register.
713 */
714 ptpfoff = 0x4A24170C;
715 bfin_write_EMAC_PTP_FOFF(ptpfoff);
716 /*
717 * Keep the default values of the EMAC_PTP_FV1 and EMAC_PTP_FV2
718 * registers.
719 */
720 ptpfv1 = 0x11040800;
721 bfin_write_EMAC_PTP_FV1(ptpfv1);
722 ptpfv2 = 0x0140013F;
723 bfin_write_EMAC_PTP_FV2(ptpfv2);
724 /*
725 * The default value (0xFFFC) allows the timestamping of both
726 * received Sync messages and Delay_Req messages.
727 */
728 ptpfv3 = 0xFFFFFFFC;
729 bfin_write_EMAC_PTP_FV3(ptpfv3);
730
731 config.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
732 break;
733 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
734 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
735 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
736 /* Clear all five comparison mask bits (bits[12:8]) in the
737 * EMAC_PTP_CTL register to enable all the field matches.
738 */
739 ptpctl &= ~0x1F00;
740 bfin_write_EMAC_PTP_CTL(ptpctl);
741 /*
742 * Keep the default values of the EMAC_PTP_FOFF register, except set
743 * the PTPCOF field to 0x2A.
744 */
745 ptpfoff = 0x2A24170C;
746 bfin_write_EMAC_PTP_FOFF(ptpfoff);
747 /*
748 * Keep the default values of the EMAC_PTP_FV1 and EMAC_PTP_FV2
749 * registers.
750 */
751 ptpfv1 = 0x11040800;
752 bfin_write_EMAC_PTP_FV1(ptpfv1);
753 ptpfv2 = 0x0140013F;
754 bfin_write_EMAC_PTP_FV2(ptpfv2);
755 /*
756 * To allow the timestamping of Pdelay_Req and Pdelay_Resp, set
757 * the value to 0xFFF0.
758 */
759 ptpfv3 = 0xFFFFFFF0;
760 bfin_write_EMAC_PTP_FV3(ptpfv3);
761
762 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
763 break;
764 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
765 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
766 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
767 /*
768 * Clear bits 8 and 12 of the EMAC_PTP_CTL register to enable only the
769 * EFTM and PTPCM field comparison.
770 */
771 ptpctl &= ~0x1100;
772 bfin_write_EMAC_PTP_CTL(ptpctl);
773 /*
774 * Keep the default values of all the fields of the EMAC_PTP_FOFF
775 * register, except set the PTPCOF field to 0x0E.
776 */
777 ptpfoff = 0x0E24170C;
778 bfin_write_EMAC_PTP_FOFF(ptpfoff);
779 /*
780 * Program bits [15:0] of the EMAC_PTP_FV1 register to 0x88F7, which
781 * corresponds to PTP messages on the MAC layer.
782 */
783 ptpfv1 = 0x110488F7;
784 bfin_write_EMAC_PTP_FV1(ptpfv1);
785 ptpfv2 = 0x0140013F;
786 bfin_write_EMAC_PTP_FV2(ptpfv2);
787 /*
788 * To allow the timestamping of Pdelay_Req and Pdelay_Resp
789 * messages, set the value to 0xFFF0.
790 */
791 ptpfv3 = 0xFFFFFFF0;
792 bfin_write_EMAC_PTP_FV3(ptpfv3);
793
794 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
795 break;
796 default:
797 return -ERANGE;
798 }
799
800 if (config.tx_type == HWTSTAMP_TX_OFF &&
801 bfin_mac_hwtstamp_is_none(config.rx_filter)) {
802 ptpctl &= ~PTP_EN;
803 bfin_write_EMAC_PTP_CTL(ptpctl);
804
805 SSYNC();
806 } else {
807 ptpctl |= PTP_EN;
808 bfin_write_EMAC_PTP_CTL(ptpctl);
809
810 /*
811 * clear any existing timestamp
812 */
813 bfin_read_EMAC_PTP_RXSNAPLO();
814 bfin_read_EMAC_PTP_RXSNAPHI();
815
816 bfin_read_EMAC_PTP_TXSNAPLO();
817 bfin_read_EMAC_PTP_TXSNAPHI();
818
Barry Songfe92afe2010-05-17 17:19:40 -0700819 SSYNC();
Barry Songfe92afe2010-05-17 17:19:40 -0700820 }
821
822 lp->stamp_cfg = config;
823 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
824 -EFAULT : 0;
825}
826
Barry Songfe92afe2010-05-17 17:19:40 -0700827static void bfin_tx_hwtstamp(struct net_device *netdev, struct sk_buff *skb)
828{
829 struct bfin_mac_local *lp = netdev_priv(netdev);
Barry Songfe92afe2010-05-17 17:19:40 -0700830
Oliver Hartkopp2244d072010-08-17 08:59:14 +0000831 if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
Barry Songfe92afe2010-05-17 17:19:40 -0700832 int timeout_cnt = MAX_TIMEOUT_CNT;
833
834 /* When doing time stamping, keep the connection to the socket
835 * a while longer
836 */
Oliver Hartkopp2244d072010-08-17 08:59:14 +0000837 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
Barry Songfe92afe2010-05-17 17:19:40 -0700838
839 /*
840 * The timestamping is done at the EMAC module's MII/RMII interface
841 * when the module sees the Start of Frame of an event message packet. This
842 * interface is the closest possible place to the physical Ethernet transmission
843 * medium, providing the best timing accuracy.
844 */
845 while ((!(bfin_read_EMAC_PTP_ISTAT() & TXTL)) && (--timeout_cnt))
846 udelay(1);
847 if (timeout_cnt == 0)
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000848 netdev_err(netdev, "timestamp the TX packet failed\n");
Barry Songfe92afe2010-05-17 17:19:40 -0700849 else {
850 struct skb_shared_hwtstamps shhwtstamps;
851 u64 ns;
852 u64 regval;
853
854 regval = bfin_read_EMAC_PTP_TXSNAPLO();
855 regval |= (u64)bfin_read_EMAC_PTP_TXSNAPHI() << 32;
856 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
Richard Cochranbc3c5f62012-10-31 06:27:23 +0000857 ns = regval << lp->shift;
Barry Songfe92afe2010-05-17 17:19:40 -0700858 shhwtstamps.hwtstamp = ns_to_ktime(ns);
Barry Songfe92afe2010-05-17 17:19:40 -0700859 skb_tstamp_tx(skb, &shhwtstamps);
Barry Songfe92afe2010-05-17 17:19:40 -0700860 }
861 }
862}
863
864static void bfin_rx_hwtstamp(struct net_device *netdev, struct sk_buff *skb)
865{
866 struct bfin_mac_local *lp = netdev_priv(netdev);
867 u32 valid;
868 u64 regval, ns;
869 struct skb_shared_hwtstamps *shhwtstamps;
870
871 if (bfin_mac_hwtstamp_is_none(lp->stamp_cfg.rx_filter))
872 return;
873
874 valid = bfin_read_EMAC_PTP_ISTAT() & RXEL;
875 if (!valid)
876 return;
877
878 shhwtstamps = skb_hwtstamps(skb);
879
880 regval = bfin_read_EMAC_PTP_RXSNAPLO();
881 regval |= (u64)bfin_read_EMAC_PTP_RXSNAPHI() << 32;
Richard Cochranbc3c5f62012-10-31 06:27:23 +0000882 ns = regval << lp->shift;
Barry Songfe92afe2010-05-17 17:19:40 -0700883 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
884 shhwtstamps->hwtstamp = ns_to_ktime(ns);
Barry Songfe92afe2010-05-17 17:19:40 -0700885}
886
Barry Songfe92afe2010-05-17 17:19:40 -0700887static void bfin_mac_hwtstamp_init(struct net_device *netdev)
888{
889 struct bfin_mac_local *lp = netdev_priv(netdev);
Richard Cochrandd87b222012-10-31 06:27:24 +0000890 u64 addend, ppb;
Richard Cochranbc3c5f62012-10-31 06:27:23 +0000891 u32 input_clk, phc_clk;
Barry Songfe92afe2010-05-17 17:19:40 -0700892
893 /* Initialize hardware timer */
Richard Cochranbc3c5f62012-10-31 06:27:23 +0000894 input_clk = get_sclk();
895 phc_clk = bfin_select_phc_clock(input_clk, &lp->shift);
896 addend = phc_clk * (1ULL << 32);
897 do_div(addend, input_clk);
898 bfin_write_EMAC_PTP_ADDEND((u32)addend);
Barry Songfe92afe2010-05-17 17:19:40 -0700899
Richard Cochranbc3c5f62012-10-31 06:27:23 +0000900 lp->addend = addend;
Richard Cochrandd87b222012-10-31 06:27:24 +0000901 ppb = 1000000000ULL * input_clk;
902 do_div(ppb, phc_clk);
903 lp->max_ppb = ppb - 1000000000ULL - 1ULL;
Barry Songfe92afe2010-05-17 17:19:40 -0700904
905 /* Initialize hwstamp config */
906 lp->stamp_cfg.rx_filter = HWTSTAMP_FILTER_NONE;
907 lp->stamp_cfg.tx_type = HWTSTAMP_TX_OFF;
908}
909
Richard Cochrandd87b222012-10-31 06:27:24 +0000910static u64 bfin_ptp_time_read(struct bfin_mac_local *lp)
911{
912 u64 ns;
913 u32 lo, hi;
914
915 lo = bfin_read_EMAC_PTP_TIMELO();
916 hi = bfin_read_EMAC_PTP_TIMEHI();
917
918 ns = ((u64) hi) << 32;
919 ns |= lo;
920 ns <<= lp->shift;
921
922 return ns;
923}
924
925static void bfin_ptp_time_write(struct bfin_mac_local *lp, u64 ns)
926{
927 u32 hi, lo;
928
929 ns >>= lp->shift;
930 hi = ns >> 32;
931 lo = ns & 0xffffffff;
932
933 bfin_write_EMAC_PTP_TIMELO(lo);
934 bfin_write_EMAC_PTP_TIMEHI(hi);
935}
936
937/* PTP Hardware Clock operations */
938
939static int bfin_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
940{
941 u64 adj;
942 u32 diff, addend;
943 int neg_adj = 0;
944 struct bfin_mac_local *lp =
945 container_of(ptp, struct bfin_mac_local, caps);
946
947 if (ppb < 0) {
948 neg_adj = 1;
949 ppb = -ppb;
950 }
951 addend = lp->addend;
952 adj = addend;
953 adj *= ppb;
954 diff = div_u64(adj, 1000000000ULL);
955
956 addend = neg_adj ? addend - diff : addend + diff;
957
958 bfin_write_EMAC_PTP_ADDEND(addend);
959
960 return 0;
961}
962
963static int bfin_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
964{
965 s64 now;
966 unsigned long flags;
967 struct bfin_mac_local *lp =
968 container_of(ptp, struct bfin_mac_local, caps);
969
970 spin_lock_irqsave(&lp->phc_lock, flags);
971
972 now = bfin_ptp_time_read(lp);
973 now += delta;
974 bfin_ptp_time_write(lp, now);
975
976 spin_unlock_irqrestore(&lp->phc_lock, flags);
977
978 return 0;
979}
980
981static int bfin_ptp_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
982{
983 u64 ns;
984 u32 remainder;
985 unsigned long flags;
986 struct bfin_mac_local *lp =
987 container_of(ptp, struct bfin_mac_local, caps);
988
989 spin_lock_irqsave(&lp->phc_lock, flags);
990
991 ns = bfin_ptp_time_read(lp);
992
993 spin_unlock_irqrestore(&lp->phc_lock, flags);
994
995 ts->tv_sec = div_u64_rem(ns, 1000000000, &remainder);
996 ts->tv_nsec = remainder;
997 return 0;
998}
999
1000static int bfin_ptp_settime(struct ptp_clock_info *ptp,
1001 const struct timespec *ts)
1002{
1003 u64 ns;
1004 unsigned long flags;
1005 struct bfin_mac_local *lp =
1006 container_of(ptp, struct bfin_mac_local, caps);
1007
1008 ns = ts->tv_sec * 1000000000ULL;
1009 ns += ts->tv_nsec;
1010
1011 spin_lock_irqsave(&lp->phc_lock, flags);
1012
1013 bfin_ptp_time_write(lp, ns);
1014
1015 spin_unlock_irqrestore(&lp->phc_lock, flags);
1016
1017 return 0;
1018}
1019
1020static int bfin_ptp_enable(struct ptp_clock_info *ptp,
1021 struct ptp_clock_request *rq, int on)
1022{
1023 return -EOPNOTSUPP;
1024}
1025
1026static struct ptp_clock_info bfin_ptp_caps = {
1027 .owner = THIS_MODULE,
1028 .name = "BF518 clock",
1029 .max_adj = 0,
1030 .n_alarm = 0,
1031 .n_ext_ts = 0,
1032 .n_per_out = 0,
1033 .pps = 0,
1034 .adjfreq = bfin_ptp_adjfreq,
1035 .adjtime = bfin_ptp_adjtime,
1036 .gettime = bfin_ptp_gettime,
1037 .settime = bfin_ptp_settime,
1038 .enable = bfin_ptp_enable,
1039};
1040
1041static int bfin_phc_init(struct net_device *netdev, struct device *dev)
1042{
1043 struct bfin_mac_local *lp = netdev_priv(netdev);
1044
1045 lp->caps = bfin_ptp_caps;
1046 lp->caps.max_adj = lp->max_ppb;
1047 lp->clock = ptp_clock_register(&lp->caps, dev);
1048 if (IS_ERR(lp->clock))
1049 return PTR_ERR(lp->clock);
1050
1051 lp->phc_index = ptp_clock_index(lp->clock);
1052 spin_lock_init(&lp->phc_lock);
1053
1054 return 0;
1055}
1056
1057static void bfin_phc_release(struct bfin_mac_local *lp)
1058{
1059 ptp_clock_unregister(lp->clock);
1060}
1061
Barry Songfe92afe2010-05-17 17:19:40 -07001062#else
1063# define bfin_mac_hwtstamp_is_none(cfg) 0
1064# define bfin_mac_hwtstamp_init(dev)
1065# define bfin_mac_hwtstamp_ioctl(dev, ifr, cmd) (-EOPNOTSUPP)
1066# define bfin_rx_hwtstamp(dev, skb)
1067# define bfin_tx_hwtstamp(dev, skb)
Richard Cochrandd87b222012-10-31 06:27:24 +00001068# define bfin_phc_init(netdev, dev) 0
1069# define bfin_phc_release(lp)
Barry Songfe92afe2010-05-17 17:19:40 -07001070#endif
1071
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001072static inline void _tx_reclaim_skb(void)
Bryan Wue190d6b2007-07-17 14:43:44 +08001073{
Bryan Wue190d6b2007-07-17 14:43:44 +08001074 do {
1075 tx_list_head->desc_a.config &= ~DMAEN;
1076 tx_list_head->status.status_word = 0;
1077 if (tx_list_head->skb) {
1078 dev_kfree_skb(tx_list_head->skb);
1079 tx_list_head->skb = NULL;
Bryan Wue190d6b2007-07-17 14:43:44 +08001080 }
1081 tx_list_head = tx_list_head->next;
Bryan Wue190d6b2007-07-17 14:43:44 +08001082
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001083 } while (tx_list_head->status.status_word != 0);
1084}
1085
1086static void tx_reclaim_skb(struct bfin_mac_local *lp)
1087{
1088 int timeout_cnt = MAX_TIMEOUT_CNT;
1089
1090 if (tx_list_head->status.status_word != 0)
1091 _tx_reclaim_skb();
1092
1093 if (current_tx_ptr->next == tx_list_head) {
1094 while (tx_list_head->status.status_word == 0) {
1095 /* slow down polling to avoid too many queue stop. */
1096 udelay(10);
1097 /* reclaim skb if DMA is not running. */
1098 if (!(bfin_read_DMA2_IRQ_STATUS() & DMA_RUN))
1099 break;
1100 if (timeout_cnt-- < 0)
1101 break;
1102 }
1103
1104 if (timeout_cnt >= 0)
1105 _tx_reclaim_skb();
1106 else
1107 netif_stop_queue(lp->ndev);
1108 }
1109
1110 if (current_tx_ptr->next != tx_list_head &&
1111 netif_queue_stopped(lp->ndev))
1112 netif_wake_queue(lp->ndev);
1113
1114 if (tx_list_head != current_tx_ptr) {
1115 /* shorten the timer interval if tx queue is stopped */
1116 if (netif_queue_stopped(lp->ndev))
1117 lp->tx_reclaim_timer.expires =
1118 jiffies + (TX_RECLAIM_JIFFIES >> 4);
1119 else
1120 lp->tx_reclaim_timer.expires =
1121 jiffies + TX_RECLAIM_JIFFIES;
1122
1123 mod_timer(&lp->tx_reclaim_timer,
1124 lp->tx_reclaim_timer.expires);
1125 }
1126
1127 return;
1128}
1129
1130static void tx_reclaim_skb_timeout(unsigned long lp)
1131{
1132 tx_reclaim_skb((struct bfin_mac_local *)lp);
Bryan Wue190d6b2007-07-17 14:43:44 +08001133}
1134
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001135static int bfin_mac_hard_start_xmit(struct sk_buff *skb,
Bryan Wue190d6b2007-07-17 14:43:44 +08001136 struct net_device *dev)
1137{
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001138 struct bfin_mac_local *lp = netdev_priv(dev);
Bryan Wua50c0c02008-07-27 22:45:04 +08001139 u16 *data;
Michael Hennerich015dac82009-05-29 03:41:15 +00001140 u32 data_align = (unsigned long)(skb->data) & 0x3;
Barry Songfe92afe2010-05-17 17:19:40 -07001141
Bryan Wue190d6b2007-07-17 14:43:44 +08001142 current_tx_ptr->skb = skb;
1143
Michael Hennerich015dac82009-05-29 03:41:15 +00001144 if (data_align == 0x2) {
1145 /* move skb->data to current_tx_ptr payload */
1146 data = (u16 *)(skb->data) - 1;
Barry Songfe92afe2010-05-17 17:19:40 -07001147 *data = (u16)(skb->len);
1148 /*
1149 * When transmitting an Ethernet packet, the PTP_TSYNC module requires
1150 * a DMA_Length_Word field associated with the packet. The lower 12 bits
1151 * of this field are the length of the packet payload in bytes and the higher
1152 * 4 bits are the timestamping enable field.
1153 */
Oliver Hartkopp2244d072010-08-17 08:59:14 +00001154 if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)
Barry Songfe92afe2010-05-17 17:19:40 -07001155 *data |= 0x1000;
1156
Michael Hennerich015dac82009-05-29 03:41:15 +00001157 current_tx_ptr->desc_a.start_addr = (u32)data;
1158 /* this is important! */
1159 blackfin_dcache_flush_range((u32)data,
1160 (u32)((u8 *)data + skb->len + 4));
Bryan Wue190d6b2007-07-17 14:43:44 +08001161 } else {
Michael Hennerich015dac82009-05-29 03:41:15 +00001162 *((u16 *)(current_tx_ptr->packet)) = (u16)(skb->len);
Barry Songfe92afe2010-05-17 17:19:40 -07001163 /* enable timestamping for the sent packet */
Oliver Hartkopp2244d072010-08-17 08:59:14 +00001164 if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)
Barry Songfe92afe2010-05-17 17:19:40 -07001165 *((u16 *)(current_tx_ptr->packet)) |= 0x1000;
Michael Hennerich015dac82009-05-29 03:41:15 +00001166 memcpy((u8 *)(current_tx_ptr->packet + 2), skb->data,
1167 skb->len);
1168 current_tx_ptr->desc_a.start_addr =
1169 (u32)current_tx_ptr->packet;
Michael Hennerich015dac82009-05-29 03:41:15 +00001170 blackfin_dcache_flush_range(
1171 (u32)current_tx_ptr->packet,
1172 (u32)(current_tx_ptr->packet + skb->len + 2));
Bryan Wue190d6b2007-07-17 14:43:44 +08001173 }
1174
Sonic Zhang805a8ab2009-05-29 03:40:43 +00001175 /* make sure the internal data buffers in the core are drained
1176 * so that the DMA descriptors are completely written when the
1177 * DMA engine goes to fetch them below
1178 */
1179 SSYNC();
1180
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001181 /* always clear status buffer before start tx dma */
1182 current_tx_ptr->status.status_word = 0;
1183
Bryan Wue190d6b2007-07-17 14:43:44 +08001184 /* enable this packet's dma */
1185 current_tx_ptr->desc_a.config |= DMAEN;
1186
1187 /* tx dma is running, just return */
Michael Hennerich015dac82009-05-29 03:41:15 +00001188 if (bfin_read_DMA2_IRQ_STATUS() & DMA_RUN)
Bryan Wue190d6b2007-07-17 14:43:44 +08001189 goto out;
1190
1191 /* tx dma is not running */
1192 bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr->desc_a));
1193 /* dma enabled, read from memory, size is 6 */
1194 bfin_write_DMA2_CONFIG(current_tx_ptr->desc_a.config);
1195 /* Turn on the EMAC tx */
1196 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
1197
1198out:
Barry Songfe92afe2010-05-17 17:19:40 -07001199 bfin_tx_hwtstamp(dev, skb);
1200
Bryan Wue190d6b2007-07-17 14:43:44 +08001201 current_tx_ptr = current_tx_ptr->next;
Jeff Garzik09f75cd2007-10-03 17:41:50 -07001202 dev->stats.tx_packets++;
1203 dev->stats.tx_bytes += (skb->len);
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001204
1205 tx_reclaim_skb(lp);
1206
Patrick McHardy6ed10652009-06-23 06:03:08 +00001207 return NETDEV_TX_OK;
Bryan Wue190d6b2007-07-17 14:43:44 +08001208}
1209
Sonic Zhangad2864d2010-05-10 05:39:09 +00001210#define IP_HEADER_OFF 0
Peter Meerwaldec497b32010-05-17 17:20:50 -07001211#define RX_ERROR_MASK (RX_LONG | RX_ALIGN | RX_CRC | RX_LEN | \
1212 RX_FRAG | RX_ADDR | RX_DMAO | RX_PHY | RX_LATE | RX_RANGE)
1213
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001214static void bfin_mac_rx(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001215{
1216 struct sk_buff *skb, *new_skb;
Bryan Wue190d6b2007-07-17 14:43:44 +08001217 unsigned short len;
Barry Songfe92afe2010-05-17 17:19:40 -07001218 struct bfin_mac_local *lp __maybe_unused = netdev_priv(dev);
Sonic Zhangad2864d2010-05-10 05:39:09 +00001219#if defined(BFIN_MAC_CSUM_OFFLOAD)
1220 unsigned int i;
1221 unsigned char fcs[ETH_FCS_LEN + 1];
1222#endif
Bryan Wue190d6b2007-07-17 14:43:44 +08001223
Peter Meerwaldec497b32010-05-17 17:20:50 -07001224 /* check if frame status word reports an error condition
1225 * we which case we simply drop the packet
1226 */
1227 if (current_rx_ptr->status.status_word & RX_ERROR_MASK) {
Mike Frysingerc6dd5092011-01-10 02:54:29 +00001228 netdev_notice(dev, "rx: receive error - packet dropped\n");
Peter Meerwaldec497b32010-05-17 17:20:50 -07001229 dev->stats.rx_dropped++;
1230 goto out;
1231 }
1232
Bryan Wue190d6b2007-07-17 14:43:44 +08001233 /* allocate a new skb for next time receive */
1234 skb = current_rx_ptr->skb;
Barry Songfe92afe2010-05-17 17:19:40 -07001235
Pradeep A. Dalvi1ab0d2e2012-02-06 11:16:48 +00001236 new_skb = netdev_alloc_skb(dev, PKT_BUF_SZ + NET_IP_ALIGN);
Bryan Wue190d6b2007-07-17 14:43:44 +08001237 if (!new_skb) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -07001238 dev->stats.rx_dropped++;
Bryan Wue190d6b2007-07-17 14:43:44 +08001239 goto out;
1240 }
1241 /* reserve 2 bytes for RXDWA padding */
Michael Hennerich015dac82009-05-29 03:41:15 +00001242 skb_reserve(new_skb, NET_IP_ALIGN);
Alexey Demin6e01d1a2008-01-30 16:52:27 +08001243 /* Invidate the data cache of skb->data range when it is write back
1244 * cache. It will prevent overwritting the new data from DMA
1245 */
1246 blackfin_dcache_invalidate_range((unsigned long)new_skb->head,
1247 (unsigned long)new_skb->end);
1248
Sonic Zhangf6e1e4f2010-05-10 05:39:08 +00001249 current_rx_ptr->skb = new_skb;
1250 current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2;
1251
Bryan Wue190d6b2007-07-17 14:43:44 +08001252 len = (unsigned short)((current_rx_ptr->status.status_word) & RX_FRLEN);
Sonic Zhangad2864d2010-05-10 05:39:09 +00001253 /* Deduce Ethernet FCS length from Ethernet payload length */
1254 len -= ETH_FCS_LEN;
Bryan Wue190d6b2007-07-17 14:43:44 +08001255 skb_put(skb, len);
Bryan Wue190d6b2007-07-17 14:43:44 +08001256
Bryan Wue190d6b2007-07-17 14:43:44 +08001257 skb->protocol = eth_type_trans(skb, dev);
Barry Songfe92afe2010-05-17 17:19:40 -07001258
1259 bfin_rx_hwtstamp(dev, skb);
1260
Bryan Wue190d6b2007-07-17 14:43:44 +08001261#if defined(BFIN_MAC_CSUM_OFFLOAD)
Sonic Zhangad2864d2010-05-10 05:39:09 +00001262 /* Checksum offloading only works for IPv4 packets with the standard IP header
1263 * length of 20 bytes, because the blackfin MAC checksum calculation is
1264 * based on that assumption. We must NOT use the calculated checksum if our
1265 * IP version or header break that assumption.
1266 */
1267 if (skb->data[IP_HEADER_OFF] == 0x45) {
1268 skb->csum = current_rx_ptr->status.ip_payload_csum;
1269 /*
1270 * Deduce Ethernet FCS from hardware generated IP payload checksum.
1271 * IP checksum is based on 16-bit one's complement algorithm.
1272 * To deduce a value from checksum is equal to add its inversion.
1273 * If the IP payload len is odd, the inversed FCS should also
1274 * begin from odd address and leave first byte zero.
1275 */
1276 if (skb->len % 2) {
1277 fcs[0] = 0;
1278 for (i = 0; i < ETH_FCS_LEN; i++)
1279 fcs[i + 1] = ~skb->data[skb->len + i];
1280 skb->csum = csum_partial(fcs, ETH_FCS_LEN + 1, skb->csum);
1281 } else {
1282 for (i = 0; i < ETH_FCS_LEN; i++)
1283 fcs[i] = ~skb->data[skb->len + i];
1284 skb->csum = csum_partial(fcs, ETH_FCS_LEN, skb->csum);
1285 }
1286 skb->ip_summed = CHECKSUM_COMPLETE;
1287 }
Bryan Wue190d6b2007-07-17 14:43:44 +08001288#endif
1289
1290 netif_rx(skb);
Jeff Garzik09f75cd2007-10-03 17:41:50 -07001291 dev->stats.rx_packets++;
1292 dev->stats.rx_bytes += len;
Peter Meerwaldec497b32010-05-17 17:20:50 -07001293out:
Bryan Wue190d6b2007-07-17 14:43:44 +08001294 current_rx_ptr->status.status_word = 0x00000000;
1295 current_rx_ptr = current_rx_ptr->next;
Bryan Wue190d6b2007-07-17 14:43:44 +08001296}
1297
1298/* interrupt routine to handle rx and error signal */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001299static irqreturn_t bfin_mac_interrupt(int irq, void *dev_id)
Bryan Wue190d6b2007-07-17 14:43:44 +08001300{
1301 struct net_device *dev = dev_id;
1302 int number = 0;
1303
1304get_one_packet:
1305 if (current_rx_ptr->status.status_word == 0) {
1306 /* no more new packet received */
1307 if (number == 0) {
1308 if (current_rx_ptr->next->status.status_word != 0) {
1309 current_rx_ptr = current_rx_ptr->next;
1310 goto real_rx;
1311 }
1312 }
1313 bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() |
1314 DMA_DONE | DMA_ERR);
1315 return IRQ_HANDLED;
1316 }
1317
1318real_rx:
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001319 bfin_mac_rx(dev);
Bryan Wue190d6b2007-07-17 14:43:44 +08001320 number++;
1321 goto get_one_packet;
1322}
1323
1324#ifdef CONFIG_NET_POLL_CONTROLLER
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001325static void bfin_mac_poll(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001326{
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001327 struct bfin_mac_local *lp = netdev_priv(dev);
1328
Bryan Wue190d6b2007-07-17 14:43:44 +08001329 disable_irq(IRQ_MAC_RX);
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001330 bfin_mac_interrupt(IRQ_MAC_RX, dev);
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001331 tx_reclaim_skb(lp);
Bryan Wue190d6b2007-07-17 14:43:44 +08001332 enable_irq(IRQ_MAC_RX);
1333}
1334#endif /* CONFIG_NET_POLL_CONTROLLER */
1335
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001336static void bfin_mac_disable(void)
Bryan Wue190d6b2007-07-17 14:43:44 +08001337{
1338 unsigned int opmode;
1339
1340 opmode = bfin_read_EMAC_OPMODE();
1341 opmode &= (~RE);
1342 opmode &= (~TE);
1343 /* Turn off the EMAC */
1344 bfin_write_EMAC_OPMODE(opmode);
1345}
1346
1347/*
1348 * Enable Interrupts, Receive, and Transmit
1349 */
Sonic Zhang02460d02010-06-11 10:44:22 +00001350static int bfin_mac_enable(struct phy_device *phydev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001351{
Mike Frysinger2bfa0f02010-05-10 05:39:13 +00001352 int ret;
Bryan Wue190d6b2007-07-17 14:43:44 +08001353 u32 opmode;
1354
Mike Frysingerc6dd5092011-01-10 02:54:29 +00001355 pr_debug("%s\n", __func__);
Bryan Wue190d6b2007-07-17 14:43:44 +08001356
1357 /* Set RX DMA */
1358 bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head->desc_a));
1359 bfin_write_DMA1_CONFIG(rx_list_head->desc_a.config);
1360
1361 /* Wait MII done */
Mike Frysinger2bfa0f02010-05-10 05:39:13 +00001362 ret = bfin_mdio_poll();
1363 if (ret)
1364 return ret;
Bryan Wue190d6b2007-07-17 14:43:44 +08001365
1366 /* We enable only RX here */
1367 /* ASTP : Enable Automatic Pad Stripping
1368 PR : Promiscuous Mode for test
1369 PSF : Receive frames with total length less than 64 bytes.
1370 FDMODE : Full Duplex Mode
1371 LB : Internal Loopback for test
1372 RE : Receiver Enable */
1373 opmode = bfin_read_EMAC_OPMODE();
1374 if (opmode & FDMODE)
1375 opmode |= PSF;
1376 else
1377 opmode |= DRO | DC | PSF;
1378 opmode |= RE;
1379
Sonic Zhang02460d02010-06-11 10:44:22 +00001380 if (phydev->interface == PHY_INTERFACE_MODE_RMII) {
1381 opmode |= RMII; /* For Now only 100MBit are supported */
Mike Frysinger72f49052011-03-27 22:33:13 +00001382#if defined(CONFIG_BF537) || defined(CONFIG_BF536)
1383 if (__SILICON_REVISION__ < 3) {
1384 /*
1385 * This isn't publicly documented (fun times!), but in
1386 * silicon <=0.2, the RX and TX pins are clocked together.
1387 * So in order to recv, we must enable the transmit side
1388 * as well. This will cause a spurious TX interrupt too,
1389 * but we can easily consume that.
1390 */
1391 opmode |= TE;
1392 }
Bryan Wue190d6b2007-07-17 14:43:44 +08001393#endif
Sonic Zhang02460d02010-06-11 10:44:22 +00001394 }
1395
Bryan Wue190d6b2007-07-17 14:43:44 +08001396 /* Turn on the EMAC rx */
1397 bfin_write_EMAC_OPMODE(opmode);
Mike Frysinger2bfa0f02010-05-10 05:39:13 +00001398
1399 return 0;
Bryan Wue190d6b2007-07-17 14:43:44 +08001400}
1401
1402/* Our watchdog timed out. Called by the networking layer */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001403static void bfin_mac_timeout(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001404{
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001405 struct bfin_mac_local *lp = netdev_priv(dev);
1406
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07001407 pr_debug("%s: %s\n", dev->name, __func__);
Bryan Wue190d6b2007-07-17 14:43:44 +08001408
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001409 bfin_mac_disable();
Bryan Wue190d6b2007-07-17 14:43:44 +08001410
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001411 del_timer(&lp->tx_reclaim_timer);
1412
1413 /* reset tx queue and free skb */
1414 while (tx_list_head != current_tx_ptr) {
1415 tx_list_head->desc_a.config &= ~DMAEN;
1416 tx_list_head->status.status_word = 0;
1417 if (tx_list_head->skb) {
1418 dev_kfree_skb(tx_list_head->skb);
1419 tx_list_head->skb = NULL;
1420 }
1421 tx_list_head = tx_list_head->next;
1422 }
1423
1424 if (netif_queue_stopped(lp->ndev))
1425 netif_wake_queue(lp->ndev);
Bryan Wue190d6b2007-07-17 14:43:44 +08001426
Sonic Zhang02460d02010-06-11 10:44:22 +00001427 bfin_mac_enable(lp->phydev);
Bryan Wue190d6b2007-07-17 14:43:44 +08001428
1429 /* We can accept TX packets again */
Eric Dumazet1ae5dc32010-05-10 05:01:31 -07001430 dev->trans_start = jiffies; /* prevent tx timeout */
Bryan Wue190d6b2007-07-17 14:43:44 +08001431 netif_wake_queue(dev);
1432}
1433
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001434static void bfin_mac_multicast_hash(struct net_device *dev)
Aidan Williams775919b2008-01-30 16:52:23 +08001435{
1436 u32 emac_hashhi, emac_hashlo;
Jiri Pirko22bedad32010-04-01 21:22:57 +00001437 struct netdev_hw_addr *ha;
Aidan Williams775919b2008-01-30 16:52:23 +08001438 u32 crc;
1439
1440 emac_hashhi = emac_hashlo = 0;
1441
Jiri Pirko22bedad32010-04-01 21:22:57 +00001442 netdev_for_each_mc_addr(ha, dev) {
Joe Perchesf767b6d2011-01-12 18:08:04 +00001443 crc = ether_crc(ETH_ALEN, ha->addr);
Aidan Williams775919b2008-01-30 16:52:23 +08001444 crc >>= 26;
1445
1446 if (crc & 0x20)
1447 emac_hashhi |= 1 << (crc & 0x1f);
1448 else
1449 emac_hashlo |= 1 << (crc & 0x1f);
1450 }
1451
1452 bfin_write_EMAC_HASHHI(emac_hashhi);
1453 bfin_write_EMAC_HASHLO(emac_hashlo);
Aidan Williams775919b2008-01-30 16:52:23 +08001454}
1455
Bryan Wue190d6b2007-07-17 14:43:44 +08001456/*
Bryan Wue190d6b2007-07-17 14:43:44 +08001457 * This routine will, depending on the values passed to it,
1458 * either make it accept multicast packets, go into
1459 * promiscuous mode (for TCPDUMP and cousins) or accept
1460 * a select set of multicast packets
1461 */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001462static void bfin_mac_set_multicast_list(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001463{
1464 u32 sysctl;
1465
1466 if (dev->flags & IFF_PROMISC) {
Mike Frysingerc6dd5092011-01-10 02:54:29 +00001467 netdev_info(dev, "set promisc mode\n");
Bryan Wue190d6b2007-07-17 14:43:44 +08001468 sysctl = bfin_read_EMAC_OPMODE();
Sonic Zhangc0da7762010-05-10 05:39:12 +00001469 sysctl |= PR;
Bryan Wue190d6b2007-07-17 14:43:44 +08001470 bfin_write_EMAC_OPMODE(sysctl);
Aidan Williams775919b2008-01-30 16:52:23 +08001471 } else if (dev->flags & IFF_ALLMULTI) {
Bryan Wue190d6b2007-07-17 14:43:44 +08001472 /* accept all multicast */
1473 sysctl = bfin_read_EMAC_OPMODE();
1474 sysctl |= PAM;
1475 bfin_write_EMAC_OPMODE(sysctl);
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00001476 } else if (!netdev_mc_empty(dev)) {
Aidan Williams775919b2008-01-30 16:52:23 +08001477 /* set up multicast hash table */
1478 sysctl = bfin_read_EMAC_OPMODE();
1479 sysctl |= HM;
1480 bfin_write_EMAC_OPMODE(sysctl);
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001481 bfin_mac_multicast_hash(dev);
Bryan Wue190d6b2007-07-17 14:43:44 +08001482 } else {
1483 /* clear promisc or multicast mode */
1484 sysctl = bfin_read_EMAC_OPMODE();
1485 sysctl &= ~(RAF | PAM);
1486 bfin_write_EMAC_OPMODE(sysctl);
1487 }
1488}
1489
Barry Songfe92afe2010-05-17 17:19:40 -07001490static int bfin_mac_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1491{
Sonic Zhang02460d02010-06-11 10:44:22 +00001492 struct bfin_mac_local *lp = netdev_priv(netdev);
1493
1494 if (!netif_running(netdev))
1495 return -EINVAL;
1496
Barry Songfe92afe2010-05-17 17:19:40 -07001497 switch (cmd) {
1498 case SIOCSHWTSTAMP:
1499 return bfin_mac_hwtstamp_ioctl(netdev, ifr, cmd);
1500 default:
Sonic Zhang02460d02010-06-11 10:44:22 +00001501 if (lp->phydev)
1502 return phy_mii_ioctl(lp->phydev, ifr, cmd);
1503 else
1504 return -EOPNOTSUPP;
Barry Songfe92afe2010-05-17 17:19:40 -07001505 }
1506}
1507
Bryan Wue190d6b2007-07-17 14:43:44 +08001508/*
1509 * this puts the device in an inactive state
1510 */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001511static void bfin_mac_shutdown(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001512{
1513 /* Turn off the EMAC */
1514 bfin_write_EMAC_OPMODE(0x00000000);
1515 /* Turn off the EMAC RX DMA */
1516 bfin_write_DMA1_CONFIG(0x0000);
1517 bfin_write_DMA2_CONFIG(0x0000);
1518}
1519
1520/*
1521 * Open and Initialize the interface
1522 *
1523 * Set up everything, reset the card, etc..
1524 */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001525static int bfin_mac_open(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001526{
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001527 struct bfin_mac_local *lp = netdev_priv(dev);
Mike Frysinger2bfa0f02010-05-10 05:39:13 +00001528 int ret;
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07001529 pr_debug("%s: %s\n", dev->name, __func__);
Bryan Wue190d6b2007-07-17 14:43:44 +08001530
1531 /*
1532 * Check that the address is valid. If its not, refuse
1533 * to bring the device up. The user must specify an
1534 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1535 */
1536 if (!is_valid_ether_addr(dev->dev_addr)) {
Mike Frysingerc6dd5092011-01-10 02:54:29 +00001537 netdev_warn(dev, "no valid ethernet hw addr\n");
Bryan Wue190d6b2007-07-17 14:43:44 +08001538 return -EINVAL;
1539 }
1540
1541 /* initial rx and tx list */
Pradeep A. Dalvi1ab0d2e2012-02-06 11:16:48 +00001542 ret = desc_list_init(dev);
Mike Frysinger2bfa0f02010-05-10 05:39:13 +00001543 if (ret)
1544 return ret;
Bryan Wue190d6b2007-07-17 14:43:44 +08001545
Bryan Wu4ae5a3a2007-09-19 23:37:36 +08001546 phy_start(lp->phydev);
Vitja Makarov136492b2008-01-30 16:52:26 +08001547 phy_write(lp->phydev, MII_BMCR, BMCR_RESET);
Bryan Wue190d6b2007-07-17 14:43:44 +08001548 setup_system_regs(dev);
Michael Hennerichee02fee2008-07-27 22:45:05 +08001549 setup_mac_addr(dev->dev_addr);
Mike Frysinger2bfa0f02010-05-10 05:39:13 +00001550
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001551 bfin_mac_disable();
Sonic Zhang02460d02010-06-11 10:44:22 +00001552 ret = bfin_mac_enable(lp->phydev);
Mike Frysinger2bfa0f02010-05-10 05:39:13 +00001553 if (ret)
1554 return ret;
Bryan Wue190d6b2007-07-17 14:43:44 +08001555 pr_debug("hardware init finished\n");
Mike Frysinger2bfa0f02010-05-10 05:39:13 +00001556
Bryan Wue190d6b2007-07-17 14:43:44 +08001557 netif_start_queue(dev);
1558 netif_carrier_on(dev);
1559
1560 return 0;
1561}
1562
1563/*
Bryan Wue190d6b2007-07-17 14:43:44 +08001564 * this makes the board clean up everything that it can
1565 * and not talk to the outside world. Caused by
1566 * an 'ifconfig ethX down'
1567 */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001568static int bfin_mac_close(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001569{
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001570 struct bfin_mac_local *lp = netdev_priv(dev);
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07001571 pr_debug("%s: %s\n", dev->name, __func__);
Bryan Wue190d6b2007-07-17 14:43:44 +08001572
1573 netif_stop_queue(dev);
1574 netif_carrier_off(dev);
1575
Bryan Wu4ae5a3a2007-09-19 23:37:36 +08001576 phy_stop(lp->phydev);
Vitja Makarov136492b2008-01-30 16:52:26 +08001577 phy_write(lp->phydev, MII_BMCR, BMCR_PDOWN);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +08001578
Bryan Wue190d6b2007-07-17 14:43:44 +08001579 /* clear everything */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001580 bfin_mac_shutdown(dev);
Bryan Wue190d6b2007-07-17 14:43:44 +08001581
1582 /* free the rx/tx buffers */
1583 desc_list_free();
1584
1585 return 0;
1586}
1587
Mike Frysingerb63dc8f2009-05-26 20:55:33 -07001588static const struct net_device_ops bfin_mac_netdev_ops = {
1589 .ndo_open = bfin_mac_open,
1590 .ndo_stop = bfin_mac_close,
1591 .ndo_start_xmit = bfin_mac_hard_start_xmit,
1592 .ndo_set_mac_address = bfin_mac_set_mac_address,
1593 .ndo_tx_timeout = bfin_mac_timeout,
Jiri Pirkoafc4b132011-08-16 06:29:01 +00001594 .ndo_set_rx_mode = bfin_mac_set_multicast_list,
Barry Songfe92afe2010-05-17 17:19:40 -07001595 .ndo_do_ioctl = bfin_mac_ioctl,
Mike Frysingerb63dc8f2009-05-26 20:55:33 -07001596 .ndo_validate_addr = eth_validate_addr,
1597 .ndo_change_mtu = eth_change_mtu,
1598#ifdef CONFIG_NET_POLL_CONTROLLER
1599 .ndo_poll_controller = bfin_mac_poll,
1600#endif
1601};
1602
Bill Pemberton49f73152012-12-03 09:22:54 -05001603static int bfin_mac_probe(struct platform_device *pdev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001604{
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001605 struct net_device *ndev;
1606 struct bfin_mac_local *lp;
Graf Yang080c8252009-05-29 03:41:48 +00001607 struct platform_device *pd;
Sonic Zhang02460d02010-06-11 10:44:22 +00001608 struct bfin_mii_bus_platform_data *mii_bus_data;
Graf Yang080c8252009-05-29 03:41:48 +00001609 int rc;
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001610
1611 ndev = alloc_etherdev(sizeof(struct bfin_mac_local));
Joe Perches41de8d42012-01-29 13:47:52 +00001612 if (!ndev)
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001613 return -ENOMEM;
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001614
1615 SET_NETDEV_DEV(ndev, &pdev->dev);
1616 platform_set_drvdata(pdev, ndev);
1617 lp = netdev_priv(ndev);
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001618 lp->ndev = ndev;
Bryan Wue190d6b2007-07-17 14:43:44 +08001619
1620 /* Grab the MAC address in the MAC */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001621 *(__le32 *) (&(ndev->dev_addr[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
1622 *(__le16 *) (&(ndev->dev_addr[4])) = cpu_to_le16((u16) bfin_read_EMAC_ADDRHI());
Bryan Wue190d6b2007-07-17 14:43:44 +08001623
1624 /* probe mac */
1625 /*todo: how to proble? which is revision_register */
1626 bfin_write_EMAC_ADDRLO(0x12345678);
1627 if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001628 dev_err(&pdev->dev, "Cannot detect Blackfin on-chip ethernet MAC controller!\n");
1629 rc = -ENODEV;
1630 goto out_err_probe_mac;
Bryan Wue190d6b2007-07-17 14:43:44 +08001631 }
1632
Bryan Wue190d6b2007-07-17 14:43:44 +08001633
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001634 /*
1635 * Is it valid? (Did bootloader initialize it?)
1636 * Grab the MAC from the board somehow
1637 * this is done in the arch/blackfin/mach-bfxxx/boards/eth_mac.c
1638 */
Danny Kukawka5055d2f2012-02-16 07:09:31 +00001639 if (!is_valid_ether_addr(ndev->dev_addr)) {
1640 if (bfin_get_ether_addr(ndev->dev_addr) ||
1641 !is_valid_ether_addr(ndev->dev_addr)) {
1642 /* Still not valid, get a random one */
1643 netdev_warn(ndev, "Setting Ethernet MAC to a random one\n");
1644 eth_hw_addr_random(ndev);
1645 }
1646 }
Bryan Wue190d6b2007-07-17 14:43:44 +08001647
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001648 setup_mac_addr(ndev->dev_addr);
Bryan Wue190d6b2007-07-17 14:43:44 +08001649
Jingoo Hana63b82c2013-08-30 13:50:48 +09001650 if (!dev_get_platdata(&pdev->dev)) {
Graf Yang080c8252009-05-29 03:41:48 +00001651 dev_err(&pdev->dev, "Cannot get platform device bfin_mii_bus!\n");
1652 rc = -ENODEV;
1653 goto out_err_probe_mac;
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001654 }
Jingoo Hana63b82c2013-08-30 13:50:48 +09001655 pd = dev_get_platdata(&pdev->dev);
Graf Yang080c8252009-05-29 03:41:48 +00001656 lp->mii_bus = platform_get_drvdata(pd);
Sonic Zhang0e995cd2010-05-10 05:39:14 +00001657 if (!lp->mii_bus) {
1658 dev_err(&pdev->dev, "Cannot get mii_bus!\n");
1659 rc = -ENODEV;
Sonic Zhang02460d02010-06-11 10:44:22 +00001660 goto out_err_probe_mac;
Sonic Zhang0e995cd2010-05-10 05:39:14 +00001661 }
Graf Yang080c8252009-05-29 03:41:48 +00001662 lp->mii_bus->priv = ndev;
Jingoo Hana63b82c2013-08-30 13:50:48 +09001663 mii_bus_data = dev_get_platdata(&pd->dev);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +08001664
Sonic Zhang02460d02010-06-11 10:44:22 +00001665 rc = mii_probe(ndev, mii_bus_data->phy_mode);
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001666 if (rc) {
1667 dev_err(&pdev->dev, "MII Probe failed!\n");
1668 goto out_err_mii_probe;
1669 }
Bryan Wu4ae5a3a2007-09-19 23:37:36 +08001670
Mike Frysingerc599bd62011-01-10 02:54:32 +00001671 lp->vlan1_mask = ETH_P_8021Q | mii_bus_data->vlan1_mask;
1672 lp->vlan2_mask = ETH_P_8021Q | mii_bus_data->vlan2_mask;
1673
Bryan Wue190d6b2007-07-17 14:43:44 +08001674 /* Fill in the fields of the device structure with ethernet values. */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001675 ether_setup(ndev);
Bryan Wue190d6b2007-07-17 14:43:44 +08001676
Alexander Beregalov149da652009-04-14 18:30:24 +00001677 ndev->netdev_ops = &bfin_mac_netdev_ops;
Bryan Wu679dce32008-04-25 11:53:11 +08001678 ndev->ethtool_ops = &bfin_mac_ethtool_ops;
Bryan Wue190d6b2007-07-17 14:43:44 +08001679
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001680 init_timer(&lp->tx_reclaim_timer);
1681 lp->tx_reclaim_timer.data = (unsigned long)lp;
1682 lp->tx_reclaim_timer.function = tx_reclaim_skb_timeout;
1683
Bryan Wue190d6b2007-07-17 14:43:44 +08001684 spin_lock_init(&lp->lock);
1685
1686 /* now, enable interrupts */
1687 /* register irq handler */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001688 rc = request_irq(IRQ_MAC_RX, bfin_mac_interrupt,
Michael Hennerich91a455f2009-05-29 03:39:45 +00001689 IRQF_DISABLED, "EMAC_RX", ndev);
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001690 if (rc) {
1691 dev_err(&pdev->dev, "Cannot request Blackfin MAC RX IRQ!\n");
1692 rc = -EBUSY;
1693 goto out_err_request_irq;
Bryan Wue190d6b2007-07-17 14:43:44 +08001694 }
1695
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001696 rc = register_netdev(ndev);
1697 if (rc) {
1698 dev_err(&pdev->dev, "Cannot register net device!\n");
1699 goto out_err_reg_ndev;
Bryan Wue190d6b2007-07-17 14:43:44 +08001700 }
1701
Barry Songfe92afe2010-05-17 17:19:40 -07001702 bfin_mac_hwtstamp_init(ndev);
Wei Yongjun2c006992013-05-07 02:23:38 +00001703 rc = bfin_phc_init(ndev, &pdev->dev);
1704 if (rc) {
Richard Cochrandd87b222012-10-31 06:27:24 +00001705 dev_err(&pdev->dev, "Cannot register PHC device!\n");
1706 goto out_err_phc;
1707 }
Barry Songfe92afe2010-05-17 17:19:40 -07001708
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001709 /* now, print out the card info, in a short format.. */
Mike Frysingerc6dd5092011-01-10 02:54:29 +00001710 netdev_info(ndev, "%s, Version %s\n", DRV_DESC, DRV_VERSION);
Bryan Wue190d6b2007-07-17 14:43:44 +08001711
1712 return 0;
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001713
Richard Cochrandd87b222012-10-31 06:27:24 +00001714out_err_phc:
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001715out_err_reg_ndev:
1716 free_irq(IRQ_MAC_RX, ndev);
1717out_err_request_irq:
1718out_err_mii_probe:
Lennert Buytenhek298cf9be2008-10-08 16:29:57 -07001719 mdiobus_unregister(lp->mii_bus);
Lennert Buytenhek298cf9be2008-10-08 16:29:57 -07001720 mdiobus_free(lp->mii_bus);
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001721out_err_probe_mac:
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001722 free_netdev(ndev);
1723
1724 return rc;
Bryan Wue190d6b2007-07-17 14:43:44 +08001725}
1726
Bill Pemberton49f73152012-12-03 09:22:54 -05001727static int bfin_mac_remove(struct platform_device *pdev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001728{
1729 struct net_device *ndev = platform_get_drvdata(pdev);
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001730 struct bfin_mac_local *lp = netdev_priv(ndev);
Bryan Wue190d6b2007-07-17 14:43:44 +08001731
Richard Cochrandd87b222012-10-31 06:27:24 +00001732 bfin_phc_release(lp);
1733
Graf Yang080c8252009-05-29 03:41:48 +00001734 lp->mii_bus->priv = NULL;
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001735
Bryan Wue190d6b2007-07-17 14:43:44 +08001736 unregister_netdev(ndev);
1737
1738 free_irq(IRQ_MAC_RX, ndev);
1739
1740 free_netdev(ndev);
1741
Bryan Wue190d6b2007-07-17 14:43:44 +08001742 return 0;
1743}
1744
Bryan Wu496a34c2007-09-19 23:37:14 +08001745#ifdef CONFIG_PM
1746static int bfin_mac_suspend(struct platform_device *pdev, pm_message_t mesg)
Bryan Wue190d6b2007-07-17 14:43:44 +08001747{
Bryan Wu496a34c2007-09-19 23:37:14 +08001748 struct net_device *net_dev = platform_get_drvdata(pdev);
Michael Hennerich53fd3f22010-05-10 05:39:11 +00001749 struct bfin_mac_local *lp = netdev_priv(net_dev);
Bryan Wu496a34c2007-09-19 23:37:14 +08001750
Michael Hennerich53fd3f22010-05-10 05:39:11 +00001751 if (lp->wol) {
1752 bfin_write_EMAC_OPMODE((bfin_read_EMAC_OPMODE() & ~TE) | RE);
1753 bfin_write_EMAC_WKUP_CTL(MPKE);
1754 enable_irq_wake(IRQ_MAC_WAKEDET);
1755 } else {
1756 if (netif_running(net_dev))
1757 bfin_mac_close(net_dev);
1758 }
Bryan Wu496a34c2007-09-19 23:37:14 +08001759
Bryan Wue190d6b2007-07-17 14:43:44 +08001760 return 0;
1761}
1762
1763static int bfin_mac_resume(struct platform_device *pdev)
1764{
Bryan Wu496a34c2007-09-19 23:37:14 +08001765 struct net_device *net_dev = platform_get_drvdata(pdev);
Michael Hennerich53fd3f22010-05-10 05:39:11 +00001766 struct bfin_mac_local *lp = netdev_priv(net_dev);
Bryan Wu496a34c2007-09-19 23:37:14 +08001767
Michael Hennerich53fd3f22010-05-10 05:39:11 +00001768 if (lp->wol) {
1769 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
1770 bfin_write_EMAC_WKUP_CTL(0);
1771 disable_irq_wake(IRQ_MAC_WAKEDET);
1772 } else {
1773 if (netif_running(net_dev))
1774 bfin_mac_open(net_dev);
1775 }
Bryan Wu496a34c2007-09-19 23:37:14 +08001776
Bryan Wue190d6b2007-07-17 14:43:44 +08001777 return 0;
1778}
Bryan Wu496a34c2007-09-19 23:37:14 +08001779#else
1780#define bfin_mac_suspend NULL
1781#define bfin_mac_resume NULL
1782#endif /* CONFIG_PM */
Bryan Wue190d6b2007-07-17 14:43:44 +08001783
Bill Pemberton49f73152012-12-03 09:22:54 -05001784static int bfin_mii_bus_probe(struct platform_device *pdev)
Graf Yang080c8252009-05-29 03:41:48 +00001785{
1786 struct mii_bus *miibus;
Sonic Zhang02460d02010-06-11 10:44:22 +00001787 struct bfin_mii_bus_platform_data *mii_bus_pd;
1788 const unsigned short *pin_req;
Graf Yang080c8252009-05-29 03:41:48 +00001789 int rc, i;
1790
Sonic Zhang02460d02010-06-11 10:44:22 +00001791 mii_bus_pd = dev_get_platdata(&pdev->dev);
1792 if (!mii_bus_pd) {
1793 dev_err(&pdev->dev, "No peripherals in platform data!\n");
1794 return -EINVAL;
1795 }
1796
Graf Yang080c8252009-05-29 03:41:48 +00001797 /*
1798 * We are setting up a network card,
1799 * so set the GPIO pins to Ethernet mode
1800 */
Sonic Zhang02460d02010-06-11 10:44:22 +00001801 pin_req = mii_bus_pd->mac_peripherals;
Mike Frysingerc6dd5092011-01-10 02:54:29 +00001802 rc = peripheral_request_list(pin_req, KBUILD_MODNAME);
Graf Yang080c8252009-05-29 03:41:48 +00001803 if (rc) {
1804 dev_err(&pdev->dev, "Requesting peripherals failed!\n");
1805 return rc;
1806 }
1807
1808 rc = -ENOMEM;
1809 miibus = mdiobus_alloc();
1810 if (miibus == NULL)
1811 goto out_err_alloc;
1812 miibus->read = bfin_mdiobus_read;
1813 miibus->write = bfin_mdiobus_write;
1814 miibus->reset = bfin_mdiobus_reset;
1815
1816 miibus->parent = &pdev->dev;
1817 miibus->name = "bfin_mii_bus";
Sonic Zhang02460d02010-06-11 10:44:22 +00001818 miibus->phy_mask = mii_bus_pd->phy_mask;
1819
Florian Fainelli75432fd2012-01-09 23:59:08 +00001820 snprintf(miibus->id, MII_BUS_ID_SIZE, "%s-%x",
1821 pdev->name, pdev->id);
Graf Yang080c8252009-05-29 03:41:48 +00001822 miibus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
Sonic Zhang02460d02010-06-11 10:44:22 +00001823 if (!miibus->irq)
1824 goto out_err_irq_alloc;
1825
1826 for (i = rc; i < PHY_MAX_ADDR; ++i)
Graf Yang080c8252009-05-29 03:41:48 +00001827 miibus->irq[i] = PHY_POLL;
1828
Sonic Zhang02460d02010-06-11 10:44:22 +00001829 rc = clamp(mii_bus_pd->phydev_number, 0, PHY_MAX_ADDR);
1830 if (rc != mii_bus_pd->phydev_number)
1831 dev_err(&pdev->dev, "Invalid number (%i) of phydevs\n",
1832 mii_bus_pd->phydev_number);
1833 for (i = 0; i < rc; ++i) {
1834 unsigned short phyaddr = mii_bus_pd->phydev_data[i].addr;
1835 if (phyaddr < PHY_MAX_ADDR)
1836 miibus->irq[phyaddr] = mii_bus_pd->phydev_data[i].irq;
1837 else
1838 dev_err(&pdev->dev,
1839 "Invalid PHY address %i for phydev %i\n",
1840 phyaddr, i);
1841 }
1842
Graf Yang080c8252009-05-29 03:41:48 +00001843 rc = mdiobus_register(miibus);
1844 if (rc) {
1845 dev_err(&pdev->dev, "Cannot register MDIO bus!\n");
1846 goto out_err_mdiobus_register;
1847 }
1848
1849 platform_set_drvdata(pdev, miibus);
1850 return 0;
1851
1852out_err_mdiobus_register:
Denis Kirjanov7f267de2010-05-18 01:34:46 +00001853 kfree(miibus->irq);
Sonic Zhang02460d02010-06-11 10:44:22 +00001854out_err_irq_alloc:
Graf Yang080c8252009-05-29 03:41:48 +00001855 mdiobus_free(miibus);
1856out_err_alloc:
1857 peripheral_free_list(pin_req);
1858
1859 return rc;
1860}
1861
Bill Pemberton49f73152012-12-03 09:22:54 -05001862static int bfin_mii_bus_remove(struct platform_device *pdev)
Graf Yang080c8252009-05-29 03:41:48 +00001863{
1864 struct mii_bus *miibus = platform_get_drvdata(pdev);
Sonic Zhang02460d02010-06-11 10:44:22 +00001865 struct bfin_mii_bus_platform_data *mii_bus_pd =
1866 dev_get_platdata(&pdev->dev);
1867
Graf Yang080c8252009-05-29 03:41:48 +00001868 mdiobus_unregister(miibus);
Denis Kirjanov7f267de2010-05-18 01:34:46 +00001869 kfree(miibus->irq);
Graf Yang080c8252009-05-29 03:41:48 +00001870 mdiobus_free(miibus);
Sonic Zhang02460d02010-06-11 10:44:22 +00001871 peripheral_free_list(mii_bus_pd->mac_peripherals);
1872
Graf Yang080c8252009-05-29 03:41:48 +00001873 return 0;
1874}
1875
1876static struct platform_driver bfin_mii_bus_driver = {
1877 .probe = bfin_mii_bus_probe,
Bill Pemberton49f73152012-12-03 09:22:54 -05001878 .remove = bfin_mii_bus_remove,
Graf Yang080c8252009-05-29 03:41:48 +00001879 .driver = {
1880 .name = "bfin_mii_bus",
1881 .owner = THIS_MODULE,
1882 },
1883};
1884
Bryan Wue190d6b2007-07-17 14:43:44 +08001885static struct platform_driver bfin_mac_driver = {
1886 .probe = bfin_mac_probe,
Bill Pemberton49f73152012-12-03 09:22:54 -05001887 .remove = bfin_mac_remove,
Bryan Wue190d6b2007-07-17 14:43:44 +08001888 .resume = bfin_mac_resume,
1889 .suspend = bfin_mac_suspend,
1890 .driver = {
Mike Frysingerc6dd5092011-01-10 02:54:29 +00001891 .name = KBUILD_MODNAME,
Kay Sievers72abb462008-04-18 13:50:44 -07001892 .owner = THIS_MODULE,
1893 },
Bryan Wue190d6b2007-07-17 14:43:44 +08001894};
1895
1896static int __init bfin_mac_init(void)
1897{
Graf Yang080c8252009-05-29 03:41:48 +00001898 int ret;
1899 ret = platform_driver_register(&bfin_mii_bus_driver);
1900 if (!ret)
1901 return platform_driver_register(&bfin_mac_driver);
1902 return -ENODEV;
Bryan Wue190d6b2007-07-17 14:43:44 +08001903}
1904
1905module_init(bfin_mac_init);
1906
1907static void __exit bfin_mac_cleanup(void)
1908{
1909 platform_driver_unregister(&bfin_mac_driver);
Graf Yang080c8252009-05-29 03:41:48 +00001910 platform_driver_unregister(&bfin_mii_bus_driver);
Bryan Wue190d6b2007-07-17 14:43:44 +08001911}
1912
1913module_exit(bfin_mac_cleanup);
Kay Sievers72abb462008-04-18 13:50:44 -07001914