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Paul Walmsleyad67ef62008-08-19 11:08:40 +03001/*
Paul Walmsleya64bb9c2010-12-21 21:05:14 -07002 * OMAP2/3/4 powerdomain control
Paul Walmsleyad67ef62008-08-19 11:08:40 +03003 *
Paul Walmsley55ed9692010-01-26 20:12:59 -07004 * Copyright (C) 2007-2008 Texas Instruments, Inc.
Paul Walmsley6e014782010-12-21 20:01:20 -07005 * Copyright (C) 2007-2010 Nokia Corporation
Paul Walmsleyad67ef62008-08-19 11:08:40 +03006 *
7 * Written by Paul Walmsley
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
Paul Walmsley6e014782010-12-21 20:01:20 -070012 *
13 * XXX This should be moved to the mach-omap2/ directory at the earliest
14 * opportunity.
Paul Walmsleyad67ef62008-08-19 11:08:40 +030015 */
16
Paul Walmsley6e014782010-12-21 20:01:20 -070017#ifndef ASM_ARM_PLAT_OMAP_INCLUDE_PLAT_POWERDOMAIN
18#define ASM_ARM_PLAT_OMAP_INCLUDE_PLAT_POWERDOMAIN
Paul Walmsleyad67ef62008-08-19 11:08:40 +030019
20#include <linux/types.h>
21#include <linux/list.h>
22
23#include <asm/atomic.h>
24
Tony Lindgrence491cf2009-10-20 09:40:47 -070025#include <plat/cpu.h>
Paul Walmsleyad67ef62008-08-19 11:08:40 +030026
Paul Walmsleyad67ef62008-08-19 11:08:40 +030027/* Powerdomain basic power states */
28#define PWRDM_POWER_OFF 0x0
29#define PWRDM_POWER_RET 0x1
30#define PWRDM_POWER_INACTIVE 0x2
31#define PWRDM_POWER_ON 0x3
32
Paul Walmsley2354eb52009-12-08 16:33:12 -070033#define PWRDM_MAX_PWRSTS 4
34
Paul Walmsleyad67ef62008-08-19 11:08:40 +030035/* Powerdomain allowable state bitfields */
Rajendra Nayakd3353e12010-05-18 20:24:01 -060036#define PWRSTS_ON (1 << PWRDM_POWER_ON)
Rajendra Nayakbb722f32010-09-27 14:02:56 -060037#define PWRSTS_OFF (1 << PWRDM_POWER_OFF)
Paul Walmsleyad67ef62008-08-19 11:08:40 +030038#define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \
39 (1 << PWRDM_POWER_ON))
40
41#define PWRSTS_OFF_RET ((1 << PWRDM_POWER_OFF) | \
42 (1 << PWRDM_POWER_RET))
43
Abhijit Pagaref37c6df2010-01-26 20:12:52 -070044#define PWRSTS_RET_ON ((1 << PWRDM_POWER_RET) | \
45 (1 << PWRDM_POWER_ON))
46
Paul Walmsleyad67ef62008-08-19 11:08:40 +030047#define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | (1 << PWRDM_POWER_ON))
48
49
Paul Walmsley0b7cbfb2008-06-25 18:09:37 -060050/* Powerdomain flags */
51#define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */
Thara Gopinath3863c742009-12-08 16:33:15 -070052#define PWRDM_HAS_MPU_QUIRK (1 << 1) /* MPU pwr domain has MEM bank 0 bits
53 * in MEM bank 1 position. This is
54 * true for OMAP3430
55 */
Rajendra Nayak90dbc7b2010-05-18 20:24:03 -060056#define PWRDM_HAS_LOWPOWERSTATECHANGE (1 << 2) /*
57 * support to transition from a
58 * sleep state to a lower sleep
59 * state without waking up the
60 * powerdomain
61 */
Paul Walmsley0b7cbfb2008-06-25 18:09:37 -060062
Paul Walmsleyad67ef62008-08-19 11:08:40 +030063/*
Abhijit Pagare38900c22010-01-26 20:12:52 -070064 * Number of memory banks that are power-controllable. On OMAP4430, the
65 * maximum is 5.
Paul Walmsleyad67ef62008-08-19 11:08:40 +030066 */
Abhijit Pagare38900c22010-01-26 20:12:52 -070067#define PWRDM_MAX_MEM_BANKS 5
Paul Walmsleyad67ef62008-08-19 11:08:40 +030068
Paul Walmsley8420bb12008-08-19 11:08:44 +030069/*
70 * Maximum number of clockdomains that can be associated with a powerdomain.
Abhijit Pagare38900c22010-01-26 20:12:52 -070071 * CORE powerdomain on OMAP4 is the worst case
Paul Walmsley8420bb12008-08-19 11:08:44 +030072 */
Abhijit Pagare38900c22010-01-26 20:12:52 -070073#define PWRDM_MAX_CLKDMS 9
Paul Walmsley8420bb12008-08-19 11:08:44 +030074
Paul Walmsleyad67ef62008-08-19 11:08:40 +030075/* XXX A completely arbitrary number. What is reasonable here? */
76#define PWRDM_TRANSITION_BAILOUT 100000
77
Paul Walmsley8420bb12008-08-19 11:08:44 +030078struct clockdomain;
Paul Walmsleyad67ef62008-08-19 11:08:40 +030079struct powerdomain;
80
Paul Walmsleyf0271d62010-01-26 20:13:02 -070081/**
82 * struct powerdomain - OMAP powerdomain
83 * @name: Powerdomain name
84 * @omap_chip: represents the OMAP chip types containing this pwrdm
85 * @prcm_offs: the address offset from CM_BASE/PRM_BASE
Paul Walmsleya64bb9c2010-12-21 21:05:14 -070086 * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs
Paul Walmsleyf0271d62010-01-26 20:13:02 -070087 * @pwrsts: Possible powerdomain power states
88 * @pwrsts_logic_ret: Possible logic power states when pwrdm in RETENTION
89 * @flags: Powerdomain flags
90 * @banks: Number of software-controllable memory banks in this powerdomain
91 * @pwrsts_mem_ret: Possible memory bank pwrstates when pwrdm in RETENTION
92 * @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON
93 * @pwrdm_clkdms: Clockdomains in this powerdomain
94 * @node: list_head linking all powerdomains
95 * @state:
96 * @state_counter:
97 * @timer:
98 * @state_timer:
Paul Walmsleya64bb9c2010-12-21 21:05:14 -070099 *
100 * @prcm_partition possible values are defined in mach-omap2/prcm44xx.h.
Paul Walmsleyf0271d62010-01-26 20:13:02 -0700101 */
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300102struct powerdomain {
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300103 const char *name;
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300104 const struct omap_chip_id omap_chip;
Paul Walmsleye0594b42010-01-26 20:13:01 -0700105 const s16 prcm_offs;
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300106 const u8 pwrsts;
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300107 const u8 pwrsts_logic_ret;
Paul Walmsley0b7cbfb2008-06-25 18:09:37 -0600108 const u8 flags;
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300109 const u8 banks;
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300110 const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS];
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300111 const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS];
Paul Walmsleya64bb9c2010-12-21 21:05:14 -0700112 const u8 prcm_partition;
Paul Walmsley8420bb12008-08-19 11:08:44 +0300113 struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS];
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300114 struct list_head node;
Peter 'p2' De Schrijverba20bb12008-10-15 17:48:43 +0300115 int state;
Paul Walmsley2354eb52009-12-08 16:33:12 -0700116 unsigned state_counter[PWRDM_MAX_PWRSTS];
Thara Gopinathcde08f82010-02-24 12:05:50 -0700117 unsigned ret_logic_off_counter;
118 unsigned ret_mem_off_counter[PWRDM_MAX_MEM_BANKS];
Peter 'p2' De Schrijver331b93f2008-10-15 18:13:48 +0300119
120#ifdef CONFIG_PM_DEBUG
121 s64 timer;
Paul Walmsley2354eb52009-12-08 16:33:12 -0700122 s64 state_timer[PWRDM_MAX_PWRSTS];
Peter 'p2' De Schrijver331b93f2008-10-15 18:13:48 +0300123#endif
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300124};
125
Rajendra Nayak3b1e8b22010-12-21 20:01:18 -0700126/**
127 * struct pwrdm_ops - Arch specfic function implementations
128 * @pwrdm_set_next_pwrst: Set the target power state for a pd
129 * @pwrdm_read_next_pwrst: Read the target power state set for a pd
130 * @pwrdm_read_pwrst: Read the current power state of a pd
131 * @pwrdm_read_prev_pwrst: Read the prev power state entered by the pd
132 * @pwrdm_set_logic_retst: Set the logic state in RET for a pd
133 * @pwrdm_set_mem_onst: Set the Memory state in ON for a pd
134 * @pwrdm_set_mem_retst: Set the Memory state in RET for a pd
135 * @pwrdm_read_logic_pwrst: Read the current logic state of a pd
136 * @pwrdm_read_prev_logic_pwrst: Read the previous logic state entered by a pd
137 * @pwrdm_read_logic_retst: Read the logic state in RET for a pd
138 * @pwrdm_read_mem_pwrst: Read the current memory state of a pd
139 * @pwrdm_read_prev_mem_pwrst: Read the previous memory state entered by a pd
140 * @pwrdm_read_mem_retst: Read the memory state in RET for a pd
141 * @pwrdm_clear_all_prev_pwrst: Clear all previous power states logged for a pd
142 * @pwrdm_enable_hdwr_sar: Enable Hardware Save-Restore feature for the pd
143 * @pwrdm_disable_hdwr_sar: Disable Hardware Save-Restore feature for a pd
144 * @pwrdm_set_lowpwrstchange: Enable pd transitions from a shallow to deep sleep
145 * @pwrdm_wait_transition: Wait for a pd state transition to complete
146 */
147struct pwrdm_ops {
148 int (*pwrdm_set_next_pwrst)(struct powerdomain *pwrdm, u8 pwrst);
149 int (*pwrdm_read_next_pwrst)(struct powerdomain *pwrdm);
150 int (*pwrdm_read_pwrst)(struct powerdomain *pwrdm);
151 int (*pwrdm_read_prev_pwrst)(struct powerdomain *pwrdm);
152 int (*pwrdm_set_logic_retst)(struct powerdomain *pwrdm, u8 pwrst);
153 int (*pwrdm_set_mem_onst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
154 int (*pwrdm_set_mem_retst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
155 int (*pwrdm_read_logic_pwrst)(struct powerdomain *pwrdm);
156 int (*pwrdm_read_prev_logic_pwrst)(struct powerdomain *pwrdm);
157 int (*pwrdm_read_logic_retst)(struct powerdomain *pwrdm);
158 int (*pwrdm_read_mem_pwrst)(struct powerdomain *pwrdm, u8 bank);
159 int (*pwrdm_read_prev_mem_pwrst)(struct powerdomain *pwrdm, u8 bank);
160 int (*pwrdm_read_mem_retst)(struct powerdomain *pwrdm, u8 bank);
161 int (*pwrdm_clear_all_prev_pwrst)(struct powerdomain *pwrdm);
162 int (*pwrdm_enable_hdwr_sar)(struct powerdomain *pwrdm);
163 int (*pwrdm_disable_hdwr_sar)(struct powerdomain *pwrdm);
164 int (*pwrdm_set_lowpwrstchange)(struct powerdomain *pwrdm);
165 int (*pwrdm_wait_transition)(struct powerdomain *pwrdm);
166};
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300167
Rajendra Nayak74bea6b2010-12-21 20:01:17 -0700168void pwrdm_fw_init(void);
Rajendra Nayak3b1e8b22010-12-21 20:01:18 -0700169void pwrdm_init(struct powerdomain **pwrdm_list, struct pwrdm_ops *custom_funcs);
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300170
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300171struct powerdomain *pwrdm_lookup(const char *name);
172
Peter 'p2' De Schrijvera23456e2008-10-15 18:13:47 +0300173int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
174 void *user);
Artem Bityutskiyee894b12009-10-01 10:01:55 +0300175int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user),
176 void *user);
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300177
Paul Walmsley8420bb12008-08-19 11:08:44 +0300178int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
179int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
180int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
181 int (*fn)(struct powerdomain *pwrdm,
182 struct clockdomain *clkdm));
183
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300184int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm);
185
186int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
187int pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
Paul Walmsleyfecb4942009-01-27 19:12:50 -0700188int pwrdm_read_pwrst(struct powerdomain *pwrdm);
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300189int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm);
190int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm);
191
192int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst);
193int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
194int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
195
196int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm);
197int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm);
Thara Gopinath1e3d0d22010-02-24 12:05:49 -0700198int pwrdm_read_logic_retst(struct powerdomain *pwrdm);
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300199int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
200int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
Thara Gopinath1e3d0d22010-02-24 12:05:49 -0700201int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank);
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300202
Paul Walmsley0b7cbfb2008-06-25 18:09:37 -0600203int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm);
204int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm);
205bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
206
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300207int pwrdm_wait_transition(struct powerdomain *pwrdm);
208
Peter 'p2' De Schrijverba20bb12008-10-15 17:48:43 +0300209int pwrdm_state_switch(struct powerdomain *pwrdm);
210int pwrdm_clkdm_state_switch(struct clockdomain *clkdm);
211int pwrdm_pre_transition(void);
212int pwrdm_post_transition(void);
Manjunath Kondaiah G04aeae72010-10-08 09:58:35 -0700213int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm);
Peter 'p2' De Schrijverba20bb12008-10-15 17:48:43 +0300214
Paul Walmsley6e014782010-12-21 20:01:20 -0700215extern void omap2xxx_powerdomains_init(void);
216extern void omap3xxx_powerdomains_init(void);
217extern void omap44xx_powerdomains_init(void);
218
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300219#endif