blob: f83c87e447bc5f63802743eb9e7875f594396e9a [file] [log] [blame]
Eric W. Biederman3b7d1922006-10-04 02:16:59 -07001#ifndef LINUX_MSI_H
2#define LINUX_MSI_H
3
Neil Hormanb50cac52011-10-06 14:08:18 -04004#include <linux/kobject.h>
Michael Ellerman4aa9bc92007-04-05 17:19:10 +10005#include <linux/list.h>
6
Eric W. Biederman3b7d1922006-10-04 02:16:59 -07007struct msi_msg {
8 u32 address_lo; /* low 32 bits of msi message address */
9 u32 address_hi; /* high 32 bits of msi message address */
10 u32 data; /* 16 bits of msi message data */
11};
12
Yijing Wang38737d82014-10-27 10:44:36 +080013extern int pci_msi_ignore_mask;
Satoru Takeuchic54c1872007-01-18 13:50:05 +090014/* Helper functions */
Thomas Gleixner1c9db522010-09-28 16:46:51 +020015struct irq_data;
Thomas Gleixner39431ac2010-09-28 19:09:51 +020016struct msi_desc;
Jiang Liu25a98bd2015-07-09 16:00:45 +080017struct pci_dev;
Bjorn Helgaas2366d062013-04-18 10:55:46 -060018void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
Bjorn Helgaas2366d062013-04-18 10:55:46 -060019void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
Jiang Liu891d4a42014-11-09 23:10:33 +080020
Jiang Liufc884192015-07-09 16:00:46 +080021/**
22 * struct msi_desc - Descriptor structure for MSI based interrupts
23 * @list: List head for management
24 * @irq: The base interrupt number
25 * @nvec_used: The number of vectors used
26 * @dev: Pointer to the device which uses this descriptor
27 * @msg: The last set MSI message cached for reuse
28 *
29 * @masked: [PCI MSI/X] Mask bits
30 * @is_msix: [PCI MSI/X] True if MSI-X
31 * @multiple: [PCI MSI/X] log2 num of messages allocated
32 * @multi_cap: [PCI MSI/X] log2 num of messages supported
33 * @maskbit: [PCI MSI/X] Mask-Pending bit supported?
34 * @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit
35 * @entry_nr: [PCI MSI/X] Entry which is described by this descriptor
36 * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
37 * @mask_pos: [PCI MSI] Mask register position
38 * @mask_base: [PCI MSI-X] Mask register base address
39 */
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070040struct msi_desc {
Jiang Liufc884192015-07-09 16:00:46 +080041 /* Shared device/bus type independent data */
42 struct list_head list;
43 unsigned int irq;
44 unsigned int nvec_used;
45 struct device *dev;
46 struct msi_msg msg;
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070047
Matthew Wilcox264d9ca2009-03-17 08:54:08 -040048 union {
Jiang Liufc884192015-07-09 16:00:46 +080049 /* PCI MSI/X specific data */
50 struct {
51 u32 masked;
52 struct {
53 __u8 is_msix : 1;
54 __u8 multiple : 3;
55 __u8 multi_cap : 3;
56 __u8 maskbit : 1;
57 __u8 is_64 : 1;
58 __u16 entry_nr;
59 unsigned default_irq;
60 } msi_attrib;
61 union {
62 u8 mask_pos;
63 void __iomem *mask_base;
64 };
65 };
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070066
Jiang Liufc884192015-07-09 16:00:46 +080067 /*
68 * Non PCI variants add their data structure here. New
69 * entries need to use a named structure. We want
70 * proper name spaces for this. The PCI part is
71 * anonymous for now as it would require an immediate
72 * tree wide cleanup.
73 */
74 };
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070075};
76
Jiang Liud31eb342014-11-15 22:24:03 +080077/* Helpers to hide struct msi_desc implementation details */
Jiang Liu25a98bd2015-07-09 16:00:45 +080078#define msi_desc_to_dev(desc) ((desc)->dev)
Jiang Liu4a7cc832015-07-09 16:00:44 +080079#define dev_to_msi_list(dev) (&(dev)->msi_list)
Jiang Liud31eb342014-11-15 22:24:03 +080080#define first_msi_entry(dev) \
81 list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list)
82#define for_each_msi_entry(desc, dev) \
83 list_for_each_entry((desc), dev_to_msi_list((dev)), list)
84
85#ifdef CONFIG_PCI_MSI
86#define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev)
87#define for_each_pci_msi_entry(desc, pdev) \
88 for_each_msi_entry((desc), &(pdev)->dev)
89
Jiang Liu25a98bd2015-07-09 16:00:45 +080090struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc);
Jiang Liuc179c9b2015-07-09 16:00:36 +080091void *msi_desc_to_pci_sysdata(struct msi_desc *desc);
92#else /* CONFIG_PCI_MSI */
93static inline void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
94{
95 return NULL;
96}
Jiang Liud31eb342014-11-15 22:24:03 +080097#endif /* CONFIG_PCI_MSI */
98
Jiang Liuaa48b6f2015-07-09 16:00:47 +080099struct msi_desc *alloc_msi_entry(struct device *dev);
100void free_msi_entry(struct msi_desc *entry);
Jiang Liu891d4a42014-11-09 23:10:33 +0800101void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
Jiang Liu83a18912014-11-09 23:10:34 +0800102void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
103void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
104
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100105u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag);
106u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
107void pci_msi_mask_irq(struct irq_data *data);
108void pci_msi_unmask_irq(struct irq_data *data);
109
Jiang Liu83a18912014-11-09 23:10:34 +0800110/* Conversion helpers. Should be removed after merging */
111static inline void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
112{
113 __pci_write_msi_msg(entry, msg);
114}
115static inline void write_msi_msg(int irq, struct msi_msg *msg)
116{
117 pci_write_msi_msg(irq, msg);
118}
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100119static inline void mask_msi_irq(struct irq_data *data)
120{
121 pci_msi_mask_irq(data);
122}
123static inline void unmask_msi_irq(struct irq_data *data)
124{
125 pci_msi_unmask_irq(data);
126}
Jiang Liu891d4a42014-11-09 23:10:33 +0800127
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700128/*
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200129 * The arch hooks to setup up msi irqs. Those functions are
130 * implemented as weak symbols so that they /can/ be overriden by
131 * architecture specific code if needed.
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700132 */
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700133int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700134void arch_teardown_msi_irq(unsigned int irq);
Bjorn Helgaas2366d062013-04-18 10:55:46 -0600135int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
136void arch_teardown_msi_irqs(struct pci_dev *dev);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800137void arch_restore_msi_irqs(struct pci_dev *dev);
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200138
139void default_teardown_msi_irqs(struct pci_dev *dev);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800140void default_restore_msi_irqs(struct pci_dev *dev);
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700141
Yijing Wangc2791b82014-11-11 17:45:45 -0700142struct msi_controller {
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200143 struct module *owner;
144 struct device *dev;
Thomas Petazzoni0d5a6db2013-08-09 22:27:09 +0200145 struct device_node *of_node;
146 struct list_head list;
Marc Zyngier020c3122014-11-15 10:49:12 +0000147#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
148 struct irq_domain *domain;
149#endif
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200150
Yijing Wangc2791b82014-11-11 17:45:45 -0700151 int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200152 struct msi_desc *desc);
Yijing Wangc2791b82014-11-11 17:45:45 -0700153 void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200154};
155
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100156#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
Jiang Liud9109692014-11-15 22:24:04 +0800157
Jiang Liuaeeb5962014-11-15 22:24:05 +0800158#include <linux/irqhandler.h>
Jiang Liud9109692014-11-15 22:24:04 +0800159#include <asm/msi.h>
160
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100161struct irq_domain;
162struct irq_chip;
163struct device_node;
164struct msi_domain_info;
165
166/**
167 * struct msi_domain_ops - MSI interrupt domain callbacks
168 * @get_hwirq: Retrieve the resulting hw irq number
169 * @msi_init: Domain specific init function for MSI interrupts
170 * @msi_free: Domain specific function to free a MSI interrupts
Jiang Liud9109692014-11-15 22:24:04 +0800171 * @msi_check: Callback for verification of the domain/info/dev data
172 * @msi_prepare: Prepare the allocation of the interrupts in the domain
173 * @msi_finish: Optional callbacl to finalize the allocation
174 * @set_desc: Set the msi descriptor for an interrupt
175 * @handle_error: Optional error handler if the allocation fails
176 *
177 * @get_hwirq, @msi_init and @msi_free are callbacks used by
178 * msi_create_irq_domain() and related interfaces
179 *
180 * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error
181 * are callbacks used by msi_irq_domain_alloc_irqs() and related
182 * interfaces which are based on msi_desc.
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100183 */
184struct msi_domain_ops {
Jiang Liuaeeb5962014-11-15 22:24:05 +0800185 irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info,
186 msi_alloc_info_t *arg);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100187 int (*msi_init)(struct irq_domain *domain,
188 struct msi_domain_info *info,
189 unsigned int virq, irq_hw_number_t hwirq,
Jiang Liuaeeb5962014-11-15 22:24:05 +0800190 msi_alloc_info_t *arg);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100191 void (*msi_free)(struct irq_domain *domain,
192 struct msi_domain_info *info,
193 unsigned int virq);
Jiang Liud9109692014-11-15 22:24:04 +0800194 int (*msi_check)(struct irq_domain *domain,
195 struct msi_domain_info *info,
196 struct device *dev);
197 int (*msi_prepare)(struct irq_domain *domain,
198 struct device *dev, int nvec,
199 msi_alloc_info_t *arg);
200 void (*msi_finish)(msi_alloc_info_t *arg, int retval);
201 void (*set_desc)(msi_alloc_info_t *arg,
202 struct msi_desc *desc);
203 int (*handle_error)(struct irq_domain *domain,
204 struct msi_desc *desc, int error);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100205};
206
207/**
208 * struct msi_domain_info - MSI interrupt domain data
Jiang Liuaeeb5962014-11-15 22:24:05 +0800209 * @flags: Flags to decribe features and capabilities
210 * @ops: The callback data structure
211 * @chip: Optional: associated interrupt chip
212 * @chip_data: Optional: associated interrupt chip data
213 * @handler: Optional: associated interrupt flow handler
214 * @handler_data: Optional: associated interrupt flow handler data
215 * @handler_name: Optional: associated interrupt flow handler name
216 * @data: Optional: domain specific data
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100217 */
218struct msi_domain_info {
Jiang Liuaeeb5962014-11-15 22:24:05 +0800219 u32 flags;
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100220 struct msi_domain_ops *ops;
221 struct irq_chip *chip;
Jiang Liuaeeb5962014-11-15 22:24:05 +0800222 void *chip_data;
223 irq_flow_handler_t handler;
224 void *handler_data;
225 const char *handler_name;
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100226 void *data;
227};
228
Jiang Liuaeeb5962014-11-15 22:24:05 +0800229/* Flags for msi_domain_info */
230enum {
231 /*
232 * Init non implemented ops callbacks with default MSI domain
233 * callbacks.
234 */
235 MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0),
236 /*
237 * Init non implemented chip callbacks with default MSI chip
238 * callbacks.
239 */
240 MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1),
241 /* Build identity map between hwirq and irq */
242 MSI_FLAG_IDENTITY_MAP = (1 << 2),
243 /* Support multiple PCI MSI interrupts */
244 MSI_FLAG_MULTI_PCI_MSI = (1 << 3),
245 /* Support PCI MSIX interrupts */
246 MSI_FLAG_PCI_MSIX = (1 << 4),
247};
248
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100249int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
250 bool force);
251
252struct irq_domain *msi_create_irq_domain(struct device_node *of_node,
253 struct msi_domain_info *info,
254 struct irq_domain *parent);
Jiang Liud9109692014-11-15 22:24:04 +0800255int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
256 int nvec);
257void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100258struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
259
260#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
261
Jiang Liu3878eae2014-11-11 21:02:18 +0800262#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
263void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg);
264struct irq_domain *pci_msi_create_irq_domain(struct device_node *node,
265 struct msi_domain_info *info,
266 struct irq_domain *parent);
267int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev,
268 int nvec, int type);
269void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev);
Jiang Liu8e047ad2014-11-15 22:24:07 +0800270struct irq_domain *pci_msi_create_default_irq_domain(struct device_node *node,
271 struct msi_domain_info *info, struct irq_domain *parent);
272
Jiang Liu3878eae2014-11-11 21:02:18 +0800273irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
274 struct msi_desc *desc);
275int pci_msi_domain_check_cap(struct irq_domain *domain,
276 struct msi_domain_info *info, struct device *dev);
277#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
278
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700279#endif /* LINUX_MSI_H */