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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Copyright (c) 1999-2001 Vojtech Pavlik
Bartlomiej Zolnierkiewiczc9d6c1a2008-07-16 20:33:39 +02003 * Copyright (c) 2007-2008 Bartlomiej Zolnierkiewicz
Bartlomiej Zolnierkiewicz2c139e72008-07-16 20:33:36 +02004 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 *
19 * Should you need to contact me, the author, you can do so either by
20 * e-mail - mail your message to <vojtech@ucw.cz>, or by paper mail:
21 * Vojtech Pavlik, Simunkova 1594, Prague 8, 182 00 Czech Republic
22 */
23
Clemens Buchacher2665b892005-09-10 00:27:00 -070024#include <linux/kernel.h>
Bartlomiej Zolnierkiewiczf06ab342008-07-16 20:33:37 +020025#include <linux/ide.h>
26#include <linux/module.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Linus Torvalds1da177e2005-04-16 15:20:36 -070028/*
29 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
30 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
31 * for PIO 5, which is a nonstandard extension and UDMA6, which
Bartlomiej Zolnierkiewicz2c139e72008-07-16 20:33:36 +020032 * is currently supported only by Maxtor drives.
Linus Torvalds1da177e2005-04-16 15:20:36 -070033 */
34
35static struct ide_timing ide_timing[] = {
36
37 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
38 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
39 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
40 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
41
42 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
43 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
44 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
45
Linus Torvalds1da177e2005-04-16 15:20:36 -070046 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
47 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
48 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
Bartlomiej Zolnierkiewiczf0ffc982008-07-16 20:33:36 +020049
Linus Torvalds1da177e2005-04-16 15:20:36 -070050 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
51 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
52 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
53
54 { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 },
55 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
56 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
57
58 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
59 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
60 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
61
62 { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 },
63
Bartlomiej Zolnierkiewicz71d51612008-07-16 20:33:36 +020064 { 0xff }
Linus Torvalds1da177e2005-04-16 15:20:36 -070065};
66
Bartlomiej Zolnierkiewiczf06ab342008-07-16 20:33:37 +020067struct ide_timing *ide_timing_find_mode(u8 speed)
68{
69 struct ide_timing *t;
70
71 for (t = ide_timing; t->mode != speed; t++)
72 if (t->mode == 0xff)
73 return NULL;
74 return t;
75}
76EXPORT_SYMBOL_GPL(ide_timing_find_mode);
77
Bartlomiej Zolnierkiewiczc9d6c1a2008-07-16 20:33:39 +020078u16 ide_pio_cycle_time(ide_drive_t *drive, u8 pio)
79{
Bartlomiej Zolnierkiewicz4dde4492008-10-10 22:39:19 +020080 u16 *id = drive->id;
Bartlomiej Zolnierkiewiczc9d6c1a2008-07-16 20:33:39 +020081 struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
82 u16 cycle = 0;
83
Bartlomiej Zolnierkiewicz4dde4492008-10-10 22:39:19 +020084 if (id[ATA_ID_FIELD_VALID] & 2) {
Bartlomiej Zolnierkiewicz48fb2682008-10-10 22:39:19 +020085 if (ata_id_has_iordy(drive->id))
Bartlomiej Zolnierkiewicz4dde4492008-10-10 22:39:19 +020086 cycle = id[ATA_ID_EIDE_PIO_IORDY];
Bartlomiej Zolnierkiewiczc9d6c1a2008-07-16 20:33:39 +020087 else
Bartlomiej Zolnierkiewicz4dde4492008-10-10 22:39:19 +020088 cycle = id[ATA_ID_EIDE_PIO];
Bartlomiej Zolnierkiewiczc9d6c1a2008-07-16 20:33:39 +020089
90 /* conservative "downgrade" for all pre-ATA2 drives */
91 if (pio < 3 && cycle < t->cycle)
92 cycle = 0; /* use standard timing */
93 }
94
95 return cycle ? cycle : t->cycle;
96}
97EXPORT_SYMBOL_GPL(ide_pio_cycle_time);
98
Bartlomiej Zolnierkiewicz2c139e72008-07-16 20:33:36 +020099#define ENOUGH(v, unit) (((v) - 1) / (unit) + 1)
100#define EZ(v, unit) ((v) ? ENOUGH(v, unit) : 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101
Bartlomiej Zolnierkiewicz2c139e72008-07-16 20:33:36 +0200102static void ide_timing_quantize(struct ide_timing *t, struct ide_timing *q,
103 int T, int UT)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104{
105 q->setup = EZ(t->setup * 1000, T);
106 q->act8b = EZ(t->act8b * 1000, T);
107 q->rec8b = EZ(t->rec8b * 1000, T);
108 q->cyc8b = EZ(t->cyc8b * 1000, T);
109 q->active = EZ(t->active * 1000, T);
110 q->recover = EZ(t->recover * 1000, T);
111 q->cycle = EZ(t->cycle * 1000, T);
112 q->udma = EZ(t->udma * 1000, UT);
113}
114
Bartlomiej Zolnierkiewiczf06ab342008-07-16 20:33:37 +0200115void ide_timing_merge(struct ide_timing *a, struct ide_timing *b,
116 struct ide_timing *m, unsigned int what)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117{
Bartlomiej Zolnierkiewicz2c139e72008-07-16 20:33:36 +0200118 if (what & IDE_TIMING_SETUP)
119 m->setup = max(a->setup, b->setup);
120 if (what & IDE_TIMING_ACT8B)
121 m->act8b = max(a->act8b, b->act8b);
122 if (what & IDE_TIMING_REC8B)
123 m->rec8b = max(a->rec8b, b->rec8b);
124 if (what & IDE_TIMING_CYC8B)
125 m->cyc8b = max(a->cyc8b, b->cyc8b);
126 if (what & IDE_TIMING_ACTIVE)
127 m->active = max(a->active, b->active);
128 if (what & IDE_TIMING_RECOVER)
129 m->recover = max(a->recover, b->recover);
130 if (what & IDE_TIMING_CYCLE)
131 m->cycle = max(a->cycle, b->cycle);
132 if (what & IDE_TIMING_UDMA)
133 m->udma = max(a->udma, b->udma);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134}
Bartlomiej Zolnierkiewiczf06ab342008-07-16 20:33:37 +0200135EXPORT_SYMBOL_GPL(ide_timing_merge);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136
Bartlomiej Zolnierkiewiczf06ab342008-07-16 20:33:37 +0200137int ide_timing_compute(ide_drive_t *drive, u8 speed,
138 struct ide_timing *t, int T, int UT)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139{
Bartlomiej Zolnierkiewicz4dde4492008-10-10 22:39:19 +0200140 u16 *id = drive->id;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141 struct ide_timing *s, p;
142
Bartlomiej Zolnierkiewicz2c139e72008-07-16 20:33:36 +0200143 /*
144 * Find the mode.
145 */
146 s = ide_timing_find_mode(speed);
147 if (s == NULL)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148 return -EINVAL;
149
Bartlomiej Zolnierkiewicz2c139e72008-07-16 20:33:36 +0200150 /*
151 * Copy the timing from the table.
152 */
Sergei Shtylyov17c10332006-06-26 00:26:15 -0700153 *t = *s;
154
Bartlomiej Zolnierkiewicz2c139e72008-07-16 20:33:36 +0200155 /*
156 * If the drive is an EIDE drive, it can tell us it needs extended
157 * PIO/MWDMA cycle timing.
158 */
Bartlomiej Zolnierkiewicz4dde4492008-10-10 22:39:19 +0200159 if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160 memset(&p, 0, sizeof(p));
161
Bartlomiej Zolnierkiewiczbd887f72008-07-16 20:33:36 +0200162 if (speed <= XFER_PIO_2)
Bartlomiej Zolnierkiewicz4dde4492008-10-10 22:39:19 +0200163 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
Bartlomiej Zolnierkiewiczbd887f72008-07-16 20:33:36 +0200164 else if (speed <= XFER_PIO_5)
Bartlomiej Zolnierkiewicz4dde4492008-10-10 22:39:19 +0200165 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
Bartlomiej Zolnierkiewiczbd887f72008-07-16 20:33:36 +0200166 else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
Bartlomiej Zolnierkiewicz4dde4492008-10-10 22:39:19 +0200167 p.cycle = id[ATA_ID_EIDE_DMA_MIN];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168
169 ide_timing_merge(&p, t, t, IDE_TIMING_CYCLE | IDE_TIMING_CYC8B);
170 }
171
Bartlomiej Zolnierkiewicz2c139e72008-07-16 20:33:36 +0200172 /*
173 * Convert the timing to bus clock counts.
174 */
Sergei Shtylyov17c10332006-06-26 00:26:15 -0700175 ide_timing_quantize(t, t, T, UT);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176
Bartlomiej Zolnierkiewicz2c139e72008-07-16 20:33:36 +0200177 /*
178 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
179 * S.M.A.R.T and some other commands. We have to ensure that the
180 * DMA cycle timing is slower/equal than the fastest PIO timing.
181 */
Bartlomiej Zolnierkiewiczbd887f72008-07-16 20:33:36 +0200182 if (speed >= XFER_SW_DMA_0) {
Bartlomiej Zolnierkiewicz6a824c92007-07-20 01:11:58 +0200183 u8 pio = ide_get_best_pio_mode(drive, 255, 5);
184 ide_timing_compute(drive, XFER_PIO_0 + pio, &p, T, UT);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185 ide_timing_merge(&p, t, t, IDE_TIMING_ALL);
186 }
187
Bartlomiej Zolnierkiewicz2c139e72008-07-16 20:33:36 +0200188 /*
189 * Lengthen active & recovery time so that cycle time is correct.
190 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700191 if (t->act8b + t->rec8b < t->cyc8b) {
192 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
193 t->rec8b = t->cyc8b - t->act8b;
194 }
195
196 if (t->active + t->recover < t->cycle) {
197 t->active += (t->cycle - (t->active + t->recover)) / 2;
198 t->recover = t->cycle - t->active;
199 }
200
201 return 0;
202}
Bartlomiej Zolnierkiewiczf06ab342008-07-16 20:33:37 +0200203EXPORT_SYMBOL_GPL(ide_timing_compute);