Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/mtd/nand.c |
| 3 | * |
| 4 | * Overview: |
| 5 | * This is the generic MTD driver for NAND flash devices. It should be |
| 6 | * capable of working with almost all NAND chips currently available. |
| 7 | * Basic support for AG-AND chips is provided. |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 8 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | * Additional technical information is available on |
| 10 | * http://www.linux-mtd.infradead.org/tech/nand.html |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 11 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 13 | * 2002-2006 Thomas Gleixner (tglx@linutronix.de) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 15 | * Credits: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 16 | * David Woodhouse for adding multichip support |
| 17 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 | * Aleph One Ltd. and Toby Churchill Ltd. for supporting the |
| 19 | * rework for 2K page size chips |
| 20 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 21 | * TODO: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | * Enable cached programming for 2k page size chips |
| 23 | * Check, if mtd->ecctype should be set to MTD_ECC_HW |
| 24 | * if we have HW ecc support. |
| 25 | * The AG-AND chips have nice features for speed improvement, |
| 26 | * which are not supported yet. Read / program 4 pages in one go. |
| 27 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | * This program is free software; you can redistribute it and/or modify |
| 29 | * it under the terms of the GNU General Public License version 2 as |
| 30 | * published by the Free Software Foundation. |
| 31 | * |
| 32 | */ |
| 33 | |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 34 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #include <linux/delay.h> |
| 36 | #include <linux/errno.h> |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 37 | #include <linux/err.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | #include <linux/sched.h> |
| 39 | #include <linux/slab.h> |
| 40 | #include <linux/types.h> |
| 41 | #include <linux/mtd/mtd.h> |
| 42 | #include <linux/mtd/nand.h> |
| 43 | #include <linux/mtd/nand_ecc.h> |
| 44 | #include <linux/mtd/compatmac.h> |
| 45 | #include <linux/interrupt.h> |
| 46 | #include <linux/bitops.h> |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 47 | #include <linux/leds.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | #include <asm/io.h> |
| 49 | |
| 50 | #ifdef CONFIG_MTD_PARTITIONS |
| 51 | #include <linux/mtd/partitions.h> |
| 52 | #endif |
| 53 | |
| 54 | /* Define default oob placement schemes for large and small page devices */ |
| 55 | static struct nand_oobinfo nand_oob_8 = { |
| 56 | .useecc = MTD_NANDECC_AUTOPLACE, |
| 57 | .eccbytes = 3, |
| 58 | .eccpos = {0, 1, 2}, |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 59 | .oobfree = {{3, 2}, {6, 2}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | }; |
| 61 | |
| 62 | static struct nand_oobinfo nand_oob_16 = { |
| 63 | .useecc = MTD_NANDECC_AUTOPLACE, |
| 64 | .eccbytes = 6, |
| 65 | .eccpos = {0, 1, 2, 3, 6, 7}, |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 66 | .oobfree = {{8, 8}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | }; |
| 68 | |
| 69 | static struct nand_oobinfo nand_oob_64 = { |
| 70 | .useecc = MTD_NANDECC_AUTOPLACE, |
| 71 | .eccbytes = 24, |
| 72 | .eccpos = { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 73 | 40, 41, 42, 43, 44, 45, 46, 47, |
| 74 | 48, 49, 50, 51, 52, 53, 54, 55, |
| 75 | 56, 57, 58, 59, 60, 61, 62, 63}, |
| 76 | .oobfree = {{2, 38}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | }; |
| 78 | |
| 79 | /* This is used for padding purposes in nand_write_oob */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 80 | static uint8_t ffchars[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 81 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 82 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 83 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 84 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 85 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 86 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 87 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 88 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 89 | }; |
| 90 | |
| 91 | /* |
| 92 | * NAND low-level MTD interface functions |
| 93 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 94 | static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len); |
| 95 | static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len); |
| 96 | static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 98 | static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 99 | size_t *retlen, uint8_t *buf); |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 100 | static int nand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 101 | size_t *retlen, uint8_t *buf); |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 102 | static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 103 | size_t *retlen, const uint8_t *buf); |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 104 | static int nand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 105 | size_t *retlen, const uint8_t *buf); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 106 | static int nand_erase(struct mtd_info *mtd, struct erase_info *instr); |
| 107 | static void nand_sync(struct mtd_info *mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 108 | |
| 109 | /* Some internal functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 110 | static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 111 | int page, uint8_t * oob_buf, |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 112 | struct nand_oobinfo *oobsel, int mode); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 113 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 114 | static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *chip, |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 115 | int page, int numpages, uint8_t *oob_buf, |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 116 | struct nand_oobinfo *oobsel, int chipnr, |
| 117 | int oobmode); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 118 | #else |
| 119 | #define nand_verify_pages(...) (0) |
| 120 | #endif |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 121 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 122 | static int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 123 | int new_state); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 124 | |
Thomas Gleixner | d470a97 | 2006-05-23 23:48:57 +0200 | [diff] [blame] | 125 | /* |
| 126 | * For devices which display every fart in the system on a seperate LED. Is |
| 127 | * compiled away when LED support is disabled. |
| 128 | */ |
| 129 | DEFINE_LED_TRIGGER(nand_led_trigger); |
| 130 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 131 | /** |
| 132 | * nand_release_device - [GENERIC] release chip |
| 133 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 134 | * |
| 135 | * Deselect, release chip lock and wake up anyone waiting on the device |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 136 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 137 | static void nand_release_device(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 138 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 139 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | |
| 141 | /* De-select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 142 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 143 | |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 144 | /* Release the controller and the chip */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 145 | spin_lock(&chip->controller->lock); |
| 146 | chip->controller->active = NULL; |
| 147 | chip->state = FL_READY; |
| 148 | wake_up(&chip->controller->wq); |
| 149 | spin_unlock(&chip->controller->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 150 | } |
| 151 | |
| 152 | /** |
| 153 | * nand_read_byte - [DEFAULT] read one byte from the chip |
| 154 | * @mtd: MTD device structure |
| 155 | * |
| 156 | * Default read function for 8bit buswith |
| 157 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 158 | static uint8_t nand_read_byte(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 159 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 160 | struct nand_chip *chip = mtd->priv; |
| 161 | return readb(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 162 | } |
| 163 | |
| 164 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 165 | * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip |
| 166 | * @mtd: MTD device structure |
| 167 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 168 | * Default read function for 16bit buswith with |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | * endianess conversion |
| 170 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 171 | static uint8_t nand_read_byte16(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 172 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 173 | struct nand_chip *chip = mtd->priv; |
| 174 | return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 175 | } |
| 176 | |
| 177 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 178 | * nand_read_word - [DEFAULT] read one word from the chip |
| 179 | * @mtd: MTD device structure |
| 180 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 181 | * Default read function for 16bit buswith without |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 182 | * endianess conversion |
| 183 | */ |
| 184 | static u16 nand_read_word(struct mtd_info *mtd) |
| 185 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 186 | struct nand_chip *chip = mtd->priv; |
| 187 | return readw(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 188 | } |
| 189 | |
| 190 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 191 | * nand_select_chip - [DEFAULT] control CE line |
| 192 | * @mtd: MTD device structure |
| 193 | * @chip: chipnumber to select, -1 for deselect |
| 194 | * |
| 195 | * Default select function for 1 chip devices. |
| 196 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 197 | static void nand_select_chip(struct mtd_info *mtd, int chipnr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 198 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 199 | struct nand_chip *chip = mtd->priv; |
| 200 | |
| 201 | switch (chipnr) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | case -1: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 203 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | break; |
| 205 | case 0: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 206 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 207 | NAND_NCE | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 208 | break; |
| 209 | |
| 210 | default: |
| 211 | BUG(); |
| 212 | } |
| 213 | } |
| 214 | |
| 215 | /** |
| 216 | * nand_write_buf - [DEFAULT] write buffer to chip |
| 217 | * @mtd: MTD device structure |
| 218 | * @buf: data buffer |
| 219 | * @len: number of bytes to write |
| 220 | * |
| 221 | * Default write function for 8bit buswith |
| 222 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 223 | static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 224 | { |
| 225 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 226 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 227 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 228 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 229 | writeb(buf[i], chip->IO_ADDR_W); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | } |
| 231 | |
| 232 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 233 | * nand_read_buf - [DEFAULT] read chip data into buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 234 | * @mtd: MTD device structure |
| 235 | * @buf: buffer to store date |
| 236 | * @len: number of bytes to read |
| 237 | * |
| 238 | * Default read function for 8bit buswith |
| 239 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 240 | static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 241 | { |
| 242 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 243 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 244 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 245 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 246 | buf[i] = readb(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 247 | } |
| 248 | |
| 249 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 250 | * nand_verify_buf - [DEFAULT] Verify chip data against buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 251 | * @mtd: MTD device structure |
| 252 | * @buf: buffer containing the data to compare |
| 253 | * @len: number of bytes to compare |
| 254 | * |
| 255 | * Default verify function for 8bit buswith |
| 256 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 257 | static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 258 | { |
| 259 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 260 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 261 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 262 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 263 | if (buf[i] != readb(chip->IO_ADDR_R)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 264 | return -EFAULT; |
| 265 | |
| 266 | return 0; |
| 267 | } |
| 268 | |
| 269 | /** |
| 270 | * nand_write_buf16 - [DEFAULT] write buffer to chip |
| 271 | * @mtd: MTD device structure |
| 272 | * @buf: data buffer |
| 273 | * @len: number of bytes to write |
| 274 | * |
| 275 | * Default write function for 16bit buswith |
| 276 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 277 | static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | { |
| 279 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 280 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 281 | u16 *p = (u16 *) buf; |
| 282 | len >>= 1; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 283 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 284 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 285 | writew(p[i], chip->IO_ADDR_W); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 286 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 287 | } |
| 288 | |
| 289 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 290 | * nand_read_buf16 - [DEFAULT] read chip data into buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 291 | * @mtd: MTD device structure |
| 292 | * @buf: buffer to store date |
| 293 | * @len: number of bytes to read |
| 294 | * |
| 295 | * Default read function for 16bit buswith |
| 296 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 297 | static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 298 | { |
| 299 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 300 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 301 | u16 *p = (u16 *) buf; |
| 302 | len >>= 1; |
| 303 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 304 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 305 | p[i] = readw(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 306 | } |
| 307 | |
| 308 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 309 | * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | * @mtd: MTD device structure |
| 311 | * @buf: buffer containing the data to compare |
| 312 | * @len: number of bytes to compare |
| 313 | * |
| 314 | * Default verify function for 16bit buswith |
| 315 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 316 | static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 317 | { |
| 318 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 319 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 320 | u16 *p = (u16 *) buf; |
| 321 | len >>= 1; |
| 322 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 323 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 324 | if (p[i] != readw(chip->IO_ADDR_R)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 325 | return -EFAULT; |
| 326 | |
| 327 | return 0; |
| 328 | } |
| 329 | |
| 330 | /** |
| 331 | * nand_block_bad - [DEFAULT] Read bad block marker from the chip |
| 332 | * @mtd: MTD device structure |
| 333 | * @ofs: offset from device start |
| 334 | * @getchip: 0, if the chip is already selected |
| 335 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 336 | * Check, if the block is bad. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 337 | */ |
| 338 | static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) |
| 339 | { |
| 340 | int page, chipnr, res = 0; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 341 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 342 | u16 bad; |
| 343 | |
| 344 | if (getchip) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 345 | page = (int)(ofs >> chip->page_shift); |
| 346 | chipnr = (int)(ofs >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 347 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 348 | nand_get_device(chip, mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 349 | |
| 350 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 351 | chip->select_chip(mtd, chipnr); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 352 | } else |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 353 | page = (int)ofs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 354 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 355 | if (chip->options & NAND_BUSWIDTH_16) { |
| 356 | chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE, |
| 357 | page & chip->pagemask); |
| 358 | bad = cpu_to_le16(chip->read_word(mtd)); |
| 359 | if (chip->badblockpos & 0x1) |
Vitaly Wool | 49196f3 | 2005-11-02 16:54:46 +0000 | [diff] [blame] | 360 | bad >>= 8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 361 | if ((bad & 0xFF) != 0xff) |
| 362 | res = 1; |
| 363 | } else { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 364 | chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, |
| 365 | page & chip->pagemask); |
| 366 | if (chip->read_byte(mtd) != 0xff) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 367 | res = 1; |
| 368 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 369 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 370 | if (getchip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 371 | nand_release_device(mtd); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 372 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 373 | return res; |
| 374 | } |
| 375 | |
| 376 | /** |
| 377 | * nand_default_block_markbad - [DEFAULT] mark a block bad |
| 378 | * @mtd: MTD device structure |
| 379 | * @ofs: offset from device start |
| 380 | * |
| 381 | * This is the default implementation, which can be overridden by |
| 382 | * a hardware specific driver. |
| 383 | */ |
| 384 | static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) |
| 385 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 386 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 387 | uint8_t buf[2] = { 0, 0 }; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 388 | size_t retlen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 389 | int block; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 390 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 391 | /* Get block number */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 392 | block = ((int)ofs) >> chip->bbt_erase_shift; |
| 393 | if (chip->bbt) |
| 394 | chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 395 | |
| 396 | /* Do we have a flash based bad block table ? */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 397 | if (chip->options & NAND_USE_FLASH_BBT) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 398 | return nand_update_bbt(mtd, ofs); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 399 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 400 | /* We write two bytes, so we dont have to mess with 16 bit access */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 401 | ofs += mtd->oobsize + (chip->badblockpos & ~0x01); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 402 | return nand_write_oob(mtd, ofs, 2, &retlen, buf); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 403 | } |
| 404 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 405 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 406 | * nand_check_wp - [GENERIC] check if the chip is write protected |
| 407 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 408 | * Check, if the device is write protected |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 409 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 410 | * The function expects, that the device is already selected |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 411 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 412 | static int nand_check_wp(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 413 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 414 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 415 | /* Check the WP bit */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 416 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
| 417 | return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 418 | } |
| 419 | |
| 420 | /** |
| 421 | * nand_block_checkbad - [GENERIC] Check if a block is marked bad |
| 422 | * @mtd: MTD device structure |
| 423 | * @ofs: offset from device start |
| 424 | * @getchip: 0, if the chip is already selected |
| 425 | * @allowbbt: 1, if its allowed to access the bbt area |
| 426 | * |
| 427 | * Check, if the block is bad. Either by reading the bad block table or |
| 428 | * calling of the scan function. |
| 429 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 430 | static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, |
| 431 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 432 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 433 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 434 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 435 | if (!chip->bbt) |
| 436 | return chip->block_bad(mtd, ofs, getchip); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 437 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 438 | /* Return info from the table */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 439 | return nand_isbad_bbt(mtd, ofs, allowbbt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 440 | } |
| 441 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 442 | /* |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 443 | * Wait for the ready pin, after a command |
| 444 | * The timeout is catched later. |
| 445 | */ |
| 446 | static void nand_wait_ready(struct mtd_info *mtd) |
| 447 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 448 | struct nand_chip *chip = mtd->priv; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 449 | unsigned long timeo = jiffies + 2; |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 450 | |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 451 | led_trigger_event(nand_led_trigger, LED_FULL); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 452 | /* wait until command is processed or timeout occures */ |
| 453 | do { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 454 | if (chip->dev_ready(mtd)) |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 455 | break; |
Ingo Molnar | 8446f1d | 2005-09-06 15:16:27 -0700 | [diff] [blame] | 456 | touch_softlockup_watchdog(); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 457 | } while (time_before(jiffies, timeo)); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 458 | led_trigger_event(nand_led_trigger, LED_OFF); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 459 | } |
| 460 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 461 | /** |
| 462 | * nand_command - [DEFAULT] Send command to NAND device |
| 463 | * @mtd: MTD device structure |
| 464 | * @command: the command to be sent |
| 465 | * @column: the column address for this command, -1 if none |
| 466 | * @page_addr: the page address for this command, -1 if none |
| 467 | * |
| 468 | * Send command to NAND device. This function is used for small page |
| 469 | * devices (256/512 Bytes per page) |
| 470 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 471 | static void nand_command(struct mtd_info *mtd, unsigned int command, |
| 472 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 473 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 474 | register struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 475 | int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 476 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 477 | /* |
| 478 | * Write out the command to the device. |
| 479 | */ |
| 480 | if (command == NAND_CMD_SEQIN) { |
| 481 | int readcmd; |
| 482 | |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 483 | if (column >= mtd->writesize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 484 | /* OOB area */ |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 485 | column -= mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 486 | readcmd = NAND_CMD_READOOB; |
| 487 | } else if (column < 256) { |
| 488 | /* First 256 bytes --> READ0 */ |
| 489 | readcmd = NAND_CMD_READ0; |
| 490 | } else { |
| 491 | column -= 256; |
| 492 | readcmd = NAND_CMD_READ1; |
| 493 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 494 | chip->cmd_ctrl(mtd, readcmd, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 495 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 496 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 497 | chip->cmd_ctrl(mtd, command, ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 498 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 499 | /* |
| 500 | * Address cycle, when necessary |
| 501 | */ |
| 502 | ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE; |
| 503 | /* Serially input address */ |
| 504 | if (column != -1) { |
| 505 | /* Adjust columns for 16 bit buswidth */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 506 | if (chip->options & NAND_BUSWIDTH_16) |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 507 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 508 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 509 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 510 | } |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 511 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 512 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 513 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 514 | chip->cmd_ctrl(mtd, page_addr >> 8, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 515 | /* One more address cycle for devices > 32MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 516 | if (chip->chipsize > (32 << 20)) |
| 517 | chip->cmd_ctrl(mtd, page_addr >> 16, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 518 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 519 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 520 | |
| 521 | /* |
| 522 | * program and erase have their own busy handlers |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 523 | * status and sequential in needs no delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 524 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 525 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 526 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 527 | case NAND_CMD_PAGEPROG: |
| 528 | case NAND_CMD_ERASE1: |
| 529 | case NAND_CMD_ERASE2: |
| 530 | case NAND_CMD_SEQIN: |
| 531 | case NAND_CMD_STATUS: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 532 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 533 | return; |
| 534 | |
| 535 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 536 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 537 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 538 | udelay(chip->chip_delay); |
| 539 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 540 | NAND_CTRL_CLE | NAND_CTRL_CHANGE); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 541 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE); |
| 542 | while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 543 | return; |
| 544 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 545 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 546 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 547 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 548 | * If we don't have access to the busy pin, we apply the given |
| 549 | * command delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 550 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 551 | if (!chip->dev_ready) { |
| 552 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 553 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 554 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 555 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 556 | /* Apply this short delay always to ensure that we do wait tWB in |
| 557 | * any case on any machine. */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 558 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 559 | |
| 560 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 561 | } |
| 562 | |
| 563 | /** |
| 564 | * nand_command_lp - [DEFAULT] Send command to NAND large page device |
| 565 | * @mtd: MTD device structure |
| 566 | * @command: the command to be sent |
| 567 | * @column: the column address for this command, -1 if none |
| 568 | * @page_addr: the page address for this command, -1 if none |
| 569 | * |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 570 | * Send command to NAND device. This is the version for the new large page |
| 571 | * devices We dont have the separate regions as we have in the small page |
| 572 | * devices. We must emulate NAND_CMD_READOOB to keep the code compatible. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 573 | * |
| 574 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 575 | static void nand_command_lp(struct mtd_info *mtd, unsigned int command, |
| 576 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 577 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 578 | register struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 579 | |
| 580 | /* Emulate NAND_CMD_READOOB */ |
| 581 | if (command == NAND_CMD_READOOB) { |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 582 | column += mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 583 | command = NAND_CMD_READ0; |
| 584 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 585 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 586 | /* Command latch cycle */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 587 | chip->cmd_ctrl(mtd, command & 0xff, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 588 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 589 | |
| 590 | if (column != -1 || page_addr != -1) { |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 591 | int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 592 | |
| 593 | /* Serially input address */ |
| 594 | if (column != -1) { |
| 595 | /* Adjust columns for 16 bit buswidth */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 596 | if (chip->options & NAND_BUSWIDTH_16) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 597 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 598 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 599 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 600 | chip->cmd_ctrl(mtd, column >> 8, ctrl); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 601 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 602 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 603 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
| 604 | chip->cmd_ctrl(mtd, page_addr >> 8, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 605 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 606 | /* One more address cycle for devices > 128MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 607 | if (chip->chipsize > (128 << 20)) |
| 608 | chip->cmd_ctrl(mtd, page_addr >> 16, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 609 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 610 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 611 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 612 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 613 | |
| 614 | /* |
| 615 | * program and erase have their own busy handlers |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 616 | * status, sequential in, and deplete1 need no delay |
| 617 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 618 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 619 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 620 | case NAND_CMD_CACHEDPROG: |
| 621 | case NAND_CMD_PAGEPROG: |
| 622 | case NAND_CMD_ERASE1: |
| 623 | case NAND_CMD_ERASE2: |
| 624 | case NAND_CMD_SEQIN: |
| 625 | case NAND_CMD_STATUS: |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 626 | case NAND_CMD_DEPLETE1: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 627 | return; |
| 628 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 629 | /* |
| 630 | * read error status commands require only a short delay |
| 631 | */ |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 632 | case NAND_CMD_STATUS_ERROR: |
| 633 | case NAND_CMD_STATUS_ERROR0: |
| 634 | case NAND_CMD_STATUS_ERROR1: |
| 635 | case NAND_CMD_STATUS_ERROR2: |
| 636 | case NAND_CMD_STATUS_ERROR3: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 637 | udelay(chip->chip_delay); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 638 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 639 | |
| 640 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 641 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 642 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 643 | udelay(chip->chip_delay); |
| 644 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, NAND_NCE | NAND_CLE); |
| 645 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE); |
| 646 | while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 647 | return; |
| 648 | |
| 649 | case NAND_CMD_READ0: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 650 | chip->cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_NCE | NAND_CLE); |
| 651 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 652 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 653 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 654 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 655 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 656 | * If we don't have access to the busy pin, we apply the given |
| 657 | * command delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 658 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 659 | if (!chip->dev_ready) { |
| 660 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 661 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 662 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 663 | } |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 664 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 665 | /* Apply this short delay always to ensure that we do wait tWB in |
| 666 | * any case on any machine. */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 667 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 668 | |
| 669 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 670 | } |
| 671 | |
| 672 | /** |
| 673 | * nand_get_device - [GENERIC] Get chip for selected access |
| 674 | * @this: the nand chip descriptor |
| 675 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 676 | * @new_state: the state which is requested |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 677 | * |
| 678 | * Get the device and lock it for exclusive access |
| 679 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 680 | static int |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 681 | nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 682 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 683 | spinlock_t *lock = &chip->controller->lock; |
| 684 | wait_queue_head_t *wq = &chip->controller->wq; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 685 | DECLARE_WAITQUEUE(wait, current); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 686 | retry: |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 687 | spin_lock(lock); |
| 688 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 689 | /* Hardware controller shared among independend devices */ |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 690 | /* Hardware controller shared among independend devices */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 691 | if (!chip->controller->active) |
| 692 | chip->controller->active = chip; |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 693 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 694 | if (chip->controller->active == chip && chip->state == FL_READY) { |
| 695 | chip->state = new_state; |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 696 | spin_unlock(lock); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 697 | return 0; |
| 698 | } |
| 699 | if (new_state == FL_PM_SUSPENDED) { |
| 700 | spin_unlock(lock); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 701 | return (chip->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 702 | } |
| 703 | set_current_state(TASK_UNINTERRUPTIBLE); |
| 704 | add_wait_queue(wq, &wait); |
| 705 | spin_unlock(lock); |
| 706 | schedule(); |
| 707 | remove_wait_queue(wq, &wait); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 708 | goto retry; |
| 709 | } |
| 710 | |
| 711 | /** |
| 712 | * nand_wait - [DEFAULT] wait until the command is done |
| 713 | * @mtd: MTD device structure |
| 714 | * @this: NAND chip structure |
| 715 | * @state: state to select the max. timeout value |
| 716 | * |
| 717 | * Wait for command done. This applies to erase and program only |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 718 | * Erase can take up to 400ms and program up to 20ms according to |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 719 | * general NAND and SmartMedia specs |
| 720 | * |
| 721 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 722 | static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip, int state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 723 | { |
| 724 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 725 | unsigned long timeo = jiffies; |
| 726 | int status; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 727 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 728 | if (state == FL_ERASING) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 729 | timeo += (HZ * 400) / 1000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 730 | else |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 731 | timeo += (HZ * 20) / 1000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 732 | |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 733 | led_trigger_event(nand_led_trigger, LED_FULL); |
| 734 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 735 | /* Apply this short delay always to ensure that we do wait tWB in |
| 736 | * any case on any machine. */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 737 | ndelay(100); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 738 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 739 | if ((state == FL_ERASING) && (chip->options & NAND_IS_AND)) |
| 740 | chip->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 741 | else |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 742 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 743 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 744 | while (time_before(jiffies, timeo)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 745 | /* Check, if we were interrupted */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 746 | if (chip->state != state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 747 | return 0; |
| 748 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 749 | if (chip->dev_ready) { |
| 750 | if (chip->dev_ready(mtd)) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 751 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 752 | } else { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 753 | if (chip->read_byte(mtd) & NAND_STATUS_READY) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 754 | break; |
| 755 | } |
Thomas Gleixner | 20a6c21 | 2005-03-01 09:32:48 +0000 | [diff] [blame] | 756 | cond_resched(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 757 | } |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 758 | led_trigger_event(nand_led_trigger, LED_OFF); |
| 759 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 760 | status = (int)chip->read_byte(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 761 | return status; |
| 762 | } |
| 763 | |
| 764 | /** |
| 765 | * nand_write_page - [GENERIC] write one page |
| 766 | * @mtd: MTD device structure |
| 767 | * @this: NAND chip structure |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 768 | * @page: startpage inside the chip, must be called with (page & chip->pagemask) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 769 | * @oob_buf: out of band data buffer |
| 770 | * @oobsel: out of band selecttion structre |
| 771 | * @cached: 1 = enable cached programming if supported by chip |
| 772 | * |
| 773 | * Nand_page_program function is used for write and writev ! |
| 774 | * This function will always program a full page of data |
| 775 | * If you call it with a non page aligned buffer, you're lost :) |
| 776 | * |
| 777 | * Cached programming is not supported yet. |
| 778 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 779 | static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, int page, |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 780 | uint8_t *oob_buf, struct nand_oobinfo *oobsel, int cached) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 781 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 782 | int i, status; |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 783 | uint8_t ecc_code[32]; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 784 | int eccmode = oobsel->useecc ? chip->ecc.mode : NAND_ECC_NONE; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 785 | int *oob_config = oobsel->eccpos; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 786 | int datidx = 0, eccidx = 0, eccsteps = chip->ecc.steps; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 787 | int eccbytes = 0; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 788 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 789 | /* FIXME: Enable cached programming */ |
| 790 | cached = 0; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 791 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 792 | /* Send command to begin auto page programming */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 793 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 794 | |
| 795 | /* Write out complete page of data, take care of eccmode */ |
| 796 | switch (eccmode) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 797 | /* No ecc, write all */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 798 | case NAND_ECC_NONE: |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 799 | printk(KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n"); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 800 | chip->write_buf(mtd, chip->data_poi, mtd->writesize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 801 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 802 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 803 | /* Software ecc 3/256, write all */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 804 | case NAND_ECC_SOFT: |
| 805 | for (; eccsteps; eccsteps--) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 806 | chip->ecc.calculate(mtd, &chip->data_poi[datidx], ecc_code); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 807 | for (i = 0; i < 3; i++, eccidx++) |
| 808 | oob_buf[oob_config[eccidx]] = ecc_code[i]; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 809 | datidx += chip->ecc.size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 810 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 811 | chip->write_buf(mtd, chip->data_poi, mtd->writesize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 812 | break; |
| 813 | default: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 814 | eccbytes = chip->ecc.bytes; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 815 | for (; eccsteps; eccsteps--) { |
| 816 | /* enable hardware ecc logic for write */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 817 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
| 818 | chip->write_buf(mtd, &chip->data_poi[datidx], chip->ecc.size); |
| 819 | chip->ecc.calculate(mtd, &chip->data_poi[datidx], ecc_code); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 820 | for (i = 0; i < eccbytes; i++, eccidx++) |
| 821 | oob_buf[oob_config[eccidx]] = ecc_code[i]; |
| 822 | /* If the hardware ecc provides syndromes then |
| 823 | * the ecc code must be written immidiately after |
| 824 | * the data bytes (words) */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 825 | if (chip->options & NAND_HWECC_SYNDROME) |
| 826 | chip->write_buf(mtd, ecc_code, eccbytes); |
| 827 | datidx += chip->ecc.size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 828 | } |
| 829 | break; |
| 830 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 831 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 832 | /* Write out OOB data */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 833 | if (chip->options & NAND_HWECC_SYNDROME) |
| 834 | chip->write_buf(mtd, &oob_buf[oobsel->eccbytes], mtd->oobsize - oobsel->eccbytes); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 835 | else |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 836 | chip->write_buf(mtd, oob_buf, mtd->oobsize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 837 | |
| 838 | /* Send command to actually program the data */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 839 | chip->cmdfunc(mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 840 | |
| 841 | if (!cached) { |
| 842 | /* call wait ready function */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 843 | status = chip->waitfunc(mtd, chip, FL_WRITING); |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 844 | |
| 845 | /* See if operation failed and additional status checks are available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 846 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) { |
| 847 | status = chip->errstat(mtd, chip, FL_WRITING, status, page); |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 848 | } |
| 849 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 850 | /* See if device thinks it succeeded */ |
David A. Marlin | a4ab4c5 | 2005-01-23 18:30:53 +0000 | [diff] [blame] | 851 | if (status & NAND_STATUS_FAIL) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 852 | DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 853 | return -EIO; |
| 854 | } |
| 855 | } else { |
| 856 | /* FIXME: Implement cached programming ! */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 857 | /* wait until cache is ready */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 858 | // status = chip->waitfunc (mtd, this, FL_CACHEDRPG); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 859 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 860 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 861 | } |
| 862 | |
| 863 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE |
| 864 | /** |
| 865 | * nand_verify_pages - [GENERIC] verify the chip contents after a write |
| 866 | * @mtd: MTD device structure |
| 867 | * @this: NAND chip structure |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 868 | * @page: startpage inside the chip, must be called with (page & chip->pagemask) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 869 | * @numpages: number of pages to verify |
| 870 | * @oob_buf: out of band data buffer |
| 871 | * @oobsel: out of band selecttion structre |
| 872 | * @chipnr: number of the current chip |
| 873 | * @oobmode: 1 = full buffer verify, 0 = ecc only |
| 874 | * |
| 875 | * The NAND device assumes that it is always writing to a cleanly erased page. |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 876 | * Hence, it performs its internal write verification only on bits that |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 877 | * transitioned from 1 to 0. The device does NOT verify the whole page on a |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 878 | * byte by byte basis. It is possible that the page was not completely erased |
| 879 | * or the page is becoming unusable due to wear. The read with ECC would catch |
| 880 | * the error later when the ECC page check fails, but we would rather catch |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 881 | * it early in the page write stage. Better to write no data than invalid data. |
| 882 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 883 | static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *chip, int page, int numpages, |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 884 | uint8_t *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 885 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 886 | int i, j, datidx = 0, oobofs = 0, res = -EIO; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 887 | int eccsteps = chip->eccsteps; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 888 | int hweccbytes; |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 889 | uint8_t oobdata[64]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 890 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 891 | hweccbytes = (chip->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 892 | |
| 893 | /* Send command to read back the first page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 894 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 895 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 896 | for (;;) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 897 | for (j = 0; j < eccsteps; j++) { |
| 898 | /* Loop through and verify the data */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 899 | if (chip->verify_buf(mtd, &chip->data_poi[datidx], mtd->eccsize)) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 900 | DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 901 | goto out; |
| 902 | } |
| 903 | datidx += mtd->eccsize; |
| 904 | /* Have we a hw generator layout ? */ |
| 905 | if (!hweccbytes) |
| 906 | continue; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 907 | if (chip->verify_buf(mtd, &chip->oob_buf[oobofs], hweccbytes)) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 908 | DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 909 | goto out; |
| 910 | } |
| 911 | oobofs += hweccbytes; |
| 912 | } |
| 913 | |
| 914 | /* check, if we must compare all data or if we just have to |
| 915 | * compare the ecc bytes |
| 916 | */ |
| 917 | if (oobmode) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 918 | if (chip->verify_buf(mtd, &oob_buf[oobofs], mtd->oobsize - hweccbytes * eccsteps)) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 919 | DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 920 | goto out; |
| 921 | } |
| 922 | } else { |
| 923 | /* Read always, else autoincrement fails */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 924 | chip->read_buf(mtd, oobdata, mtd->oobsize - hweccbytes * eccsteps); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 925 | |
| 926 | if (oobsel->useecc != MTD_NANDECC_OFF && !hweccbytes) { |
| 927 | int ecccnt = oobsel->eccbytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 928 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 929 | for (i = 0; i < ecccnt; i++) { |
| 930 | int idx = oobsel->eccpos[i]; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 931 | if (oobdata[idx] != oob_buf[oobofs + idx]) { |
| 932 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Failed ECC write verify, page 0x%08x, %6i bytes were succesful\n", |
| 933 | __FUNCTION__, page, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 934 | goto out; |
| 935 | } |
| 936 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 937 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 938 | } |
| 939 | oobofs += mtd->oobsize - hweccbytes * eccsteps; |
| 940 | page++; |
| 941 | numpages--; |
| 942 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 943 | /* Apply delay or wait for ready/busy pin |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 944 | * Do this before the AUTOINCR check, so no problems |
| 945 | * arise if a chip which does auto increment |
| 946 | * is marked as NOAUTOINCR by the board driver. |
| 947 | * Do this also before returning, so the chip is |
| 948 | * ready for the next command. |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 949 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 950 | if (!chip->dev_ready) |
| 951 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 952 | else |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 953 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 954 | |
| 955 | /* All done, return happy */ |
| 956 | if (!numpages) |
| 957 | return 0; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 958 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 959 | /* Check, if the chip supports auto page increment */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 960 | if (!NAND_CANAUTOINCR(this)) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 961 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 962 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 963 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 964 | * Terminate the read command. We come here in case of an error |
| 965 | * So we must issue a reset command. |
| 966 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 967 | out: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 968 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 969 | return res; |
| 970 | } |
| 971 | #endif |
| 972 | |
| 973 | /** |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 974 | * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 975 | * @mtd: MTD device structure |
| 976 | * @from: offset to read from |
| 977 | * @len: number of bytes to read |
| 978 | * @retlen: pointer to variable to store the number of read bytes |
| 979 | * @buf: the databuffer to put data |
| 980 | * |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 981 | * This function simply calls nand_do_read_ecc with oob buffer and oobsel = NULL |
| 982 | * and flags = 0xff |
| 983 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 984 | static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 985 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 986 | return nand_do_read_ecc(mtd, from, len, retlen, buf, NULL, &mtd->oobinfo, 0xff); |
Thomas Gleixner | 22c60f5 | 2005-04-04 19:56:32 +0100 | [diff] [blame] | 987 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 988 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 989 | /** |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 990 | * nand_do_read_ecc - [MTD Interface] Read data with ECC |
| 991 | * @mtd: MTD device structure |
| 992 | * @from: offset to read from |
| 993 | * @len: number of bytes to read |
| 994 | * @retlen: pointer to variable to store the number of read bytes |
| 995 | * @buf: the databuffer to put data |
Dan Brown | bb75ba4 | 2005-04-04 19:02:26 +0100 | [diff] [blame] | 996 | * @oob_buf: filesystem supplied oob data buffer (can be NULL) |
Thomas Gleixner | 22c60f5 | 2005-04-04 19:56:32 +0100 | [diff] [blame] | 997 | * @oobsel: oob selection structure |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 998 | * @flags: flag to indicate if nand_get_device/nand_release_device should be preformed |
| 999 | * and how many corrected error bits are acceptable: |
| 1000 | * bits 0..7 - number of tolerable errors |
| 1001 | * bit 8 - 0 == do not get/release chip, 1 == get/release chip |
| 1002 | * |
| 1003 | * NAND read with ECC |
| 1004 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1005 | int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 1006 | size_t *retlen, uint8_t *buf, uint8_t *oob_buf, struct nand_oobinfo *oobsel, int flags) |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1007 | { |
Thomas Gleixner | 22c60f5 | 2005-04-04 19:56:32 +0100 | [diff] [blame] | 1008 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1009 | int i, j, col, realpage, page, end, ecc, chipnr, sndcmd = 1; |
| 1010 | int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1011 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 1012 | uint8_t *data_poi, *oob_data = oob_buf; |
| 1013 | uint8_t ecc_calc[32]; |
| 1014 | uint8_t ecc_code[32]; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1015 | int eccmode, eccsteps; |
| 1016 | int *oob_config, datidx; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1017 | int blockcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1018 | int eccbytes; |
| 1019 | int compareecc = 1; |
| 1020 | int oobreadlen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1021 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1022 | DEBUG(MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int)from, (int)len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1023 | |
| 1024 | /* Do not allow reads past end of device */ |
| 1025 | if ((from + len) > mtd->size) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1026 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1027 | *retlen = 0; |
| 1028 | return -EINVAL; |
| 1029 | } |
| 1030 | |
| 1031 | /* Grab the lock and see if the device is available */ |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1032 | if (flags & NAND_GET_DEVICE) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1033 | nand_get_device(chip, mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1034 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1035 | /* Autoplace of oob data ? Use the default placement scheme */ |
| 1036 | if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1037 | oobsel = chip->autooob; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1038 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1039 | eccmode = oobsel->useecc ? chip->ecc.mode : NAND_ECC_NONE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1040 | oob_config = oobsel->eccpos; |
| 1041 | |
| 1042 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1043 | chipnr = (int)(from >> chip->chip_shift); |
| 1044 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1045 | |
| 1046 | /* First we calculate the starting page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1047 | realpage = (int)(from >> chip->page_shift); |
| 1048 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1049 | |
| 1050 | /* Get raw starting column */ |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 1051 | col = from & (mtd->writesize - 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1052 | |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 1053 | end = mtd->writesize; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1054 | ecc = chip->ecc.size; |
| 1055 | eccbytes = chip->ecc.bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1056 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1057 | if ((eccmode == NAND_ECC_NONE) || (chip->options & NAND_HWECC_SYNDROME)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1058 | compareecc = 0; |
| 1059 | |
| 1060 | oobreadlen = mtd->oobsize; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1061 | if (chip->options & NAND_HWECC_SYNDROME) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1062 | oobreadlen -= oobsel->eccbytes; |
| 1063 | |
| 1064 | /* Loop until all data read */ |
| 1065 | while (read < len) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1066 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1067 | int aligned = (!col && (len - read) >= end); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1068 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1069 | * If the read is not page aligned, we have to read into data buffer |
| 1070 | * due to ecc, else we read into return buffer direct |
| 1071 | */ |
| 1072 | if (aligned) |
| 1073 | data_poi = &buf[read]; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1074 | else |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1075 | data_poi = chip->data_buf; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1076 | |
| 1077 | /* Check, if we have this page in the buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1078 | * |
| 1079 | * FIXME: Make it work when we must provide oob data too, |
| 1080 | * check the usage of data_buf oob field |
| 1081 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1082 | if (realpage == chip->pagebuf && !oob_buf) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1083 | /* aligned read ? */ |
| 1084 | if (aligned) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1085 | memcpy(data_poi, chip->data_buf, end); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1086 | goto readdata; |
| 1087 | } |
| 1088 | |
| 1089 | /* Check, if we must send the read command */ |
| 1090 | if (sndcmd) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1091 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1092 | sndcmd = 0; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1093 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1094 | |
| 1095 | /* get oob area, if we have no oob buffer from fs-driver */ |
Thomas Gleixner | 90e260c | 2005-05-19 17:10:26 +0100 | [diff] [blame] | 1096 | if (!oob_buf || oobsel->useecc == MTD_NANDECC_AUTOPLACE || |
| 1097 | oobsel->useecc == MTD_NANDECC_AUTOPL_USR) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1098 | oob_data = &chip->data_buf[end]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1099 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1100 | eccsteps = chip->ecc.steps; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1101 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1102 | switch (eccmode) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1103 | case NAND_ECC_NONE:{ |
| 1104 | /* No ECC, Read in a page */ |
| 1105 | static unsigned long lastwhinge = 0; |
| 1106 | if ((lastwhinge / HZ) != (jiffies / HZ)) { |
| 1107 | printk(KERN_WARNING |
| 1108 | "Reading data from NAND FLASH without ECC is not recommended\n"); |
| 1109 | lastwhinge = jiffies; |
| 1110 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1111 | chip->read_buf(mtd, data_poi, end); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1112 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1113 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1114 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1115 | case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1116 | chip->read_buf(mtd, data_poi, end); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1117 | for (i = 0, datidx = 0; eccsteps; eccsteps--, i += 3, datidx += ecc) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1118 | chip->ecc.calculate(mtd, &data_poi[datidx], &ecc_calc[i]); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1119 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1120 | |
| 1121 | default: |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1122 | for (i = 0, datidx = 0; eccsteps; eccsteps--, i += eccbytes, datidx += ecc) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1123 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 1124 | chip->read_buf(mtd, &data_poi[datidx], ecc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1125 | |
| 1126 | /* HW ecc with syndrome calculation must read the |
| 1127 | * syndrome from flash immidiately after the data */ |
| 1128 | if (!compareecc) { |
| 1129 | /* Some hw ecc generators need to know when the |
| 1130 | * syndrome is read from flash */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1131 | chip->ecc.hwctl(mtd, NAND_ECC_READSYN); |
| 1132 | chip->read_buf(mtd, &oob_data[i], eccbytes); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1133 | /* We calc error correction directly, it checks the hw |
| 1134 | * generator for an error, reads back the syndrome and |
| 1135 | * does the error correction on the fly */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1136 | ecc_status = chip->ecc.correct(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]); |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1137 | if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1138 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: " |
| 1139 | "Failed ECC read, page 0x%08x on chip %d\n", page, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1140 | ecc_failed++; |
| 1141 | } |
| 1142 | } else { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1143 | chip->ecc.calculate(mtd, &data_poi[datidx], &ecc_calc[i]); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1144 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1145 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1146 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1147 | } |
| 1148 | |
| 1149 | /* read oobdata */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1150 | chip->read_buf(mtd, &oob_data[mtd->oobsize - oobreadlen], oobreadlen); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1151 | |
| 1152 | /* Skip ECC check, if not requested (ECC_NONE or HW_ECC with syndromes) */ |
| 1153 | if (!compareecc) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1154 | goto readoob; |
| 1155 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1156 | /* Pick the ECC bytes out of the oob data */ |
| 1157 | for (j = 0; j < oobsel->eccbytes; j++) |
| 1158 | ecc_code[j] = oob_data[oob_config[j]]; |
| 1159 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1160 | /* correct data, if necessary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1161 | for (i = 0, j = 0, datidx = 0; i < chip->ecc.steps; i++, datidx += ecc) { |
| 1162 | ecc_status = chip->ecc.correct(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1163 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1164 | /* Get next chunk of ecc bytes */ |
| 1165 | j += eccbytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1166 | |
| 1167 | /* Check, if we have a fs supplied oob-buffer, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1168 | * This is the legacy mode. Used by YAFFS1 |
| 1169 | * Should go away some day |
| 1170 | */ |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1171 | if (oob_buf && oobsel->useecc == MTD_NANDECC_PLACE) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1172 | int *p = (int *)(&oob_data[mtd->oobsize]); |
| 1173 | p[i] = ecc_status; |
| 1174 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1175 | |
| 1176 | if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1177 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1178 | ecc_failed++; |
| 1179 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1180 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1181 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1182 | readoob: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1183 | /* check, if we have a fs supplied oob-buffer */ |
| 1184 | if (oob_buf) { |
| 1185 | /* without autoplace. Legacy mode used by YAFFS1 */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1186 | switch (oobsel->useecc) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1187 | case MTD_NANDECC_AUTOPLACE: |
Thomas Gleixner | 90e260c | 2005-05-19 17:10:26 +0100 | [diff] [blame] | 1188 | case MTD_NANDECC_AUTOPL_USR: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1189 | /* Walk through the autoplace chunks */ |
Dan Brown | 82e1d19 | 2005-04-06 21:13:09 +0100 | [diff] [blame] | 1190 | for (i = 0; oobsel->oobfree[i][1]; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1191 | int from = oobsel->oobfree[i][0]; |
| 1192 | int num = oobsel->oobfree[i][1]; |
| 1193 | memcpy(&oob_buf[oob], &oob_data[from], num); |
Dan Brown | 82e1d19 | 2005-04-06 21:13:09 +0100 | [diff] [blame] | 1194 | oob += num; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1195 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1196 | break; |
| 1197 | case MTD_NANDECC_PLACE: |
| 1198 | /* YAFFS1 legacy mode */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1199 | oob_data += chip->ecc.steps * sizeof(int); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1200 | default: |
| 1201 | oob_data += mtd->oobsize; |
| 1202 | } |
| 1203 | } |
| 1204 | readdata: |
| 1205 | /* Partial page read, transfer data into fs buffer */ |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1206 | if (!aligned) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1207 | for (j = col; j < end && read < len; j++) |
| 1208 | buf[read++] = data_poi[j]; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1209 | chip->pagebuf = realpage; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1210 | } else |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 1211 | read += mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1212 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1213 | /* Apply delay or wait for ready/busy pin |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1214 | * Do this before the AUTOINCR check, so no problems |
| 1215 | * arise if a chip which does auto increment |
| 1216 | * is marked as NOAUTOINCR by the board driver. |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1217 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1218 | if (!chip->dev_ready) |
| 1219 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1220 | else |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 1221 | nand_wait_ready(mtd); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1222 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1223 | if (read == len) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1224 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1225 | |
| 1226 | /* For subsequent reads align to page boundary. */ |
| 1227 | col = 0; |
| 1228 | /* Increment page address */ |
| 1229 | realpage++; |
| 1230 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1231 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1232 | /* Check, if we cross a chip boundary */ |
| 1233 | if (!page) { |
| 1234 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1235 | chip->select_chip(mtd, -1); |
| 1236 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1237 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1238 | /* Check, if the chip supports auto page increment |
| 1239 | * or if we have hit a block boundary. |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1240 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1241 | if (!NAND_CANAUTOINCR(chip) || !(page & blockcheck)) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1242 | sndcmd = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1243 | } |
| 1244 | |
| 1245 | /* Deselect and wake up anyone waiting on the device */ |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1246 | if (flags & NAND_GET_DEVICE) |
| 1247 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1248 | |
| 1249 | /* |
| 1250 | * Return success, if no ECC failures, else -EBADMSG |
| 1251 | * fs driver will take care of that, because |
| 1252 | * retlen == desired len and result == -EBADMSG |
| 1253 | */ |
| 1254 | *retlen = read; |
| 1255 | return ecc_failed ? -EBADMSG : 0; |
| 1256 | } |
| 1257 | |
| 1258 | /** |
| 1259 | * nand_read_oob - [MTD Interface] NAND read out-of-band |
| 1260 | * @mtd: MTD device structure |
| 1261 | * @from: offset to read from |
| 1262 | * @len: number of bytes to read |
| 1263 | * @retlen: pointer to variable to store the number of read bytes |
| 1264 | * @buf: the databuffer to put data |
| 1265 | * |
| 1266 | * NAND read out-of-band data from the spare area |
| 1267 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 1268 | static int nand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1269 | { |
| 1270 | int i, col, page, chipnr; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1271 | struct nand_chip *chip = mtd->priv; |
| 1272 | int blockcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1273 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1274 | DEBUG(MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int)from, (int)len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1275 | |
| 1276 | /* Shift to get page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1277 | page = (int)(from >> chip->page_shift); |
| 1278 | chipnr = (int)(from >> chip->chip_shift); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1279 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1280 | /* Mask to get column */ |
| 1281 | col = from & (mtd->oobsize - 1); |
| 1282 | |
| 1283 | /* Initialize return length value */ |
| 1284 | *retlen = 0; |
| 1285 | |
| 1286 | /* Do not allow reads past end of device */ |
| 1287 | if ((from + len) > mtd->size) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1288 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1289 | *retlen = 0; |
| 1290 | return -EINVAL; |
| 1291 | } |
| 1292 | |
| 1293 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1294 | nand_get_device(chip, mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1295 | |
| 1296 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1297 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1298 | |
| 1299 | /* Send the read command */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1300 | chip->cmdfunc(mtd, NAND_CMD_READOOB, col, page & chip->pagemask); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1301 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1302 | * Read the data, if we read more than one page |
| 1303 | * oob data, let the device transfer the data ! |
| 1304 | */ |
| 1305 | i = 0; |
| 1306 | while (i < len) { |
| 1307 | int thislen = mtd->oobsize - col; |
| 1308 | thislen = min_t(int, thislen, len); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1309 | chip->read_buf(mtd, &buf[i], thislen); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1310 | i += thislen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1311 | |
| 1312 | /* Read more ? */ |
| 1313 | if (i < len) { |
| 1314 | page++; |
| 1315 | col = 0; |
| 1316 | |
| 1317 | /* Check, if we cross a chip boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1318 | if (!(page & chip->pagemask)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1319 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1320 | chip->select_chip(mtd, -1); |
| 1321 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1322 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1323 | |
| 1324 | /* Apply delay or wait for ready/busy pin |
Thomas Gleixner | 19870da | 2005-07-15 14:53:51 +0100 | [diff] [blame] | 1325 | * Do this before the AUTOINCR check, so no problems |
| 1326 | * arise if a chip which does auto increment |
| 1327 | * is marked as NOAUTOINCR by the board driver. |
| 1328 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1329 | if (!chip->dev_ready) |
| 1330 | udelay(chip->chip_delay); |
Thomas Gleixner | 19870da | 2005-07-15 14:53:51 +0100 | [diff] [blame] | 1331 | else |
| 1332 | nand_wait_ready(mtd); |
| 1333 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1334 | /* Check, if the chip supports auto page increment |
| 1335 | * or if we have hit a block boundary. |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1336 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1337 | if (!NAND_CANAUTOINCR(chip) || !(page & blockcheck)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1338 | /* For subsequent page reads set offset to 0 */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1339 | chip->cmdfunc(mtd, NAND_CMD_READOOB, 0x0, page & chip->pagemask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1340 | } |
| 1341 | } |
| 1342 | } |
| 1343 | |
| 1344 | /* Deselect and wake up anyone waiting on the device */ |
| 1345 | nand_release_device(mtd); |
| 1346 | |
| 1347 | /* Return happy */ |
| 1348 | *retlen = len; |
| 1349 | return 0; |
| 1350 | } |
| 1351 | |
| 1352 | /** |
| 1353 | * nand_read_raw - [GENERIC] Read raw data including oob into buffer |
| 1354 | * @mtd: MTD device structure |
| 1355 | * @buf: temporary buffer |
| 1356 | * @from: offset to read from |
| 1357 | * @len: number of bytes to read |
| 1358 | * @ooblen: number of oob data bytes to read |
| 1359 | * |
| 1360 | * Read raw data including oob into buffer |
| 1361 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1362 | int nand_read_raw(struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, |
| 1363 | size_t ooblen) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1364 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1365 | struct nand_chip *chip = mtd->priv; |
| 1366 | int page = (int)(from >> chip->page_shift); |
| 1367 | int chipnr = (int)(from >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1368 | int sndcmd = 1; |
| 1369 | int cnt = 0; |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 1370 | int pagesize = mtd->writesize + mtd->oobsize; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1371 | int blockcheck; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1372 | |
| 1373 | /* Do not allow reads past end of device */ |
| 1374 | if ((from + len) > mtd->size) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1375 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_raw: " |
| 1376 | "Attempt read beyond end of device\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1377 | return -EINVAL; |
| 1378 | } |
| 1379 | |
| 1380 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1381 | nand_get_device(chip, mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1382 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1383 | chip->select_chip(mtd, chipnr); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1384 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1385 | /* Add requested oob length */ |
| 1386 | len += ooblen; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1387 | blockcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1388 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1389 | while (len) { |
| 1390 | if (sndcmd) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1391 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, |
| 1392 | page & chip->pagemask); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1393 | sndcmd = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1394 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1395 | chip->read_buf(mtd, &buf[cnt], pagesize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1396 | |
| 1397 | len -= pagesize; |
| 1398 | cnt += pagesize; |
| 1399 | page++; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1400 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1401 | if (!chip->dev_ready) |
| 1402 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1403 | else |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 1404 | nand_wait_ready(mtd); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1405 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1406 | /* |
| 1407 | * Check, if the chip supports auto page increment or if we |
| 1408 | * cross a block boundary. |
| 1409 | */ |
| 1410 | if (!NAND_CANAUTOINCR(chip) || !(page & blockcheck)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1411 | sndcmd = 1; |
| 1412 | } |
| 1413 | |
| 1414 | /* Deselect and wake up anyone waiting on the device */ |
| 1415 | nand_release_device(mtd); |
| 1416 | return 0; |
| 1417 | } |
| 1418 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1419 | /** |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1420 | * nand_write_raw - [GENERIC] Write raw data including oob |
| 1421 | * @mtd: MTD device structure |
| 1422 | * @buf: source buffer |
| 1423 | * @to: offset to write to |
| 1424 | * @len: number of bytes to write |
| 1425 | * @buf: source buffer |
| 1426 | * @oob: oob buffer |
| 1427 | * |
| 1428 | * Write raw data including oob |
| 1429 | */ |
| 1430 | int nand_write_raw(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, |
| 1431 | uint8_t *buf, uint8_t *oob) |
| 1432 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1433 | struct nand_chip *chip = mtd->priv; |
| 1434 | int page = (int)(to >> chip->page_shift); |
| 1435 | int chipnr = (int)(to >> chip->chip_shift); |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1436 | int ret; |
| 1437 | |
| 1438 | *retlen = 0; |
| 1439 | |
| 1440 | /* Do not allow writes past end of device */ |
| 1441 | if ((to + len) > mtd->size) { |
| 1442 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt write " |
| 1443 | "beyond end of device\n"); |
| 1444 | return -EINVAL; |
| 1445 | } |
| 1446 | |
| 1447 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1448 | nand_get_device(chip, mtd, FL_WRITING); |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1449 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1450 | chip->select_chip(mtd, chipnr); |
| 1451 | chip->data_poi = buf; |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1452 | |
| 1453 | while (len != *retlen) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1454 | ret = nand_write_page(mtd, chip, page, oob, &mtd->oobinfo, 0); |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1455 | if (ret) |
| 1456 | return ret; |
| 1457 | page++; |
| 1458 | *retlen += mtd->writesize; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1459 | chip->data_poi += mtd->writesize; |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1460 | oob += mtd->oobsize; |
| 1461 | } |
| 1462 | |
| 1463 | /* Deselect and wake up anyone waiting on the device */ |
| 1464 | nand_release_device(mtd); |
| 1465 | return 0; |
| 1466 | } |
Thomas Gleixner | 3821720 | 2006-05-23 22:33:52 +0200 | [diff] [blame] | 1467 | EXPORT_SYMBOL_GPL(nand_write_raw); |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1468 | |
| 1469 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1470 | * nand_prepare_oobbuf - [GENERIC] Prepare the out of band buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1471 | * @mtd: MTD device structure |
| 1472 | * @fsbuf: buffer given by fs driver |
| 1473 | * @oobsel: out of band selection structre |
| 1474 | * @autoplace: 1 = place given buffer into the oob bytes |
| 1475 | * @numpages: number of pages to prepare |
| 1476 | * |
| 1477 | * Return: |
| 1478 | * 1. Filesystem buffer available and autoplacement is off, |
| 1479 | * return filesystem buffer |
| 1480 | * 2. No filesystem buffer or autoplace is off, return internal |
| 1481 | * buffer |
| 1482 | * 3. Filesystem buffer is given and autoplace selected |
| 1483 | * put data from fs buffer into internal buffer and |
| 1484 | * retrun internal buffer |
| 1485 | * |
| 1486 | * Note: The internal buffer is filled with 0xff. This must |
| 1487 | * be done only once, when no autoplacement happens |
| 1488 | * Autoplacement sets the buffer dirty flag, which |
| 1489 | * forces the 0xff fill before using the buffer again. |
| 1490 | * |
| 1491 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 1492 | static uint8_t *nand_prepare_oobbuf(struct mtd_info *mtd, uint8_t *fsbuf, struct nand_oobinfo *oobsel, |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1493 | int autoplace, int numpages) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1494 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1495 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1496 | int i, len, ofs; |
| 1497 | |
| 1498 | /* Zero copy fs supplied buffer */ |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1499 | if (fsbuf && !autoplace) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1500 | return fsbuf; |
| 1501 | |
| 1502 | /* Check, if the buffer must be filled with ff again */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1503 | if (chip->oobdirty) { |
| 1504 | memset(chip->oob_buf, 0xff, mtd->oobsize << (chip->phys_erase_shift - chip->page_shift)); |
| 1505 | chip->oobdirty = 0; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1506 | } |
| 1507 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1508 | /* If we have no autoplacement or no fs buffer use the internal one */ |
| 1509 | if (!autoplace || !fsbuf) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1510 | return chip->oob_buf; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1511 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1512 | /* Walk through the pages and place the data */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1513 | chip->oobdirty = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1514 | ofs = 0; |
| 1515 | while (numpages--) { |
| 1516 | for (i = 0, len = 0; len < mtd->oobavail; i++) { |
| 1517 | int to = ofs + oobsel->oobfree[i][0]; |
| 1518 | int num = oobsel->oobfree[i][1]; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1519 | memcpy(&chip->oob_buf[to], fsbuf, num); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1520 | len += num; |
| 1521 | fsbuf += num; |
| 1522 | } |
| 1523 | ofs += mtd->oobavail; |
| 1524 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1525 | return chip->oob_buf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1526 | } |
| 1527 | |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 1528 | #define NOTALIGNED(x) (x & (mtd->writesize-1)) != 0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1529 | |
| 1530 | /** |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1531 | * nand_write - [MTD Interface] NAND write with ECC |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1532 | * @mtd: MTD device structure |
| 1533 | * @to: offset to write to |
| 1534 | * @len: number of bytes to write |
| 1535 | * @retlen: pointer to variable to store the number of written bytes |
| 1536 | * @buf: the data to write |
| 1537 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1538 | * NAND write with ECC |
| 1539 | */ |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1540 | static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, |
| 1541 | size_t *retlen, const uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1542 | { |
| 1543 | int startpage, page, ret = -EIO, oob = 0, written = 0, chipnr; |
| 1544 | int autoplace = 0, numpages, totalpages; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1545 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1546 | uint8_t *oobbuf, *bufstart, *eccbuf = NULL; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1547 | int ppblock = (1 << (chip->phys_erase_shift - chip->page_shift)); |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1548 | struct nand_oobinfo *oobsel = &mtd->oobinfo; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1549 | |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1550 | DEBUG(MTD_DEBUG_LEVEL3, "nand_write: to = 0x%08x, len = %i\n", (unsigned int)to, (int)len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1551 | |
| 1552 | /* Initialize retlen, in case of early exit */ |
| 1553 | *retlen = 0; |
| 1554 | |
| 1555 | /* Do not allow write past end of device */ |
| 1556 | if ((to + len) > mtd->size) { |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1557 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write: Attempt to write past end of page\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1558 | return -EINVAL; |
| 1559 | } |
| 1560 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1561 | /* reject writes, which are not page aligned */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1562 | if (NOTALIGNED(to) || NOTALIGNED(len)) { |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1563 | printk(KERN_NOTICE "nand_write: Attempt to write not page aligned data\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1564 | return -EINVAL; |
| 1565 | } |
| 1566 | |
| 1567 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1568 | nand_get_device(chip, mtd, FL_WRITING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1569 | |
| 1570 | /* Calculate chipnr */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1571 | chipnr = (int)(to >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1572 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1573 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1574 | |
| 1575 | /* Check, if it is write protected */ |
| 1576 | if (nand_check_wp(mtd)) |
| 1577 | goto out; |
| 1578 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1579 | /* Autoplace of oob data ? Use the default placement scheme */ |
| 1580 | if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1581 | oobsel = chip->autooob; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1582 | autoplace = 1; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1583 | } |
Thomas Gleixner | 90e260c | 2005-05-19 17:10:26 +0100 | [diff] [blame] | 1584 | if (oobsel->useecc == MTD_NANDECC_AUTOPL_USR) |
| 1585 | autoplace = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1586 | |
| 1587 | /* Setup variables and oob buffer */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1588 | totalpages = len >> chip->page_shift; |
| 1589 | page = (int)(to >> chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1590 | /* Invalidate the page cache, if we write to the cached page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1591 | if (page <= chip->pagebuf && chip->pagebuf < (page + totalpages)) |
| 1592 | chip->pagebuf = -1; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1593 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1594 | /* Set it relative to chip */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1595 | page &= chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1596 | startpage = page; |
| 1597 | /* Calc number of pages we can write in one go */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1598 | numpages = min(ppblock - (startpage & (ppblock - 1)), totalpages); |
| 1599 | oobbuf = nand_prepare_oobbuf(mtd, eccbuf, oobsel, autoplace, numpages); |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 1600 | bufstart = (uint8_t *) buf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1601 | |
| 1602 | /* Loop until all data is written */ |
| 1603 | while (written < len) { |
| 1604 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1605 | chip->data_poi = (uint8_t *) &buf[written]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1606 | /* Write one page. If this is the last page to write |
| 1607 | * or the last page in this block, then use the |
| 1608 | * real pageprogram command, else select cached programming |
| 1609 | * if supported by the chip. |
| 1610 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1611 | ret = nand_write_page(mtd, chip, page, &oobbuf[oob], oobsel, (--numpages > 0)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1612 | if (ret) { |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1613 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write: write_page failed %d\n", ret); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1614 | goto out; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1615 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1616 | /* Next oob page */ |
| 1617 | oob += mtd->oobsize; |
| 1618 | /* Update written bytes count */ |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 1619 | written += mtd->writesize; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1620 | if (written == len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1621 | goto cmp; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1622 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1623 | /* Increment page address */ |
| 1624 | page++; |
| 1625 | |
| 1626 | /* Have we hit a block boundary ? Then we have to verify and |
| 1627 | * if verify is ok, we have to setup the oob buffer for |
| 1628 | * the next pages. |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1629 | */ |
| 1630 | if (!(page & (ppblock - 1))) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1631 | int ofs; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1632 | chip->data_poi = bufstart; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1633 | ret = nand_verify_pages(mtd, this, startpage, page - startpage, |
| 1634 | oobbuf, oobsel, chipnr, (eccbuf != NULL)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1635 | if (ret) { |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1636 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write: verify_pages failed %d\n", ret); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1637 | goto out; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1638 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1639 | *retlen = written; |
| 1640 | |
| 1641 | ofs = autoplace ? mtd->oobavail : mtd->oobsize; |
| 1642 | if (eccbuf) |
| 1643 | eccbuf += (page - startpage) * ofs; |
| 1644 | totalpages -= page - startpage; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1645 | numpages = min(totalpages, ppblock); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1646 | page &= chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1647 | startpage = page; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1648 | oobbuf = nand_prepare_oobbuf(mtd, eccbuf, oobsel, autoplace, numpages); |
Todd Poynor | 868801e | 2005-11-05 03:21:15 +0000 | [diff] [blame] | 1649 | oob = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1650 | /* Check, if we cross a chip boundary */ |
| 1651 | if (!page) { |
| 1652 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1653 | chip->select_chip(mtd, -1); |
| 1654 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1655 | } |
| 1656 | } |
| 1657 | } |
| 1658 | /* Verify the remaining pages */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1659 | cmp: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1660 | chip->data_poi = bufstart; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1661 | ret = nand_verify_pages(mtd, this, startpage, totalpages, oobbuf, oobsel, chipnr, (eccbuf != NULL)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1662 | if (!ret) |
| 1663 | *retlen = written; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1664 | else |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1665 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write: verify_pages failed %d\n", ret); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1666 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1667 | out: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1668 | /* Deselect and wake up anyone waiting on the device */ |
| 1669 | nand_release_device(mtd); |
| 1670 | |
| 1671 | return ret; |
| 1672 | } |
| 1673 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1674 | /** |
| 1675 | * nand_write_oob - [MTD Interface] NAND write out-of-band |
| 1676 | * @mtd: MTD device structure |
| 1677 | * @to: offset to write to |
| 1678 | * @len: number of bytes to write |
| 1679 | * @retlen: pointer to variable to store the number of written bytes |
| 1680 | * @buf: the data to write |
| 1681 | * |
| 1682 | * NAND write out-of-band |
| 1683 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 1684 | static int nand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1685 | { |
| 1686 | int column, page, status, ret = -EIO, chipnr; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1687 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1688 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1689 | DEBUG(MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int)to, (int)len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1690 | |
| 1691 | /* Shift to get page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1692 | page = (int)(to >> chip->page_shift); |
| 1693 | chipnr = (int)(to >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1694 | |
| 1695 | /* Mask to get column */ |
| 1696 | column = to & (mtd->oobsize - 1); |
| 1697 | |
| 1698 | /* Initialize return length value */ |
| 1699 | *retlen = 0; |
| 1700 | |
| 1701 | /* Do not allow write past end of page */ |
| 1702 | if ((column + len) > mtd->oobsize) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1703 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1704 | return -EINVAL; |
| 1705 | } |
| 1706 | |
| 1707 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1708 | nand_get_device(chip, mtd, FL_WRITING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1709 | |
| 1710 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1711 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1712 | |
| 1713 | /* Reset the chip. Some chips (like the Toshiba TC5832DC found |
| 1714 | in one of my DiskOnChip 2000 test units) will clear the whole |
| 1715 | data page too if we don't do this. I have no clue why, but |
| 1716 | I seem to have 'fixed' it in the doc2000 driver in |
| 1717 | August 1999. dwmw2. */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1718 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1719 | |
| 1720 | /* Check, if it is write protected */ |
| 1721 | if (nand_check_wp(mtd)) |
| 1722 | goto out; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1723 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1724 | /* Invalidate the page cache, if we write to the cached page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1725 | if (page == chip->pagebuf) |
| 1726 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1727 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1728 | if (NAND_MUST_PAD(chip)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1729 | /* Write out desired data */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1730 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page & chip->pagemask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1731 | /* prepad 0xff for partial programming */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1732 | chip->write_buf(mtd, ffchars, column); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1733 | /* write data */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1734 | chip->write_buf(mtd, buf, len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1735 | /* postpad 0xff for partial programming */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1736 | chip->write_buf(mtd, ffchars, mtd->oobsize - (len + column)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1737 | } else { |
| 1738 | /* Write out desired data */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1739 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize + column, page & chip->pagemask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1740 | /* write data */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1741 | chip->write_buf(mtd, buf, len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1742 | } |
| 1743 | /* Send command to program the OOB data */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1744 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1745 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1746 | status = chip->waitfunc(mtd, chip, FL_WRITING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1747 | |
| 1748 | /* See if device thinks it succeeded */ |
David A. Marlin | a4ab4c5 | 2005-01-23 18:30:53 +0000 | [diff] [blame] | 1749 | if (status & NAND_STATUS_FAIL) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1750 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1751 | ret = -EIO; |
| 1752 | goto out; |
| 1753 | } |
| 1754 | /* Return happy */ |
| 1755 | *retlen = len; |
| 1756 | |
| 1757 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE |
| 1758 | /* Send command to read back the data */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1759 | chip->cmdfunc(mtd, NAND_CMD_READOOB, column, page & chip->pagemask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1760 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1761 | if (chip->verify_buf(mtd, buf, len)) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1762 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1763 | ret = -EIO; |
| 1764 | goto out; |
| 1765 | } |
| 1766 | #endif |
| 1767 | ret = 0; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1768 | out: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1769 | /* Deselect and wake up anyone waiting on the device */ |
| 1770 | nand_release_device(mtd); |
| 1771 | |
| 1772 | return ret; |
| 1773 | } |
| 1774 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1775 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1776 | * single_erease_cmd - [GENERIC] NAND standard block erase command function |
| 1777 | * @mtd: MTD device structure |
| 1778 | * @page: the page address of the block which will be erased |
| 1779 | * |
| 1780 | * Standard erase command for NAND chips |
| 1781 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1782 | static void single_erase_cmd(struct mtd_info *mtd, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1783 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1784 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1785 | /* Send commands to erase a block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1786 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
| 1787 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1788 | } |
| 1789 | |
| 1790 | /** |
| 1791 | * multi_erease_cmd - [GENERIC] AND specific block erase command function |
| 1792 | * @mtd: MTD device structure |
| 1793 | * @page: the page address of the block which will be erased |
| 1794 | * |
| 1795 | * AND multi block erase command function |
| 1796 | * Erase 4 consecutive blocks |
| 1797 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1798 | static void multi_erase_cmd(struct mtd_info *mtd, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1799 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1800 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1801 | /* Send commands to erase a block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1802 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 1803 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 1804 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 1805 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
| 1806 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1807 | } |
| 1808 | |
| 1809 | /** |
| 1810 | * nand_erase - [MTD Interface] erase block(s) |
| 1811 | * @mtd: MTD device structure |
| 1812 | * @instr: erase instruction |
| 1813 | * |
| 1814 | * Erase one ore more blocks |
| 1815 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1816 | static int nand_erase(struct mtd_info *mtd, struct erase_info *instr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1817 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1818 | return nand_erase_nand(mtd, instr, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1819 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1820 | |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1821 | #define BBT_PAGE_MASK 0xffffff3f |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1822 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1823 | * nand_erase_nand - [Internal] erase block(s) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1824 | * @mtd: MTD device structure |
| 1825 | * @instr: erase instruction |
| 1826 | * @allowbbt: allow erasing the bbt area |
| 1827 | * |
| 1828 | * Erase one ore more blocks |
| 1829 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1830 | int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, |
| 1831 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1832 | { |
| 1833 | int page, len, status, pages_per_block, ret, chipnr; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1834 | struct nand_chip *chip = mtd->priv; |
| 1835 | int rewrite_bbt[NAND_MAX_CHIPS]={0}; |
| 1836 | unsigned int bbt_masked_page = 0xffffffff; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1837 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1838 | DEBUG(MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%08x, len = %i\n", |
| 1839 | (unsigned int)instr->addr, (unsigned int)instr->len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1840 | |
| 1841 | /* Start address must align on block boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1842 | if (instr->addr & ((1 << chip->phys_erase_shift) - 1)) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1843 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1844 | return -EINVAL; |
| 1845 | } |
| 1846 | |
| 1847 | /* Length must align on block boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1848 | if (instr->len & ((1 << chip->phys_erase_shift) - 1)) { |
| 1849 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 1850 | "Length not block aligned\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1851 | return -EINVAL; |
| 1852 | } |
| 1853 | |
| 1854 | /* Do not allow erase past end of device */ |
| 1855 | if ((instr->len + instr->addr) > mtd->size) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1856 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 1857 | "Erase past end of device\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1858 | return -EINVAL; |
| 1859 | } |
| 1860 | |
| 1861 | instr->fail_addr = 0xffffffff; |
| 1862 | |
| 1863 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1864 | nand_get_device(chip, mtd, FL_ERASING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1865 | |
| 1866 | /* Shift to get first page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1867 | page = (int)(instr->addr >> chip->page_shift); |
| 1868 | chipnr = (int)(instr->addr >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1869 | |
| 1870 | /* Calculate pages in each block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1871 | pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1872 | |
| 1873 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1874 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1875 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1876 | /* Check, if it is write protected */ |
| 1877 | if (nand_check_wp(mtd)) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1878 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 1879 | "Device is write protected!!!\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1880 | instr->state = MTD_ERASE_FAILED; |
| 1881 | goto erase_exit; |
| 1882 | } |
| 1883 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1884 | /* |
| 1885 | * If BBT requires refresh, set the BBT page mask to see if the BBT |
| 1886 | * should be rewritten. Otherwise the mask is set to 0xffffffff which |
| 1887 | * can not be matched. This is also done when the bbt is actually |
| 1888 | * erased to avoid recusrsive updates |
| 1889 | */ |
| 1890 | if (chip->options & BBT_AUTO_REFRESH && !allowbbt) |
| 1891 | bbt_masked_page = chip->bbt_td->pages[chipnr] & BBT_PAGE_MASK; |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1892 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1893 | /* Loop through the pages */ |
| 1894 | len = instr->len; |
| 1895 | |
| 1896 | instr->state = MTD_ERASING; |
| 1897 | |
| 1898 | while (len) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1899 | /* |
| 1900 | * heck if we have a bad block, we do not erase bad blocks ! |
| 1901 | */ |
| 1902 | if (nand_block_checkbad(mtd, ((loff_t) page) << |
| 1903 | chip->page_shift, 0, allowbbt)) { |
| 1904 | printk(KERN_WARNING "nand_erase: attempt to erase a " |
| 1905 | "bad block at page 0x%08x\n", page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1906 | instr->state = MTD_ERASE_FAILED; |
| 1907 | goto erase_exit; |
| 1908 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1909 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1910 | /* |
| 1911 | * Invalidate the page cache, if we erase the block which |
| 1912 | * contains the current cached page |
| 1913 | */ |
| 1914 | if (page <= chip->pagebuf && chip->pagebuf < |
| 1915 | (page + pages_per_block)) |
| 1916 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1917 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1918 | chip->erase_cmd(mtd, page & chip->pagemask); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1919 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1920 | status = chip->waitfunc(mtd, chip, FL_ERASING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1921 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1922 | /* |
| 1923 | * See if operation failed and additional status checks are |
| 1924 | * available |
| 1925 | */ |
| 1926 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 1927 | status = chip->errstat(mtd, chip, FL_ERASING, |
| 1928 | status, page); |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1929 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1930 | /* See if block erase succeeded */ |
David A. Marlin | a4ab4c5 | 2005-01-23 18:30:53 +0000 | [diff] [blame] | 1931 | if (status & NAND_STATUS_FAIL) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1932 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 1933 | "Failed erase, page 0x%08x\n", page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1934 | instr->state = MTD_ERASE_FAILED; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1935 | instr->fail_addr = (page << chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1936 | goto erase_exit; |
| 1937 | } |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1938 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1939 | /* |
| 1940 | * If BBT requires refresh, set the BBT rewrite flag to the |
| 1941 | * page being erased |
| 1942 | */ |
| 1943 | if (bbt_masked_page != 0xffffffff && |
| 1944 | (page & BBT_PAGE_MASK) == bbt_masked_page) |
| 1945 | rewrite_bbt[chipnr] = (page << chip->page_shift); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1946 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1947 | /* Increment page address and decrement length */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1948 | len -= (1 << chip->phys_erase_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1949 | page += pages_per_block; |
| 1950 | |
| 1951 | /* Check, if we cross a chip boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1952 | if (len && !(page & chip->pagemask)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1953 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1954 | chip->select_chip(mtd, -1); |
| 1955 | chip->select_chip(mtd, chipnr); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1956 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1957 | /* |
| 1958 | * If BBT requires refresh and BBT-PERCHIP, set the BBT |
| 1959 | * page mask to see if this BBT should be rewritten |
| 1960 | */ |
| 1961 | if (bbt_masked_page != 0xffffffff && |
| 1962 | (chip->bbt_td->options & NAND_BBT_PERCHIP)) |
| 1963 | bbt_masked_page = chip->bbt_td->pages[chipnr] & |
| 1964 | BBT_PAGE_MASK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1965 | } |
| 1966 | } |
| 1967 | instr->state = MTD_ERASE_DONE; |
| 1968 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1969 | erase_exit: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1970 | |
| 1971 | ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; |
| 1972 | /* Do call back function */ |
| 1973 | if (!ret) |
| 1974 | mtd_erase_callback(instr); |
| 1975 | |
| 1976 | /* Deselect and wake up anyone waiting on the device */ |
| 1977 | nand_release_device(mtd); |
| 1978 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 1979 | /* |
| 1980 | * If BBT requires refresh and erase was successful, rewrite any |
| 1981 | * selected bad block tables |
| 1982 | */ |
| 1983 | if (bbt_masked_page == 0xffffffff || ret) |
| 1984 | return ret; |
| 1985 | |
| 1986 | for (chipnr = 0; chipnr < chip->numchips; chipnr++) { |
| 1987 | if (!rewrite_bbt[chipnr]) |
| 1988 | continue; |
| 1989 | /* update the BBT for chip */ |
| 1990 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt " |
| 1991 | "(%d:0x%0x 0x%0x)\n", chipnr, rewrite_bbt[chipnr], |
| 1992 | chip->bbt_td->pages[chipnr]); |
| 1993 | nand_update_bbt(mtd, rewrite_bbt[chipnr]); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1994 | } |
| 1995 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1996 | /* Return more or less happy */ |
| 1997 | return ret; |
| 1998 | } |
| 1999 | |
| 2000 | /** |
| 2001 | * nand_sync - [MTD Interface] sync |
| 2002 | * @mtd: MTD device structure |
| 2003 | * |
| 2004 | * Sync is actually a wait for chip ready function |
| 2005 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2006 | static void nand_sync(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2007 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2008 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2009 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2010 | DEBUG(MTD_DEBUG_LEVEL3, "nand_sync: called\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2011 | |
| 2012 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2013 | nand_get_device(chip, mtd, FL_SYNCING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2014 | /* Release it and go back */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2015 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2016 | } |
| 2017 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2018 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2019 | * nand_block_isbad - [MTD Interface] Check if block at offset is bad |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2020 | * @mtd: MTD device structure |
| 2021 | * @ofs: offset relative to mtd start |
| 2022 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2023 | static int nand_block_isbad(struct mtd_info *mtd, loff_t offs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2024 | { |
| 2025 | /* Check for invalid offset */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2026 | if (offs > mtd->size) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2027 | return -EINVAL; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2028 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2029 | return nand_block_checkbad(mtd, offs, 1, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2030 | } |
| 2031 | |
| 2032 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2033 | * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2034 | * @mtd: MTD device structure |
| 2035 | * @ofs: offset relative to mtd start |
| 2036 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2037 | static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2038 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2039 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2040 | int ret; |
| 2041 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2042 | if ((ret = nand_block_isbad(mtd, ofs))) { |
| 2043 | /* If it was bad already, return success and do nothing. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2044 | if (ret > 0) |
| 2045 | return 0; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2046 | return ret; |
| 2047 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2048 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2049 | return chip->block_markbad(mtd, ofs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2050 | } |
| 2051 | |
| 2052 | /** |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2053 | * nand_suspend - [MTD Interface] Suspend the NAND flash |
| 2054 | * @mtd: MTD device structure |
| 2055 | */ |
| 2056 | static int nand_suspend(struct mtd_info *mtd) |
| 2057 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2058 | struct nand_chip *chip = mtd->priv; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2059 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2060 | return nand_get_device(chip, mtd, FL_PM_SUSPENDED); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2061 | } |
| 2062 | |
| 2063 | /** |
| 2064 | * nand_resume - [MTD Interface] Resume the NAND flash |
| 2065 | * @mtd: MTD device structure |
| 2066 | */ |
| 2067 | static void nand_resume(struct mtd_info *mtd) |
| 2068 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2069 | struct nand_chip *chip = mtd->priv; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2070 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2071 | if (chip->state == FL_PM_SUSPENDED) |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2072 | nand_release_device(mtd); |
| 2073 | else |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 2074 | printk(KERN_ERR "nand_resume() called for a chip which is not " |
| 2075 | "in suspended state\n"); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2076 | } |
| 2077 | |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 2078 | /* |
| 2079 | * Free allocated data structures |
| 2080 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2081 | static void nand_free_kmem(struct nand_chip *chip) |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 2082 | { |
| 2083 | /* Buffer allocated by nand_scan ? */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2084 | if (chip->options & NAND_OOBBUF_ALLOC) |
| 2085 | kfree(chip->oob_buf); |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 2086 | /* Buffer allocated by nand_scan ? */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2087 | if (chip->options & NAND_DATABUF_ALLOC) |
| 2088 | kfree(chip->data_buf); |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 2089 | /* Controller allocated by nand_scan ? */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2090 | if (chip->options & NAND_CONTROLLER_ALLOC) |
| 2091 | kfree(chip->controller); |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 2092 | } |
| 2093 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2094 | /* |
| 2095 | * Allocate buffers and data structures |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2096 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2097 | static int nand_allocate_kmem(struct mtd_info *mtd, struct nand_chip *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2098 | { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2099 | size_t len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2100 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2101 | if (!chip->oob_buf) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2102 | len = mtd->oobsize << |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2103 | (chip->phys_erase_shift - chip->page_shift); |
| 2104 | chip->oob_buf = kmalloc(len, GFP_KERNEL); |
| 2105 | if (!chip->oob_buf) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2106 | goto outerr; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2107 | chip->options |= NAND_OOBBUF_ALLOC; |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 2108 | } |
| 2109 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2110 | if (!chip->data_buf) { |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 2111 | len = mtd->writesize + mtd->oobsize; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2112 | chip->data_buf = kmalloc(len, GFP_KERNEL); |
| 2113 | if (!chip->data_buf) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2114 | goto outerr; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2115 | chip->options |= NAND_DATABUF_ALLOC; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2116 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2117 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2118 | if (!chip->controller) { |
| 2119 | chip->controller = kzalloc(sizeof(struct nand_hw_control), |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2120 | GFP_KERNEL); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2121 | if (!chip->controller) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2122 | goto outerr; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2123 | chip->options |= NAND_CONTROLLER_ALLOC; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2124 | } |
| 2125 | return 0; |
| 2126 | |
| 2127 | outerr: |
| 2128 | printk(KERN_ERR "nand_scan(): Cannot allocate buffers\n"); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2129 | nand_free_kmem(chip); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2130 | return -ENOMEM; |
| 2131 | } |
| 2132 | |
| 2133 | /* |
| 2134 | * Set default functions |
| 2135 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2136 | static void nand_set_defaults(struct nand_chip *chip, int busw) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2137 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2138 | /* check for proper chip_delay setup, set 20us if not */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2139 | if (!chip->chip_delay) |
| 2140 | chip->chip_delay = 20; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2141 | |
| 2142 | /* check, if a user supplied command function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2143 | if (chip->cmdfunc == NULL) |
| 2144 | chip->cmdfunc = nand_command; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2145 | |
| 2146 | /* check, if a user supplied wait function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2147 | if (chip->waitfunc == NULL) |
| 2148 | chip->waitfunc = nand_wait; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2149 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2150 | if (!chip->select_chip) |
| 2151 | chip->select_chip = nand_select_chip; |
| 2152 | if (!chip->read_byte) |
| 2153 | chip->read_byte = busw ? nand_read_byte16 : nand_read_byte; |
| 2154 | if (!chip->read_word) |
| 2155 | chip->read_word = nand_read_word; |
| 2156 | if (!chip->block_bad) |
| 2157 | chip->block_bad = nand_block_bad; |
| 2158 | if (!chip->block_markbad) |
| 2159 | chip->block_markbad = nand_default_block_markbad; |
| 2160 | if (!chip->write_buf) |
| 2161 | chip->write_buf = busw ? nand_write_buf16 : nand_write_buf; |
| 2162 | if (!chip->read_buf) |
| 2163 | chip->read_buf = busw ? nand_read_buf16 : nand_read_buf; |
| 2164 | if (!chip->verify_buf) |
| 2165 | chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf; |
| 2166 | if (!chip->scan_bbt) |
| 2167 | chip->scan_bbt = nand_default_bbt; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2168 | } |
| 2169 | |
| 2170 | /* |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2171 | * Get the flash and manufacturer id and lookup if the type is supported |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2172 | */ |
| 2173 | static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2174 | struct nand_chip *chip, |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2175 | int busw, int *maf_id) |
| 2176 | { |
| 2177 | struct nand_flash_dev *type = NULL; |
| 2178 | int i, dev_id, maf_idx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2179 | |
| 2180 | /* Select the device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2181 | chip->select_chip(mtd, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2182 | |
| 2183 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2184 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2185 | |
| 2186 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2187 | *maf_id = chip->read_byte(mtd); |
| 2188 | dev_id = chip->read_byte(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2189 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2190 | /* Lookup the flash id */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2191 | for (i = 0; nand_flash_ids[i].name != NULL; i++) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2192 | if (dev_id == nand_flash_ids[i].id) { |
| 2193 | type = &nand_flash_ids[i]; |
| 2194 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2195 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2196 | } |
| 2197 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2198 | if (!type) |
| 2199 | return ERR_PTR(-ENODEV); |
| 2200 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2201 | chip->chipsize = nand_flash_ids[i].chipsize << 20; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2202 | |
| 2203 | /* Newer devices have all the information in additional id bytes */ |
| 2204 | if (!nand_flash_ids[i].pagesize) { |
| 2205 | int extid; |
| 2206 | /* The 3rd id byte contains non relevant data ATM */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2207 | extid = chip->read_byte(mtd); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2208 | /* The 4th id byte is the important one */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2209 | extid = chip->read_byte(mtd); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2210 | /* Calc pagesize */ |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 2211 | mtd->writesize = 1024 << (extid & 0x3); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2212 | extid >>= 2; |
| 2213 | /* Calc oobsize */ |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 2214 | mtd->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2215 | extid >>= 2; |
| 2216 | /* Calc blocksize. Blocksize is multiples of 64KiB */ |
| 2217 | mtd->erasesize = (64 * 1024) << (extid & 0x03); |
| 2218 | extid >>= 2; |
| 2219 | /* Get buswidth information */ |
| 2220 | busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0; |
| 2221 | |
| 2222 | } else { |
| 2223 | /* |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2224 | * Old devices have chip data hardcoded in the device id table |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2225 | */ |
| 2226 | mtd->erasesize = nand_flash_ids[i].erasesize; |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 2227 | mtd->writesize = nand_flash_ids[i].pagesize; |
| 2228 | mtd->oobsize = mtd->writesize / 32; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2229 | busw = nand_flash_ids[i].options & NAND_BUSWIDTH_16; |
| 2230 | } |
| 2231 | |
| 2232 | /* Try to identify manufacturer */ |
| 2233 | for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_id++) { |
| 2234 | if (nand_manuf_ids[maf_idx].id == *maf_id) |
| 2235 | break; |
| 2236 | } |
| 2237 | |
| 2238 | /* |
| 2239 | * Check, if buswidth is correct. Hardware drivers should set |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2240 | * chip correct ! |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2241 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2242 | if (busw != (chip->options & NAND_BUSWIDTH_16)) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2243 | printk(KERN_INFO "NAND device: Manufacturer ID:" |
| 2244 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, |
| 2245 | dev_id, nand_manuf_ids[maf_idx].name, mtd->name); |
| 2246 | printk(KERN_WARNING "NAND bus width %d instead %d bit\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2247 | (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2248 | busw ? 16 : 8); |
| 2249 | return ERR_PTR(-EINVAL); |
| 2250 | } |
| 2251 | |
| 2252 | /* Calculate the address shift from the page size */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2253 | chip->page_shift = ffs(mtd->writesize) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2254 | /* Convert chipsize to number of pages per chip -1. */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2255 | chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2256 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2257 | chip->bbt_erase_shift = chip->phys_erase_shift = |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2258 | ffs(mtd->erasesize) - 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2259 | chip->chip_shift = ffs(chip->chipsize) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2260 | |
| 2261 | /* Set the bad block position */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2262 | chip->badblockpos = mtd->writesize > 512 ? |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2263 | NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS; |
| 2264 | |
| 2265 | /* Get chip options, preserve non chip based options */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2266 | chip->options &= ~NAND_CHIPOPTIONS_MSK; |
| 2267 | chip->options |= nand_flash_ids[i].options & NAND_CHIPOPTIONS_MSK; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2268 | |
| 2269 | /* |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2270 | * Set chip as a default. Board drivers can override it, if necessary |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2271 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2272 | chip->options |= NAND_NO_AUTOINCR; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2273 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2274 | /* Check if chip is a not a samsung device. Do not clear the |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2275 | * options for chips which are not having an extended id. |
| 2276 | */ |
| 2277 | if (*maf_id != NAND_MFR_SAMSUNG && !nand_flash_ids[i].pagesize) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2278 | chip->options &= ~NAND_SAMSUNG_LP_OPTIONS; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2279 | |
| 2280 | /* Check for AND chips with 4 page planes */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2281 | if (chip->options & NAND_4PAGE_ARRAY) |
| 2282 | chip->erase_cmd = multi_erase_cmd; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2283 | else |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2284 | chip->erase_cmd = single_erase_cmd; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2285 | |
| 2286 | /* Do not replace user supplied command function ! */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2287 | if (mtd->writesize > 512 && chip->cmdfunc == nand_command) |
| 2288 | chip->cmdfunc = nand_command_lp; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2289 | |
| 2290 | printk(KERN_INFO "NAND device: Manufacturer ID:" |
| 2291 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, dev_id, |
| 2292 | nand_manuf_ids[maf_idx].name, type->name); |
| 2293 | |
| 2294 | return type; |
| 2295 | } |
| 2296 | |
| 2297 | /* module_text_address() isn't exported, and it's mostly a pointless |
| 2298 | test if this is a module _anyway_ -- they'd have to try _really_ hard |
| 2299 | to call us from in-kernel code if the core NAND support is modular. */ |
| 2300 | #ifdef MODULE |
| 2301 | #define caller_is_module() (1) |
| 2302 | #else |
| 2303 | #define caller_is_module() \ |
| 2304 | module_text_address((unsigned long)__builtin_return_address(0)) |
| 2305 | #endif |
| 2306 | |
| 2307 | /** |
| 2308 | * nand_scan - [NAND Interface] Scan for the NAND device |
| 2309 | * @mtd: MTD device structure |
| 2310 | * @maxchips: Number of chips to scan for |
| 2311 | * |
| 2312 | * This fills out all the uninitialized function pointers |
| 2313 | * with the defaults. |
| 2314 | * The flash ID is read and the mtd/chip structures are |
| 2315 | * filled with the appropriate values. Buffers are allocated if |
| 2316 | * they are not provided by the board driver |
| 2317 | * The mtd->owner field must be set to the module of the caller |
| 2318 | * |
| 2319 | */ |
| 2320 | int nand_scan(struct mtd_info *mtd, int maxchips) |
| 2321 | { |
| 2322 | int i, busw, nand_maf_id; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2323 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2324 | struct nand_flash_dev *type; |
| 2325 | |
| 2326 | /* Many callers got this wrong, so check for it for a while... */ |
| 2327 | if (!mtd->owner && caller_is_module()) { |
| 2328 | printk(KERN_CRIT "nand_scan() called with NULL mtd->owner!\n"); |
| 2329 | BUG(); |
| 2330 | } |
| 2331 | |
| 2332 | /* Get buswidth to select the correct functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2333 | busw = chip->options & NAND_BUSWIDTH_16; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2334 | /* Set the default functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2335 | nand_set_defaults(chip, busw); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2336 | |
| 2337 | /* Read the flash type */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2338 | type = nand_get_flash_type(mtd, chip, busw, &nand_maf_id); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2339 | |
| 2340 | if (IS_ERR(type)) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2341 | printk(KERN_WARNING "No NAND device found!!!\n"); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2342 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2343 | return PTR_ERR(type); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2344 | } |
| 2345 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2346 | /* Check for a chip array */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2347 | for (i = 1; i < maxchips; i++) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2348 | chip->select_chip(mtd, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2349 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2350 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2351 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2352 | if (nand_maf_id != chip->read_byte(mtd) || |
| 2353 | type->id != chip->read_byte(mtd)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2354 | break; |
| 2355 | } |
| 2356 | if (i > 1) |
| 2357 | printk(KERN_INFO "%d NAND chips detected\n", i); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2358 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2359 | /* Store the number of chips and calc total size for mtd */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2360 | chip->numchips = i; |
| 2361 | mtd->size = i * chip->chipsize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2362 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2363 | /* Allocate buffers and data structures */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2364 | if (nand_allocate_kmem(mtd, chip)) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2365 | return -ENOMEM; |
| 2366 | |
| 2367 | /* Preset the internal oob buffer */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2368 | memset(chip->oob_buf, 0xff, |
| 2369 | mtd->oobsize << (chip->phys_erase_shift - chip->page_shift)); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2370 | |
| 2371 | /* |
| 2372 | * If no default placement scheme is given, select an appropriate one |
| 2373 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2374 | if (!chip->autooob) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2375 | switch (mtd->oobsize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2376 | case 8: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2377 | chip->autooob = &nand_oob_8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2378 | break; |
| 2379 | case 16: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2380 | chip->autooob = &nand_oob_16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2381 | break; |
| 2382 | case 64: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2383 | chip->autooob = &nand_oob_64; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2384 | break; |
| 2385 | default: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2386 | printk(KERN_WARNING "No oob scheme defined for " |
| 2387 | "oobsize %d\n", mtd->oobsize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2388 | BUG(); |
| 2389 | } |
| 2390 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2391 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2392 | /* |
| 2393 | * The number of bytes available for the filesystem to place fs |
| 2394 | * dependend oob data |
| 2395 | */ |
Thomas Gleixner | 998cf64 | 2005-04-01 08:21:48 +0100 | [diff] [blame] | 2396 | mtd->oobavail = 0; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2397 | for (i = 0; chip->autooob->oobfree[i][1]; i++) |
| 2398 | mtd->oobavail += chip->autooob->oobfree[i][1]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2399 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2400 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2401 | * check ECC mode, default to software if 3byte/512byte hardware ECC is |
| 2402 | * selected and we have 256 byte pagesize fallback to software ECC |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2403 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2404 | switch (chip->ecc.mode) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2405 | case NAND_ECC_HW: |
| 2406 | case NAND_ECC_HW_SYNDROME: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2407 | if (!chip->ecc.calculate || !chip->ecc.correct || |
| 2408 | !chip->ecc.hwctl) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2409 | printk(KERN_WARNING "No ECC functions supplied, " |
| 2410 | "Hardware ECC not possible\n"); |
| 2411 | BUG(); |
| 2412 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2413 | if (mtd->writesize >= chip->ecc.size) |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2414 | break; |
| 2415 | printk(KERN_WARNING "%d byte HW ECC not possible on " |
| 2416 | "%d byte page size, fallback to SW ECC\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2417 | chip->ecc.size, mtd->writesize); |
| 2418 | chip->ecc.mode = NAND_ECC_SOFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2419 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2420 | case NAND_ECC_SOFT: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2421 | chip->ecc.calculate = nand_calculate_ecc; |
| 2422 | chip->ecc.correct = nand_correct_data; |
| 2423 | chip->ecc.size = 256; |
| 2424 | chip->ecc.bytes = 3; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2425 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2426 | |
| 2427 | case NAND_ECC_NONE: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2428 | printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. " |
| 2429 | "This is not recommended !!\n"); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2430 | chip->ecc.size = mtd->writesize; |
| 2431 | chip->ecc.bytes = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2432 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2433 | default: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2434 | printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2435 | chip->ecc.mode); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2436 | BUG(); |
| 2437 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2438 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2439 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2440 | * Set the number of read / write steps for one page depending on ECC |
| 2441 | * mode |
| 2442 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2443 | chip->ecc.steps = mtd->writesize / chip->ecc.size; |
| 2444 | if(chip->ecc.steps * chip->ecc.size != mtd->writesize) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2445 | printk(KERN_WARNING "Invalid ecc parameters\n"); |
| 2446 | BUG(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2447 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2448 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2449 | /* Initialize state, waitqueue and spinlock */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2450 | chip->state = FL_READY; |
| 2451 | init_waitqueue_head(&chip->controller->wq); |
| 2452 | spin_lock_init(&chip->controller->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2453 | |
| 2454 | /* De-select the device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2455 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2456 | |
| 2457 | /* Invalidate the pagebuffer reference */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2458 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2459 | |
| 2460 | /* Fill in remaining MTD driver data */ |
| 2461 | mtd->type = MTD_NANDFLASH; |
Joern Engel | 5fa4339 | 2006-05-22 23:18:29 +0200 | [diff] [blame] | 2462 | mtd->flags = MTD_CAP_NANDFLASH; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2463 | mtd->ecctype = MTD_ECC_SW; |
| 2464 | mtd->erase = nand_erase; |
| 2465 | mtd->point = NULL; |
| 2466 | mtd->unpoint = NULL; |
| 2467 | mtd->read = nand_read; |
| 2468 | mtd->write = nand_write; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2469 | mtd->read_oob = nand_read_oob; |
| 2470 | mtd->write_oob = nand_write_oob; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2471 | mtd->sync = nand_sync; |
| 2472 | mtd->lock = NULL; |
| 2473 | mtd->unlock = NULL; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2474 | mtd->suspend = nand_suspend; |
| 2475 | mtd->resume = nand_resume; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2476 | mtd->block_isbad = nand_block_isbad; |
| 2477 | mtd->block_markbad = nand_block_markbad; |
| 2478 | |
| 2479 | /* and make the autooob the default one */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2480 | memcpy(&mtd->oobinfo, chip->autooob, sizeof(mtd->oobinfo)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2481 | |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 2482 | /* Check, if we should skip the bad block table scan */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2483 | if (chip->options & NAND_SKIP_BBTSCAN) |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 2484 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2485 | |
| 2486 | /* Build bad block table */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2487 | return chip->scan_bbt(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2488 | } |
| 2489 | |
| 2490 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2491 | * nand_release - [NAND Interface] Free resources held by the NAND device |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2492 | * @mtd: MTD device structure |
| 2493 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2494 | void nand_release(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2495 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2496 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2497 | |
| 2498 | #ifdef CONFIG_MTD_PARTITIONS |
| 2499 | /* Deregister partitions */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2500 | del_mtd_partitions(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2501 | #endif |
| 2502 | /* Deregister the device */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2503 | del_mtd_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2504 | |
Jesper Juhl | fa67164 | 2005-11-07 01:01:27 -0800 | [diff] [blame] | 2505 | /* Free bad block table memory */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2506 | kfree(chip->bbt); |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 2507 | /* Free buffers */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame^] | 2508 | nand_free_kmem(chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2509 | } |
| 2510 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2511 | EXPORT_SYMBOL_GPL(nand_scan); |
| 2512 | EXPORT_SYMBOL_GPL(nand_release); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 2513 | |
| 2514 | static int __init nand_base_init(void) |
| 2515 | { |
| 2516 | led_trigger_register_simple("nand-disk", &nand_led_trigger); |
| 2517 | return 0; |
| 2518 | } |
| 2519 | |
| 2520 | static void __exit nand_base_exit(void) |
| 2521 | { |
| 2522 | led_trigger_unregister_simple(nand_led_trigger); |
| 2523 | } |
| 2524 | |
| 2525 | module_init(nand_base_init); |
| 2526 | module_exit(nand_base_exit); |
| 2527 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2528 | MODULE_LICENSE("GPL"); |
| 2529 | MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>"); |
| 2530 | MODULE_DESCRIPTION("Generic NAND flash driver code"); |