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Linus Torvalds1da177e2005-04-16 15:20:36 -07001if ARCH_CLPS711X
2
3menu "CLPS711X/EP721X Implementations"
4
5config ARCH_AUTCPU12
6 bool "AUTCPU12"
7 help
8 Say Y if you intend to run the kernel on the autronix autcpu12
9 board. This board is based on a Cirrus Logic CS89712.
10
11config ARCH_CDB89712
12 bool "CDB89712"
Russell Kingf7e68bb2005-05-05 14:49:01 +010013 select ISA
Linus Torvalds1da177e2005-04-16 15:20:36 -070014 help
15 This is an evaluation board from Cirrus for the CS89712 processor.
16 The board includes 2 serial ports, Ethernet, IRDA, and expansion
17 headers. It comes with 16 MB SDRAM and 8 MB flash ROM.
18
19config ARCH_CEIVA
20 bool "CEIVA"
21 help
22 Say Y here if you intend to run this kernel on the Ceiva/Polaroid
23 PhotoMax Digital Picture Frame.
24
25config ARCH_CLEP7312
26 bool "CLEP7312"
Martin Michlmayrf999b8b2006-02-08 21:09:05 +000027 help
28 Boards based on the Cirrus Logic 7212/7312 chips.
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
30config ARCH_EDB7211
31 bool "EDB7211"
Russell Kingf7e68bb2005-05-05 14:49:01 +010032 select ISA
Russell King3cd9e192005-06-25 19:29:34 +010033 select ARCH_DISCONTIGMEM_ENABLE
Russell King05944d72006-11-30 20:43:51 +000034 select ARCH_SPARSEMEM_ENABLE
35 select ARCH_SELECT_MEMORY_MODEL
Linus Torvalds1da177e2005-04-16 15:20:36 -070036 help
37 Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211
38 evaluation board.
39
40config ARCH_P720T
41 bool "P720T"
42 help
43 Say Y here if you intend to run this kernel on the ARM Prospector
44 720T.
45
46config ARCH_FORTUNET
47 bool "FORTUNET"
48
49# XXX Maybe these should indicate register compatibility
50# instead of being mutually exclusive.
51config ARCH_EP7211
52 bool
53 depends on ARCH_EDB7211
54 default y
55
56config ARCH_EP7212
57 bool
58 depends on ARCH_P720T || ARCH_CEIVA
59 default y
60
61config EP72XX_ROM_BOOT
62 bool "EP72xx ROM boot"
63 depends on ARCH_EP7211 || ARCH_EP7212
64 ---help---
65 If you say Y here, your CLPS711x-based kernel will use the bootstrap
66 mode memory map instead of the normal memory map.
67
68 Processors derived from the Cirrus CLPS-711X core support two boot
69 modes. Normal mode boots from the external memory device at CS0.
70 Bootstrap mode rearranges parts of the memory map, placing an
71 internal 128 byte bootstrap ROM at CS0. This option performs the
72 address map changes required to support booting in this mode.
73
74 You almost surely want to say N here.
75
Linus Torvalds1da177e2005-04-16 15:20:36 -070076endmenu
77
78endif