blob: bc28337fded2fdb2ae1b2725ae22464898bdb051 [file] [log] [blame]
Dan Williams9bc89cd2007-01-02 11:10:44 -07001/*
2 * xor offload engine api
3 *
4 * Copyright © 2006, Intel Corporation.
5 *
6 * Dan Williams <dan.j.williams@intel.com>
7 *
8 * with architecture considerations by:
9 * Neil Brown <neilb@suse.de>
10 * Jeff Garzik <jeff@garzik.org>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * more details.
20 *
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24 *
25 */
26#include <linux/kernel.h>
27#include <linux/interrupt.h>
28#include <linux/mm.h>
29#include <linux/dma-mapping.h>
30#include <linux/raid/xor.h>
31#include <linux/async_tx.h>
32
Dan Williams06164f32009-03-25 09:13:25 -070033/* do_async_xor - dma map the pages and perform the xor with an engine */
34static __async_inline struct dma_async_tx_descriptor *
Dan Williams1e55db22008-07-16 19:44:56 -070035do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list,
Dan Williams04ce9ab2009-06-03 14:22:28 -070036 unsigned int offset, int src_cnt, size_t len, dma_addr_t *dma_src,
Dan Williamsa08abd82009-06-03 11:43:59 -070037 struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -070038{
Dan Williams1e55db22008-07-16 19:44:56 -070039 struct dma_device *dma = chan->device;
Dan Williams1e55db22008-07-16 19:44:56 -070040 struct dma_async_tx_descriptor *tx = NULL;
41 int src_off = 0;
Dan Williams9bc89cd2007-01-02 11:10:44 -070042 int i;
Dan Williamsa08abd82009-06-03 11:43:59 -070043 dma_async_tx_callback cb_fn_orig = submit->cb_fn;
44 void *cb_param_orig = submit->cb_param;
45 enum async_tx_flags flags_orig = submit->flags;
Dan Williams1e55db22008-07-16 19:44:56 -070046 enum dma_ctrl_flags dma_flags;
NeilBrownb2141e62009-10-16 16:40:34 +110047 int xor_src_cnt = 0;
Dan Williams1e55db22008-07-16 19:44:56 -070048 dma_addr_t dma_dest;
Dan Williams9bc89cd2007-01-02 11:10:44 -070049
Dan Williamsa06d5682008-12-08 13:46:00 -070050 /* map the dest bidrectional in case it is re-used as a source */
51 dma_dest = dma_map_page(dma->dev, dest, offset, len, DMA_BIDIRECTIONAL);
52 for (i = 0; i < src_cnt; i++) {
53 /* only map the dest once */
NeilBrownb2141e62009-10-16 16:40:34 +110054 if (!src_list[i])
55 continue;
Dan Williamsa06d5682008-12-08 13:46:00 -070056 if (unlikely(src_list[i] == dest)) {
NeilBrownb2141e62009-10-16 16:40:34 +110057 dma_src[xor_src_cnt++] = dma_dest;
Dan Williamsa06d5682008-12-08 13:46:00 -070058 continue;
59 }
NeilBrownb2141e62009-10-16 16:40:34 +110060 dma_src[xor_src_cnt++] = dma_map_page(dma->dev, src_list[i], offset,
61 len, DMA_TO_DEVICE);
Dan Williamsa06d5682008-12-08 13:46:00 -070062 }
NeilBrownb2141e62009-10-16 16:40:34 +110063 src_cnt = xor_src_cnt;
Dan Williams00367312008-02-02 19:49:57 -070064
Dan Williams1e55db22008-07-16 19:44:56 -070065 while (src_cnt) {
Dan Williamsa08abd82009-06-03 11:43:59 -070066 submit->flags = flags_orig;
Dan Williams1e55db22008-07-16 19:44:56 -070067 dma_flags = 0;
Dan Williamsb2f46fd2009-07-14 12:20:36 -070068 xor_src_cnt = min(src_cnt, (int)dma->max_xor);
Dan Williams1e55db22008-07-16 19:44:56 -070069 /* if we are submitting additional xors, leave the chain open,
70 * clear the callback parameters, and leave the destination
71 * buffer mapped
72 */
73 if (src_cnt > xor_src_cnt) {
Dan Williamsa08abd82009-06-03 11:43:59 -070074 submit->flags &= ~ASYNC_TX_ACK;
Dan Williams0403e382009-09-08 17:42:50 -070075 submit->flags |= ASYNC_TX_FENCE;
Dan Williams1e55db22008-07-16 19:44:56 -070076 dma_flags = DMA_COMPL_SKIP_DEST_UNMAP;
Dan Williamsa08abd82009-06-03 11:43:59 -070077 submit->cb_fn = NULL;
78 submit->cb_param = NULL;
Dan Williams1e55db22008-07-16 19:44:56 -070079 } else {
Dan Williamsa08abd82009-06-03 11:43:59 -070080 submit->cb_fn = cb_fn_orig;
81 submit->cb_param = cb_param_orig;
Dan Williams1e55db22008-07-16 19:44:56 -070082 }
Dan Williamsa08abd82009-06-03 11:43:59 -070083 if (submit->cb_fn)
Dan Williams1e55db22008-07-16 19:44:56 -070084 dma_flags |= DMA_PREP_INTERRUPT;
Dan Williams0403e382009-09-08 17:42:50 -070085 if (submit->flags & ASYNC_TX_FENCE)
86 dma_flags |= DMA_PREP_FENCE;
Dan Williams1e55db22008-07-16 19:44:56 -070087 /* Since we have clobbered the src_list we are committed
88 * to doing this asynchronously. Drivers force forward progress
89 * in case they can not provide a descriptor
90 */
91 tx = dma->device_prep_dma_xor(chan, dma_dest, &dma_src[src_off],
92 xor_src_cnt, len, dma_flags);
93
Dan Williams669ab0b2008-07-17 17:59:55 -070094 if (unlikely(!tx))
Dan Williamsa08abd82009-06-03 11:43:59 -070095 async_tx_quiesce(&submit->depend_tx);
Dan Williams00367312008-02-02 19:49:57 -070096
Lucas De Marchi25985ed2011-03-30 22:57:33 -030097 /* spin wait for the preceding transactions to complete */
Dan Williams669ab0b2008-07-17 17:59:55 -070098 while (unlikely(!tx)) {
99 dma_async_issue_pending(chan);
Dan Williams1e55db22008-07-16 19:44:56 -0700100 tx = dma->device_prep_dma_xor(chan, dma_dest,
101 &dma_src[src_off],
102 xor_src_cnt, len,
103 dma_flags);
Dan Williams669ab0b2008-07-17 17:59:55 -0700104 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700105
Dan Williamsa08abd82009-06-03 11:43:59 -0700106 async_tx_submit(chan, tx, submit);
107 submit->depend_tx = tx;
Dan Williams1e55db22008-07-16 19:44:56 -0700108
109 if (src_cnt > xor_src_cnt) {
110 /* drop completed sources */
111 src_cnt -= xor_src_cnt;
112 src_off += xor_src_cnt;
113
114 /* use the intermediate result a source */
115 dma_src[--src_off] = dma_dest;
116 src_cnt++;
117 } else
118 break;
119 }
Dan Williams00367312008-02-02 19:49:57 -0700120
121 return tx;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700122}
123
124static void
125do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset,
Dan Williamsa08abd82009-06-03 11:43:59 -0700126 int src_cnt, size_t len, struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700127{
Dan Williams9bc89cd2007-01-02 11:10:44 -0700128 int i;
NeilBrownb2141e62009-10-16 16:40:34 +1100129 int xor_src_cnt = 0;
Dan Williams1e55db22008-07-16 19:44:56 -0700130 int src_off = 0;
131 void *dest_buf;
Dan Williams04ce9ab2009-06-03 14:22:28 -0700132 void **srcs;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700133
Dan Williams04ce9ab2009-06-03 14:22:28 -0700134 if (submit->scribble)
135 srcs = submit->scribble;
136 else
137 srcs = (void **) src_list;
138
139 /* convert to buffer pointers */
Dan Williams9bc89cd2007-01-02 11:10:44 -0700140 for (i = 0; i < src_cnt; i++)
NeilBrownb2141e62009-10-16 16:40:34 +1100141 if (src_list[i])
142 srcs[xor_src_cnt++] = page_address(src_list[i]) + offset;
143 src_cnt = xor_src_cnt;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700144 /* set destination address */
Dan Williams1e55db22008-07-16 19:44:56 -0700145 dest_buf = page_address(dest) + offset;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700146
Dan Williamsa08abd82009-06-03 11:43:59 -0700147 if (submit->flags & ASYNC_TX_XOR_ZERO_DST)
Dan Williams1e55db22008-07-16 19:44:56 -0700148 memset(dest_buf, 0, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700149
Dan Williams1e55db22008-07-16 19:44:56 -0700150 while (src_cnt > 0) {
151 /* process up to 'MAX_XOR_BLOCKS' sources */
152 xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS);
153 xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]);
154
155 /* drop completed sources */
156 src_cnt -= xor_src_cnt;
157 src_off += xor_src_cnt;
158 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700159
Dan Williamsa08abd82009-06-03 11:43:59 -0700160 async_tx_sync_epilog(submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700161}
162
163/**
164 * async_xor - attempt to xor a set of blocks with a dma engine.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700165 * @dest: destination page
Dan Williamsa08abd82009-06-03 11:43:59 -0700166 * @src_list: array of source pages
167 * @offset: common src/dst offset to start transaction
Dan Williams9bc89cd2007-01-02 11:10:44 -0700168 * @src_cnt: number of source pages
169 * @len: length in bytes
Dan Williamsa08abd82009-06-03 11:43:59 -0700170 * @submit: submission / completion modifiers
171 *
172 * honored flags: ASYNC_TX_ACK, ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DST
173 *
174 * xor_blocks always uses the dest as a source so the
175 * ASYNC_TX_XOR_ZERO_DST flag must be set to not include dest data in
176 * the calculation. The assumption with dma eninges is that they only
177 * use the destination buffer as a source when it is explicity specified
178 * in the source list.
179 *
180 * src_list note: if the dest is also a source it must be at index zero.
181 * The contents of this array will be overwritten if a scribble region
182 * is not specified.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700183 */
184struct dma_async_tx_descriptor *
185async_xor(struct page *dest, struct page **src_list, unsigned int offset,
Dan Williamsa08abd82009-06-03 11:43:59 -0700186 int src_cnt, size_t len, struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700187{
Dan Williamsa08abd82009-06-03 11:43:59 -0700188 struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR,
Dan Williams47437b22008-02-02 19:49:59 -0700189 &dest, 1, src_list,
190 src_cnt, len);
Dan Williams04ce9ab2009-06-03 14:22:28 -0700191 dma_addr_t *dma_src = NULL;
192
Dan Williams9bc89cd2007-01-02 11:10:44 -0700193 BUG_ON(src_cnt <= 1);
194
Dan Williams04ce9ab2009-06-03 14:22:28 -0700195 if (submit->scribble)
196 dma_src = submit->scribble;
197 else if (sizeof(dma_addr_t) <= sizeof(struct page *))
198 dma_src = (dma_addr_t *) src_list;
199
Dan Williams83544ae2009-09-08 17:42:53 -0700200 if (dma_src && chan && is_dma_xor_aligned(chan->device, offset, 0, len)) {
Dan Williams1e55db22008-07-16 19:44:56 -0700201 /* run the xor asynchronously */
202 pr_debug("%s (async): len: %zu\n", __func__, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700203
Dan Williams1e55db22008-07-16 19:44:56 -0700204 return do_async_xor(chan, dest, src_list, offset, src_cnt, len,
Dan Williams04ce9ab2009-06-03 14:22:28 -0700205 dma_src, submit);
Dan Williams1e55db22008-07-16 19:44:56 -0700206 } else {
207 /* run the xor synchronously */
208 pr_debug("%s (sync): len: %zu\n", __func__, len);
Dan Williams04ce9ab2009-06-03 14:22:28 -0700209 WARN_ONCE(chan, "%s: no space for dma address conversion\n",
210 __func__);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700211
Dan Williams1e55db22008-07-16 19:44:56 -0700212 /* in the sync case the dest is an implied source
213 * (assumes the dest is the first source)
214 */
Dan Williamsa08abd82009-06-03 11:43:59 -0700215 if (submit->flags & ASYNC_TX_XOR_DROP_DST) {
Dan Williams1e55db22008-07-16 19:44:56 -0700216 src_cnt--;
217 src_list++;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700218 }
219
Dan Williams1e55db22008-07-16 19:44:56 -0700220 /* wait for any prerequisite operations */
Dan Williamsa08abd82009-06-03 11:43:59 -0700221 async_tx_quiesce(&submit->depend_tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700222
Dan Williamsa08abd82009-06-03 11:43:59 -0700223 do_sync_xor(dest, src_list, offset, src_cnt, len, submit);
Dan Williams1e55db22008-07-16 19:44:56 -0700224
225 return NULL;
226 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700227}
228EXPORT_SYMBOL_GPL(async_xor);
229
230static int page_is_zero(struct page *p, unsigned int offset, size_t len)
231{
232 char *a = page_address(p) + offset;
233 return ((*(u32 *) a) == 0 &&
234 memcmp(a, a + 4, len - 4) == 0);
235}
236
Dan Williams7b3cc2b2009-11-19 17:10:37 -0700237static inline struct dma_chan *
238xor_val_chan(struct async_submit_ctl *submit, struct page *dest,
239 struct page **src_list, int src_cnt, size_t len)
240{
241 #ifdef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
242 return NULL;
243 #endif
244 return async_tx_find_channel(submit, DMA_XOR_VAL, &dest, 1, src_list,
245 src_cnt, len);
246}
247
Dan Williams9bc89cd2007-01-02 11:10:44 -0700248/**
Dan Williams099f53c2009-04-08 14:28:37 -0700249 * async_xor_val - attempt a xor parity check with a dma engine.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700250 * @dest: destination page used if the xor is performed synchronously
Dan Williamsa08abd82009-06-03 11:43:59 -0700251 * @src_list: array of source pages
Dan Williams9bc89cd2007-01-02 11:10:44 -0700252 * @offset: offset in pages to start transaction
253 * @src_cnt: number of source pages
254 * @len: length in bytes
255 * @result: 0 if sum == 0 else non-zero
Dan Williamsa08abd82009-06-03 11:43:59 -0700256 * @submit: submission / completion modifiers
257 *
258 * honored flags: ASYNC_TX_ACK
259 *
260 * src_list note: if the dest is also a source it must be at index zero.
261 * The contents of this array will be overwritten if a scribble region
262 * is not specified.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700263 */
264struct dma_async_tx_descriptor *
Dan Williamsa08abd82009-06-03 11:43:59 -0700265async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
Dan Williamsad283ea2009-08-29 19:09:26 -0700266 int src_cnt, size_t len, enum sum_check_flags *result,
Dan Williamsa08abd82009-06-03 11:43:59 -0700267 struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700268{
Dan Williams7b3cc2b2009-11-19 17:10:37 -0700269 struct dma_chan *chan = xor_val_chan(submit, dest, src_list, src_cnt, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700270 struct dma_device *device = chan ? chan->device : NULL;
Dan Williams00367312008-02-02 19:49:57 -0700271 struct dma_async_tx_descriptor *tx = NULL;
Dan Williams04ce9ab2009-06-03 14:22:28 -0700272 dma_addr_t *dma_src = NULL;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700273
274 BUG_ON(src_cnt <= 1);
275
Dan Williams04ce9ab2009-06-03 14:22:28 -0700276 if (submit->scribble)
277 dma_src = submit->scribble;
278 else if (sizeof(dma_addr_t) <= sizeof(struct page *))
279 dma_src = (dma_addr_t *) src_list;
280
Dan Williams83544ae2009-09-08 17:42:53 -0700281 if (dma_src && device && src_cnt <= device->max_xor &&
282 is_dma_xor_aligned(device, offset, 0, len)) {
Dan Williams0403e382009-09-08 17:42:50 -0700283 unsigned long dma_prep_flags = 0;
Dan Williams00367312008-02-02 19:49:57 -0700284 int i;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700285
Dan Williams3280ab3e2008-03-13 17:45:28 -0700286 pr_debug("%s: (async) len: %zu\n", __func__, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700287
Dan Williams0403e382009-09-08 17:42:50 -0700288 if (submit->cb_fn)
289 dma_prep_flags |= DMA_PREP_INTERRUPT;
290 if (submit->flags & ASYNC_TX_FENCE)
291 dma_prep_flags |= DMA_PREP_FENCE;
Dan Williams00367312008-02-02 19:49:57 -0700292 for (i = 0; i < src_cnt; i++)
293 dma_src[i] = dma_map_page(device->dev, src_list[i],
294 offset, len, DMA_TO_DEVICE);
295
Dan Williams099f53c2009-04-08 14:28:37 -0700296 tx = device->device_prep_dma_xor_val(chan, dma_src, src_cnt,
297 len, result,
298 dma_prep_flags);
Dan Williams669ab0b2008-07-17 17:59:55 -0700299 if (unlikely(!tx)) {
Dan Williamsa08abd82009-06-03 11:43:59 -0700300 async_tx_quiesce(&submit->depend_tx);
Dan Williams00367312008-02-02 19:49:57 -0700301
Dan Williamse34a8ae2008-08-05 10:22:05 -0700302 while (!tx) {
Dan Williams669ab0b2008-07-17 17:59:55 -0700303 dma_async_issue_pending(chan);
Dan Williams099f53c2009-04-08 14:28:37 -0700304 tx = device->device_prep_dma_xor_val(chan,
Dan Williams00367312008-02-02 19:49:57 -0700305 dma_src, src_cnt, len, result,
Dan Williamsd4c56f92008-02-02 19:49:58 -0700306 dma_prep_flags);
Dan Williamse34a8ae2008-08-05 10:22:05 -0700307 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700308 }
309
Dan Williamsa08abd82009-06-03 11:43:59 -0700310 async_tx_submit(chan, tx, submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700311 } else {
Dan Williamsa08abd82009-06-03 11:43:59 -0700312 enum async_tx_flags flags_orig = submit->flags;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700313
Dan Williams3280ab3e2008-03-13 17:45:28 -0700314 pr_debug("%s: (sync) len: %zu\n", __func__, len);
Dan Williams04ce9ab2009-06-03 14:22:28 -0700315 WARN_ONCE(device && src_cnt <= device->max_xor,
316 "%s: no space for dma address conversion\n",
317 __func__);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700318
Dan Williamsa08abd82009-06-03 11:43:59 -0700319 submit->flags |= ASYNC_TX_XOR_DROP_DST;
320 submit->flags &= ~ASYNC_TX_ACK;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700321
Dan Williamsa08abd82009-06-03 11:43:59 -0700322 tx = async_xor(dest, src_list, offset, src_cnt, len, submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700323
Dan Williamsd2c52b72008-07-17 17:59:55 -0700324 async_tx_quiesce(&tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700325
Dan Williamsad283ea2009-08-29 19:09:26 -0700326 *result = !page_is_zero(dest, offset, len) << SUM_CHECK_P;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700327
Dan Williamsa08abd82009-06-03 11:43:59 -0700328 async_tx_sync_epilog(submit);
329 submit->flags = flags_orig;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700330 }
331
332 return tx;
333}
Dan Williams099f53c2009-04-08 14:28:37 -0700334EXPORT_SYMBOL_GPL(async_xor_val);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700335
Dan Williams9bc89cd2007-01-02 11:10:44 -0700336MODULE_AUTHOR("Intel Corporation");
337MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api");
338MODULE_LICENSE("GPL");