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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/pci/setup-res.c
3 *
4 * Extruded from code written by
5 * Dave Rusling (david.rusling@reo.mts.dec.com)
6 * David Mosberger (davidm@cs.arizona.edu)
7 * David Miller (davem@redhat.com)
8 *
9 * Support routines for initializing a PCI subsystem.
10 */
11
12/* fixed for multiple pci buses, 1999 Andrea Arcangeli <andrea@suse.de> */
13
14/*
15 * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
16 * Resource sorting
17 */
18
19#include <linux/init.h>
20#include <linux/kernel.h>
Paul Gortmaker363c75d2011-05-27 09:37:25 -040021#include <linux/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070022#include <linux/pci.h>
23#include <linux/errno.h>
24#include <linux/ioport.h>
25#include <linux/cache.h>
26#include <linux/slab.h>
27#include "pci.h"
28
29
Yu Zhao14add802008-11-22 02:38:52 +080030void pci_update_resource(struct pci_dev *dev, int resno)
Linus Torvalds1da177e2005-04-16 15:20:36 -070031{
32 struct pci_bus_region region;
Bjorn Helgaas9aac5372012-07-09 19:49:37 -060033 bool disable;
34 u16 cmd;
Linus Torvalds1da177e2005-04-16 15:20:36 -070035 u32 new, check, mask;
36 int reg;
Yu Zhao613e7ed2008-11-22 02:41:27 +080037 enum pci_bar_type type;
Yu Zhao14add802008-11-22 02:38:52 +080038 struct resource *res = dev->resource + resno;
Linus Torvalds1da177e2005-04-16 15:20:36 -070039
Ralf Baechlefb0f2b42006-12-19 13:12:08 -080040 /*
41 * Ignore resources for unimplemented BARs and unused resource slots
42 * for 64 bit BARs.
43 */
Ivan Kokshayskycf7bee52005-08-07 13:49:59 +040044 if (!res->flags)
45 return;
46
Ralf Baechlefb0f2b42006-12-19 13:12:08 -080047 /*
48 * Ignore non-moveable resources. This might be legacy resources for
49 * which no functional BAR register exists or another important
Bjorn Helgaas80ccba12008-06-13 10:52:11 -060050 * system resource we shouldn't move around.
Ralf Baechlefb0f2b42006-12-19 13:12:08 -080051 */
52 if (res->flags & IORESOURCE_PCI_FIXED)
53 return;
54
Linus Torvalds1da177e2005-04-16 15:20:36 -070055 pcibios_resource_to_bus(dev, &region, res);
56
Linus Torvalds1da177e2005-04-16 15:20:36 -070057 new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
58 if (res->flags & IORESOURCE_IO)
59 mask = (u32)PCI_BASE_ADDRESS_IO_MASK;
60 else
61 mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
62
Yu Zhao613e7ed2008-11-22 02:41:27 +080063 reg = pci_resource_bar(dev, resno, &type);
64 if (!reg)
65 return;
66 if (type != pci_bar_unknown) {
Linus Torvalds755528c2005-08-26 10:49:22 -070067 if (!(res->flags & IORESOURCE_ROM_ENABLE))
68 return;
69 new |= PCI_ROM_ADDRESS_ENABLE;
Linus Torvalds1da177e2005-04-16 15:20:36 -070070 }
71
Bjorn Helgaas9aac5372012-07-09 19:49:37 -060072 /*
73 * We can't update a 64-bit BAR atomically, so when possible,
74 * disable decoding so that a half-updated BAR won't conflict
75 * with another device.
76 */
77 disable = (res->flags & IORESOURCE_MEM_64) && !dev->mmio_always_on;
78 if (disable) {
79 pci_read_config_word(dev, PCI_COMMAND, &cmd);
80 pci_write_config_word(dev, PCI_COMMAND,
81 cmd & ~PCI_COMMAND_MEMORY);
82 }
83
Linus Torvalds1da177e2005-04-16 15:20:36 -070084 pci_write_config_dword(dev, reg, new);
85 pci_read_config_dword(dev, reg, &check);
86
87 if ((new ^ check) & mask) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -060088 dev_err(&dev->dev, "BAR %d: error updating (%#08x != %#08x)\n",
89 resno, new, check);
Linus Torvalds1da177e2005-04-16 15:20:36 -070090 }
91
Bjorn Helgaas28c68212011-06-14 13:04:35 -060092 if (res->flags & IORESOURCE_MEM_64) {
Ivan Kokshayskycf7bee52005-08-07 13:49:59 +040093 new = region.start >> 16 >> 16;
Linus Torvalds1da177e2005-04-16 15:20:36 -070094 pci_write_config_dword(dev, reg + 4, new);
95 pci_read_config_dword(dev, reg + 4, &check);
96 if (check != new) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -060097 dev_err(&dev->dev, "BAR %d: error updating "
98 "(high %#08x != %#08x)\n", resno, new, check);
Linus Torvalds1da177e2005-04-16 15:20:36 -070099 }
100 }
Bjorn Helgaas9aac5372012-07-09 19:49:37 -0600101
102 if (disable)
103 pci_write_config_word(dev, PCI_COMMAND, cmd);
104
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105 res->flags &= ~IORESOURCE_UNSET;
Vincent Palatin85b85822011-12-05 11:51:18 -0800106 dev_dbg(&dev->dev, "BAR %d: set to %pR (PCI address [%#llx-%#llx])\n",
107 resno, res, (unsigned long long)region.start,
108 (unsigned long long)region.end);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109}
110
Sam Ravnborg96bde062007-03-26 21:53:30 -0800111int pci_claim_resource(struct pci_dev *dev, int resource)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112{
113 struct resource *res = &dev->resource[resource];
Bjorn Helgaas966f3a72010-03-11 17:01:19 -0700114 struct resource *root, *conflict;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115
Matthew Wilcoxcebd78a2009-06-17 16:33:33 -0400116 root = pci_find_parent_resource(dev, res);
Bjorn Helgaas865df572009-11-04 10:32:57 -0700117 if (!root) {
Bjorn Helgaasf6d440d2010-06-03 13:47:18 -0600118 dev_info(&dev->dev, "no compatible bridge window for %pR\n",
119 res);
Bjorn Helgaas865df572009-11-04 10:32:57 -0700120 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121 }
122
Bjorn Helgaas966f3a72010-03-11 17:01:19 -0700123 conflict = request_resource_conflict(root, res);
124 if (conflict) {
Bjorn Helgaasf6d440d2010-06-03 13:47:18 -0600125 dev_info(&dev->dev,
126 "address space collision: %pR conflicts with %s %pR\n",
127 res, conflict->name, conflict);
Bjorn Helgaas966f3a72010-03-11 17:01:19 -0700128 return -EBUSY;
129 }
Bjorn Helgaas865df572009-11-04 10:32:57 -0700130
Bjorn Helgaas966f3a72010-03-11 17:01:19 -0700131 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132}
Jesse Barneseaa959d2009-06-30 21:45:44 -0700133EXPORT_SYMBOL(pci_claim_resource);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134
Yuji Shimada32a9a6822009-03-16 17:13:39 +0900135void pci_disable_bridge_window(struct pci_dev *dev)
136{
Bjorn Helgaas865df572009-11-04 10:32:57 -0700137 dev_info(&dev->dev, "disabling bridge mem windows\n");
Yuji Shimada32a9a6822009-03-16 17:13:39 +0900138
139 /* MMIO Base/Limit */
140 pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0);
141
142 /* Prefetchable MMIO Base/Limit */
143 pci_write_config_dword(dev, PCI_PREF_LIMIT_UPPER32, 0);
144 pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0x0000fff0);
145 pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0xffffffff);
146}
Ram Pai2bbc6942011-07-25 13:08:39 -0700147
Myron Stowe6535943f2011-11-21 11:54:19 -0700148/*
149 * Generic function that returns a value indicating that the device's
150 * original BIOS BAR address was not saved and so is not available for
151 * reinstatement.
152 *
153 * Can be over-ridden by architecture specific code that implements
154 * reinstatement functionality rather than leaving it disabled when
155 * normal allocation attempts fail.
156 */
157resource_size_t __weak pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx)
158{
159 return 0;
160}
161
Ram Pai2bbc6942011-07-25 13:08:39 -0700162static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev,
163 int resno, resource_size_t size)
164{
165 struct resource *root, *conflict;
Myron Stowe6535943f2011-11-21 11:54:19 -0700166 resource_size_t fw_addr, start, end;
Ram Pai2bbc6942011-07-25 13:08:39 -0700167 int ret = 0;
168
Myron Stowe6535943f2011-11-21 11:54:19 -0700169 fw_addr = pcibios_retrieve_fw_addr(dev, resno);
170 if (!fw_addr)
171 return 1;
172
Ram Pai2bbc6942011-07-25 13:08:39 -0700173 start = res->start;
174 end = res->end;
Myron Stowe6535943f2011-11-21 11:54:19 -0700175 res->start = fw_addr;
Ram Pai2bbc6942011-07-25 13:08:39 -0700176 res->end = res->start + size - 1;
Myron Stowe351fc6d2011-11-21 11:54:07 -0700177
178 root = pci_find_parent_resource(dev, res);
179 if (!root) {
180 if (res->flags & IORESOURCE_IO)
181 root = &ioport_resource;
182 else
183 root = &iomem_resource;
184 }
185
Ram Pai2bbc6942011-07-25 13:08:39 -0700186 dev_info(&dev->dev, "BAR %d: trying firmware assignment %pR\n",
187 resno, res);
188 conflict = request_resource_conflict(root, res);
189 if (conflict) {
190 dev_info(&dev->dev,
191 "BAR %d: %pR conflicts with %s %pR\n", resno,
192 res, conflict->name, conflict);
193 res->start = start;
194 res->end = end;
195 ret = 1;
196 }
197 return ret;
198}
199
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600200static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
201 int resno, resource_size_t size, resource_size_t align)
202{
203 struct resource *res = dev->resource + resno;
204 resource_size_t min;
205 int ret;
206
207 min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM;
208
209 /* First, try exact prefetching match.. */
210 ret = pci_bus_alloc_resource(bus, res, size, align, min,
211 IORESOURCE_PREFETCH,
212 pcibios_align_resource, dev);
213
214 if (ret < 0 && (res->flags & IORESOURCE_PREFETCH)) {
215 /*
216 * That failed.
217 *
218 * But a prefetching area can handle a non-prefetching
219 * window (it will just not perform as well).
220 */
221 ret = pci_bus_alloc_resource(bus, res, size, align, min, 0,
222 pcibios_align_resource, dev);
223 }
224 return ret;
225}
226
Nikhil P Raod6776e62012-06-20 12:56:00 -0700227static int _pci_assign_resource(struct pci_dev *dev, int resno,
228 resource_size_t size, resource_size_t min_align)
Yinghai Lud09ee962009-04-23 20:49:25 -0700229{
230 struct resource *res = dev->resource + resno;
Yinghai Lud09ee962009-04-23 20:49:25 -0700231 struct pci_bus *bus;
232 int ret;
Bjorn Helgaas865df572009-11-04 10:32:57 -0700233 char *type;
Yinghai Lud09ee962009-04-23 20:49:25 -0700234
Yinghai Lud09ee962009-04-23 20:49:25 -0700235 bus = dev->bus;
Ram Pai2bbc6942011-07-25 13:08:39 -0700236 while ((ret = __pci_assign_resource(bus, dev, resno, size, min_align))) {
237 if (!bus->parent || !bus->self->transparent)
238 break;
239 bus = bus->parent;
Yinghai Lud09ee962009-04-23 20:49:25 -0700240 }
241
Bjorn Helgaas865df572009-11-04 10:32:57 -0700242 if (ret) {
243 if (res->flags & IORESOURCE_MEM)
244 if (res->flags & IORESOURCE_PREFETCH)
245 type = "mem pref";
246 else
247 type = "mem";
248 else if (res->flags & IORESOURCE_IO)
249 type = "io";
250 else
251 type = "unknown";
252 dev_info(&dev->dev,
253 "BAR %d: can't assign %s (size %#llx)\n",
254 resno, type, (unsigned long long) resource_size(res));
255 }
Yinghai Lud09ee962009-04-23 20:49:25 -0700256
257 return ret;
258}
259
Ram Pai2bbc6942011-07-25 13:08:39 -0700260int pci_assign_resource(struct pci_dev *dev, int resno)
261{
262 struct resource *res = dev->resource + resno;
263 resource_size_t align, size;
Ram Pai2bbc6942011-07-25 13:08:39 -0700264 int ret;
265
266 align = pci_resource_alignment(dev, res);
267 if (!align) {
268 dev_info(&dev->dev, "BAR %d: can't assign %pR "
269 "(bogus alignment)\n", resno, res);
270 return -EINVAL;
271 }
272
Ram Pai2bbc6942011-07-25 13:08:39 -0700273 size = resource_size(res);
274 ret = _pci_assign_resource(dev, resno, size, align);
275
276 /*
277 * If we failed to assign anything, let's try the address
278 * where firmware left it. That at least has a chance of
279 * working, which is better than just leaving it disabled.
280 */
Myron Stowe6535943f2011-11-21 11:54:19 -0700281 if (ret < 0)
Ram Pai2bbc6942011-07-25 13:08:39 -0700282 ret = pci_revert_fw_address(res, dev, resno, size);
283
284 if (!ret) {
285 res->flags &= ~IORESOURCE_STARTALIGN;
286 dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
287 if (resno < PCI_BRIDGE_RESOURCES)
288 pci_update_resource(dev, resno);
289 }
290 return ret;
291}
292
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600293int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsize,
294 resource_size_t min_align)
295{
296 struct resource *res = dev->resource + resno;
297 resource_size_t new_size;
298 int ret;
299
300 if (!res->parent) {
301 dev_info(&dev->dev, "BAR %d: can't reassign an unassigned resource %pR "
302 "\n", resno, res);
303 return -EINVAL;
304 }
305
306 /* already aligned with min_align */
307 new_size = resource_size(res) + addsize;
308 ret = _pci_assign_resource(dev, resno, new_size, min_align);
309 if (!ret) {
310 res->flags &= ~IORESOURCE_STARTALIGN;
311 dev_info(&dev->dev, "BAR %d: reassigned %pR\n", resno, res);
312 if (resno < PCI_BRIDGE_RESOURCES)
313 pci_update_resource(dev, resno);
314 }
315 return ret;
316}
317
Bjorn Helgaas842de402008-03-04 11:56:47 -0700318int pci_enable_resources(struct pci_dev *dev, int mask)
319{
320 u16 cmd, old_cmd;
321 int i;
322 struct resource *r;
323
324 pci_read_config_word(dev, PCI_COMMAND, &cmd);
325 old_cmd = cmd;
326
327 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
328 if (!(mask & (1 << i)))
329 continue;
330
331 r = &dev->resource[i];
332
333 if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
334 continue;
335 if ((i == PCI_ROM_RESOURCE) &&
336 (!(r->flags & IORESOURCE_ROM_ENABLE)))
337 continue;
338
339 if (!r->parent) {
Bjorn Helgaas865df572009-11-04 10:32:57 -0700340 dev_err(&dev->dev, "device not available "
341 "(can't reserve %pR)\n", r);
Bjorn Helgaas842de402008-03-04 11:56:47 -0700342 return -EINVAL;
343 }
344
345 if (r->flags & IORESOURCE_IO)
346 cmd |= PCI_COMMAND_IO;
347 if (r->flags & IORESOURCE_MEM)
348 cmd |= PCI_COMMAND_MEMORY;
349 }
350
351 if (cmd != old_cmd) {
352 dev_info(&dev->dev, "enabling device (%04x -> %04x)\n",
353 old_cmd, cmd);
354 pci_write_config_word(dev, PCI_COMMAND, cmd);
355 }
356 return 0;
357}