Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1 | /* |
Paul Gortmaker | 3396c78 | 2012-01-27 13:36:01 +0000 | [diff] [blame] | 2 | * linux/drivers/net/ethernet/ethoc.c |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2007-2008 Avionic Design Development GmbH |
| 5 | * Copyright (C) 2008-2009 Avionic Design GmbH |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * Written by Thierry Reding <thierry.reding@avionic-design.de> |
| 12 | */ |
| 13 | |
Alexey Dobriyan | b7f080c | 2011-06-16 11:01:34 +0000 | [diff] [blame] | 14 | #include <linux/dma-mapping.h> |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 15 | #include <linux/etherdevice.h> |
| 16 | #include <linux/crc32.h> |
Alexey Dobriyan | a6b7a40 | 2011-06-06 10:43:46 +0000 | [diff] [blame] | 17 | #include <linux/interrupt.h> |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 18 | #include <linux/io.h> |
| 19 | #include <linux/mii.h> |
| 20 | #include <linux/phy.h> |
| 21 | #include <linux/platform_device.h> |
Alexey Dobriyan | d43c36d | 2009-10-07 17:09:06 +0400 | [diff] [blame] | 22 | #include <linux/sched.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 23 | #include <linux/slab.h> |
Jonas Bonn | e0f4258 | 2010-11-25 02:30:25 +0000 | [diff] [blame] | 24 | #include <linux/of.h> |
Paul Gortmaker | 9d9779e | 2011-07-03 15:21:01 -0400 | [diff] [blame] | 25 | #include <linux/module.h> |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 26 | #include <net/ethoc.h> |
| 27 | |
Thomas Chou | 0baa080 | 2009-10-04 23:33:20 +0000 | [diff] [blame] | 28 | static int buffer_size = 0x8000; /* 32 KBytes */ |
| 29 | module_param(buffer_size, int, 0); |
| 30 | MODULE_PARM_DESC(buffer_size, "DMA buffer allocation size"); |
| 31 | |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 32 | /* register offsets */ |
| 33 | #define MODER 0x00 |
| 34 | #define INT_SOURCE 0x04 |
| 35 | #define INT_MASK 0x08 |
| 36 | #define IPGT 0x0c |
| 37 | #define IPGR1 0x10 |
| 38 | #define IPGR2 0x14 |
| 39 | #define PACKETLEN 0x18 |
| 40 | #define COLLCONF 0x1c |
| 41 | #define TX_BD_NUM 0x20 |
| 42 | #define CTRLMODER 0x24 |
| 43 | #define MIIMODER 0x28 |
| 44 | #define MIICOMMAND 0x2c |
| 45 | #define MIIADDRESS 0x30 |
| 46 | #define MIITX_DATA 0x34 |
| 47 | #define MIIRX_DATA 0x38 |
| 48 | #define MIISTATUS 0x3c |
| 49 | #define MAC_ADDR0 0x40 |
| 50 | #define MAC_ADDR1 0x44 |
| 51 | #define ETH_HASH0 0x48 |
| 52 | #define ETH_HASH1 0x4c |
| 53 | #define ETH_TXCTRL 0x50 |
| 54 | |
| 55 | /* mode register */ |
| 56 | #define MODER_RXEN (1 << 0) /* receive enable */ |
| 57 | #define MODER_TXEN (1 << 1) /* transmit enable */ |
| 58 | #define MODER_NOPRE (1 << 2) /* no preamble */ |
| 59 | #define MODER_BRO (1 << 3) /* broadcast address */ |
| 60 | #define MODER_IAM (1 << 4) /* individual address mode */ |
| 61 | #define MODER_PRO (1 << 5) /* promiscuous mode */ |
| 62 | #define MODER_IFG (1 << 6) /* interframe gap for incoming frames */ |
| 63 | #define MODER_LOOP (1 << 7) /* loopback */ |
| 64 | #define MODER_NBO (1 << 8) /* no back-off */ |
| 65 | #define MODER_EDE (1 << 9) /* excess defer enable */ |
| 66 | #define MODER_FULLD (1 << 10) /* full duplex */ |
| 67 | #define MODER_RESET (1 << 11) /* FIXME: reset (undocumented) */ |
| 68 | #define MODER_DCRC (1 << 12) /* delayed CRC enable */ |
| 69 | #define MODER_CRC (1 << 13) /* CRC enable */ |
| 70 | #define MODER_HUGE (1 << 14) /* huge packets enable */ |
| 71 | #define MODER_PAD (1 << 15) /* padding enabled */ |
| 72 | #define MODER_RSM (1 << 16) /* receive small packets */ |
| 73 | |
| 74 | /* interrupt source and mask registers */ |
| 75 | #define INT_MASK_TXF (1 << 0) /* transmit frame */ |
| 76 | #define INT_MASK_TXE (1 << 1) /* transmit error */ |
| 77 | #define INT_MASK_RXF (1 << 2) /* receive frame */ |
| 78 | #define INT_MASK_RXE (1 << 3) /* receive error */ |
| 79 | #define INT_MASK_BUSY (1 << 4) |
| 80 | #define INT_MASK_TXC (1 << 5) /* transmit control frame */ |
| 81 | #define INT_MASK_RXC (1 << 6) /* receive control frame */ |
| 82 | |
| 83 | #define INT_MASK_TX (INT_MASK_TXF | INT_MASK_TXE) |
| 84 | #define INT_MASK_RX (INT_MASK_RXF | INT_MASK_RXE) |
| 85 | |
| 86 | #define INT_MASK_ALL ( \ |
| 87 | INT_MASK_TXF | INT_MASK_TXE | \ |
| 88 | INT_MASK_RXF | INT_MASK_RXE | \ |
| 89 | INT_MASK_TXC | INT_MASK_RXC | \ |
| 90 | INT_MASK_BUSY \ |
| 91 | ) |
| 92 | |
| 93 | /* packet length register */ |
| 94 | #define PACKETLEN_MIN(min) (((min) & 0xffff) << 16) |
| 95 | #define PACKETLEN_MAX(max) (((max) & 0xffff) << 0) |
| 96 | #define PACKETLEN_MIN_MAX(min, max) (PACKETLEN_MIN(min) | \ |
| 97 | PACKETLEN_MAX(max)) |
| 98 | |
| 99 | /* transmit buffer number register */ |
| 100 | #define TX_BD_NUM_VAL(x) (((x) <= 0x80) ? (x) : 0x80) |
| 101 | |
| 102 | /* control module mode register */ |
| 103 | #define CTRLMODER_PASSALL (1 << 0) /* pass all receive frames */ |
| 104 | #define CTRLMODER_RXFLOW (1 << 1) /* receive control flow */ |
| 105 | #define CTRLMODER_TXFLOW (1 << 2) /* transmit control flow */ |
| 106 | |
| 107 | /* MII mode register */ |
| 108 | #define MIIMODER_CLKDIV(x) ((x) & 0xfe) /* needs to be an even number */ |
| 109 | #define MIIMODER_NOPRE (1 << 8) /* no preamble */ |
| 110 | |
| 111 | /* MII command register */ |
| 112 | #define MIICOMMAND_SCAN (1 << 0) /* scan status */ |
| 113 | #define MIICOMMAND_READ (1 << 1) /* read status */ |
| 114 | #define MIICOMMAND_WRITE (1 << 2) /* write control data */ |
| 115 | |
| 116 | /* MII address register */ |
| 117 | #define MIIADDRESS_FIAD(x) (((x) & 0x1f) << 0) |
| 118 | #define MIIADDRESS_RGAD(x) (((x) & 0x1f) << 8) |
| 119 | #define MIIADDRESS_ADDR(phy, reg) (MIIADDRESS_FIAD(phy) | \ |
| 120 | MIIADDRESS_RGAD(reg)) |
| 121 | |
| 122 | /* MII transmit data register */ |
| 123 | #define MIITX_DATA_VAL(x) ((x) & 0xffff) |
| 124 | |
| 125 | /* MII receive data register */ |
| 126 | #define MIIRX_DATA_VAL(x) ((x) & 0xffff) |
| 127 | |
| 128 | /* MII status register */ |
| 129 | #define MIISTATUS_LINKFAIL (1 << 0) |
| 130 | #define MIISTATUS_BUSY (1 << 1) |
| 131 | #define MIISTATUS_INVALID (1 << 2) |
| 132 | |
| 133 | /* TX buffer descriptor */ |
| 134 | #define TX_BD_CS (1 << 0) /* carrier sense lost */ |
| 135 | #define TX_BD_DF (1 << 1) /* defer indication */ |
| 136 | #define TX_BD_LC (1 << 2) /* late collision */ |
| 137 | #define TX_BD_RL (1 << 3) /* retransmission limit */ |
| 138 | #define TX_BD_RETRY_MASK (0x00f0) |
| 139 | #define TX_BD_RETRY(x) (((x) & 0x00f0) >> 4) |
| 140 | #define TX_BD_UR (1 << 8) /* transmitter underrun */ |
| 141 | #define TX_BD_CRC (1 << 11) /* TX CRC enable */ |
| 142 | #define TX_BD_PAD (1 << 12) /* pad enable for short packets */ |
| 143 | #define TX_BD_WRAP (1 << 13) |
| 144 | #define TX_BD_IRQ (1 << 14) /* interrupt request enable */ |
| 145 | #define TX_BD_READY (1 << 15) /* TX buffer ready */ |
| 146 | #define TX_BD_LEN(x) (((x) & 0xffff) << 16) |
| 147 | #define TX_BD_LEN_MASK (0xffff << 16) |
| 148 | |
| 149 | #define TX_BD_STATS (TX_BD_CS | TX_BD_DF | TX_BD_LC | \ |
| 150 | TX_BD_RL | TX_BD_RETRY_MASK | TX_BD_UR) |
| 151 | |
| 152 | /* RX buffer descriptor */ |
| 153 | #define RX_BD_LC (1 << 0) /* late collision */ |
| 154 | #define RX_BD_CRC (1 << 1) /* RX CRC error */ |
| 155 | #define RX_BD_SF (1 << 2) /* short frame */ |
| 156 | #define RX_BD_TL (1 << 3) /* too long */ |
| 157 | #define RX_BD_DN (1 << 4) /* dribble nibble */ |
| 158 | #define RX_BD_IS (1 << 5) /* invalid symbol */ |
| 159 | #define RX_BD_OR (1 << 6) /* receiver overrun */ |
| 160 | #define RX_BD_MISS (1 << 7) |
| 161 | #define RX_BD_CF (1 << 8) /* control frame */ |
| 162 | #define RX_BD_WRAP (1 << 13) |
| 163 | #define RX_BD_IRQ (1 << 14) /* interrupt request enable */ |
| 164 | #define RX_BD_EMPTY (1 << 15) |
| 165 | #define RX_BD_LEN(x) (((x) & 0xffff) << 16) |
| 166 | |
| 167 | #define RX_BD_STATS (RX_BD_LC | RX_BD_CRC | RX_BD_SF | RX_BD_TL | \ |
| 168 | RX_BD_DN | RX_BD_IS | RX_BD_OR | RX_BD_MISS) |
| 169 | |
| 170 | #define ETHOC_BUFSIZ 1536 |
| 171 | #define ETHOC_ZLEN 64 |
| 172 | #define ETHOC_BD_BASE 0x400 |
| 173 | #define ETHOC_TIMEOUT (HZ / 2) |
| 174 | #define ETHOC_MII_TIMEOUT (1 + (HZ / 5)) |
| 175 | |
| 176 | /** |
| 177 | * struct ethoc - driver-private device structure |
| 178 | * @iobase: pointer to I/O memory region |
| 179 | * @membase: pointer to buffer memory region |
Thomas Chou | 0baa080 | 2009-10-04 23:33:20 +0000 | [diff] [blame] | 180 | * @dma_alloc: dma allocated buffer size |
Thomas Chou | ee02a4e | 2010-05-23 16:44:02 +0000 | [diff] [blame] | 181 | * @io_region_size: I/O memory region size |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 182 | * @num_tx: number of send buffers |
| 183 | * @cur_tx: last send buffer written |
| 184 | * @dty_tx: last buffer actually sent |
| 185 | * @num_rx: number of receive buffers |
| 186 | * @cur_rx: current receive buffer |
Jonas Bonn | f8555ad0 | 2010-06-11 02:47:35 +0000 | [diff] [blame] | 187 | * @vma: pointer to array of virtual memory addresses for buffers |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 188 | * @netdev: pointer to network device structure |
| 189 | * @napi: NAPI structure |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 190 | * @msg_enable: device state flags |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 191 | * @lock: device lock |
| 192 | * @phy: attached PHY |
| 193 | * @mdio: MDIO bus for PHY access |
| 194 | * @phy_id: address of attached PHY |
| 195 | */ |
| 196 | struct ethoc { |
| 197 | void __iomem *iobase; |
| 198 | void __iomem *membase; |
Thomas Chou | 0baa080 | 2009-10-04 23:33:20 +0000 | [diff] [blame] | 199 | int dma_alloc; |
Thomas Chou | ee02a4e | 2010-05-23 16:44:02 +0000 | [diff] [blame] | 200 | resource_size_t io_region_size; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 201 | |
| 202 | unsigned int num_tx; |
| 203 | unsigned int cur_tx; |
| 204 | unsigned int dty_tx; |
| 205 | |
| 206 | unsigned int num_rx; |
| 207 | unsigned int cur_rx; |
| 208 | |
Jonas Bonn | f8555ad0 | 2010-06-11 02:47:35 +0000 | [diff] [blame] | 209 | void** vma; |
| 210 | |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 211 | struct net_device *netdev; |
| 212 | struct napi_struct napi; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 213 | u32 msg_enable; |
| 214 | |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 215 | spinlock_t lock; |
| 216 | |
| 217 | struct phy_device *phy; |
| 218 | struct mii_bus *mdio; |
| 219 | s8 phy_id; |
| 220 | }; |
| 221 | |
| 222 | /** |
| 223 | * struct ethoc_bd - buffer descriptor |
| 224 | * @stat: buffer statistics |
| 225 | * @addr: physical memory address |
| 226 | */ |
| 227 | struct ethoc_bd { |
| 228 | u32 stat; |
| 229 | u32 addr; |
| 230 | }; |
| 231 | |
Thomas Chou | 16dd18b | 2009-10-07 14:16:42 +0000 | [diff] [blame] | 232 | static inline u32 ethoc_read(struct ethoc *dev, loff_t offset) |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 233 | { |
| 234 | return ioread32(dev->iobase + offset); |
| 235 | } |
| 236 | |
Thomas Chou | 16dd18b | 2009-10-07 14:16:42 +0000 | [diff] [blame] | 237 | static inline void ethoc_write(struct ethoc *dev, loff_t offset, u32 data) |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 238 | { |
| 239 | iowrite32(data, dev->iobase + offset); |
| 240 | } |
| 241 | |
Thomas Chou | 16dd18b | 2009-10-07 14:16:42 +0000 | [diff] [blame] | 242 | static inline void ethoc_read_bd(struct ethoc *dev, int index, |
| 243 | struct ethoc_bd *bd) |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 244 | { |
| 245 | loff_t offset = ETHOC_BD_BASE + (index * sizeof(struct ethoc_bd)); |
| 246 | bd->stat = ethoc_read(dev, offset + 0); |
| 247 | bd->addr = ethoc_read(dev, offset + 4); |
| 248 | } |
| 249 | |
Thomas Chou | 16dd18b | 2009-10-07 14:16:42 +0000 | [diff] [blame] | 250 | static inline void ethoc_write_bd(struct ethoc *dev, int index, |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 251 | const struct ethoc_bd *bd) |
| 252 | { |
| 253 | loff_t offset = ETHOC_BD_BASE + (index * sizeof(struct ethoc_bd)); |
| 254 | ethoc_write(dev, offset + 0, bd->stat); |
| 255 | ethoc_write(dev, offset + 4, bd->addr); |
| 256 | } |
| 257 | |
Thomas Chou | 16dd18b | 2009-10-07 14:16:42 +0000 | [diff] [blame] | 258 | static inline void ethoc_enable_irq(struct ethoc *dev, u32 mask) |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 259 | { |
| 260 | u32 imask = ethoc_read(dev, INT_MASK); |
| 261 | imask |= mask; |
| 262 | ethoc_write(dev, INT_MASK, imask); |
| 263 | } |
| 264 | |
Thomas Chou | 16dd18b | 2009-10-07 14:16:42 +0000 | [diff] [blame] | 265 | static inline void ethoc_disable_irq(struct ethoc *dev, u32 mask) |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 266 | { |
| 267 | u32 imask = ethoc_read(dev, INT_MASK); |
| 268 | imask &= ~mask; |
| 269 | ethoc_write(dev, INT_MASK, imask); |
| 270 | } |
| 271 | |
Thomas Chou | 16dd18b | 2009-10-07 14:16:42 +0000 | [diff] [blame] | 272 | static inline void ethoc_ack_irq(struct ethoc *dev, u32 mask) |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 273 | { |
| 274 | ethoc_write(dev, INT_SOURCE, mask); |
| 275 | } |
| 276 | |
Thomas Chou | 16dd18b | 2009-10-07 14:16:42 +0000 | [diff] [blame] | 277 | static inline void ethoc_enable_rx_and_tx(struct ethoc *dev) |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 278 | { |
| 279 | u32 mode = ethoc_read(dev, MODER); |
| 280 | mode |= MODER_RXEN | MODER_TXEN; |
| 281 | ethoc_write(dev, MODER, mode); |
| 282 | } |
| 283 | |
Thomas Chou | 16dd18b | 2009-10-07 14:16:42 +0000 | [diff] [blame] | 284 | static inline void ethoc_disable_rx_and_tx(struct ethoc *dev) |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 285 | { |
| 286 | u32 mode = ethoc_read(dev, MODER); |
| 287 | mode &= ~(MODER_RXEN | MODER_TXEN); |
| 288 | ethoc_write(dev, MODER, mode); |
| 289 | } |
| 290 | |
David S. Miller | 5cf3e03 | 2010-07-07 18:23:19 -0700 | [diff] [blame] | 291 | static int ethoc_init_ring(struct ethoc *dev, unsigned long mem_start) |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 292 | { |
| 293 | struct ethoc_bd bd; |
| 294 | int i; |
Jonas Bonn | f8555ad0 | 2010-06-11 02:47:35 +0000 | [diff] [blame] | 295 | void* vma; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 296 | |
| 297 | dev->cur_tx = 0; |
| 298 | dev->dty_tx = 0; |
| 299 | dev->cur_rx = 0; |
| 300 | |
Jonas Bonn | ee4f56b | 2010-06-11 02:47:36 +0000 | [diff] [blame] | 301 | ethoc_write(dev, TX_BD_NUM, dev->num_tx); |
| 302 | |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 303 | /* setup transmission buffers */ |
Jonas Bonn | f8555ad0 | 2010-06-11 02:47:35 +0000 | [diff] [blame] | 304 | bd.addr = mem_start; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 305 | bd.stat = TX_BD_IRQ | TX_BD_CRC; |
Jonas Bonn | f8555ad0 | 2010-06-11 02:47:35 +0000 | [diff] [blame] | 306 | vma = dev->membase; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 307 | |
| 308 | for (i = 0; i < dev->num_tx; i++) { |
| 309 | if (i == dev->num_tx - 1) |
| 310 | bd.stat |= TX_BD_WRAP; |
| 311 | |
| 312 | ethoc_write_bd(dev, i, &bd); |
| 313 | bd.addr += ETHOC_BUFSIZ; |
Jonas Bonn | f8555ad0 | 2010-06-11 02:47:35 +0000 | [diff] [blame] | 314 | |
| 315 | dev->vma[i] = vma; |
| 316 | vma += ETHOC_BUFSIZ; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 317 | } |
| 318 | |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 319 | bd.stat = RX_BD_EMPTY | RX_BD_IRQ; |
| 320 | |
| 321 | for (i = 0; i < dev->num_rx; i++) { |
| 322 | if (i == dev->num_rx - 1) |
| 323 | bd.stat |= RX_BD_WRAP; |
| 324 | |
| 325 | ethoc_write_bd(dev, dev->num_tx + i, &bd); |
| 326 | bd.addr += ETHOC_BUFSIZ; |
Jonas Bonn | f8555ad0 | 2010-06-11 02:47:35 +0000 | [diff] [blame] | 327 | |
| 328 | dev->vma[dev->num_tx + i] = vma; |
| 329 | vma += ETHOC_BUFSIZ; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 330 | } |
| 331 | |
| 332 | return 0; |
| 333 | } |
| 334 | |
| 335 | static int ethoc_reset(struct ethoc *dev) |
| 336 | { |
| 337 | u32 mode; |
| 338 | |
| 339 | /* TODO: reset controller? */ |
| 340 | |
| 341 | ethoc_disable_rx_and_tx(dev); |
| 342 | |
| 343 | /* TODO: setup registers */ |
| 344 | |
| 345 | /* enable FCS generation and automatic padding */ |
| 346 | mode = ethoc_read(dev, MODER); |
| 347 | mode |= MODER_CRC | MODER_PAD; |
| 348 | ethoc_write(dev, MODER, mode); |
| 349 | |
| 350 | /* set full-duplex mode */ |
| 351 | mode = ethoc_read(dev, MODER); |
| 352 | mode |= MODER_FULLD; |
| 353 | ethoc_write(dev, MODER, mode); |
| 354 | ethoc_write(dev, IPGT, 0x15); |
| 355 | |
| 356 | ethoc_ack_irq(dev, INT_MASK_ALL); |
| 357 | ethoc_enable_irq(dev, INT_MASK_ALL); |
| 358 | ethoc_enable_rx_and_tx(dev); |
| 359 | return 0; |
| 360 | } |
| 361 | |
| 362 | static unsigned int ethoc_update_rx_stats(struct ethoc *dev, |
| 363 | struct ethoc_bd *bd) |
| 364 | { |
| 365 | struct net_device *netdev = dev->netdev; |
| 366 | unsigned int ret = 0; |
| 367 | |
| 368 | if (bd->stat & RX_BD_TL) { |
| 369 | dev_err(&netdev->dev, "RX: frame too long\n"); |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 370 | netdev->stats.rx_length_errors++; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 371 | ret++; |
| 372 | } |
| 373 | |
| 374 | if (bd->stat & RX_BD_SF) { |
| 375 | dev_err(&netdev->dev, "RX: frame too short\n"); |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 376 | netdev->stats.rx_length_errors++; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 377 | ret++; |
| 378 | } |
| 379 | |
| 380 | if (bd->stat & RX_BD_DN) { |
| 381 | dev_err(&netdev->dev, "RX: dribble nibble\n"); |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 382 | netdev->stats.rx_frame_errors++; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 383 | } |
| 384 | |
| 385 | if (bd->stat & RX_BD_CRC) { |
| 386 | dev_err(&netdev->dev, "RX: wrong CRC\n"); |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 387 | netdev->stats.rx_crc_errors++; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 388 | ret++; |
| 389 | } |
| 390 | |
| 391 | if (bd->stat & RX_BD_OR) { |
| 392 | dev_err(&netdev->dev, "RX: overrun\n"); |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 393 | netdev->stats.rx_over_errors++; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 394 | ret++; |
| 395 | } |
| 396 | |
| 397 | if (bd->stat & RX_BD_MISS) |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 398 | netdev->stats.rx_missed_errors++; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 399 | |
| 400 | if (bd->stat & RX_BD_LC) { |
| 401 | dev_err(&netdev->dev, "RX: late collision\n"); |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 402 | netdev->stats.collisions++; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 403 | ret++; |
| 404 | } |
| 405 | |
| 406 | return ret; |
| 407 | } |
| 408 | |
| 409 | static int ethoc_rx(struct net_device *dev, int limit) |
| 410 | { |
| 411 | struct ethoc *priv = netdev_priv(dev); |
| 412 | int count; |
| 413 | |
| 414 | for (count = 0; count < limit; ++count) { |
| 415 | unsigned int entry; |
| 416 | struct ethoc_bd bd; |
| 417 | |
Jonas Bonn | 6a63262 | 2010-11-25 02:30:32 +0000 | [diff] [blame] | 418 | entry = priv->num_tx + priv->cur_rx; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 419 | ethoc_read_bd(priv, entry, &bd); |
Jonas Bonn | 20f70dd | 2010-11-25 02:30:28 +0000 | [diff] [blame] | 420 | if (bd.stat & RX_BD_EMPTY) { |
| 421 | ethoc_ack_irq(priv, INT_MASK_RX); |
| 422 | /* If packet (interrupt) came in between checking |
| 423 | * BD_EMTPY and clearing the interrupt source, then we |
| 424 | * risk missing the packet as the RX interrupt won't |
| 425 | * trigger right away when we reenable it; hence, check |
| 426 | * BD_EMTPY here again to make sure there isn't such a |
| 427 | * packet waiting for us... |
| 428 | */ |
| 429 | ethoc_read_bd(priv, entry, &bd); |
| 430 | if (bd.stat & RX_BD_EMPTY) |
| 431 | break; |
| 432 | } |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 433 | |
| 434 | if (ethoc_update_rx_stats(priv, &bd) == 0) { |
| 435 | int size = bd.stat >> 16; |
Eric Dumazet | 89d71a6 | 2009-10-13 05:34:20 +0000 | [diff] [blame] | 436 | struct sk_buff *skb; |
Thomas Chou | 050f91d | 2009-10-04 23:33:19 +0000 | [diff] [blame] | 437 | |
| 438 | size -= 4; /* strip the CRC */ |
Eric Dumazet | 89d71a6 | 2009-10-13 05:34:20 +0000 | [diff] [blame] | 439 | skb = netdev_alloc_skb_ip_align(dev, size); |
Thomas Chou | 050f91d | 2009-10-04 23:33:19 +0000 | [diff] [blame] | 440 | |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 441 | if (likely(skb)) { |
Jonas Bonn | f8555ad0 | 2010-06-11 02:47:35 +0000 | [diff] [blame] | 442 | void *src = priv->vma[entry]; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 443 | memcpy_fromio(skb_put(skb, size), src, size); |
| 444 | skb->protocol = eth_type_trans(skb, dev); |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 445 | dev->stats.rx_packets++; |
| 446 | dev->stats.rx_bytes += size; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 447 | netif_receive_skb(skb); |
| 448 | } else { |
| 449 | if (net_ratelimit()) |
| 450 | dev_warn(&dev->dev, "low on memory - " |
| 451 | "packet dropped\n"); |
| 452 | |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 453 | dev->stats.rx_dropped++; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 454 | break; |
| 455 | } |
| 456 | } |
| 457 | |
| 458 | /* clear the buffer descriptor so it can be reused */ |
| 459 | bd.stat &= ~RX_BD_STATS; |
| 460 | bd.stat |= RX_BD_EMPTY; |
| 461 | ethoc_write_bd(priv, entry, &bd); |
Jonas Bonn | 6a63262 | 2010-11-25 02:30:32 +0000 | [diff] [blame] | 462 | if (++priv->cur_rx == priv->num_rx) |
| 463 | priv->cur_rx = 0; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 464 | } |
| 465 | |
| 466 | return count; |
| 467 | } |
| 468 | |
Jonas Bonn | 4f64bcb | 2010-11-25 02:30:31 +0000 | [diff] [blame] | 469 | static void ethoc_update_tx_stats(struct ethoc *dev, struct ethoc_bd *bd) |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 470 | { |
| 471 | struct net_device *netdev = dev->netdev; |
| 472 | |
| 473 | if (bd->stat & TX_BD_LC) { |
| 474 | dev_err(&netdev->dev, "TX: late collision\n"); |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 475 | netdev->stats.tx_window_errors++; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 476 | } |
| 477 | |
| 478 | if (bd->stat & TX_BD_RL) { |
| 479 | dev_err(&netdev->dev, "TX: retransmit limit\n"); |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 480 | netdev->stats.tx_aborted_errors++; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 481 | } |
| 482 | |
| 483 | if (bd->stat & TX_BD_UR) { |
| 484 | dev_err(&netdev->dev, "TX: underrun\n"); |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 485 | netdev->stats.tx_fifo_errors++; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 486 | } |
| 487 | |
| 488 | if (bd->stat & TX_BD_CS) { |
| 489 | dev_err(&netdev->dev, "TX: carrier sense lost\n"); |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 490 | netdev->stats.tx_carrier_errors++; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 491 | } |
| 492 | |
| 493 | if (bd->stat & TX_BD_STATS) |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 494 | netdev->stats.tx_errors++; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 495 | |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 496 | netdev->stats.collisions += (bd->stat >> 4) & 0xf; |
| 497 | netdev->stats.tx_bytes += bd->stat >> 16; |
| 498 | netdev->stats.tx_packets++; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 499 | } |
| 500 | |
Jonas Bonn | fa98eb0 | 2010-11-25 02:30:29 +0000 | [diff] [blame] | 501 | static int ethoc_tx(struct net_device *dev, int limit) |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 502 | { |
| 503 | struct ethoc *priv = netdev_priv(dev); |
Jonas Bonn | fa98eb0 | 2010-11-25 02:30:29 +0000 | [diff] [blame] | 504 | int count; |
| 505 | struct ethoc_bd bd; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 506 | |
Jonas Bonn | fa98eb0 | 2010-11-25 02:30:29 +0000 | [diff] [blame] | 507 | for (count = 0; count < limit; ++count) { |
| 508 | unsigned int entry; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 509 | |
Jonas Bonn | 6a63262 | 2010-11-25 02:30:32 +0000 | [diff] [blame] | 510 | entry = priv->dty_tx & (priv->num_tx-1); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 511 | |
| 512 | ethoc_read_bd(priv, entry, &bd); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 513 | |
Jonas Bonn | fa98eb0 | 2010-11-25 02:30:29 +0000 | [diff] [blame] | 514 | if (bd.stat & TX_BD_READY || (priv->dty_tx == priv->cur_tx)) { |
| 515 | ethoc_ack_irq(priv, INT_MASK_TX); |
| 516 | /* If interrupt came in between reading in the BD |
| 517 | * and clearing the interrupt source, then we risk |
| 518 | * missing the event as the TX interrupt won't trigger |
| 519 | * right away when we reenable it; hence, check |
| 520 | * BD_EMPTY here again to make sure there isn't such an |
| 521 | * event pending... |
| 522 | */ |
| 523 | ethoc_read_bd(priv, entry, &bd); |
| 524 | if (bd.stat & TX_BD_READY || |
| 525 | (priv->dty_tx == priv->cur_tx)) |
| 526 | break; |
| 527 | } |
| 528 | |
Jonas Bonn | 4f64bcb | 2010-11-25 02:30:31 +0000 | [diff] [blame] | 529 | ethoc_update_tx_stats(priv, &bd); |
Jonas Bonn | fa98eb0 | 2010-11-25 02:30:29 +0000 | [diff] [blame] | 530 | priv->dty_tx++; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 531 | } |
| 532 | |
| 533 | if ((priv->cur_tx - priv->dty_tx) <= (priv->num_tx / 2)) |
| 534 | netif_wake_queue(dev); |
| 535 | |
Jonas Bonn | fa98eb0 | 2010-11-25 02:30:29 +0000 | [diff] [blame] | 536 | return count; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 537 | } |
| 538 | |
| 539 | static irqreturn_t ethoc_interrupt(int irq, void *dev_id) |
| 540 | { |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 541 | struct net_device *dev = dev_id; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 542 | struct ethoc *priv = netdev_priv(dev); |
| 543 | u32 pending; |
Jonas Bonn | fa98eb0 | 2010-11-25 02:30:29 +0000 | [diff] [blame] | 544 | u32 mask; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 545 | |
Jonas Bonn | fa98eb0 | 2010-11-25 02:30:29 +0000 | [diff] [blame] | 546 | /* Figure out what triggered the interrupt... |
| 547 | * The tricky bit here is that the interrupt source bits get |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 548 | * set in INT_SOURCE for an event regardless of whether that |
Jonas Bonn | fa98eb0 | 2010-11-25 02:30:29 +0000 | [diff] [blame] | 549 | * event is masked or not. Thus, in order to figure out what |
| 550 | * triggered the interrupt, we need to remove the sources |
| 551 | * for all events that are currently masked. This behaviour |
| 552 | * is not particularly well documented but reasonable... |
| 553 | */ |
| 554 | mask = ethoc_read(priv, INT_MASK); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 555 | pending = ethoc_read(priv, INT_SOURCE); |
Jonas Bonn | fa98eb0 | 2010-11-25 02:30:29 +0000 | [diff] [blame] | 556 | pending &= mask; |
| 557 | |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 558 | if (unlikely(pending == 0)) { |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 559 | return IRQ_NONE; |
| 560 | } |
| 561 | |
Thomas Chou | 50c54a5 | 2009-10-07 14:16:43 +0000 | [diff] [blame] | 562 | ethoc_ack_irq(priv, pending); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 563 | |
Jonas Bonn | fa98eb0 | 2010-11-25 02:30:29 +0000 | [diff] [blame] | 564 | /* We always handle the dropped packet interrupt */ |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 565 | if (pending & INT_MASK_BUSY) { |
| 566 | dev_err(&dev->dev, "packet dropped\n"); |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 567 | dev->stats.rx_dropped++; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 568 | } |
| 569 | |
Jonas Bonn | fa98eb0 | 2010-11-25 02:30:29 +0000 | [diff] [blame] | 570 | /* Handle receive/transmit event by switching to polling */ |
| 571 | if (pending & (INT_MASK_TX | INT_MASK_RX)) { |
| 572 | ethoc_disable_irq(priv, INT_MASK_TX | INT_MASK_RX); |
| 573 | napi_schedule(&priv->napi); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 574 | } |
| 575 | |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 576 | return IRQ_HANDLED; |
| 577 | } |
| 578 | |
| 579 | static int ethoc_get_mac_address(struct net_device *dev, void *addr) |
| 580 | { |
| 581 | struct ethoc *priv = netdev_priv(dev); |
| 582 | u8 *mac = (u8 *)addr; |
| 583 | u32 reg; |
| 584 | |
| 585 | reg = ethoc_read(priv, MAC_ADDR0); |
| 586 | mac[2] = (reg >> 24) & 0xff; |
| 587 | mac[3] = (reg >> 16) & 0xff; |
| 588 | mac[4] = (reg >> 8) & 0xff; |
| 589 | mac[5] = (reg >> 0) & 0xff; |
| 590 | |
| 591 | reg = ethoc_read(priv, MAC_ADDR1); |
| 592 | mac[0] = (reg >> 8) & 0xff; |
| 593 | mac[1] = (reg >> 0) & 0xff; |
| 594 | |
| 595 | return 0; |
| 596 | } |
| 597 | |
| 598 | static int ethoc_poll(struct napi_struct *napi, int budget) |
| 599 | { |
| 600 | struct ethoc *priv = container_of(napi, struct ethoc, napi); |
Jonas Bonn | fa98eb0 | 2010-11-25 02:30:29 +0000 | [diff] [blame] | 601 | int rx_work_done = 0; |
| 602 | int tx_work_done = 0; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 603 | |
Jonas Bonn | fa98eb0 | 2010-11-25 02:30:29 +0000 | [diff] [blame] | 604 | rx_work_done = ethoc_rx(priv->netdev, budget); |
| 605 | tx_work_done = ethoc_tx(priv->netdev, budget); |
| 606 | |
| 607 | if (rx_work_done < budget && tx_work_done < budget) { |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 608 | napi_complete(napi); |
Jonas Bonn | fa98eb0 | 2010-11-25 02:30:29 +0000 | [diff] [blame] | 609 | ethoc_enable_irq(priv, INT_MASK_TX | INT_MASK_RX); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 610 | } |
| 611 | |
Jonas Bonn | fa98eb0 | 2010-11-25 02:30:29 +0000 | [diff] [blame] | 612 | return rx_work_done; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 613 | } |
| 614 | |
| 615 | static int ethoc_mdio_read(struct mii_bus *bus, int phy, int reg) |
| 616 | { |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 617 | struct ethoc *priv = bus->priv; |
Jonas Bonn | 8dac428 | 2010-11-25 02:30:30 +0000 | [diff] [blame] | 618 | int i; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 619 | |
| 620 | ethoc_write(priv, MIIADDRESS, MIIADDRESS_ADDR(phy, reg)); |
| 621 | ethoc_write(priv, MIICOMMAND, MIICOMMAND_READ); |
| 622 | |
Jonas Bonn | 8dac428 | 2010-11-25 02:30:30 +0000 | [diff] [blame] | 623 | for (i=0; i < 5; i++) { |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 624 | u32 status = ethoc_read(priv, MIISTATUS); |
| 625 | if (!(status & MIISTATUS_BUSY)) { |
| 626 | u32 data = ethoc_read(priv, MIIRX_DATA); |
| 627 | /* reset MII command register */ |
| 628 | ethoc_write(priv, MIICOMMAND, 0); |
| 629 | return data; |
| 630 | } |
Jonas Bonn | 8dac428 | 2010-11-25 02:30:30 +0000 | [diff] [blame] | 631 | usleep_range(100,200); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 632 | } |
| 633 | |
| 634 | return -EBUSY; |
| 635 | } |
| 636 | |
| 637 | static int ethoc_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val) |
| 638 | { |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 639 | struct ethoc *priv = bus->priv; |
Jonas Bonn | 8dac428 | 2010-11-25 02:30:30 +0000 | [diff] [blame] | 640 | int i; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 641 | |
| 642 | ethoc_write(priv, MIIADDRESS, MIIADDRESS_ADDR(phy, reg)); |
| 643 | ethoc_write(priv, MIITX_DATA, val); |
| 644 | ethoc_write(priv, MIICOMMAND, MIICOMMAND_WRITE); |
| 645 | |
Jonas Bonn | 8dac428 | 2010-11-25 02:30:30 +0000 | [diff] [blame] | 646 | for (i=0; i < 5; i++) { |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 647 | u32 stat = ethoc_read(priv, MIISTATUS); |
Jonas Bonn | b46773d | 2010-06-11 02:47:39 +0000 | [diff] [blame] | 648 | if (!(stat & MIISTATUS_BUSY)) { |
| 649 | /* reset MII command register */ |
| 650 | ethoc_write(priv, MIICOMMAND, 0); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 651 | return 0; |
Jonas Bonn | b46773d | 2010-06-11 02:47:39 +0000 | [diff] [blame] | 652 | } |
Jonas Bonn | 8dac428 | 2010-11-25 02:30:30 +0000 | [diff] [blame] | 653 | usleep_range(100,200); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 654 | } |
| 655 | |
| 656 | return -EBUSY; |
| 657 | } |
| 658 | |
| 659 | static int ethoc_mdio_reset(struct mii_bus *bus) |
| 660 | { |
| 661 | return 0; |
| 662 | } |
| 663 | |
| 664 | static void ethoc_mdio_poll(struct net_device *dev) |
| 665 | { |
| 666 | } |
| 667 | |
Bill Pemberton | a0a4efe | 2012-12-03 09:24:09 -0500 | [diff] [blame] | 668 | static int ethoc_mdio_probe(struct net_device *dev) |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 669 | { |
| 670 | struct ethoc *priv = netdev_priv(dev); |
| 671 | struct phy_device *phy; |
Jonas Bonn | 637f33b8 | 2010-06-11 02:47:37 +0000 | [diff] [blame] | 672 | int err; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 673 | |
Jonas Bonn | 637f33b8 | 2010-06-11 02:47:37 +0000 | [diff] [blame] | 674 | if (priv->phy_id != -1) { |
| 675 | phy = priv->mdio->phy_map[priv->phy_id]; |
| 676 | } else { |
| 677 | phy = phy_find_first(priv->mdio); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 678 | } |
| 679 | |
| 680 | if (!phy) { |
| 681 | dev_err(&dev->dev, "no PHY found\n"); |
| 682 | return -ENXIO; |
| 683 | } |
| 684 | |
Jonas Bonn | 637f33b8 | 2010-06-11 02:47:37 +0000 | [diff] [blame] | 685 | err = phy_connect_direct(dev, phy, ethoc_mdio_poll, 0, |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 686 | PHY_INTERFACE_MODE_GMII); |
Jonas Bonn | 637f33b8 | 2010-06-11 02:47:37 +0000 | [diff] [blame] | 687 | if (err) { |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 688 | dev_err(&dev->dev, "could not attach to PHY\n"); |
Jonas Bonn | 637f33b8 | 2010-06-11 02:47:37 +0000 | [diff] [blame] | 689 | return err; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 690 | } |
| 691 | |
| 692 | priv->phy = phy; |
| 693 | return 0; |
| 694 | } |
| 695 | |
| 696 | static int ethoc_open(struct net_device *dev) |
| 697 | { |
| 698 | struct ethoc *priv = netdev_priv(dev); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 699 | int ret; |
| 700 | |
| 701 | ret = request_irq(dev->irq, ethoc_interrupt, IRQF_SHARED, |
| 702 | dev->name, dev); |
| 703 | if (ret) |
| 704 | return ret; |
| 705 | |
David S. Miller | 5cf3e03 | 2010-07-07 18:23:19 -0700 | [diff] [blame] | 706 | ethoc_init_ring(priv, dev->mem_start); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 707 | ethoc_reset(priv); |
| 708 | |
| 709 | if (netif_queue_stopped(dev)) { |
| 710 | dev_dbg(&dev->dev, " resuming queue\n"); |
| 711 | netif_wake_queue(dev); |
| 712 | } else { |
| 713 | dev_dbg(&dev->dev, " starting queue\n"); |
| 714 | netif_start_queue(dev); |
| 715 | } |
| 716 | |
| 717 | phy_start(priv->phy); |
| 718 | napi_enable(&priv->napi); |
| 719 | |
| 720 | if (netif_msg_ifup(priv)) { |
| 721 | dev_info(&dev->dev, "I/O: %08lx Memory: %08lx-%08lx\n", |
| 722 | dev->base_addr, dev->mem_start, dev->mem_end); |
| 723 | } |
| 724 | |
| 725 | return 0; |
| 726 | } |
| 727 | |
| 728 | static int ethoc_stop(struct net_device *dev) |
| 729 | { |
| 730 | struct ethoc *priv = netdev_priv(dev); |
| 731 | |
| 732 | napi_disable(&priv->napi); |
| 733 | |
| 734 | if (priv->phy) |
| 735 | phy_stop(priv->phy); |
| 736 | |
| 737 | ethoc_disable_rx_and_tx(priv); |
| 738 | free_irq(dev->irq, dev); |
| 739 | |
| 740 | if (!netif_queue_stopped(dev)) |
| 741 | netif_stop_queue(dev); |
| 742 | |
| 743 | return 0; |
| 744 | } |
| 745 | |
| 746 | static int ethoc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) |
| 747 | { |
| 748 | struct ethoc *priv = netdev_priv(dev); |
| 749 | struct mii_ioctl_data *mdio = if_mii(ifr); |
| 750 | struct phy_device *phy = NULL; |
| 751 | |
| 752 | if (!netif_running(dev)) |
| 753 | return -EINVAL; |
| 754 | |
| 755 | if (cmd != SIOCGMIIPHY) { |
| 756 | if (mdio->phy_id >= PHY_MAX_ADDR) |
| 757 | return -ERANGE; |
| 758 | |
| 759 | phy = priv->mdio->phy_map[mdio->phy_id]; |
| 760 | if (!phy) |
| 761 | return -ENODEV; |
| 762 | } else { |
| 763 | phy = priv->phy; |
| 764 | } |
| 765 | |
Richard Cochran | 28b0411 | 2010-07-17 08:48:55 +0000 | [diff] [blame] | 766 | return phy_mii_ioctl(phy, ifr, cmd); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 767 | } |
| 768 | |
| 769 | static int ethoc_config(struct net_device *dev, struct ifmap *map) |
| 770 | { |
| 771 | return -ENOSYS; |
| 772 | } |
| 773 | |
| 774 | static int ethoc_set_mac_address(struct net_device *dev, void *addr) |
| 775 | { |
| 776 | struct ethoc *priv = netdev_priv(dev); |
| 777 | u8 *mac = (u8 *)addr; |
| 778 | |
Danny Kukawka | 939d225 | 2012-02-17 05:43:29 +0000 | [diff] [blame] | 779 | if (!is_valid_ether_addr(mac)) |
| 780 | return -EADDRNOTAVAIL; |
| 781 | |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 782 | ethoc_write(priv, MAC_ADDR0, (mac[2] << 24) | (mac[3] << 16) | |
| 783 | (mac[4] << 8) | (mac[5] << 0)); |
| 784 | ethoc_write(priv, MAC_ADDR1, (mac[0] << 8) | (mac[1] << 0)); |
| 785 | |
Danny Kukawka | 939d225 | 2012-02-17 05:43:29 +0000 | [diff] [blame] | 786 | memcpy(dev->dev_addr, mac, ETH_ALEN); |
Danny Kukawka | 939d225 | 2012-02-17 05:43:29 +0000 | [diff] [blame] | 787 | |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 788 | return 0; |
| 789 | } |
| 790 | |
| 791 | static void ethoc_set_multicast_list(struct net_device *dev) |
| 792 | { |
| 793 | struct ethoc *priv = netdev_priv(dev); |
| 794 | u32 mode = ethoc_read(priv, MODER); |
Jiri Pirko | 22bedad3 | 2010-04-01 21:22:57 +0000 | [diff] [blame] | 795 | struct netdev_hw_addr *ha; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 796 | u32 hash[2] = { 0, 0 }; |
| 797 | |
| 798 | /* set loopback mode if requested */ |
| 799 | if (dev->flags & IFF_LOOPBACK) |
| 800 | mode |= MODER_LOOP; |
| 801 | else |
| 802 | mode &= ~MODER_LOOP; |
| 803 | |
| 804 | /* receive broadcast frames if requested */ |
| 805 | if (dev->flags & IFF_BROADCAST) |
| 806 | mode &= ~MODER_BRO; |
| 807 | else |
| 808 | mode |= MODER_BRO; |
| 809 | |
| 810 | /* enable promiscuous mode if requested */ |
| 811 | if (dev->flags & IFF_PROMISC) |
| 812 | mode |= MODER_PRO; |
| 813 | else |
| 814 | mode &= ~MODER_PRO; |
| 815 | |
| 816 | ethoc_write(priv, MODER, mode); |
| 817 | |
| 818 | /* receive multicast frames */ |
| 819 | if (dev->flags & IFF_ALLMULTI) { |
| 820 | hash[0] = 0xffffffff; |
| 821 | hash[1] = 0xffffffff; |
| 822 | } else { |
Jiri Pirko | 22bedad3 | 2010-04-01 21:22:57 +0000 | [diff] [blame] | 823 | netdev_for_each_mc_addr(ha, dev) { |
| 824 | u32 crc = ether_crc(ETH_ALEN, ha->addr); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 825 | int bit = (crc >> 26) & 0x3f; |
| 826 | hash[bit >> 5] |= 1 << (bit & 0x1f); |
| 827 | } |
| 828 | } |
| 829 | |
| 830 | ethoc_write(priv, ETH_HASH0, hash[0]); |
| 831 | ethoc_write(priv, ETH_HASH1, hash[1]); |
| 832 | } |
| 833 | |
| 834 | static int ethoc_change_mtu(struct net_device *dev, int new_mtu) |
| 835 | { |
| 836 | return -ENOSYS; |
| 837 | } |
| 838 | |
| 839 | static void ethoc_tx_timeout(struct net_device *dev) |
| 840 | { |
| 841 | struct ethoc *priv = netdev_priv(dev); |
| 842 | u32 pending = ethoc_read(priv, INT_SOURCE); |
| 843 | if (likely(pending)) |
| 844 | ethoc_interrupt(dev->irq, dev); |
| 845 | } |
| 846 | |
Stephen Hemminger | 61357325 | 2009-08-31 19:50:58 +0000 | [diff] [blame] | 847 | static netdev_tx_t ethoc_start_xmit(struct sk_buff *skb, struct net_device *dev) |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 848 | { |
| 849 | struct ethoc *priv = netdev_priv(dev); |
| 850 | struct ethoc_bd bd; |
| 851 | unsigned int entry; |
| 852 | void *dest; |
| 853 | |
| 854 | if (unlikely(skb->len > ETHOC_BUFSIZ)) { |
Kulikov Vasiliy | 57616ee | 2010-07-05 02:13:31 +0000 | [diff] [blame] | 855 | dev->stats.tx_errors++; |
Patrick McHardy | 3790c8c | 2009-06-12 03:00:35 +0000 | [diff] [blame] | 856 | goto out; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 857 | } |
| 858 | |
| 859 | entry = priv->cur_tx % priv->num_tx; |
| 860 | spin_lock_irq(&priv->lock); |
| 861 | priv->cur_tx++; |
| 862 | |
| 863 | ethoc_read_bd(priv, entry, &bd); |
| 864 | if (unlikely(skb->len < ETHOC_ZLEN)) |
| 865 | bd.stat |= TX_BD_PAD; |
| 866 | else |
| 867 | bd.stat &= ~TX_BD_PAD; |
| 868 | |
Jonas Bonn | f8555ad0 | 2010-06-11 02:47:35 +0000 | [diff] [blame] | 869 | dest = priv->vma[entry]; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 870 | memcpy_toio(dest, skb->data, skb->len); |
| 871 | |
| 872 | bd.stat &= ~(TX_BD_STATS | TX_BD_LEN_MASK); |
| 873 | bd.stat |= TX_BD_LEN(skb->len); |
| 874 | ethoc_write_bd(priv, entry, &bd); |
| 875 | |
| 876 | bd.stat |= TX_BD_READY; |
| 877 | ethoc_write_bd(priv, entry, &bd); |
| 878 | |
| 879 | if (priv->cur_tx == (priv->dty_tx + priv->num_tx)) { |
| 880 | dev_dbg(&dev->dev, "stopping queue\n"); |
| 881 | netif_stop_queue(dev); |
| 882 | } |
| 883 | |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 884 | spin_unlock_irq(&priv->lock); |
Richard Cochran | 68f5139 | 2011-06-12 02:19:04 +0000 | [diff] [blame] | 885 | skb_tx_timestamp(skb); |
Patrick McHardy | 3790c8c | 2009-06-12 03:00:35 +0000 | [diff] [blame] | 886 | out: |
| 887 | dev_kfree_skb(skb); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 888 | return NETDEV_TX_OK; |
| 889 | } |
| 890 | |
| 891 | static const struct net_device_ops ethoc_netdev_ops = { |
| 892 | .ndo_open = ethoc_open, |
| 893 | .ndo_stop = ethoc_stop, |
| 894 | .ndo_do_ioctl = ethoc_ioctl, |
| 895 | .ndo_set_config = ethoc_config, |
| 896 | .ndo_set_mac_address = ethoc_set_mac_address, |
Jiri Pirko | afc4b13 | 2011-08-16 06:29:01 +0000 | [diff] [blame] | 897 | .ndo_set_rx_mode = ethoc_set_multicast_list, |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 898 | .ndo_change_mtu = ethoc_change_mtu, |
| 899 | .ndo_tx_timeout = ethoc_tx_timeout, |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 900 | .ndo_start_xmit = ethoc_start_xmit, |
| 901 | }; |
| 902 | |
| 903 | /** |
Ben Hutchings | 49ce9c2 | 2012-07-10 10:56:00 +0000 | [diff] [blame] | 904 | * ethoc_probe - initialize OpenCores ethernet MAC |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 905 | * pdev: platform device |
| 906 | */ |
Bill Pemberton | a0a4efe | 2012-12-03 09:24:09 -0500 | [diff] [blame] | 907 | static int ethoc_probe(struct platform_device *pdev) |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 908 | { |
| 909 | struct net_device *netdev = NULL; |
| 910 | struct resource *res = NULL; |
| 911 | struct resource *mmio = NULL; |
| 912 | struct resource *mem = NULL; |
| 913 | struct ethoc *priv = NULL; |
| 914 | unsigned int phy; |
Jonas Bonn | c527f81 | 2010-06-11 02:47:34 +0000 | [diff] [blame] | 915 | int num_bd; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 916 | int ret = 0; |
Danny Kukawka | 939d225 | 2012-02-17 05:43:29 +0000 | [diff] [blame] | 917 | bool random_mac = false; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 918 | |
| 919 | /* allocate networking device */ |
| 920 | netdev = alloc_etherdev(sizeof(struct ethoc)); |
| 921 | if (!netdev) { |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 922 | ret = -ENOMEM; |
| 923 | goto out; |
| 924 | } |
| 925 | |
| 926 | SET_NETDEV_DEV(netdev, &pdev->dev); |
| 927 | platform_set_drvdata(pdev, netdev); |
| 928 | |
| 929 | /* obtain I/O memory space */ |
| 930 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 931 | if (!res) { |
| 932 | dev_err(&pdev->dev, "cannot obtain I/O memory space\n"); |
| 933 | ret = -ENXIO; |
| 934 | goto free; |
| 935 | } |
| 936 | |
| 937 | mmio = devm_request_mem_region(&pdev->dev, res->start, |
Tobias Klauser | d864584 | 2010-01-15 01:48:22 -0800 | [diff] [blame] | 938 | resource_size(res), res->name); |
Julia Lawall | 463889e | 2009-07-27 06:13:30 +0000 | [diff] [blame] | 939 | if (!mmio) { |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 940 | dev_err(&pdev->dev, "cannot request I/O memory space\n"); |
| 941 | ret = -ENXIO; |
| 942 | goto free; |
| 943 | } |
| 944 | |
| 945 | netdev->base_addr = mmio->start; |
| 946 | |
| 947 | /* obtain buffer memory space */ |
| 948 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
Thomas Chou | 0baa080 | 2009-10-04 23:33:20 +0000 | [diff] [blame] | 949 | if (res) { |
| 950 | mem = devm_request_mem_region(&pdev->dev, res->start, |
Tobias Klauser | d864584 | 2010-01-15 01:48:22 -0800 | [diff] [blame] | 951 | resource_size(res), res->name); |
Thomas Chou | 0baa080 | 2009-10-04 23:33:20 +0000 | [diff] [blame] | 952 | if (!mem) { |
| 953 | dev_err(&pdev->dev, "cannot request memory space\n"); |
| 954 | ret = -ENXIO; |
| 955 | goto free; |
| 956 | } |
| 957 | |
| 958 | netdev->mem_start = mem->start; |
| 959 | netdev->mem_end = mem->end; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 960 | } |
| 961 | |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 962 | |
| 963 | /* obtain device IRQ number */ |
| 964 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 965 | if (!res) { |
| 966 | dev_err(&pdev->dev, "cannot obtain IRQ\n"); |
| 967 | ret = -ENXIO; |
| 968 | goto free; |
| 969 | } |
| 970 | |
| 971 | netdev->irq = res->start; |
| 972 | |
| 973 | /* setup driver-private data */ |
| 974 | priv = netdev_priv(netdev); |
| 975 | priv->netdev = netdev; |
Thomas Chou | 0baa080 | 2009-10-04 23:33:20 +0000 | [diff] [blame] | 976 | priv->dma_alloc = 0; |
Joe Perches | 28f65c11 | 2011-06-09 09:13:32 -0700 | [diff] [blame] | 977 | priv->io_region_size = resource_size(mmio); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 978 | |
| 979 | priv->iobase = devm_ioremap_nocache(&pdev->dev, netdev->base_addr, |
Tobias Klauser | d864584 | 2010-01-15 01:48:22 -0800 | [diff] [blame] | 980 | resource_size(mmio)); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 981 | if (!priv->iobase) { |
| 982 | dev_err(&pdev->dev, "cannot remap I/O memory space\n"); |
| 983 | ret = -ENXIO; |
| 984 | goto error; |
| 985 | } |
| 986 | |
Thomas Chou | 0baa080 | 2009-10-04 23:33:20 +0000 | [diff] [blame] | 987 | if (netdev->mem_end) { |
| 988 | priv->membase = devm_ioremap_nocache(&pdev->dev, |
Tobias Klauser | d864584 | 2010-01-15 01:48:22 -0800 | [diff] [blame] | 989 | netdev->mem_start, resource_size(mem)); |
Thomas Chou | 0baa080 | 2009-10-04 23:33:20 +0000 | [diff] [blame] | 990 | if (!priv->membase) { |
| 991 | dev_err(&pdev->dev, "cannot remap memory space\n"); |
| 992 | ret = -ENXIO; |
| 993 | goto error; |
| 994 | } |
| 995 | } else { |
| 996 | /* Allocate buffer memory */ |
Jonas Bonn | a71fba9 | 2010-06-11 02:47:40 +0000 | [diff] [blame] | 997 | priv->membase = dmam_alloc_coherent(&pdev->dev, |
Thomas Chou | 0baa080 | 2009-10-04 23:33:20 +0000 | [diff] [blame] | 998 | buffer_size, (void *)&netdev->mem_start, |
| 999 | GFP_KERNEL); |
| 1000 | if (!priv->membase) { |
| 1001 | dev_err(&pdev->dev, "cannot allocate %dB buffer\n", |
| 1002 | buffer_size); |
| 1003 | ret = -ENOMEM; |
| 1004 | goto error; |
| 1005 | } |
| 1006 | netdev->mem_end = netdev->mem_start + buffer_size; |
| 1007 | priv->dma_alloc = buffer_size; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1008 | } |
| 1009 | |
Jonas Bonn | c527f81 | 2010-06-11 02:47:34 +0000 | [diff] [blame] | 1010 | /* calculate the number of TX/RX buffers, maximum 128 supported */ |
| 1011 | num_bd = min_t(unsigned int, |
| 1012 | 128, (netdev->mem_end - netdev->mem_start + 1) / ETHOC_BUFSIZ); |
Jonas Bonn | 6a63262 | 2010-11-25 02:30:32 +0000 | [diff] [blame] | 1013 | if (num_bd < 4) { |
| 1014 | ret = -ENODEV; |
| 1015 | goto error; |
| 1016 | } |
| 1017 | /* num_tx must be a power of two */ |
| 1018 | priv->num_tx = rounddown_pow_of_two(num_bd >> 1); |
Jonas Bonn | c527f81 | 2010-06-11 02:47:34 +0000 | [diff] [blame] | 1019 | priv->num_rx = num_bd - priv->num_tx; |
| 1020 | |
Jonas Bonn | 6a63262 | 2010-11-25 02:30:32 +0000 | [diff] [blame] | 1021 | dev_dbg(&pdev->dev, "ethoc: num_tx: %d num_rx: %d\n", |
| 1022 | priv->num_tx, priv->num_rx); |
| 1023 | |
Jonas Bonn | f8555ad0 | 2010-06-11 02:47:35 +0000 | [diff] [blame] | 1024 | priv->vma = devm_kzalloc(&pdev->dev, num_bd*sizeof(void*), GFP_KERNEL); |
| 1025 | if (!priv->vma) { |
| 1026 | ret = -ENOMEM; |
| 1027 | goto error; |
| 1028 | } |
| 1029 | |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1030 | /* Allow the platform setup code to pass in a MAC address. */ |
| 1031 | if (pdev->dev.platform_data) { |
Jonas Bonn | e0f4258 | 2010-11-25 02:30:25 +0000 | [diff] [blame] | 1032 | struct ethoc_platform_data *pdata = pdev->dev.platform_data; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1033 | memcpy(netdev->dev_addr, pdata->hwaddr, IFHWADDRLEN); |
| 1034 | priv->phy_id = pdata->phy_id; |
Jonas Bonn | e0f4258 | 2010-11-25 02:30:25 +0000 | [diff] [blame] | 1035 | } else { |
| 1036 | priv->phy_id = -1; |
| 1037 | |
| 1038 | #ifdef CONFIG_OF |
| 1039 | { |
| 1040 | const uint8_t* mac; |
| 1041 | |
| 1042 | mac = of_get_property(pdev->dev.of_node, |
| 1043 | "local-mac-address", |
| 1044 | NULL); |
| 1045 | if (mac) |
| 1046 | memcpy(netdev->dev_addr, mac, IFHWADDRLEN); |
| 1047 | } |
| 1048 | #endif |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1049 | } |
| 1050 | |
| 1051 | /* Check that the given MAC address is valid. If it isn't, read the |
| 1052 | * current MAC from the controller. */ |
| 1053 | if (!is_valid_ether_addr(netdev->dev_addr)) |
| 1054 | ethoc_get_mac_address(netdev, netdev->dev_addr); |
| 1055 | |
| 1056 | /* Check the MAC again for validity, if it still isn't choose and |
| 1057 | * program a random one. */ |
Danny Kukawka | 939d225 | 2012-02-17 05:43:29 +0000 | [diff] [blame] | 1058 | if (!is_valid_ether_addr(netdev->dev_addr)) { |
Joe Perches | 7efd26d | 2012-07-12 19:33:06 +0000 | [diff] [blame] | 1059 | eth_random_addr(netdev->dev_addr); |
Danny Kukawka | 939d225 | 2012-02-17 05:43:29 +0000 | [diff] [blame] | 1060 | random_mac = true; |
| 1061 | } |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1062 | |
Danny Kukawka | 939d225 | 2012-02-17 05:43:29 +0000 | [diff] [blame] | 1063 | ret = ethoc_set_mac_address(netdev, netdev->dev_addr); |
| 1064 | if (ret) { |
| 1065 | dev_err(&netdev->dev, "failed to set MAC address\n"); |
| 1066 | goto error; |
| 1067 | } |
| 1068 | |
| 1069 | if (random_mac) |
Jiri Pirko | e41b2d7 | 2013-01-01 03:30:15 +0000 | [diff] [blame] | 1070 | netdev->addr_assign_type = NET_ADDR_RANDOM; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1071 | |
| 1072 | /* register MII bus */ |
| 1073 | priv->mdio = mdiobus_alloc(); |
| 1074 | if (!priv->mdio) { |
| 1075 | ret = -ENOMEM; |
| 1076 | goto free; |
| 1077 | } |
| 1078 | |
| 1079 | priv->mdio->name = "ethoc-mdio"; |
| 1080 | snprintf(priv->mdio->id, MII_BUS_ID_SIZE, "%s-%d", |
| 1081 | priv->mdio->name, pdev->id); |
| 1082 | priv->mdio->read = ethoc_mdio_read; |
| 1083 | priv->mdio->write = ethoc_mdio_write; |
| 1084 | priv->mdio->reset = ethoc_mdio_reset; |
| 1085 | priv->mdio->priv = priv; |
| 1086 | |
| 1087 | priv->mdio->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL); |
| 1088 | if (!priv->mdio->irq) { |
| 1089 | ret = -ENOMEM; |
| 1090 | goto free_mdio; |
| 1091 | } |
| 1092 | |
| 1093 | for (phy = 0; phy < PHY_MAX_ADDR; phy++) |
| 1094 | priv->mdio->irq[phy] = PHY_POLL; |
| 1095 | |
| 1096 | ret = mdiobus_register(priv->mdio); |
| 1097 | if (ret) { |
| 1098 | dev_err(&netdev->dev, "failed to register MDIO bus\n"); |
| 1099 | goto free_mdio; |
| 1100 | } |
| 1101 | |
| 1102 | ret = ethoc_mdio_probe(netdev); |
| 1103 | if (ret) { |
| 1104 | dev_err(&netdev->dev, "failed to probe MDIO bus\n"); |
| 1105 | goto error; |
| 1106 | } |
| 1107 | |
| 1108 | ether_setup(netdev); |
| 1109 | |
| 1110 | /* setup the net_device structure */ |
| 1111 | netdev->netdev_ops = ðoc_netdev_ops; |
| 1112 | netdev->watchdog_timeo = ETHOC_TIMEOUT; |
| 1113 | netdev->features |= 0; |
| 1114 | |
| 1115 | /* setup NAPI */ |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1116 | netif_napi_add(netdev, &priv->napi, ethoc_poll, 64); |
| 1117 | |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1118 | spin_lock_init(&priv->lock); |
| 1119 | |
| 1120 | ret = register_netdev(netdev); |
| 1121 | if (ret < 0) { |
| 1122 | dev_err(&netdev->dev, "failed to register interface\n"); |
Thomas Chou | ee02a4e | 2010-05-23 16:44:02 +0000 | [diff] [blame] | 1123 | goto error2; |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1124 | } |
| 1125 | |
| 1126 | goto out; |
| 1127 | |
Thomas Chou | ee02a4e | 2010-05-23 16:44:02 +0000 | [diff] [blame] | 1128 | error2: |
| 1129 | netif_napi_del(&priv->napi); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1130 | error: |
| 1131 | mdiobus_unregister(priv->mdio); |
| 1132 | free_mdio: |
| 1133 | kfree(priv->mdio->irq); |
| 1134 | mdiobus_free(priv->mdio); |
| 1135 | free: |
| 1136 | free_netdev(netdev); |
| 1137 | out: |
| 1138 | return ret; |
| 1139 | } |
| 1140 | |
| 1141 | /** |
Ben Hutchings | 49ce9c2 | 2012-07-10 10:56:00 +0000 | [diff] [blame] | 1142 | * ethoc_remove - shutdown OpenCores ethernet MAC |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1143 | * @pdev: platform device |
| 1144 | */ |
Bill Pemberton | a0a4efe | 2012-12-03 09:24:09 -0500 | [diff] [blame] | 1145 | static int ethoc_remove(struct platform_device *pdev) |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1146 | { |
| 1147 | struct net_device *netdev = platform_get_drvdata(pdev); |
| 1148 | struct ethoc *priv = netdev_priv(netdev); |
| 1149 | |
| 1150 | platform_set_drvdata(pdev, NULL); |
| 1151 | |
| 1152 | if (netdev) { |
Thomas Chou | ee02a4e | 2010-05-23 16:44:02 +0000 | [diff] [blame] | 1153 | netif_napi_del(&priv->napi); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1154 | phy_disconnect(priv->phy); |
| 1155 | priv->phy = NULL; |
| 1156 | |
| 1157 | if (priv->mdio) { |
| 1158 | mdiobus_unregister(priv->mdio); |
| 1159 | kfree(priv->mdio->irq); |
| 1160 | mdiobus_free(priv->mdio); |
| 1161 | } |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1162 | unregister_netdev(netdev); |
| 1163 | free_netdev(netdev); |
| 1164 | } |
| 1165 | |
| 1166 | return 0; |
| 1167 | } |
| 1168 | |
| 1169 | #ifdef CONFIG_PM |
| 1170 | static int ethoc_suspend(struct platform_device *pdev, pm_message_t state) |
| 1171 | { |
| 1172 | return -ENOSYS; |
| 1173 | } |
| 1174 | |
| 1175 | static int ethoc_resume(struct platform_device *pdev) |
| 1176 | { |
| 1177 | return -ENOSYS; |
| 1178 | } |
| 1179 | #else |
| 1180 | # define ethoc_suspend NULL |
| 1181 | # define ethoc_resume NULL |
| 1182 | #endif |
| 1183 | |
Jonas Bonn | e0f4258 | 2010-11-25 02:30:25 +0000 | [diff] [blame] | 1184 | static struct of_device_id ethoc_match[] = { |
Grant Likely | c9e358d | 2011-01-21 09:24:48 -0700 | [diff] [blame] | 1185 | { .compatible = "opencores,ethoc", }, |
Jonas Bonn | e0f4258 | 2010-11-25 02:30:25 +0000 | [diff] [blame] | 1186 | {}, |
| 1187 | }; |
| 1188 | MODULE_DEVICE_TABLE(of, ethoc_match); |
Jonas Bonn | e0f4258 | 2010-11-25 02:30:25 +0000 | [diff] [blame] | 1189 | |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1190 | static struct platform_driver ethoc_driver = { |
| 1191 | .probe = ethoc_probe, |
Bill Pemberton | a0a4efe | 2012-12-03 09:24:09 -0500 | [diff] [blame] | 1192 | .remove = ethoc_remove, |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1193 | .suspend = ethoc_suspend, |
| 1194 | .resume = ethoc_resume, |
| 1195 | .driver = { |
| 1196 | .name = "ethoc", |
Jonas Bonn | e0f4258 | 2010-11-25 02:30:25 +0000 | [diff] [blame] | 1197 | .owner = THIS_MODULE, |
Jonas Bonn | e0f4258 | 2010-11-25 02:30:25 +0000 | [diff] [blame] | 1198 | .of_match_table = ethoc_match, |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1199 | }, |
| 1200 | }; |
| 1201 | |
Axel Lin | db62f68 | 2011-11-27 16:44:17 +0000 | [diff] [blame] | 1202 | module_platform_driver(ethoc_driver); |
Thierry Reding | a170285 | 2009-03-27 00:12:24 -0700 | [diff] [blame] | 1203 | |
| 1204 | MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>"); |
| 1205 | MODULE_DESCRIPTION("OpenCores Ethernet MAC driver"); |
| 1206 | MODULE_LICENSE("GPL v2"); |
| 1207 | |