blob: 4c274657283c36ad2157d5874447e3c434483869 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* epic100.c: A SMC 83c170 EPIC/100 Fast Ethernet driver for Linux. */
2/*
3 Written/copyright 1997-2001 by Donald Becker.
4
5 This software may be used and distributed according to the terms of
6 the GNU General Public License (GPL), incorporated herein by reference.
7 Drivers based on or derived from this code fall under the GPL and must
8 retain the authorship, copyright and license notice. This file is not
9 a complete program and may only be used when the entire operating
10 system is licensed under the GPL.
11
12 This driver is for the SMC83c170/175 "EPIC" series, as used on the
13 SMC EtherPower II 9432 PCI adapter, and several CardBus cards.
14
15 The author may be reached as becker@scyld.com, or C/O
16 Scyld Computing Corporation
17 410 Severn Ave., Suite 210
18 Annapolis MD 21403
19
20 Information and updates available at
21 http://www.scyld.com/network/epic100.html
Jeff Garzik36e1e842006-06-27 07:38:33 -040022 [this link no longer provides anything useful -jgarzik]
Linus Torvalds1da177e2005-04-16 15:20:36 -070023
24 ---------------------------------------------------------------------
Jeff Garzikf3b197a2006-05-26 21:39:03 -040025
Linus Torvalds1da177e2005-04-16 15:20:36 -070026*/
27
28#define DRV_NAME "epic100"
Andy Gospodarekd5b20692006-09-11 17:39:18 -040029#define DRV_VERSION "2.1"
30#define DRV_RELDATE "Sept 11, 2006"
Linus Torvalds1da177e2005-04-16 15:20:36 -070031
32/* The user-configurable values.
33 These may be modified when a driver module is loaded.*/
34
35static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
36
37/* Used to pass the full-duplex flag, etc. */
38#define MAX_UNITS 8 /* More are supported, limit only on options */
39static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
40static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
41
42/* Set the copy breakpoint for the copy-only-tiny-frames scheme.
43 Setting to > 1518 effectively disables this feature. */
44static int rx_copybreak;
45
46/* Operational parameters that are set at compile time. */
47
48/* Keep the ring sizes a power of two for operational efficiency.
49 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
50 Making the Tx ring too large decreases the effectiveness of channel
51 bonding and packet priority.
52 There are no ill effects from too-large receive rings. */
53#define TX_RING_SIZE 256
54#define TX_QUEUE_LEN 240 /* Limit ring entries actually used. */
55#define RX_RING_SIZE 256
56#define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct epic_tx_desc)
57#define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct epic_rx_desc)
58
59/* Operational parameters that usually are not changed. */
60/* Time in jiffies before concluding the transmitter is hung. */
61#define TX_TIMEOUT (2*HZ)
62
63#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
64
65/* Bytes transferred to chip before transmission starts. */
66/* Initial threshold, increased on underflow, rounded down to 4 byte units. */
67#define TX_FIFO_THRESH 256
68#define RX_FIFO_THRESH 1 /* 0-3, 0==32, 64,96, or 3==128 bytes */
69
Linus Torvalds1da177e2005-04-16 15:20:36 -070070#include <linux/module.h>
71#include <linux/kernel.h>
72#include <linux/string.h>
73#include <linux/timer.h>
74#include <linux/errno.h>
75#include <linux/ioport.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070076#include <linux/interrupt.h>
77#include <linux/pci.h>
78#include <linux/delay.h>
79#include <linux/netdevice.h>
80#include <linux/etherdevice.h>
81#include <linux/skbuff.h>
82#include <linux/init.h>
83#include <linux/spinlock.h>
84#include <linux/ethtool.h>
85#include <linux/mii.h>
86#include <linux/crc32.h>
87#include <linux/bitops.h>
88#include <asm/io.h>
89#include <asm/uaccess.h>
Roland Dreier9e2d11b2010-06-02 10:36:53 +000090#include <asm/byteorder.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070091
92/* These identify the driver base version and may not be removed. */
93static char version[] __devinitdata =
94DRV_NAME ".c:v1.11 1/7/2001 Written by Donald Becker <becker@scyld.com>\n";
95static char version2[] __devinitdata =
Linus Torvalds1da177e2005-04-16 15:20:36 -070096" (unofficial 2.4.x kernel port, version " DRV_VERSION ", " DRV_RELDATE ")\n";
97
98MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
99MODULE_DESCRIPTION("SMC 83c170 EPIC series Ethernet driver");
100MODULE_LICENSE("GPL");
101
102module_param(debug, int, 0);
103module_param(rx_copybreak, int, 0);
104module_param_array(options, int, NULL, 0);
105module_param_array(full_duplex, int, NULL, 0);
106MODULE_PARM_DESC(debug, "EPIC/100 debug level (0-5)");
107MODULE_PARM_DESC(options, "EPIC/100: Bits 0-3: media type, bit 4: full duplex");
108MODULE_PARM_DESC(rx_copybreak, "EPIC/100 copy breakpoint for copy-only-tiny-frames");
109MODULE_PARM_DESC(full_duplex, "EPIC/100 full duplex setting(s) (1)");
110
111/*
112 Theory of Operation
113
114I. Board Compatibility
115
116This device driver is designed for the SMC "EPIC/100", the SMC
117single-chip Ethernet controllers for PCI. This chip is used on
118the SMC EtherPower II boards.
119
120II. Board-specific settings
121
122PCI bus devices are configured by the system at boot time, so no jumpers
123need to be set on the board. The system BIOS will assign the
124PCI INTA signal to a (preferably otherwise unused) system IRQ line.
125Note: Kernel versions earlier than 1.3.73 do not support shared PCI
126interrupt lines.
127
128III. Driver operation
129
130IIIa. Ring buffers
131
132IVb. References
133
Al Viro9ebfd492008-03-16 22:22:04 +0000134http://www.smsc.com/main/tools/discontinued/83c171.pdf
135http://www.smsc.com/main/tools/discontinued/83c175.pdf
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136http://scyld.com/expert/NWay.html
137http://www.national.com/pf/DP/DP83840A.html
138
139IVc. Errata
140
141*/
142
143
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144enum chip_capability_flags { MII_PWRDWN=1, TYPE2_INTR=2, NO_MII=4 };
145
146#define EPIC_TOTAL_SIZE 0x100
147#define USE_IO_OPS 1
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148
149typedef enum {
150 SMSC_83C170_0,
151 SMSC_83C170,
152 SMSC_83C175,
153} chip_t;
154
155
156struct epic_chip_info {
157 const char *name;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158 int drv_flags; /* Driver use, intended as capability flags. */
159};
160
161
162/* indexed by chip_t */
Arjan van de Venf71e1302006-03-03 21:33:57 -0500163static const struct epic_chip_info pci_id_tbl[] = {
Jeff Garzik36e1e842006-06-27 07:38:33 -0400164 { "SMSC EPIC/100 83c170", TYPE2_INTR | NO_MII | MII_PWRDWN },
165 { "SMSC EPIC/100 83c170", TYPE2_INTR },
166 { "SMSC EPIC/C 83c175", TYPE2_INTR | MII_PWRDWN },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167};
168
169
Alexey Dobriyana3aa1882010-01-07 11:58:11 +0000170static DEFINE_PCI_DEVICE_TABLE(epic_pci_tbl) = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171 { 0x10B8, 0x0005, 0x1092, 0x0AB4, 0, 0, SMSC_83C170_0 },
172 { 0x10B8, 0x0005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, SMSC_83C170 },
173 { 0x10B8, 0x0006, PCI_ANY_ID, PCI_ANY_ID,
174 PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, SMSC_83C175 },
175 { 0,}
176};
177MODULE_DEVICE_TABLE (pci, epic_pci_tbl);
178
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400179
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180#ifndef USE_IO_OPS
181#undef inb
182#undef inw
183#undef inl
184#undef outb
185#undef outw
186#undef outl
187#define inb readb
188#define inw readw
189#define inl readl
190#define outb writeb
191#define outw writew
192#define outl writel
193#endif
194
195/* Offsets to registers, using the (ugh) SMC names. */
196enum epic_registers {
197 COMMAND=0, INTSTAT=4, INTMASK=8, GENCTL=0x0C, NVCTL=0x10, EECTL=0x14,
198 PCIBurstCnt=0x18,
199 TEST1=0x1C, CRCCNT=0x20, ALICNT=0x24, MPCNT=0x28, /* Rx error counters. */
200 MIICtrl=0x30, MIIData=0x34, MIICfg=0x38,
201 LAN0=64, /* MAC address. */
202 MC0=80, /* Multicast filter table. */
203 RxCtrl=96, TxCtrl=112, TxSTAT=0x74,
204 PRxCDAR=0x84, RxSTAT=0xA4, EarlyRx=0xB0, PTxCDAR=0xC4, TxThresh=0xDC,
205};
206
207/* Interrupt register bits, using my own meaningful names. */
208enum IntrStatus {
209 TxIdle=0x40000, RxIdle=0x20000, IntrSummary=0x010000,
210 PCIBusErr170=0x7000, PCIBusErr175=0x1000, PhyEvent175=0x8000,
211 RxStarted=0x0800, RxEarlyWarn=0x0400, CntFull=0x0200, TxUnderrun=0x0100,
212 TxEmpty=0x0080, TxDone=0x0020, RxError=0x0010,
213 RxOverflow=0x0008, RxFull=0x0004, RxHeader=0x0002, RxDone=0x0001,
214};
215enum CommandBits {
216 StopRx=1, StartRx=2, TxQueued=4, RxQueued=8,
217 StopTxDMA=0x20, StopRxDMA=0x40, RestartTx=0x80,
218};
219
220#define EpicRemoved 0xffffffff /* Chip failed or removed (CardBus) */
221
222#define EpicNapiEvent (TxEmpty | TxDone | \
223 RxDone | RxStarted | RxEarlyWarn | RxOverflow | RxFull)
224#define EpicNormalEvent (0x0000ffff & ~EpicNapiEvent)
225
Arjan van de Venf71e1302006-03-03 21:33:57 -0500226static const u16 media2miictl[16] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700227 0, 0x0C00, 0x0C00, 0x2000, 0x0100, 0x2100, 0, 0,
228 0, 0, 0, 0, 0, 0, 0, 0 };
229
Al Viro9ebfd492008-03-16 22:22:04 +0000230/*
231 * The EPIC100 Rx and Tx buffer descriptors. Note that these
232 * really ARE host-endian; it's not a misannotation. We tell
233 * the card to byteswap them internally on big-endian hosts -
Roland Dreier9e2d11b2010-06-02 10:36:53 +0000234 * look for #ifdef __BIG_ENDIAN in epic_open().
Al Viro9ebfd492008-03-16 22:22:04 +0000235 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700236
237struct epic_tx_desc {
238 u32 txstatus;
239 u32 bufaddr;
240 u32 buflength;
241 u32 next;
242};
243
244struct epic_rx_desc {
245 u32 rxstatus;
246 u32 bufaddr;
247 u32 buflength;
248 u32 next;
249};
250
251enum desc_status_bits {
252 DescOwn=0x8000,
253};
254
255#define PRIV_ALIGN 15 /* Required alignment mask */
256struct epic_private {
257 struct epic_rx_desc *rx_ring;
258 struct epic_tx_desc *tx_ring;
259 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
260 struct sk_buff* tx_skbuff[TX_RING_SIZE];
261 /* The addresses of receive-in-place skbuffs. */
262 struct sk_buff* rx_skbuff[RX_RING_SIZE];
263
264 dma_addr_t tx_ring_dma;
265 dma_addr_t rx_ring_dma;
266
267 /* Ring pointers. */
268 spinlock_t lock; /* Group with Tx control cache line. */
269 spinlock_t napi_lock;
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700270 struct napi_struct napi;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271 unsigned int reschedule_in_poll;
272 unsigned int cur_tx, dirty_tx;
273
274 unsigned int cur_rx, dirty_rx;
275 u32 irq_mask;
276 unsigned int rx_buf_sz; /* Based on MTU+slack. */
277
278 struct pci_dev *pci_dev; /* PCI bus location. */
279 int chip_id, chip_flags;
280
281 struct net_device_stats stats;
282 struct timer_list timer; /* Media selection timer. */
283 int tx_threshold;
284 unsigned char mc_filter[8];
285 signed char phys[4]; /* MII device addresses. */
286 u16 advertising; /* NWay media advertisement */
287 int mii_phy_cnt;
288 struct mii_if_info mii;
289 unsigned int tx_full:1; /* The Tx queue is full. */
290 unsigned int default_port:4; /* Last dev->if_port value. */
291};
292
293static int epic_open(struct net_device *dev);
294static int read_eeprom(long ioaddr, int location);
295static int mdio_read(struct net_device *dev, int phy_id, int location);
296static void mdio_write(struct net_device *dev, int phy_id, int loc, int val);
297static void epic_restart(struct net_device *dev);
298static void epic_timer(unsigned long data);
299static void epic_tx_timeout(struct net_device *dev);
300static void epic_init_ring(struct net_device *dev);
Stephen Hemminger613573252009-08-31 19:50:58 +0000301static netdev_tx_t epic_start_xmit(struct sk_buff *skb,
302 struct net_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700303static int epic_rx(struct net_device *dev, int budget);
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700304static int epic_poll(struct napi_struct *napi, int budget);
David Howells7d12e782006-10-05 14:55:46 +0100305static irqreturn_t epic_interrupt(int irq, void *dev_instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700306static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
Jeff Garzik7282d492006-09-13 14:30:00 -0400307static const struct ethtool_ops netdev_ethtool_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700308static int epic_close(struct net_device *dev);
309static struct net_device_stats *epic_get_stats(struct net_device *dev);
310static void set_rx_mode(struct net_device *dev);
311
Stephen Hemminger805524c2009-01-07 17:27:39 -0800312static const struct net_device_ops epic_netdev_ops = {
313 .ndo_open = epic_open,
314 .ndo_stop = epic_close,
315 .ndo_start_xmit = epic_start_xmit,
316 .ndo_tx_timeout = epic_tx_timeout,
317 .ndo_get_stats = epic_get_stats,
318 .ndo_set_multicast_list = set_rx_mode,
319 .ndo_do_ioctl = netdev_ioctl,
320 .ndo_change_mtu = eth_change_mtu,
321 .ndo_set_mac_address = eth_mac_addr,
322 .ndo_validate_addr = eth_validate_addr,
323};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324
325static int __devinit epic_init_one (struct pci_dev *pdev,
326 const struct pci_device_id *ent)
327{
328 static int card_idx = -1;
329 long ioaddr;
330 int chip_idx = (int) ent->driver_data;
331 int irq;
332 struct net_device *dev;
333 struct epic_private *ep;
334 int i, ret, option = 0, duplex = 0;
335 void *ring_space;
336 dma_addr_t ring_dma;
337
338/* when built into the kernel, we only print version if device is found */
339#ifndef MODULE
340 static int printed_version;
341 if (!printed_version++)
Joe Perchesad361c92009-07-06 13:05:40 -0700342 printk(KERN_INFO "%s%s", version, version2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700343#endif
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400344
Linus Torvalds1da177e2005-04-16 15:20:36 -0700345 card_idx++;
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400346
Linus Torvalds1da177e2005-04-16 15:20:36 -0700347 ret = pci_enable_device(pdev);
348 if (ret)
349 goto out;
350 irq = pdev->irq;
351
Jeff Garzik36e1e842006-06-27 07:38:33 -0400352 if (pci_resource_len(pdev, 0) < EPIC_TOTAL_SIZE) {
Jeff Garzik9b91cf92006-06-27 11:39:50 -0400353 dev_err(&pdev->dev, "no PCI region space\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700354 ret = -ENODEV;
355 goto err_out_disable;
356 }
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400357
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358 pci_set_master(pdev);
359
360 ret = pci_request_regions(pdev, DRV_NAME);
361 if (ret < 0)
362 goto err_out_disable;
363
364 ret = -ENOMEM;
365
366 dev = alloc_etherdev(sizeof (*ep));
367 if (!dev) {
Jeff Garzik9b91cf92006-06-27 11:39:50 -0400368 dev_err(&pdev->dev, "no memory for eth device\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700369 goto err_out_free_res;
370 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700371 SET_NETDEV_DEV(dev, &pdev->dev);
372
373#ifdef USE_IO_OPS
374 ioaddr = pci_resource_start (pdev, 0);
375#else
376 ioaddr = pci_resource_start (pdev, 1);
Arjan van de Ven275f1652008-10-20 21:42:39 -0700377 ioaddr = (long) pci_ioremap_bar(pdev, 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700378 if (!ioaddr) {
Jeff Garzik9b91cf92006-06-27 11:39:50 -0400379 dev_err(&pdev->dev, "ioremap failed\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700380 goto err_out_free_netdev;
381 }
382#endif
383
384 pci_set_drvdata(pdev, dev);
Wang Chen4cf16532008-11-12 23:38:14 -0800385 ep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700386 ep->mii.dev = dev;
387 ep->mii.mdio_read = mdio_read;
388 ep->mii.mdio_write = mdio_write;
389 ep->mii.phy_id_mask = 0x1f;
390 ep->mii.reg_num_mask = 0x1f;
391
392 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
393 if (!ring_space)
394 goto err_out_iounmap;
395 ep->tx_ring = (struct epic_tx_desc *)ring_space;
396 ep->tx_ring_dma = ring_dma;
397
398 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
399 if (!ring_space)
400 goto err_out_unmap_tx;
401 ep->rx_ring = (struct epic_rx_desc *)ring_space;
402 ep->rx_ring_dma = ring_dma;
403
404 if (dev->mem_start) {
405 option = dev->mem_start;
406 duplex = (dev->mem_start & 16) ? 1 : 0;
407 } else if (card_idx >= 0 && card_idx < MAX_UNITS) {
408 if (options[card_idx] >= 0)
409 option = options[card_idx];
410 if (full_duplex[card_idx] >= 0)
411 duplex = full_duplex[card_idx];
412 }
413
414 dev->base_addr = ioaddr;
415 dev->irq = irq;
416
417 spin_lock_init(&ep->lock);
418 spin_lock_init(&ep->napi_lock);
419 ep->reschedule_in_poll = 0;
420
421 /* Bring the chip out of low-power mode. */
422 outl(0x4200, ioaddr + GENCTL);
423 /* Magic?! If we don't set this bit the MII interface won't work. */
424 /* This magic is documented in SMSC app note 7.15 */
425 for (i = 16; i > 0; i--)
426 outl(0x0008, ioaddr + TEST1);
427
428 /* Turn on the MII transceiver. */
429 outl(0x12, ioaddr + MIICfg);
430 if (chip_idx == 1)
431 outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL);
432 outl(0x0200, ioaddr + GENCTL);
433
434 /* Note: the '175 does not have a serial EEPROM. */
435 for (i = 0; i < 3; i++)
Al Viro9ebfd492008-03-16 22:22:04 +0000436 ((__le16 *)dev->dev_addr)[i] = cpu_to_le16(inw(ioaddr + LAN0 + i*4));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437
438 if (debug > 2) {
Jeff Garzik2e8a5382006-06-27 10:47:51 -0400439 dev_printk(KERN_DEBUG, &pdev->dev, "EEPROM contents:\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700440 for (i = 0; i < 64; i++)
441 printk(" %4.4x%s", read_eeprom(ioaddr, i),
442 i % 16 == 15 ? "\n" : "");
443 }
444
445 ep->pci_dev = pdev;
446 ep->chip_id = chip_idx;
447 ep->chip_flags = pci_id_tbl[chip_idx].drv_flags;
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400448 ep->irq_mask =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449 (ep->chip_flags & TYPE2_INTR ? PCIBusErr175 : PCIBusErr170)
450 | CntFull | TxUnderrun | EpicNapiEvent;
451
452 /* Find the connected MII xcvrs.
453 Doing this in open() would allow detecting external xcvrs later, but
454 takes much time and no cards have external MII. */
455 {
456 int phy, phy_idx = 0;
457 for (phy = 1; phy < 32 && phy_idx < sizeof(ep->phys); phy++) {
458 int mii_status = mdio_read(dev, phy, MII_BMSR);
459 if (mii_status != 0xffff && mii_status != 0x0000) {
460 ep->phys[phy_idx++] = phy;
Jeff Garzik9b91cf92006-06-27 11:39:50 -0400461 dev_info(&pdev->dev,
Jeff Garzik2e8a5382006-06-27 10:47:51 -0400462 "MII transceiver #%d control "
463 "%4.4x status %4.4x.\n",
464 phy, mdio_read(dev, phy, 0), mii_status);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700465 }
466 }
467 ep->mii_phy_cnt = phy_idx;
468 if (phy_idx != 0) {
469 phy = ep->phys[0];
470 ep->mii.advertising = mdio_read(dev, phy, MII_ADVERTISE);
Jeff Garzik9b91cf92006-06-27 11:39:50 -0400471 dev_info(&pdev->dev,
Jeff Garzik2e8a5382006-06-27 10:47:51 -0400472 "Autonegotiation advertising %4.4x link "
Linus Torvalds1da177e2005-04-16 15:20:36 -0700473 "partner %4.4x.\n",
Jeff Garzik2e8a5382006-06-27 10:47:51 -0400474 ep->mii.advertising, mdio_read(dev, phy, 5));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700475 } else if ( ! (ep->chip_flags & NO_MII)) {
Jeff Garzik9b91cf92006-06-27 11:39:50 -0400476 dev_warn(&pdev->dev,
Jeff Garzik2e8a5382006-06-27 10:47:51 -0400477 "***WARNING***: No MII transceiver found!\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478 /* Use the known PHY address of the EPII. */
479 ep->phys[0] = 3;
480 }
481 ep->mii.phy_id = ep->phys[0];
482 }
483
484 /* Turn off the MII xcvr (175 only!), leave the chip in low-power mode. */
485 if (ep->chip_flags & MII_PWRDWN)
486 outl(inl(ioaddr + NVCTL) & ~0x483C, ioaddr + NVCTL);
487 outl(0x0008, ioaddr + GENCTL);
488
489 /* The lower four bits are the media type. */
490 if (duplex) {
491 ep->mii.force_media = ep->mii.full_duplex = 1;
Jeff Garzik9b91cf92006-06-27 11:39:50 -0400492 dev_info(&pdev->dev, "Forced full duplex requested.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700493 }
494 dev->if_port = ep->default_port = option;
495
496 /* The Epic-specific entries in the device structure. */
Stephen Hemminger805524c2009-01-07 17:27:39 -0800497 dev->netdev_ops = &epic_netdev_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700498 dev->ethtool_ops = &netdev_ethtool_ops;
499 dev->watchdog_timeo = TX_TIMEOUT;
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700500 netif_napi_add(dev, &ep->napi, epic_poll, 64);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700501
502 ret = register_netdev(dev);
503 if (ret < 0)
504 goto err_out_unmap_rx;
505
Johannes Berge1749612008-10-27 15:59:26 -0700506 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, %pM\n",
Joe Perches0795af52007-10-03 17:59:30 -0700507 dev->name, pci_id_tbl[chip_idx].name, ioaddr, dev->irq,
Johannes Berge1749612008-10-27 15:59:26 -0700508 dev->dev_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700509
510out:
511 return ret;
512
513err_out_unmap_rx:
514 pci_free_consistent(pdev, RX_TOTAL_SIZE, ep->rx_ring, ep->rx_ring_dma);
515err_out_unmap_tx:
516 pci_free_consistent(pdev, TX_TOTAL_SIZE, ep->tx_ring, ep->tx_ring_dma);
517err_out_iounmap:
518#ifndef USE_IO_OPS
519 iounmap(ioaddr);
520err_out_free_netdev:
521#endif
522 free_netdev(dev);
523err_out_free_res:
524 pci_release_regions(pdev);
525err_out_disable:
526 pci_disable_device(pdev);
527 goto out;
528}
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400529
Linus Torvalds1da177e2005-04-16 15:20:36 -0700530/* Serial EEPROM section. */
531
532/* EEPROM_Ctrl bits. */
533#define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */
534#define EE_CS 0x02 /* EEPROM chip select. */
535#define EE_DATA_WRITE 0x08 /* EEPROM chip data in. */
536#define EE_WRITE_0 0x01
537#define EE_WRITE_1 0x09
538#define EE_DATA_READ 0x10 /* EEPROM chip data out. */
539#define EE_ENB (0x0001 | EE_CS)
540
541/* Delay between EEPROM clock transitions.
542 This serves to flush the operation to the PCI bus.
543 */
544
545#define eeprom_delay() inl(ee_addr)
546
547/* The EEPROM commands include the alway-set leading bit. */
548#define EE_WRITE_CMD (5 << 6)
549#define EE_READ64_CMD (6 << 6)
550#define EE_READ256_CMD (6 << 8)
551#define EE_ERASE_CMD (7 << 6)
552
553static void epic_disable_int(struct net_device *dev, struct epic_private *ep)
554{
555 long ioaddr = dev->base_addr;
556
557 outl(0x00000000, ioaddr + INTMASK);
558}
559
560static inline void __epic_pci_commit(long ioaddr)
561{
562#ifndef USE_IO_OPS
563 inl(ioaddr + INTMASK);
564#endif
565}
566
567static inline void epic_napi_irq_off(struct net_device *dev,
568 struct epic_private *ep)
569{
570 long ioaddr = dev->base_addr;
571
572 outl(ep->irq_mask & ~EpicNapiEvent, ioaddr + INTMASK);
573 __epic_pci_commit(ioaddr);
574}
575
576static inline void epic_napi_irq_on(struct net_device *dev,
577 struct epic_private *ep)
578{
579 long ioaddr = dev->base_addr;
580
581 /* No need to commit possible posted write */
582 outl(ep->irq_mask | EpicNapiEvent, ioaddr + INTMASK);
583}
584
585static int __devinit read_eeprom(long ioaddr, int location)
586{
587 int i;
588 int retval = 0;
589 long ee_addr = ioaddr + EECTL;
590 int read_cmd = location |
591 (inl(ee_addr) & 0x40 ? EE_READ64_CMD : EE_READ256_CMD);
592
593 outl(EE_ENB & ~EE_CS, ee_addr);
594 outl(EE_ENB, ee_addr);
595
596 /* Shift the read command bits out. */
597 for (i = 12; i >= 0; i--) {
598 short dataval = (read_cmd & (1 << i)) ? EE_WRITE_1 : EE_WRITE_0;
599 outl(EE_ENB | dataval, ee_addr);
600 eeprom_delay();
601 outl(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
602 eeprom_delay();
603 }
604 outl(EE_ENB, ee_addr);
605
606 for (i = 16; i > 0; i--) {
607 outl(EE_ENB | EE_SHIFT_CLK, ee_addr);
608 eeprom_delay();
609 retval = (retval << 1) | ((inl(ee_addr) & EE_DATA_READ) ? 1 : 0);
610 outl(EE_ENB, ee_addr);
611 eeprom_delay();
612 }
613
614 /* Terminate the EEPROM access. */
615 outl(EE_ENB & ~EE_CS, ee_addr);
616 return retval;
617}
618
619#define MII_READOP 1
620#define MII_WRITEOP 2
621static int mdio_read(struct net_device *dev, int phy_id, int location)
622{
623 long ioaddr = dev->base_addr;
624 int read_cmd = (phy_id << 9) | (location << 4) | MII_READOP;
625 int i;
626
627 outl(read_cmd, ioaddr + MIICtrl);
628 /* Typical operation takes 25 loops. */
629 for (i = 400; i > 0; i--) {
630 barrier();
631 if ((inl(ioaddr + MIICtrl) & MII_READOP) == 0) {
632 /* Work around read failure bug. */
Joe Perches8e95a202009-12-03 07:58:21 +0000633 if (phy_id == 1 && location < 6 &&
634 inw(ioaddr + MIIData) == 0xffff) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700635 outl(read_cmd, ioaddr + MIICtrl);
636 continue;
637 }
638 return inw(ioaddr + MIIData);
639 }
640 }
641 return 0xffff;
642}
643
644static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
645{
646 long ioaddr = dev->base_addr;
647 int i;
648
649 outw(value, ioaddr + MIIData);
650 outl((phy_id << 9) | (loc << 4) | MII_WRITEOP, ioaddr + MIICtrl);
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400651 for (i = 10000; i > 0; i--) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652 barrier();
653 if ((inl(ioaddr + MIICtrl) & MII_WRITEOP) == 0)
654 break;
655 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700656}
657
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400658
Linus Torvalds1da177e2005-04-16 15:20:36 -0700659static int epic_open(struct net_device *dev)
660{
Wang Chen4cf16532008-11-12 23:38:14 -0800661 struct epic_private *ep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662 long ioaddr = dev->base_addr;
663 int i;
664 int retval;
665
666 /* Soft reset the chip. */
667 outl(0x4001, ioaddr + GENCTL);
668
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700669 napi_enable(&ep->napi);
Joe Perchesa0607fd2009-11-18 23:29:17 -0800670 if ((retval = request_irq(dev->irq, epic_interrupt, IRQF_SHARED, dev->name, dev))) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700671 napi_disable(&ep->napi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700672 return retval;
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700673 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700674
675 epic_init_ring(dev);
676
677 outl(0x4000, ioaddr + GENCTL);
678 /* This magic is documented in SMSC app note 7.15 */
679 for (i = 16; i > 0; i--)
680 outl(0x0008, ioaddr + TEST1);
681
682 /* Pull the chip out of low-power mode, enable interrupts, and set for
683 PCI read multiple. The MIIcfg setting and strange write order are
684 required by the details of which bits are reset and the transceiver
685 wiring on the Ositech CardBus card.
686 */
687#if 0
688 outl(dev->if_port == 1 ? 0x13 : 0x12, ioaddr + MIICfg);
689#endif
690 if (ep->chip_flags & MII_PWRDWN)
691 outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL);
692
Al Viro9ebfd492008-03-16 22:22:04 +0000693 /* Tell the chip to byteswap descriptors on big-endian hosts */
Roland Dreier9e2d11b2010-06-02 10:36:53 +0000694#ifdef __BIG_ENDIAN
Linus Torvalds1da177e2005-04-16 15:20:36 -0700695 outl(0x4432 | (RX_FIFO_THRESH<<8), ioaddr + GENCTL);
696 inl(ioaddr + GENCTL);
697 outl(0x0432 | (RX_FIFO_THRESH<<8), ioaddr + GENCTL);
698#else
699 outl(0x4412 | (RX_FIFO_THRESH<<8), ioaddr + GENCTL);
700 inl(ioaddr + GENCTL);
701 outl(0x0412 | (RX_FIFO_THRESH<<8), ioaddr + GENCTL);
702#endif
703
704 udelay(20); /* Looks like EPII needs that if you want reliable RX init. FIXME: pci posting bug? */
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400705
Linus Torvalds1da177e2005-04-16 15:20:36 -0700706 for (i = 0; i < 3; i++)
Al Viro9ebfd492008-03-16 22:22:04 +0000707 outl(le16_to_cpu(((__le16*)dev->dev_addr)[i]), ioaddr + LAN0 + i*4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700708
709 ep->tx_threshold = TX_FIFO_THRESH;
710 outl(ep->tx_threshold, ioaddr + TxThresh);
711
712 if (media2miictl[dev->if_port & 15]) {
713 if (ep->mii_phy_cnt)
714 mdio_write(dev, ep->phys[0], MII_BMCR, media2miictl[dev->if_port&15]);
715 if (dev->if_port == 1) {
716 if (debug > 1)
717 printk(KERN_INFO "%s: Using the 10base2 transceiver, MII "
718 "status %4.4x.\n",
719 dev->name, mdio_read(dev, ep->phys[0], MII_BMSR));
720 }
721 } else {
722 int mii_lpa = mdio_read(dev, ep->phys[0], MII_LPA);
723 if (mii_lpa != 0xffff) {
724 if ((mii_lpa & LPA_100FULL) || (mii_lpa & 0x01C0) == LPA_10FULL)
725 ep->mii.full_duplex = 1;
726 else if (! (mii_lpa & LPA_LPACK))
727 mdio_write(dev, ep->phys[0], MII_BMCR, BMCR_ANENABLE|BMCR_ANRESTART);
728 if (debug > 1)
729 printk(KERN_INFO "%s: Setting %s-duplex based on MII xcvr %d"
730 " register read of %4.4x.\n", dev->name,
731 ep->mii.full_duplex ? "full" : "half",
732 ep->phys[0], mii_lpa);
733 }
734 }
735
736 outl(ep->mii.full_duplex ? 0x7F : 0x79, ioaddr + TxCtrl);
737 outl(ep->rx_ring_dma, ioaddr + PRxCDAR);
738 outl(ep->tx_ring_dma, ioaddr + PTxCDAR);
739
740 /* Start the chip's Rx process. */
741 set_rx_mode(dev);
742 outl(StartRx | RxQueued, ioaddr + COMMAND);
743
744 netif_start_queue(dev);
745
746 /* Enable interrupts by setting the interrupt mask. */
747 outl((ep->chip_flags & TYPE2_INTR ? PCIBusErr175 : PCIBusErr170)
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400748 | CntFull | TxUnderrun
Linus Torvalds1da177e2005-04-16 15:20:36 -0700749 | RxError | RxHeader | EpicNapiEvent, ioaddr + INTMASK);
750
751 if (debug > 1)
752 printk(KERN_DEBUG "%s: epic_open() ioaddr %lx IRQ %d status %4.4x "
753 "%s-duplex.\n",
754 dev->name, ioaddr, dev->irq, (int)inl(ioaddr + GENCTL),
755 ep->mii.full_duplex ? "full" : "half");
756
757 /* Set the timer to switch to check for link beat and perhaps switch
758 to an alternate media type. */
759 init_timer(&ep->timer);
760 ep->timer.expires = jiffies + 3*HZ;
761 ep->timer.data = (unsigned long)dev;
762 ep->timer.function = &epic_timer; /* timer handler */
763 add_timer(&ep->timer);
764
765 return 0;
766}
767
768/* Reset the chip to recover from a PCI transaction error.
769 This may occur at interrupt time. */
770static void epic_pause(struct net_device *dev)
771{
772 long ioaddr = dev->base_addr;
Wang Chen4cf16532008-11-12 23:38:14 -0800773 struct epic_private *ep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700774
775 netif_stop_queue (dev);
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400776
Linus Torvalds1da177e2005-04-16 15:20:36 -0700777 /* Disable interrupts by clearing the interrupt mask. */
778 outl(0x00000000, ioaddr + INTMASK);
779 /* Stop the chip's Tx and Rx DMA processes. */
780 outw(StopRx | StopTxDMA | StopRxDMA, ioaddr + COMMAND);
781
782 /* Update the error counts. */
783 if (inw(ioaddr + COMMAND) != 0xffff) {
784 ep->stats.rx_missed_errors += inb(ioaddr + MPCNT);
785 ep->stats.rx_frame_errors += inb(ioaddr + ALICNT);
786 ep->stats.rx_crc_errors += inb(ioaddr + CRCCNT);
787 }
788
789 /* Remove the packets on the Rx queue. */
790 epic_rx(dev, RX_RING_SIZE);
791}
792
793static void epic_restart(struct net_device *dev)
794{
795 long ioaddr = dev->base_addr;
Wang Chen4cf16532008-11-12 23:38:14 -0800796 struct epic_private *ep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700797 int i;
798
799 /* Soft reset the chip. */
800 outl(0x4001, ioaddr + GENCTL);
801
802 printk(KERN_DEBUG "%s: Restarting the EPIC chip, Rx %d/%d Tx %d/%d.\n",
803 dev->name, ep->cur_rx, ep->dirty_rx, ep->dirty_tx, ep->cur_tx);
804 udelay(1);
805
806 /* This magic is documented in SMSC app note 7.15 */
807 for (i = 16; i > 0; i--)
808 outl(0x0008, ioaddr + TEST1);
809
Roland Dreier9e2d11b2010-06-02 10:36:53 +0000810#ifdef __BIG_ENDIAN
Linus Torvalds1da177e2005-04-16 15:20:36 -0700811 outl(0x0432 | (RX_FIFO_THRESH<<8), ioaddr + GENCTL);
812#else
813 outl(0x0412 | (RX_FIFO_THRESH<<8), ioaddr + GENCTL);
814#endif
815 outl(dev->if_port == 1 ? 0x13 : 0x12, ioaddr + MIICfg);
816 if (ep->chip_flags & MII_PWRDWN)
817 outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL);
818
819 for (i = 0; i < 3; i++)
Al Viro9ebfd492008-03-16 22:22:04 +0000820 outl(le16_to_cpu(((__le16*)dev->dev_addr)[i]), ioaddr + LAN0 + i*4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700821
822 ep->tx_threshold = TX_FIFO_THRESH;
823 outl(ep->tx_threshold, ioaddr + TxThresh);
824 outl(ep->mii.full_duplex ? 0x7F : 0x79, ioaddr + TxCtrl);
825 outl(ep->rx_ring_dma + (ep->cur_rx%RX_RING_SIZE)*
826 sizeof(struct epic_rx_desc), ioaddr + PRxCDAR);
827 outl(ep->tx_ring_dma + (ep->dirty_tx%TX_RING_SIZE)*
828 sizeof(struct epic_tx_desc), ioaddr + PTxCDAR);
829
830 /* Start the chip's Rx process. */
831 set_rx_mode(dev);
832 outl(StartRx | RxQueued, ioaddr + COMMAND);
833
834 /* Enable interrupts by setting the interrupt mask. */
835 outl((ep->chip_flags & TYPE2_INTR ? PCIBusErr175 : PCIBusErr170)
836 | CntFull | TxUnderrun
837 | RxError | RxHeader | EpicNapiEvent, ioaddr + INTMASK);
838
839 printk(KERN_DEBUG "%s: epic_restart() done, cmd status %4.4x, ctl %4.4x"
840 " interrupt %4.4x.\n",
841 dev->name, (int)inl(ioaddr + COMMAND), (int)inl(ioaddr + GENCTL),
842 (int)inl(ioaddr + INTSTAT));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700843}
844
845static void check_media(struct net_device *dev)
846{
Wang Chen4cf16532008-11-12 23:38:14 -0800847 struct epic_private *ep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700848 long ioaddr = dev->base_addr;
849 int mii_lpa = ep->mii_phy_cnt ? mdio_read(dev, ep->phys[0], MII_LPA) : 0;
850 int negotiated = mii_lpa & ep->mii.advertising;
851 int duplex = (negotiated & 0x0100) || (negotiated & 0x01C0) == 0x0040;
852
853 if (ep->mii.force_media)
854 return;
855 if (mii_lpa == 0xffff) /* Bogus read */
856 return;
857 if (ep->mii.full_duplex != duplex) {
858 ep->mii.full_duplex = duplex;
859 printk(KERN_INFO "%s: Setting %s-duplex based on MII #%d link"
860 " partner capability of %4.4x.\n", dev->name,
861 ep->mii.full_duplex ? "full" : "half", ep->phys[0], mii_lpa);
862 outl(ep->mii.full_duplex ? 0x7F : 0x79, ioaddr + TxCtrl);
863 }
864}
865
866static void epic_timer(unsigned long data)
867{
868 struct net_device *dev = (struct net_device *)data;
Wang Chen4cf16532008-11-12 23:38:14 -0800869 struct epic_private *ep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700870 long ioaddr = dev->base_addr;
871 int next_tick = 5*HZ;
872
873 if (debug > 3) {
874 printk(KERN_DEBUG "%s: Media monitor tick, Tx status %8.8x.\n",
875 dev->name, (int)inl(ioaddr + TxSTAT));
876 printk(KERN_DEBUG "%s: Other registers are IntMask %4.4x "
877 "IntStatus %4.4x RxStatus %4.4x.\n",
878 dev->name, (int)inl(ioaddr + INTMASK),
879 (int)inl(ioaddr + INTSTAT), (int)inl(ioaddr + RxSTAT));
880 }
881
882 check_media(dev);
883
884 ep->timer.expires = jiffies + next_tick;
885 add_timer(&ep->timer);
886}
887
888static void epic_tx_timeout(struct net_device *dev)
889{
Wang Chen4cf16532008-11-12 23:38:14 -0800890 struct epic_private *ep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700891 long ioaddr = dev->base_addr;
892
893 if (debug > 0) {
894 printk(KERN_WARNING "%s: Transmit timeout using MII device, "
895 "Tx status %4.4x.\n",
896 dev->name, (int)inw(ioaddr + TxSTAT));
897 if (debug > 1) {
898 printk(KERN_DEBUG "%s: Tx indices: dirty_tx %d, cur_tx %d.\n",
899 dev->name, ep->dirty_tx, ep->cur_tx);
900 }
901 }
902 if (inw(ioaddr + TxSTAT) & 0x10) { /* Tx FIFO underflow. */
903 ep->stats.tx_fifo_errors++;
904 outl(RestartTx, ioaddr + COMMAND);
905 } else {
906 epic_restart(dev);
907 outl(TxQueued, dev->base_addr + COMMAND);
908 }
909
Eric Dumazet1ae5dc32010-05-10 05:01:31 -0700910 dev->trans_start = jiffies; /* prevent tx timeout */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700911 ep->stats.tx_errors++;
912 if (!ep->tx_full)
913 netif_wake_queue(dev);
914}
915
916/* Initialize the Rx and Tx rings, along with various 'dev' bits. */
917static void epic_init_ring(struct net_device *dev)
918{
Wang Chen4cf16532008-11-12 23:38:14 -0800919 struct epic_private *ep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700920 int i;
921
922 ep->tx_full = 0;
923 ep->dirty_tx = ep->cur_tx = 0;
924 ep->cur_rx = ep->dirty_rx = 0;
925 ep->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
926
927 /* Initialize all Rx descriptors. */
928 for (i = 0; i < RX_RING_SIZE; i++) {
929 ep->rx_ring[i].rxstatus = 0;
Al Viro9ebfd492008-03-16 22:22:04 +0000930 ep->rx_ring[i].buflength = ep->rx_buf_sz;
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400931 ep->rx_ring[i].next = ep->rx_ring_dma +
Linus Torvalds1da177e2005-04-16 15:20:36 -0700932 (i+1)*sizeof(struct epic_rx_desc);
933 ep->rx_skbuff[i] = NULL;
934 }
935 /* Mark the last entry as wrapping the ring. */
936 ep->rx_ring[i-1].next = ep->rx_ring_dma;
937
938 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
939 for (i = 0; i < RX_RING_SIZE; i++) {
940 struct sk_buff *skb = dev_alloc_skb(ep->rx_buf_sz);
941 ep->rx_skbuff[i] = skb;
942 if (skb == NULL)
943 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700944 skb_reserve(skb, 2); /* 16 byte align the IP header. */
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400945 ep->rx_ring[i].bufaddr = pci_map_single(ep->pci_dev,
David S. Miller689be432005-06-28 15:25:31 -0700946 skb->data, ep->rx_buf_sz, PCI_DMA_FROMDEVICE);
Al Viro9ebfd492008-03-16 22:22:04 +0000947 ep->rx_ring[i].rxstatus = DescOwn;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700948 }
949 ep->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
950
951 /* The Tx buffer descriptor is filled in as needed, but we
952 do need to clear the ownership bit. */
953 for (i = 0; i < TX_RING_SIZE; i++) {
954 ep->tx_skbuff[i] = NULL;
955 ep->tx_ring[i].txstatus = 0x0000;
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400956 ep->tx_ring[i].next = ep->tx_ring_dma +
Linus Torvalds1da177e2005-04-16 15:20:36 -0700957 (i+1)*sizeof(struct epic_tx_desc);
958 }
959 ep->tx_ring[i-1].next = ep->tx_ring_dma;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700960}
961
Stephen Hemminger613573252009-08-31 19:50:58 +0000962static netdev_tx_t epic_start_xmit(struct sk_buff *skb, struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700963{
Wang Chen4cf16532008-11-12 23:38:14 -0800964 struct epic_private *ep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700965 int entry, free_count;
966 u32 ctrl_word;
967 unsigned long flags;
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400968
Herbert Xu5b057c62006-06-23 02:06:41 -0700969 if (skb_padto(skb, ETH_ZLEN))
Patrick McHardy6ed10652009-06-23 06:03:08 +0000970 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700971
972 /* Caution: the write order is important here, set the field with the
973 "ownership" bit last. */
974
975 /* Calculate the next Tx descriptor entry. */
976 spin_lock_irqsave(&ep->lock, flags);
977 free_count = ep->cur_tx - ep->dirty_tx;
978 entry = ep->cur_tx % TX_RING_SIZE;
979
980 ep->tx_skbuff[entry] = skb;
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400981 ep->tx_ring[entry].bufaddr = pci_map_single(ep->pci_dev, skb->data,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700982 skb->len, PCI_DMA_TODEVICE);
983 if (free_count < TX_QUEUE_LEN/2) {/* Typical path */
Al Viro9ebfd492008-03-16 22:22:04 +0000984 ctrl_word = 0x100000; /* No interrupt */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700985 } else if (free_count == TX_QUEUE_LEN/2) {
Al Viro9ebfd492008-03-16 22:22:04 +0000986 ctrl_word = 0x140000; /* Tx-done intr. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700987 } else if (free_count < TX_QUEUE_LEN - 1) {
Al Viro9ebfd492008-03-16 22:22:04 +0000988 ctrl_word = 0x100000; /* No Tx-done intr. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700989 } else {
990 /* Leave room for an additional entry. */
Al Viro9ebfd492008-03-16 22:22:04 +0000991 ctrl_word = 0x140000; /* Tx-done intr. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700992 ep->tx_full = 1;
993 }
Al Viro9ebfd492008-03-16 22:22:04 +0000994 ep->tx_ring[entry].buflength = ctrl_word | skb->len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700995 ep->tx_ring[entry].txstatus =
996 ((skb->len >= ETH_ZLEN ? skb->len : ETH_ZLEN) << 16)
Al Viro9ebfd492008-03-16 22:22:04 +0000997 | DescOwn;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700998
999 ep->cur_tx++;
1000 if (ep->tx_full)
1001 netif_stop_queue(dev);
1002
1003 spin_unlock_irqrestore(&ep->lock, flags);
1004 /* Trigger an immediate transmit demand. */
1005 outl(TxQueued, dev->base_addr + COMMAND);
1006
Linus Torvalds1da177e2005-04-16 15:20:36 -07001007 if (debug > 4)
1008 printk(KERN_DEBUG "%s: Queued Tx packet size %d to slot %d, "
1009 "flag %2.2x Tx status %8.8x.\n",
1010 dev->name, (int)skb->len, entry, ctrl_word,
1011 (int)inl(dev->base_addr + TxSTAT));
1012
Patrick McHardy6ed10652009-06-23 06:03:08 +00001013 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001014}
1015
1016static void epic_tx_error(struct net_device *dev, struct epic_private *ep,
1017 int status)
1018{
1019 struct net_device_stats *stats = &ep->stats;
1020
1021#ifndef final_version
1022 /* There was an major error, log it. */
1023 if (debug > 1)
1024 printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n",
1025 dev->name, status);
1026#endif
1027 stats->tx_errors++;
1028 if (status & 0x1050)
1029 stats->tx_aborted_errors++;
1030 if (status & 0x0008)
1031 stats->tx_carrier_errors++;
1032 if (status & 0x0040)
1033 stats->tx_window_errors++;
1034 if (status & 0x0010)
1035 stats->tx_fifo_errors++;
1036}
1037
1038static void epic_tx(struct net_device *dev, struct epic_private *ep)
1039{
1040 unsigned int dirty_tx, cur_tx;
1041
1042 /*
1043 * Note: if this lock becomes a problem we can narrow the locked
1044 * region at the cost of occasionally grabbing the lock more times.
1045 */
1046 cur_tx = ep->cur_tx;
1047 for (dirty_tx = ep->dirty_tx; cur_tx - dirty_tx > 0; dirty_tx++) {
1048 struct sk_buff *skb;
1049 int entry = dirty_tx % TX_RING_SIZE;
Al Viro9ebfd492008-03-16 22:22:04 +00001050 int txstatus = ep->tx_ring[entry].txstatus;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001051
1052 if (txstatus & DescOwn)
1053 break; /* It still hasn't been Txed */
1054
1055 if (likely(txstatus & 0x0001)) {
1056 ep->stats.collisions += (txstatus >> 8) & 15;
1057 ep->stats.tx_packets++;
1058 ep->stats.tx_bytes += ep->tx_skbuff[entry]->len;
1059 } else
1060 epic_tx_error(dev, ep, txstatus);
1061
1062 /* Free the original skb. */
1063 skb = ep->tx_skbuff[entry];
Jeff Garzikf3b197a2006-05-26 21:39:03 -04001064 pci_unmap_single(ep->pci_dev, ep->tx_ring[entry].bufaddr,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001065 skb->len, PCI_DMA_TODEVICE);
1066 dev_kfree_skb_irq(skb);
1067 ep->tx_skbuff[entry] = NULL;
1068 }
1069
1070#ifndef final_version
1071 if (cur_tx - dirty_tx > TX_RING_SIZE) {
1072 printk(KERN_WARNING
1073 "%s: Out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
1074 dev->name, dirty_tx, cur_tx, ep->tx_full);
1075 dirty_tx += TX_RING_SIZE;
1076 }
1077#endif
1078 ep->dirty_tx = dirty_tx;
1079 if (ep->tx_full && cur_tx - dirty_tx < TX_QUEUE_LEN - 4) {
1080 /* The ring is no longer full, allow new TX entries. */
1081 ep->tx_full = 0;
1082 netif_wake_queue(dev);
1083 }
1084}
1085
1086/* The interrupt handler does all of the Rx thread work and cleans up
1087 after the Tx thread. */
David Howells7d12e782006-10-05 14:55:46 +01001088static irqreturn_t epic_interrupt(int irq, void *dev_instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001089{
1090 struct net_device *dev = dev_instance;
Wang Chen4cf16532008-11-12 23:38:14 -08001091 struct epic_private *ep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001092 long ioaddr = dev->base_addr;
1093 unsigned int handled = 0;
1094 int status;
1095
1096 status = inl(ioaddr + INTSTAT);
1097 /* Acknowledge all of the current interrupt sources ASAP. */
1098 outl(status & EpicNormalEvent, ioaddr + INTSTAT);
1099
1100 if (debug > 4) {
1101 printk(KERN_DEBUG "%s: Interrupt, status=%#8.8x new "
1102 "intstat=%#8.8x.\n", dev->name, status,
1103 (int)inl(ioaddr + INTSTAT));
1104 }
1105
1106 if ((status & IntrSummary) == 0)
1107 goto out;
1108
1109 handled = 1;
1110
1111 if ((status & EpicNapiEvent) && !ep->reschedule_in_poll) {
1112 spin_lock(&ep->napi_lock);
Ben Hutchings288379f2009-01-19 16:43:59 -08001113 if (napi_schedule_prep(&ep->napi)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001114 epic_napi_irq_off(dev, ep);
Ben Hutchings288379f2009-01-19 16:43:59 -08001115 __napi_schedule(&ep->napi);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001116 } else
1117 ep->reschedule_in_poll++;
1118 spin_unlock(&ep->napi_lock);
1119 }
1120 status &= ~EpicNapiEvent;
1121
1122 /* Check uncommon events all at once. */
1123 if (status & (CntFull | TxUnderrun | PCIBusErr170 | PCIBusErr175)) {
1124 if (status == EpicRemoved)
1125 goto out;
1126
1127 /* Always update the error counts to avoid overhead later. */
1128 ep->stats.rx_missed_errors += inb(ioaddr + MPCNT);
1129 ep->stats.rx_frame_errors += inb(ioaddr + ALICNT);
1130 ep->stats.rx_crc_errors += inb(ioaddr + CRCCNT);
1131
1132 if (status & TxUnderrun) { /* Tx FIFO underflow. */
1133 ep->stats.tx_fifo_errors++;
1134 outl(ep->tx_threshold += 128, ioaddr + TxThresh);
1135 /* Restart the transmit process. */
1136 outl(RestartTx, ioaddr + COMMAND);
1137 }
1138 if (status & PCIBusErr170) {
1139 printk(KERN_ERR "%s: PCI Bus Error! status %4.4x.\n",
1140 dev->name, status);
1141 epic_pause(dev);
1142 epic_restart(dev);
1143 }
1144 /* Clear all error sources. */
1145 outl(status & 0x7f18, ioaddr + INTSTAT);
1146 }
1147
1148out:
1149 if (debug > 3) {
1150 printk(KERN_DEBUG "%s: exit interrupt, intr_status=%#4.4x.\n",
1151 dev->name, status);
1152 }
1153
1154 return IRQ_RETVAL(handled);
1155}
1156
1157static int epic_rx(struct net_device *dev, int budget)
1158{
Wang Chen4cf16532008-11-12 23:38:14 -08001159 struct epic_private *ep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001160 int entry = ep->cur_rx % RX_RING_SIZE;
1161 int rx_work_limit = ep->dirty_rx + RX_RING_SIZE - ep->cur_rx;
1162 int work_done = 0;
1163
1164 if (debug > 4)
1165 printk(KERN_DEBUG " In epic_rx(), entry %d %8.8x.\n", entry,
1166 ep->rx_ring[entry].rxstatus);
1167
1168 if (rx_work_limit > budget)
1169 rx_work_limit = budget;
1170
1171 /* If we own the next entry, it's a new packet. Send it up. */
Al Viro9ebfd492008-03-16 22:22:04 +00001172 while ((ep->rx_ring[entry].rxstatus & DescOwn) == 0) {
1173 int status = ep->rx_ring[entry].rxstatus;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001174
1175 if (debug > 4)
1176 printk(KERN_DEBUG " epic_rx() status was %8.8x.\n", status);
1177 if (--rx_work_limit < 0)
1178 break;
1179 if (status & 0x2006) {
1180 if (debug > 2)
1181 printk(KERN_DEBUG "%s: epic_rx() error status was %8.8x.\n",
1182 dev->name, status);
1183 if (status & 0x2000) {
1184 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1185 "multiple buffers, status %4.4x!\n", dev->name, status);
1186 ep->stats.rx_length_errors++;
1187 } else if (status & 0x0006)
1188 /* Rx Frame errors are counted in hardware. */
1189 ep->stats.rx_errors++;
1190 } else {
1191 /* Malloc up new buffer, compatible with net-2e. */
1192 /* Omit the four octet CRC from the length. */
1193 short pkt_len = (status >> 16) - 4;
1194 struct sk_buff *skb;
1195
1196 if (pkt_len > PKT_BUF_SZ - 4) {
1197 printk(KERN_ERR "%s: Oversized Ethernet frame, status %x "
1198 "%d bytes.\n",
1199 dev->name, status, pkt_len);
1200 pkt_len = 1514;
1201 }
1202 /* Check if the packet is long enough to accept without copying
1203 to a minimally-sized skbuff. */
Joe Perches8e95a202009-12-03 07:58:21 +00001204 if (pkt_len < rx_copybreak &&
1205 (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001206 skb_reserve(skb, 2); /* 16 byte align the IP header */
1207 pci_dma_sync_single_for_cpu(ep->pci_dev,
1208 ep->rx_ring[entry].bufaddr,
1209 ep->rx_buf_sz,
1210 PCI_DMA_FROMDEVICE);
David S. Miller8c7b7fa2007-07-10 22:08:12 -07001211 skb_copy_to_linear_data(skb, ep->rx_skbuff[entry]->data, pkt_len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001212 skb_put(skb, pkt_len);
1213 pci_dma_sync_single_for_device(ep->pci_dev,
1214 ep->rx_ring[entry].bufaddr,
1215 ep->rx_buf_sz,
1216 PCI_DMA_FROMDEVICE);
1217 } else {
Jeff Garzikf3b197a2006-05-26 21:39:03 -04001218 pci_unmap_single(ep->pci_dev,
1219 ep->rx_ring[entry].bufaddr,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001220 ep->rx_buf_sz, PCI_DMA_FROMDEVICE);
1221 skb_put(skb = ep->rx_skbuff[entry], pkt_len);
1222 ep->rx_skbuff[entry] = NULL;
1223 }
1224 skb->protocol = eth_type_trans(skb, dev);
1225 netif_receive_skb(skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001226 ep->stats.rx_packets++;
1227 ep->stats.rx_bytes += pkt_len;
1228 }
1229 work_done++;
1230 entry = (++ep->cur_rx) % RX_RING_SIZE;
1231 }
1232
1233 /* Refill the Rx ring buffers. */
1234 for (; ep->cur_rx - ep->dirty_rx > 0; ep->dirty_rx++) {
1235 entry = ep->dirty_rx % RX_RING_SIZE;
1236 if (ep->rx_skbuff[entry] == NULL) {
1237 struct sk_buff *skb;
1238 skb = ep->rx_skbuff[entry] = dev_alloc_skb(ep->rx_buf_sz);
1239 if (skb == NULL)
1240 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001241 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
Jeff Garzikf3b197a2006-05-26 21:39:03 -04001242 ep->rx_ring[entry].bufaddr = pci_map_single(ep->pci_dev,
David S. Miller689be432005-06-28 15:25:31 -07001243 skb->data, ep->rx_buf_sz, PCI_DMA_FROMDEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001244 work_done++;
1245 }
Al Viro9ebfd492008-03-16 22:22:04 +00001246 /* AV: shouldn't we add a barrier here? */
1247 ep->rx_ring[entry].rxstatus = DescOwn;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001248 }
1249 return work_done;
1250}
1251
1252static void epic_rx_err(struct net_device *dev, struct epic_private *ep)
1253{
1254 long ioaddr = dev->base_addr;
1255 int status;
1256
1257 status = inl(ioaddr + INTSTAT);
1258
1259 if (status == EpicRemoved)
1260 return;
1261 if (status & RxOverflow) /* Missed a Rx frame. */
1262 ep->stats.rx_errors++;
1263 if (status & (RxOverflow | RxFull))
1264 outw(RxQueued, ioaddr + COMMAND);
1265}
1266
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001267static int epic_poll(struct napi_struct *napi, int budget)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001268{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001269 struct epic_private *ep = container_of(napi, struct epic_private, napi);
1270 struct net_device *dev = ep->mii.dev;
1271 int work_done = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001272 long ioaddr = dev->base_addr;
1273
Linus Torvalds1da177e2005-04-16 15:20:36 -07001274rx_action:
1275
1276 epic_tx(dev, ep);
1277
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001278 work_done += epic_rx(dev, budget);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001279
1280 epic_rx_err(dev, ep);
1281
David S. Miller4ec24112008-01-07 20:48:21 -08001282 if (work_done < budget) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001283 unsigned long flags;
1284 int more;
1285
1286 /* A bit baroque but it avoids a (space hungry) spin_unlock */
1287
1288 spin_lock_irqsave(&ep->napi_lock, flags);
1289
1290 more = ep->reschedule_in_poll;
1291 if (!more) {
Ben Hutchings288379f2009-01-19 16:43:59 -08001292 __napi_complete(napi);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001293 outl(EpicNapiEvent, ioaddr + INTSTAT);
1294 epic_napi_irq_on(dev, ep);
1295 } else
1296 ep->reschedule_in_poll--;
1297
1298 spin_unlock_irqrestore(&ep->napi_lock, flags);
1299
1300 if (more)
1301 goto rx_action;
1302 }
1303
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001304 return work_done;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001305}
1306
1307static int epic_close(struct net_device *dev)
1308{
1309 long ioaddr = dev->base_addr;
Wang Chen4cf16532008-11-12 23:38:14 -08001310 struct epic_private *ep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001311 struct sk_buff *skb;
1312 int i;
1313
1314 netif_stop_queue(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001315 napi_disable(&ep->napi);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001316
1317 if (debug > 1)
1318 printk(KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
1319 dev->name, (int)inl(ioaddr + INTSTAT));
1320
1321 del_timer_sync(&ep->timer);
1322
1323 epic_disable_int(dev, ep);
1324
1325 free_irq(dev->irq, dev);
1326
1327 epic_pause(dev);
1328
1329 /* Free all the skbuffs in the Rx queue. */
1330 for (i = 0; i < RX_RING_SIZE; i++) {
1331 skb = ep->rx_skbuff[i];
1332 ep->rx_skbuff[i] = NULL;
1333 ep->rx_ring[i].rxstatus = 0; /* Not owned by Epic chip. */
1334 ep->rx_ring[i].buflength = 0;
1335 if (skb) {
Jeff Garzikf3b197a2006-05-26 21:39:03 -04001336 pci_unmap_single(ep->pci_dev, ep->rx_ring[i].bufaddr,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001337 ep->rx_buf_sz, PCI_DMA_FROMDEVICE);
1338 dev_kfree_skb(skb);
1339 }
1340 ep->rx_ring[i].bufaddr = 0xBADF00D0; /* An invalid address. */
1341 }
1342 for (i = 0; i < TX_RING_SIZE; i++) {
1343 skb = ep->tx_skbuff[i];
1344 ep->tx_skbuff[i] = NULL;
1345 if (!skb)
1346 continue;
Jeff Garzikf3b197a2006-05-26 21:39:03 -04001347 pci_unmap_single(ep->pci_dev, ep->tx_ring[i].bufaddr,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001348 skb->len, PCI_DMA_TODEVICE);
1349 dev_kfree_skb(skb);
1350 }
1351
1352 /* Green! Leave the chip in low-power mode. */
1353 outl(0x0008, ioaddr + GENCTL);
1354
1355 return 0;
1356}
1357
1358static struct net_device_stats *epic_get_stats(struct net_device *dev)
1359{
Wang Chen4cf16532008-11-12 23:38:14 -08001360 struct epic_private *ep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001361 long ioaddr = dev->base_addr;
1362
1363 if (netif_running(dev)) {
1364 /* Update the error counts. */
1365 ep->stats.rx_missed_errors += inb(ioaddr + MPCNT);
1366 ep->stats.rx_frame_errors += inb(ioaddr + ALICNT);
1367 ep->stats.rx_crc_errors += inb(ioaddr + CRCCNT);
1368 }
1369
1370 return &ep->stats;
1371}
1372
1373/* Set or clear the multicast filter for this adaptor.
1374 Note that we only use exclusion around actually queueing the
1375 new frame, not around filling ep->setup_frame. This is non-deterministic
1376 when re-entered but still correct. */
1377
1378static void set_rx_mode(struct net_device *dev)
1379{
1380 long ioaddr = dev->base_addr;
Wang Chen4cf16532008-11-12 23:38:14 -08001381 struct epic_private *ep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001382 unsigned char mc_filter[8]; /* Multicast hash filter */
1383 int i;
1384
1385 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1386 outl(0x002C, ioaddr + RxCtrl);
1387 /* Unconditionally log net taps. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001388 memset(mc_filter, 0xff, sizeof(mc_filter));
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00001389 } else if ((!netdev_mc_empty(dev)) || (dev->flags & IFF_ALLMULTI)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001390 /* There is apparently a chip bug, so the multicast filter
1391 is never enabled. */
1392 /* Too many to filter perfectly -- accept all multicasts. */
1393 memset(mc_filter, 0xff, sizeof(mc_filter));
1394 outl(0x000C, ioaddr + RxCtrl);
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00001395 } else if (netdev_mc_empty(dev)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001396 outl(0x0004, ioaddr + RxCtrl);
1397 return;
1398 } else { /* Never executed, for now. */
Jiri Pirko22bedad32010-04-01 21:22:57 +00001399 struct netdev_hw_addr *ha;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001400
1401 memset(mc_filter, 0, sizeof(mc_filter));
Jiri Pirko22bedad32010-04-01 21:22:57 +00001402 netdev_for_each_mc_addr(ha, dev) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001403 unsigned int bit_nr =
Jiri Pirko22bedad32010-04-01 21:22:57 +00001404 ether_crc_le(ETH_ALEN, ha->addr) & 0x3f;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001405 mc_filter[bit_nr >> 3] |= (1 << bit_nr);
1406 }
1407 }
1408 /* ToDo: perhaps we need to stop the Tx and Rx process here? */
1409 if (memcmp(mc_filter, ep->mc_filter, sizeof(mc_filter))) {
1410 for (i = 0; i < 4; i++)
1411 outw(((u16 *)mc_filter)[i], ioaddr + MC0 + i*4);
1412 memcpy(ep->mc_filter, mc_filter, sizeof(mc_filter));
1413 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001414}
1415
1416static void netdev_get_drvinfo (struct net_device *dev, struct ethtool_drvinfo *info)
1417{
Wang Chen4cf16532008-11-12 23:38:14 -08001418 struct epic_private *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001419
1420 strcpy (info->driver, DRV_NAME);
1421 strcpy (info->version, DRV_VERSION);
1422 strcpy (info->bus_info, pci_name(np->pci_dev));
1423}
1424
1425static int netdev_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1426{
Wang Chen4cf16532008-11-12 23:38:14 -08001427 struct epic_private *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001428 int rc;
1429
1430 spin_lock_irq(&np->lock);
1431 rc = mii_ethtool_gset(&np->mii, cmd);
1432 spin_unlock_irq(&np->lock);
1433
1434 return rc;
1435}
1436
1437static int netdev_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1438{
Wang Chen4cf16532008-11-12 23:38:14 -08001439 struct epic_private *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001440 int rc;
1441
1442 spin_lock_irq(&np->lock);
1443 rc = mii_ethtool_sset(&np->mii, cmd);
1444 spin_unlock_irq(&np->lock);
1445
1446 return rc;
1447}
1448
1449static int netdev_nway_reset(struct net_device *dev)
1450{
Wang Chen4cf16532008-11-12 23:38:14 -08001451 struct epic_private *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001452 return mii_nway_restart(&np->mii);
1453}
1454
1455static u32 netdev_get_link(struct net_device *dev)
1456{
Wang Chen4cf16532008-11-12 23:38:14 -08001457 struct epic_private *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001458 return mii_link_ok(&np->mii);
1459}
1460
1461static u32 netdev_get_msglevel(struct net_device *dev)
1462{
1463 return debug;
1464}
1465
1466static void netdev_set_msglevel(struct net_device *dev, u32 value)
1467{
1468 debug = value;
1469}
1470
1471static int ethtool_begin(struct net_device *dev)
1472{
1473 unsigned long ioaddr = dev->base_addr;
1474 /* power-up, if interface is down */
1475 if (! netif_running(dev)) {
1476 outl(0x0200, ioaddr + GENCTL);
1477 outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL);
1478 }
1479 return 0;
1480}
1481
1482static void ethtool_complete(struct net_device *dev)
1483{
1484 unsigned long ioaddr = dev->base_addr;
1485 /* power-down, if interface is down */
1486 if (! netif_running(dev)) {
1487 outl(0x0008, ioaddr + GENCTL);
1488 outl((inl(ioaddr + NVCTL) & ~0x483C) | 0x0000, ioaddr + NVCTL);
1489 }
1490}
1491
Jeff Garzik7282d492006-09-13 14:30:00 -04001492static const struct ethtool_ops netdev_ethtool_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001493 .get_drvinfo = netdev_get_drvinfo,
1494 .get_settings = netdev_get_settings,
1495 .set_settings = netdev_set_settings,
1496 .nway_reset = netdev_nway_reset,
1497 .get_link = netdev_get_link,
1498 .get_msglevel = netdev_get_msglevel,
1499 .set_msglevel = netdev_set_msglevel,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001500 .begin = ethtool_begin,
1501 .complete = ethtool_complete
1502};
1503
1504static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1505{
Wang Chen4cf16532008-11-12 23:38:14 -08001506 struct epic_private *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001507 long ioaddr = dev->base_addr;
1508 struct mii_ioctl_data *data = if_mii(rq);
1509 int rc;
1510
1511 /* power-up, if interface is down */
1512 if (! netif_running(dev)) {
1513 outl(0x0200, ioaddr + GENCTL);
1514 outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL);
1515 }
1516
1517 /* all non-ethtool ioctls (the SIOC[GS]MIIxxx ioctls) */
1518 spin_lock_irq(&np->lock);
1519 rc = generic_mii_ioctl(&np->mii, data, cmd, NULL);
1520 spin_unlock_irq(&np->lock);
1521
1522 /* power-down, if interface is down */
1523 if (! netif_running(dev)) {
1524 outl(0x0008, ioaddr + GENCTL);
1525 outl((inl(ioaddr + NVCTL) & ~0x483C) | 0x0000, ioaddr + NVCTL);
1526 }
1527 return rc;
1528}
1529
1530
1531static void __devexit epic_remove_one (struct pci_dev *pdev)
1532{
1533 struct net_device *dev = pci_get_drvdata(pdev);
Wang Chen4cf16532008-11-12 23:38:14 -08001534 struct epic_private *ep = netdev_priv(dev);
Jeff Garzikf3b197a2006-05-26 21:39:03 -04001535
Linus Torvalds1da177e2005-04-16 15:20:36 -07001536 pci_free_consistent(pdev, TX_TOTAL_SIZE, ep->tx_ring, ep->tx_ring_dma);
1537 pci_free_consistent(pdev, RX_TOTAL_SIZE, ep->rx_ring, ep->rx_ring_dma);
1538 unregister_netdev(dev);
1539#ifndef USE_IO_OPS
1540 iounmap((void*) dev->base_addr);
1541#endif
1542 pci_release_regions(pdev);
1543 free_netdev(dev);
1544 pci_disable_device(pdev);
1545 pci_set_drvdata(pdev, NULL);
1546 /* pci_power_off(pdev, -1); */
1547}
1548
1549
1550#ifdef CONFIG_PM
1551
1552static int epic_suspend (struct pci_dev *pdev, pm_message_t state)
1553{
1554 struct net_device *dev = pci_get_drvdata(pdev);
1555 long ioaddr = dev->base_addr;
1556
1557 if (!netif_running(dev))
1558 return 0;
1559 epic_pause(dev);
1560 /* Put the chip into low-power mode. */
1561 outl(0x0008, ioaddr + GENCTL);
1562 /* pci_power_off(pdev, -1); */
1563 return 0;
1564}
1565
1566
1567static int epic_resume (struct pci_dev *pdev)
1568{
1569 struct net_device *dev = pci_get_drvdata(pdev);
1570
1571 if (!netif_running(dev))
1572 return 0;
1573 epic_restart(dev);
1574 /* pci_power_on(pdev); */
1575 return 0;
1576}
1577
1578#endif /* CONFIG_PM */
1579
1580
1581static struct pci_driver epic_driver = {
1582 .name = DRV_NAME,
1583 .id_table = epic_pci_tbl,
1584 .probe = epic_init_one,
1585 .remove = __devexit_p(epic_remove_one),
1586#ifdef CONFIG_PM
1587 .suspend = epic_suspend,
1588 .resume = epic_resume,
1589#endif /* CONFIG_PM */
1590};
1591
1592
1593static int __init epic_init (void)
1594{
1595/* when a module, this is printed whether or not devices are found in probe */
1596#ifdef MODULE
Joe Perchesad361c92009-07-06 13:05:40 -07001597 printk (KERN_INFO "%s%s",
Markus Dahms2c2a8c52007-05-09 07:58:10 +02001598 version, version2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001599#endif
1600
Jeff Garzik29917622006-08-19 17:48:59 -04001601 return pci_register_driver(&epic_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001602}
1603
1604
1605static void __exit epic_cleanup (void)
1606{
1607 pci_unregister_driver (&epic_driver);
1608}
1609
1610
1611module_init(epic_init);
1612module_exit(epic_cleanup);