blob: 154cc84381c23d07374a4a411bd4f4a7146606f5 [file] [log] [blame]
Dan Williams9bc89cd2007-01-02 11:10:44 -07001/*
2 * xor offload engine api
3 *
4 * Copyright © 2006, Intel Corporation.
5 *
6 * Dan Williams <dan.j.williams@intel.com>
7 *
8 * with architecture considerations by:
9 * Neil Brown <neilb@suse.de>
10 * Jeff Garzik <jeff@garzik.org>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * more details.
20 *
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24 *
25 */
26#include <linux/kernel.h>
27#include <linux/interrupt.h>
Paul Gortmaker4bb33cc2011-05-27 14:41:48 -040028#include <linux/module.h>
Dan Williams9bc89cd2007-01-02 11:10:44 -070029#include <linux/mm.h>
30#include <linux/dma-mapping.h>
31#include <linux/raid/xor.h>
32#include <linux/async_tx.h>
33
Dan Williams06164f32009-03-25 09:13:25 -070034/* do_async_xor - dma map the pages and perform the xor with an engine */
35static __async_inline struct dma_async_tx_descriptor *
Dan Williams1e55db22008-07-16 19:44:56 -070036do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list,
Dan Williams04ce9ab2009-06-03 14:22:28 -070037 unsigned int offset, int src_cnt, size_t len, dma_addr_t *dma_src,
Dan Williamsa08abd82009-06-03 11:43:59 -070038 struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -070039{
Dan Williams1e55db22008-07-16 19:44:56 -070040 struct dma_device *dma = chan->device;
Dan Williams1e55db22008-07-16 19:44:56 -070041 struct dma_async_tx_descriptor *tx = NULL;
42 int src_off = 0;
Dan Williams9bc89cd2007-01-02 11:10:44 -070043 int i;
Dan Williamsa08abd82009-06-03 11:43:59 -070044 dma_async_tx_callback cb_fn_orig = submit->cb_fn;
45 void *cb_param_orig = submit->cb_param;
46 enum async_tx_flags flags_orig = submit->flags;
Dan Williams1e55db22008-07-16 19:44:56 -070047 enum dma_ctrl_flags dma_flags;
NeilBrownb2141e62009-10-16 16:40:34 +110048 int xor_src_cnt = 0;
Dan Williams1e55db22008-07-16 19:44:56 -070049 dma_addr_t dma_dest;
Dan Williams9bc89cd2007-01-02 11:10:44 -070050
Dan Williamsa06d5682008-12-08 13:46:00 -070051 /* map the dest bidrectional in case it is re-used as a source */
52 dma_dest = dma_map_page(dma->dev, dest, offset, len, DMA_BIDIRECTIONAL);
53 for (i = 0; i < src_cnt; i++) {
54 /* only map the dest once */
NeilBrownb2141e62009-10-16 16:40:34 +110055 if (!src_list[i])
56 continue;
Dan Williamsa06d5682008-12-08 13:46:00 -070057 if (unlikely(src_list[i] == dest)) {
NeilBrownb2141e62009-10-16 16:40:34 +110058 dma_src[xor_src_cnt++] = dma_dest;
Dan Williamsa06d5682008-12-08 13:46:00 -070059 continue;
60 }
NeilBrownb2141e62009-10-16 16:40:34 +110061 dma_src[xor_src_cnt++] = dma_map_page(dma->dev, src_list[i], offset,
62 len, DMA_TO_DEVICE);
Dan Williamsa06d5682008-12-08 13:46:00 -070063 }
NeilBrownb2141e62009-10-16 16:40:34 +110064 src_cnt = xor_src_cnt;
Dan Williams00367312008-02-02 19:49:57 -070065
Dan Williams1e55db22008-07-16 19:44:56 -070066 while (src_cnt) {
Dan Williamsa08abd82009-06-03 11:43:59 -070067 submit->flags = flags_orig;
Dan Williams1e55db22008-07-16 19:44:56 -070068 dma_flags = 0;
Dan Williamsb2f46fd2009-07-14 12:20:36 -070069 xor_src_cnt = min(src_cnt, (int)dma->max_xor);
Dan Williams1e55db22008-07-16 19:44:56 -070070 /* if we are submitting additional xors, leave the chain open,
71 * clear the callback parameters, and leave the destination
72 * buffer mapped
73 */
74 if (src_cnt > xor_src_cnt) {
Dan Williamsa08abd82009-06-03 11:43:59 -070075 submit->flags &= ~ASYNC_TX_ACK;
Dan Williams0403e382009-09-08 17:42:50 -070076 submit->flags |= ASYNC_TX_FENCE;
Dan Williams1e55db22008-07-16 19:44:56 -070077 dma_flags = DMA_COMPL_SKIP_DEST_UNMAP;
Dan Williamsa08abd82009-06-03 11:43:59 -070078 submit->cb_fn = NULL;
79 submit->cb_param = NULL;
Dan Williams1e55db22008-07-16 19:44:56 -070080 } else {
Dan Williamsa08abd82009-06-03 11:43:59 -070081 submit->cb_fn = cb_fn_orig;
82 submit->cb_param = cb_param_orig;
Dan Williams1e55db22008-07-16 19:44:56 -070083 }
Dan Williamsa08abd82009-06-03 11:43:59 -070084 if (submit->cb_fn)
Dan Williams1e55db22008-07-16 19:44:56 -070085 dma_flags |= DMA_PREP_INTERRUPT;
Dan Williams0403e382009-09-08 17:42:50 -070086 if (submit->flags & ASYNC_TX_FENCE)
87 dma_flags |= DMA_PREP_FENCE;
Dan Williams1e55db22008-07-16 19:44:56 -070088 /* Since we have clobbered the src_list we are committed
89 * to doing this asynchronously. Drivers force forward progress
90 * in case they can not provide a descriptor
91 */
92 tx = dma->device_prep_dma_xor(chan, dma_dest, &dma_src[src_off],
93 xor_src_cnt, len, dma_flags);
94
Dan Williams669ab0b2008-07-17 17:59:55 -070095 if (unlikely(!tx))
Dan Williamsa08abd82009-06-03 11:43:59 -070096 async_tx_quiesce(&submit->depend_tx);
Dan Williams00367312008-02-02 19:49:57 -070097
Lucas De Marchi25985ed2011-03-30 22:57:33 -030098 /* spin wait for the preceding transactions to complete */
Dan Williams669ab0b2008-07-17 17:59:55 -070099 while (unlikely(!tx)) {
100 dma_async_issue_pending(chan);
Dan Williams1e55db22008-07-16 19:44:56 -0700101 tx = dma->device_prep_dma_xor(chan, dma_dest,
102 &dma_src[src_off],
103 xor_src_cnt, len,
104 dma_flags);
Dan Williams669ab0b2008-07-17 17:59:55 -0700105 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700106
Dan Williamsa08abd82009-06-03 11:43:59 -0700107 async_tx_submit(chan, tx, submit);
108 submit->depend_tx = tx;
Dan Williams1e55db22008-07-16 19:44:56 -0700109
110 if (src_cnt > xor_src_cnt) {
111 /* drop completed sources */
112 src_cnt -= xor_src_cnt;
113 src_off += xor_src_cnt;
114
115 /* use the intermediate result a source */
116 dma_src[--src_off] = dma_dest;
117 src_cnt++;
118 } else
119 break;
120 }
Dan Williams00367312008-02-02 19:49:57 -0700121
122 return tx;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700123}
124
125static void
126do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset,
Dan Williamsa08abd82009-06-03 11:43:59 -0700127 int src_cnt, size_t len, struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700128{
Dan Williams9bc89cd2007-01-02 11:10:44 -0700129 int i;
NeilBrownb2141e62009-10-16 16:40:34 +1100130 int xor_src_cnt = 0;
Dan Williams1e55db22008-07-16 19:44:56 -0700131 int src_off = 0;
132 void *dest_buf;
Dan Williams04ce9ab2009-06-03 14:22:28 -0700133 void **srcs;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700134
Dan Williams04ce9ab2009-06-03 14:22:28 -0700135 if (submit->scribble)
136 srcs = submit->scribble;
137 else
138 srcs = (void **) src_list;
139
140 /* convert to buffer pointers */
Dan Williams9bc89cd2007-01-02 11:10:44 -0700141 for (i = 0; i < src_cnt; i++)
NeilBrownb2141e62009-10-16 16:40:34 +1100142 if (src_list[i])
143 srcs[xor_src_cnt++] = page_address(src_list[i]) + offset;
144 src_cnt = xor_src_cnt;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700145 /* set destination address */
Dan Williams1e55db22008-07-16 19:44:56 -0700146 dest_buf = page_address(dest) + offset;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700147
Dan Williamsa08abd82009-06-03 11:43:59 -0700148 if (submit->flags & ASYNC_TX_XOR_ZERO_DST)
Dan Williams1e55db22008-07-16 19:44:56 -0700149 memset(dest_buf, 0, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700150
Dan Williams1e55db22008-07-16 19:44:56 -0700151 while (src_cnt > 0) {
152 /* process up to 'MAX_XOR_BLOCKS' sources */
153 xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS);
154 xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]);
155
156 /* drop completed sources */
157 src_cnt -= xor_src_cnt;
158 src_off += xor_src_cnt;
159 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700160
Dan Williamsa08abd82009-06-03 11:43:59 -0700161 async_tx_sync_epilog(submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700162}
163
164/**
165 * async_xor - attempt to xor a set of blocks with a dma engine.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700166 * @dest: destination page
Dan Williamsa08abd82009-06-03 11:43:59 -0700167 * @src_list: array of source pages
168 * @offset: common src/dst offset to start transaction
Dan Williams9bc89cd2007-01-02 11:10:44 -0700169 * @src_cnt: number of source pages
170 * @len: length in bytes
Dan Williamsa08abd82009-06-03 11:43:59 -0700171 * @submit: submission / completion modifiers
172 *
173 * honored flags: ASYNC_TX_ACK, ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DST
174 *
175 * xor_blocks always uses the dest as a source so the
176 * ASYNC_TX_XOR_ZERO_DST flag must be set to not include dest data in
177 * the calculation. The assumption with dma eninges is that they only
178 * use the destination buffer as a source when it is explicity specified
179 * in the source list.
180 *
181 * src_list note: if the dest is also a source it must be at index zero.
182 * The contents of this array will be overwritten if a scribble region
183 * is not specified.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700184 */
185struct dma_async_tx_descriptor *
186async_xor(struct page *dest, struct page **src_list, unsigned int offset,
Dan Williamsa08abd82009-06-03 11:43:59 -0700187 int src_cnt, size_t len, struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700188{
Dan Williamsa08abd82009-06-03 11:43:59 -0700189 struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR,
Dan Williams47437b22008-02-02 19:49:59 -0700190 &dest, 1, src_list,
191 src_cnt, len);
Dan Williams04ce9ab2009-06-03 14:22:28 -0700192 dma_addr_t *dma_src = NULL;
193
Dan Williams9bc89cd2007-01-02 11:10:44 -0700194 BUG_ON(src_cnt <= 1);
195
Dan Williams04ce9ab2009-06-03 14:22:28 -0700196 if (submit->scribble)
197 dma_src = submit->scribble;
198 else if (sizeof(dma_addr_t) <= sizeof(struct page *))
199 dma_src = (dma_addr_t *) src_list;
200
Dan Williams83544ae2009-09-08 17:42:53 -0700201 if (dma_src && chan && is_dma_xor_aligned(chan->device, offset, 0, len)) {
Dan Williams1e55db22008-07-16 19:44:56 -0700202 /* run the xor asynchronously */
203 pr_debug("%s (async): len: %zu\n", __func__, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700204
Dan Williams1e55db22008-07-16 19:44:56 -0700205 return do_async_xor(chan, dest, src_list, offset, src_cnt, len,
Dan Williams04ce9ab2009-06-03 14:22:28 -0700206 dma_src, submit);
Dan Williams1e55db22008-07-16 19:44:56 -0700207 } else {
208 /* run the xor synchronously */
209 pr_debug("%s (sync): len: %zu\n", __func__, len);
Dan Williams04ce9ab2009-06-03 14:22:28 -0700210 WARN_ONCE(chan, "%s: no space for dma address conversion\n",
211 __func__);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700212
Dan Williams1e55db22008-07-16 19:44:56 -0700213 /* in the sync case the dest is an implied source
214 * (assumes the dest is the first source)
215 */
Dan Williamsa08abd82009-06-03 11:43:59 -0700216 if (submit->flags & ASYNC_TX_XOR_DROP_DST) {
Dan Williams1e55db22008-07-16 19:44:56 -0700217 src_cnt--;
218 src_list++;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700219 }
220
Dan Williams1e55db22008-07-16 19:44:56 -0700221 /* wait for any prerequisite operations */
Dan Williamsa08abd82009-06-03 11:43:59 -0700222 async_tx_quiesce(&submit->depend_tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700223
Dan Williamsa08abd82009-06-03 11:43:59 -0700224 do_sync_xor(dest, src_list, offset, src_cnt, len, submit);
Dan Williams1e55db22008-07-16 19:44:56 -0700225
226 return NULL;
227 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700228}
229EXPORT_SYMBOL_GPL(async_xor);
230
231static int page_is_zero(struct page *p, unsigned int offset, size_t len)
232{
233 char *a = page_address(p) + offset;
234 return ((*(u32 *) a) == 0 &&
235 memcmp(a, a + 4, len - 4) == 0);
236}
237
Dan Williams7b3cc2b2009-11-19 17:10:37 -0700238static inline struct dma_chan *
239xor_val_chan(struct async_submit_ctl *submit, struct page *dest,
240 struct page **src_list, int src_cnt, size_t len)
241{
242 #ifdef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
243 return NULL;
244 #endif
245 return async_tx_find_channel(submit, DMA_XOR_VAL, &dest, 1, src_list,
246 src_cnt, len);
247}
248
Dan Williams9bc89cd2007-01-02 11:10:44 -0700249/**
Dan Williams099f53c2009-04-08 14:28:37 -0700250 * async_xor_val - attempt a xor parity check with a dma engine.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700251 * @dest: destination page used if the xor is performed synchronously
Dan Williamsa08abd82009-06-03 11:43:59 -0700252 * @src_list: array of source pages
Dan Williams9bc89cd2007-01-02 11:10:44 -0700253 * @offset: offset in pages to start transaction
254 * @src_cnt: number of source pages
255 * @len: length in bytes
256 * @result: 0 if sum == 0 else non-zero
Dan Williamsa08abd82009-06-03 11:43:59 -0700257 * @submit: submission / completion modifiers
258 *
259 * honored flags: ASYNC_TX_ACK
260 *
261 * src_list note: if the dest is also a source it must be at index zero.
262 * The contents of this array will be overwritten if a scribble region
263 * is not specified.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700264 */
265struct dma_async_tx_descriptor *
Dan Williamsa08abd82009-06-03 11:43:59 -0700266async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
Dan Williamsad283ea2009-08-29 19:09:26 -0700267 int src_cnt, size_t len, enum sum_check_flags *result,
Dan Williamsa08abd82009-06-03 11:43:59 -0700268 struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700269{
Dan Williams7b3cc2b2009-11-19 17:10:37 -0700270 struct dma_chan *chan = xor_val_chan(submit, dest, src_list, src_cnt, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700271 struct dma_device *device = chan ? chan->device : NULL;
Dan Williams00367312008-02-02 19:49:57 -0700272 struct dma_async_tx_descriptor *tx = NULL;
Dan Williams04ce9ab2009-06-03 14:22:28 -0700273 dma_addr_t *dma_src = NULL;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700274
275 BUG_ON(src_cnt <= 1);
276
Dan Williams04ce9ab2009-06-03 14:22:28 -0700277 if (submit->scribble)
278 dma_src = submit->scribble;
279 else if (sizeof(dma_addr_t) <= sizeof(struct page *))
280 dma_src = (dma_addr_t *) src_list;
281
Dan Williams83544ae2009-09-08 17:42:53 -0700282 if (dma_src && device && src_cnt <= device->max_xor &&
283 is_dma_xor_aligned(device, offset, 0, len)) {
Dan Williams0403e382009-09-08 17:42:50 -0700284 unsigned long dma_prep_flags = 0;
Dan Williams00367312008-02-02 19:49:57 -0700285 int i;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700286
Dan Williams3280ab3e2008-03-13 17:45:28 -0700287 pr_debug("%s: (async) len: %zu\n", __func__, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700288
Dan Williams0403e382009-09-08 17:42:50 -0700289 if (submit->cb_fn)
290 dma_prep_flags |= DMA_PREP_INTERRUPT;
291 if (submit->flags & ASYNC_TX_FENCE)
292 dma_prep_flags |= DMA_PREP_FENCE;
Dan Williams00367312008-02-02 19:49:57 -0700293 for (i = 0; i < src_cnt; i++)
294 dma_src[i] = dma_map_page(device->dev, src_list[i],
295 offset, len, DMA_TO_DEVICE);
296
Dan Williams099f53c2009-04-08 14:28:37 -0700297 tx = device->device_prep_dma_xor_val(chan, dma_src, src_cnt,
298 len, result,
299 dma_prep_flags);
Dan Williams669ab0b2008-07-17 17:59:55 -0700300 if (unlikely(!tx)) {
Dan Williamsa08abd82009-06-03 11:43:59 -0700301 async_tx_quiesce(&submit->depend_tx);
Dan Williams00367312008-02-02 19:49:57 -0700302
Dan Williamse34a8ae2008-08-05 10:22:05 -0700303 while (!tx) {
Dan Williams669ab0b2008-07-17 17:59:55 -0700304 dma_async_issue_pending(chan);
Dan Williams099f53c2009-04-08 14:28:37 -0700305 tx = device->device_prep_dma_xor_val(chan,
Dan Williams00367312008-02-02 19:49:57 -0700306 dma_src, src_cnt, len, result,
Dan Williamsd4c56f92008-02-02 19:49:58 -0700307 dma_prep_flags);
Dan Williamse34a8ae2008-08-05 10:22:05 -0700308 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700309 }
310
Dan Williamsa08abd82009-06-03 11:43:59 -0700311 async_tx_submit(chan, tx, submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700312 } else {
Dan Williamsa08abd82009-06-03 11:43:59 -0700313 enum async_tx_flags flags_orig = submit->flags;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700314
Dan Williams3280ab3e2008-03-13 17:45:28 -0700315 pr_debug("%s: (sync) len: %zu\n", __func__, len);
Dan Williams04ce9ab2009-06-03 14:22:28 -0700316 WARN_ONCE(device && src_cnt <= device->max_xor,
317 "%s: no space for dma address conversion\n",
318 __func__);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700319
Dan Williamsa08abd82009-06-03 11:43:59 -0700320 submit->flags |= ASYNC_TX_XOR_DROP_DST;
321 submit->flags &= ~ASYNC_TX_ACK;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700322
Dan Williamsa08abd82009-06-03 11:43:59 -0700323 tx = async_xor(dest, src_list, offset, src_cnt, len, submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700324
Dan Williamsd2c52b72008-07-17 17:59:55 -0700325 async_tx_quiesce(&tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700326
Dan Williamsad283ea2009-08-29 19:09:26 -0700327 *result = !page_is_zero(dest, offset, len) << SUM_CHECK_P;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700328
Dan Williamsa08abd82009-06-03 11:43:59 -0700329 async_tx_sync_epilog(submit);
330 submit->flags = flags_orig;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700331 }
332
333 return tx;
334}
Dan Williams099f53c2009-04-08 14:28:37 -0700335EXPORT_SYMBOL_GPL(async_xor_val);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700336
Dan Williams9bc89cd2007-01-02 11:10:44 -0700337MODULE_AUTHOR("Intel Corporation");
338MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api");
339MODULE_LICENSE("GPL");