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Greg Ungererb5aaf3f2005-09-02 10:42:52 +10001/***************************************************************************/
2
3/*
Greg Ungererece9ae62014-08-19 11:55:24 +10004 * m523x.c -- platform support for ColdFire 523x based boards
Greg Ungererb5aaf3f2005-09-02 10:42:52 +10005 *
Lucas De Marchi25985ed2011-03-30 22:57:33 -03006 * Sub-architcture dependent initialization code for the Freescale
Greg Ungererb5aaf3f2005-09-02 10:42:52 +10007 * 523x CPUs.
8 *
9 * Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
11 */
12
13/***************************************************************************/
14
Greg Ungererb5aaf3f2005-09-02 10:42:52 +100015#include <linux/kernel.h>
Greg Ungererb5aaf3f2005-09-02 10:42:52 +100016#include <linux/param.h>
17#include <linux/init.h>
Greg Ungerer4b61a352008-02-01 17:34:15 +100018#include <linux/io.h>
Greg Ungererb5aaf3f2005-09-02 10:42:52 +100019#include <asm/machdep.h>
20#include <asm/coldfire.h>
21#include <asm/mcfsim.h>
Greg Ungerera0f8f8c2012-07-13 15:57:38 +100022#include <asm/mcfclk.h>
23
24/***************************************************************************/
25
26DEFINE_CLK(pll, "pll.0", MCF_CLK);
27DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
28DEFINE_CLK(mcfpit0, "mcfpit.0", MCF_CLK);
29DEFINE_CLK(mcfpit1, "mcfpit.1", MCF_CLK);
30DEFINE_CLK(mcfpit2, "mcfpit.2", MCF_CLK);
31DEFINE_CLK(mcfpit3, "mcfpit.3", MCF_CLK);
32DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
33DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
34DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK);
Steven King74859522014-05-14 10:06:29 -070035DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK);
Greg Ungerera0f8f8c2012-07-13 15:57:38 +100036DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK);
37
38struct clk *mcf_clks[] = {
39 &clk_pll,
40 &clk_sys,
41 &clk_mcfpit0,
42 &clk_mcfpit1,
43 &clk_mcfpit2,
44 &clk_mcfpit3,
45 &clk_mcfuart0,
46 &clk_mcfuart1,
47 &clk_mcfuart2,
Steven King74859522014-05-14 10:06:29 -070048 &clk_mcfqspi0,
Greg Ungerera0f8f8c2012-07-13 15:57:38 +100049 &clk_fec0,
50 NULL
51};
Greg Ungererb5aaf3f2005-09-02 10:42:52 +100052
53/***************************************************************************/
54
Steven King91d60412010-01-22 12:43:03 -080055static void __init m523x_qspi_init(void)
56{
Steven King151d14f2014-05-14 10:07:55 -070057#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
Steven King91d60412010-01-22 12:43:03 -080058 u16 par;
59
60 /* setup QSPS pins for QSPI with gpio CS control */
61 writeb(0x1f, MCFGPIO_PAR_QSPI);
62 /* and CS2 & CS3 as gpio */
63 par = readw(MCFGPIO_PAR_TIMER);
64 par &= 0x3f3f;
65 writew(par, MCFGPIO_PAR_TIMER);
Steven King83ca6002012-05-06 12:22:53 -070066#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
Steven King151d14f2014-05-14 10:07:55 -070067}
Greg Ungerer4b61a352008-02-01 17:34:15 +100068
69/***************************************************************************/
70
Greg Ungerer14c16db2009-08-12 16:14:43 +100071static void __init m523x_fec_init(void)
72{
Greg Ungerer14c16db2009-08-12 16:14:43 +100073 /* Set multi-function pins to ethernet use */
Greg Ungerer98d96962012-09-18 12:14:18 +100074 writeb(readb(MCFGPIO_PAR_FECI2C) | 0xf0, MCFGPIO_PAR_FECI2C);
Greg Ungerer14c16db2009-08-12 16:14:43 +100075}
76
77/***************************************************************************/
78
Greg Ungerer4b61a352008-02-01 17:34:15 +100079void __init config_BSP(char *commandp, int size)
Greg Ungererb5aaf3f2005-09-02 10:42:52 +100080{
Greg Ungerer35aefb22012-01-23 15:34:58 +100081 mach_sched_init = hw_timer_init;
Greg Ungerer2ba168a2011-12-24 13:00:02 +100082 m523x_fec_init();
Steven King91d60412010-01-22 12:43:03 -080083 m523x_qspi_init();
Greg Ungerer4b61a352008-02-01 17:34:15 +100084}
85
Greg Ungerer4b61a352008-02-01 17:34:15 +100086/***************************************************************************/