Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 1 | /* |
| 2 | * Register interface file for Samsung Camera Interface (FIMC) driver |
| 3 | * |
| 4 | * Copyright (c) 2010 Samsung Electronics |
| 5 | * |
| 6 | * Sylwester Nawrocki, s.nawrocki@samsung.com |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/io.h> |
| 14 | #include <linux/delay.h> |
Sylwester Nawrocki | df7e09a | 2010-12-27 14:42:15 -0300 | [diff] [blame] | 15 | #include <media/s5p_fimc.h> |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 16 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 17 | #include "fimc-reg.h" |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 18 | #include "fimc-core.h" |
| 19 | |
| 20 | |
| 21 | void fimc_hw_reset(struct fimc_dev *dev) |
| 22 | { |
| 23 | u32 cfg; |
| 24 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 25 | cfg = readl(dev->regs + FIMC_REG_CISRCFMT); |
| 26 | cfg |= FIMC_REG_CISRCFMT_ITU601_8BIT; |
| 27 | writel(cfg, dev->regs + FIMC_REG_CISRCFMT); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 28 | |
| 29 | /* Software reset. */ |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 30 | cfg = readl(dev->regs + FIMC_REG_CIGCTRL); |
| 31 | cfg |= (FIMC_REG_CIGCTRL_SWRST | FIMC_REG_CIGCTRL_IRQ_LEVEL); |
| 32 | writel(cfg, dev->regs + FIMC_REG_CIGCTRL); |
Sylwester Nawrocki | e9e2108 | 2011-09-02 06:25:32 -0300 | [diff] [blame] | 33 | udelay(10); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 34 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 35 | cfg = readl(dev->regs + FIMC_REG_CIGCTRL); |
| 36 | cfg &= ~FIMC_REG_CIGCTRL_SWRST; |
| 37 | writel(cfg, dev->regs + FIMC_REG_CIGCTRL); |
Sylwester Nawrocki | 2c1bb62 | 2011-10-05 14:20:45 -0300 | [diff] [blame] | 38 | |
| 39 | if (dev->variant->out_buf_count > 4) |
| 40 | fimc_hw_set_dma_seq(dev, 0xF); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 41 | } |
| 42 | |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 43 | static u32 fimc_hw_get_in_flip(struct fimc_ctx *ctx) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 44 | { |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 45 | u32 flip = FIMC_REG_MSCTRL_FLIP_NORMAL; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 46 | |
Sylwester Nawrocki | 131b6c6 | 2011-08-24 19:25:10 -0300 | [diff] [blame] | 47 | if (ctx->hflip) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 48 | flip = FIMC_REG_MSCTRL_FLIP_X_MIRROR; |
Sylwester Nawrocki | 131b6c6 | 2011-08-24 19:25:10 -0300 | [diff] [blame] | 49 | if (ctx->vflip) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 50 | flip = FIMC_REG_MSCTRL_FLIP_Y_MIRROR; |
Sylwester Nawrocki | 131b6c6 | 2011-08-24 19:25:10 -0300 | [diff] [blame] | 51 | |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 52 | if (ctx->rotation <= 90) |
| 53 | return flip; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 54 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 55 | return (flip ^ FIMC_REG_MSCTRL_FLIP_180) & FIMC_REG_MSCTRL_FLIP_180; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 56 | } |
| 57 | |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 58 | static u32 fimc_hw_get_target_flip(struct fimc_ctx *ctx) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 59 | { |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 60 | u32 flip = FIMC_REG_CITRGFMT_FLIP_NORMAL; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 61 | |
Sylwester Nawrocki | 131b6c6 | 2011-08-24 19:25:10 -0300 | [diff] [blame] | 62 | if (ctx->hflip) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 63 | flip |= FIMC_REG_CITRGFMT_FLIP_X_MIRROR; |
Sylwester Nawrocki | 131b6c6 | 2011-08-24 19:25:10 -0300 | [diff] [blame] | 64 | if (ctx->vflip) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 65 | flip |= FIMC_REG_CITRGFMT_FLIP_Y_MIRROR; |
Sylwester Nawrocki | 131b6c6 | 2011-08-24 19:25:10 -0300 | [diff] [blame] | 66 | |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 67 | if (ctx->rotation <= 90) |
| 68 | return flip; |
| 69 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 70 | return (flip ^ FIMC_REG_CITRGFMT_FLIP_180) & FIMC_REG_CITRGFMT_FLIP_180; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 71 | } |
| 72 | |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 73 | void fimc_hw_set_rotation(struct fimc_ctx *ctx) |
| 74 | { |
| 75 | u32 cfg, flip; |
| 76 | struct fimc_dev *dev = ctx->fimc_dev; |
| 77 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 78 | cfg = readl(dev->regs + FIMC_REG_CITRGFMT); |
| 79 | cfg &= ~(FIMC_REG_CITRGFMT_INROT90 | FIMC_REG_CITRGFMT_OUTROT90 | |
| 80 | FIMC_REG_CITRGFMT_FLIP_180); |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 81 | |
| 82 | /* |
| 83 | * The input and output rotator cannot work simultaneously. |
| 84 | * Use the output rotator in output DMA mode or the input rotator |
| 85 | * in direct fifo output mode. |
| 86 | */ |
| 87 | if (ctx->rotation == 90 || ctx->rotation == 270) { |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 88 | if (ctx->out_path == FIMC_IO_LCDFIFO) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 89 | cfg |= FIMC_REG_CITRGFMT_INROT90; |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 90 | else |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 91 | cfg |= FIMC_REG_CITRGFMT_OUTROT90; |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 92 | } |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 93 | |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 94 | if (ctx->out_path == FIMC_IO_DMA) { |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 95 | cfg |= fimc_hw_get_target_flip(ctx); |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 96 | writel(cfg, dev->regs + FIMC_REG_CITRGFMT); |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 97 | } else { |
| 98 | /* LCD FIFO path */ |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 99 | flip = readl(dev->regs + FIMC_REG_MSCTRL); |
| 100 | flip &= ~FIMC_REG_MSCTRL_FLIP_MASK; |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 101 | flip |= fimc_hw_get_in_flip(ctx); |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 102 | writel(flip, dev->regs + FIMC_REG_MSCTRL); |
Sylwester Nawrocki | ac75934 | 2010-12-27 14:47:32 -0300 | [diff] [blame] | 103 | } |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 104 | } |
| 105 | |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 106 | void fimc_hw_set_target_format(struct fimc_ctx *ctx) |
| 107 | { |
| 108 | u32 cfg; |
| 109 | struct fimc_dev *dev = ctx->fimc_dev; |
| 110 | struct fimc_frame *frame = &ctx->d_frame; |
| 111 | |
| 112 | dbg("w= %d, h= %d color: %d", frame->width, |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 113 | frame->height, frame->fmt->color); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 114 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 115 | cfg = readl(dev->regs + FIMC_REG_CITRGFMT); |
| 116 | cfg &= ~(FIMC_REG_CITRGFMT_FMT_MASK | FIMC_REG_CITRGFMT_HSIZE_MASK | |
| 117 | FIMC_REG_CITRGFMT_VSIZE_MASK); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 118 | |
| 119 | switch (frame->fmt->color) { |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 120 | case FIMC_FMT_RGB444...FIMC_FMT_RGB888: |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 121 | cfg |= FIMC_REG_CITRGFMT_RGB; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 122 | break; |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 123 | case FIMC_FMT_YCBCR420: |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 124 | cfg |= FIMC_REG_CITRGFMT_YCBCR420; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 125 | break; |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 126 | case FIMC_FMT_YCBYCR422...FIMC_FMT_CRYCBY422: |
Sylwester Nawrocki | ef7af59 | 2010-12-08 14:05:08 -0300 | [diff] [blame] | 127 | if (frame->fmt->colplanes == 1) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 128 | cfg |= FIMC_REG_CITRGFMT_YCBCR422_1P; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 129 | else |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 130 | cfg |= FIMC_REG_CITRGFMT_YCBCR422; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 131 | break; |
| 132 | default: |
| 133 | break; |
| 134 | } |
| 135 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 136 | if (ctx->rotation == 90 || ctx->rotation == 270) |
| 137 | cfg |= (frame->height << 16) | frame->width; |
| 138 | else |
| 139 | cfg |= (frame->width << 16) | frame->height; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 140 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 141 | writel(cfg, dev->regs + FIMC_REG_CITRGFMT); |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 142 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 143 | cfg = readl(dev->regs + FIMC_REG_CITAREA); |
| 144 | cfg &= ~FIMC_REG_CITAREA_MASK; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 145 | cfg |= (frame->width * frame->height); |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 146 | writel(cfg, dev->regs + FIMC_REG_CITAREA); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 147 | } |
| 148 | |
| 149 | static void fimc_hw_set_out_dma_size(struct fimc_ctx *ctx) |
| 150 | { |
| 151 | struct fimc_dev *dev = ctx->fimc_dev; |
| 152 | struct fimc_frame *frame = &ctx->d_frame; |
Sylwester Nawrocki | 47654df | 2010-10-08 05:01:22 -0300 | [diff] [blame] | 153 | u32 cfg; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 154 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 155 | cfg = (frame->f_height << 16) | frame->f_width; |
| 156 | writel(cfg, dev->regs + FIMC_REG_ORGOSIZE); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 157 | |
| 158 | /* Select color space conversion equation (HD/SD size).*/ |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 159 | cfg = readl(dev->regs + FIMC_REG_CIGCTRL); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 160 | if (frame->f_width >= 1280) /* HD */ |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 161 | cfg |= FIMC_REG_CIGCTRL_CSC_ITU601_709; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 162 | else /* SD */ |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 163 | cfg &= ~FIMC_REG_CIGCTRL_CSC_ITU601_709; |
| 164 | writel(cfg, dev->regs + FIMC_REG_CIGCTRL); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 165 | |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 166 | } |
| 167 | |
| 168 | void fimc_hw_set_out_dma(struct fimc_ctx *ctx) |
| 169 | { |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 170 | struct fimc_dev *dev = ctx->fimc_dev; |
| 171 | struct fimc_frame *frame = &ctx->d_frame; |
| 172 | struct fimc_dma_offset *offset = &frame->dma_offset; |
Sylwester Nawrocki | dafb9c7 | 2011-12-01 14:02:24 -0300 | [diff] [blame] | 173 | struct fimc_fmt *fmt = frame->fmt; |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 174 | u32 cfg; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 175 | |
| 176 | /* Set the input dma offsets. */ |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 177 | cfg = (offset->y_v << 16) | offset->y_h; |
| 178 | writel(cfg, dev->regs + FIMC_REG_CIOYOFF); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 179 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 180 | cfg = (offset->cb_v << 16) | offset->cb_h; |
| 181 | writel(cfg, dev->regs + FIMC_REG_CIOCBOFF); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 182 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 183 | cfg = (offset->cr_v << 16) | offset->cr_h; |
| 184 | writel(cfg, dev->regs + FIMC_REG_CIOCROFF); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 185 | |
| 186 | fimc_hw_set_out_dma_size(ctx); |
| 187 | |
| 188 | /* Configure chroma components order. */ |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 189 | cfg = readl(dev->regs + FIMC_REG_CIOCTRL); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 190 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 191 | cfg &= ~(FIMC_REG_CIOCTRL_ORDER2P_MASK | |
| 192 | FIMC_REG_CIOCTRL_ORDER422_MASK | |
| 193 | FIMC_REG_CIOCTRL_YCBCR_PLANE_MASK | |
| 194 | FIMC_REG_CIOCTRL_RGB16FMT_MASK); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 195 | |
Sylwester Nawrocki | dafb9c7 | 2011-12-01 14:02:24 -0300 | [diff] [blame] | 196 | if (fmt->colplanes == 1) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 197 | cfg |= ctx->out_order_1p; |
Sylwester Nawrocki | dafb9c7 | 2011-12-01 14:02:24 -0300 | [diff] [blame] | 198 | else if (fmt->colplanes == 2) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 199 | cfg |= ctx->out_order_2p | FIMC_REG_CIOCTRL_YCBCR_2PLANE; |
Sylwester Nawrocki | dafb9c7 | 2011-12-01 14:02:24 -0300 | [diff] [blame] | 200 | else if (fmt->colplanes == 3) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 201 | cfg |= FIMC_REG_CIOCTRL_YCBCR_3PLANE; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 202 | |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 203 | if (fmt->color == FIMC_FMT_RGB565) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 204 | cfg |= FIMC_REG_CIOCTRL_RGB565; |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 205 | else if (fmt->color == FIMC_FMT_RGB555) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 206 | cfg |= FIMC_REG_CIOCTRL_ARGB1555; |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 207 | else if (fmt->color == FIMC_FMT_RGB444) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 208 | cfg |= FIMC_REG_CIOCTRL_ARGB4444; |
Sylwester Nawrocki | dafb9c7 | 2011-12-01 14:02:24 -0300 | [diff] [blame] | 209 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 210 | writel(cfg, dev->regs + FIMC_REG_CIOCTRL); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 211 | } |
| 212 | |
| 213 | static void fimc_hw_en_autoload(struct fimc_dev *dev, int enable) |
| 214 | { |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 215 | u32 cfg = readl(dev->regs + FIMC_REG_ORGISIZE); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 216 | if (enable) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 217 | cfg |= FIMC_REG_CIREAL_ISIZE_AUTOLOAD_EN; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 218 | else |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 219 | cfg &= ~FIMC_REG_CIREAL_ISIZE_AUTOLOAD_EN; |
| 220 | writel(cfg, dev->regs + FIMC_REG_ORGISIZE); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 221 | } |
| 222 | |
| 223 | void fimc_hw_en_lastirq(struct fimc_dev *dev, int enable) |
| 224 | { |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 225 | u32 cfg = readl(dev->regs + FIMC_REG_CIOCTRL); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 226 | if (enable) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 227 | cfg |= FIMC_REG_CIOCTRL_LASTIRQ_ENABLE; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 228 | else |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 229 | cfg &= ~FIMC_REG_CIOCTRL_LASTIRQ_ENABLE; |
| 230 | writel(cfg, dev->regs + FIMC_REG_CIOCTRL); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 231 | } |
| 232 | |
Hyunwoong Kim | b241c6d | 2010-12-28 11:27:13 -0300 | [diff] [blame] | 233 | void fimc_hw_set_prescaler(struct fimc_ctx *ctx) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 234 | { |
| 235 | struct fimc_dev *dev = ctx->fimc_dev; |
| 236 | struct fimc_scaler *sc = &ctx->scaler; |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 237 | u32 cfg, shfactor; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 238 | |
| 239 | shfactor = 10 - (sc->hfactor + sc->vfactor); |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 240 | cfg = shfactor << 28; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 241 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 242 | cfg |= (sc->pre_hratio << 16) | sc->pre_vratio; |
| 243 | writel(cfg, dev->regs + FIMC_REG_CISCPRERATIO); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 244 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 245 | cfg = (sc->pre_dst_width << 16) | sc->pre_dst_height; |
| 246 | writel(cfg, dev->regs + FIMC_REG_CISCPREDST); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 247 | } |
| 248 | |
Hyunwoong Kim | b241c6d | 2010-12-28 11:27:13 -0300 | [diff] [blame] | 249 | static void fimc_hw_set_scaler(struct fimc_ctx *ctx) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 250 | { |
| 251 | struct fimc_dev *dev = ctx->fimc_dev; |
| 252 | struct fimc_scaler *sc = &ctx->scaler; |
| 253 | struct fimc_frame *src_frame = &ctx->s_frame; |
| 254 | struct fimc_frame *dst_frame = &ctx->d_frame; |
Sylwester Nawrocki | 2c1bb62 | 2011-10-05 14:20:45 -0300 | [diff] [blame] | 255 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 256 | u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); |
Sylwester Nawrocki | 2c1bb62 | 2011-10-05 14:20:45 -0300 | [diff] [blame] | 257 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 258 | cfg &= ~(FIMC_REG_CISCCTRL_CSCR2Y_WIDE | FIMC_REG_CISCCTRL_CSCY2R_WIDE | |
| 259 | FIMC_REG_CISCCTRL_SCALEUP_H | FIMC_REG_CISCCTRL_SCALEUP_V | |
| 260 | FIMC_REG_CISCCTRL_SCALERBYPASS | FIMC_REG_CISCCTRL_ONE2ONE | |
| 261 | FIMC_REG_CISCCTRL_INRGB_FMT_MASK | FIMC_REG_CISCCTRL_OUTRGB_FMT_MASK | |
| 262 | FIMC_REG_CISCCTRL_INTERLACE | FIMC_REG_CISCCTRL_RGB_EXT); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 263 | |
| 264 | if (!(ctx->flags & FIMC_COLOR_RANGE_NARROW)) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 265 | cfg |= (FIMC_REG_CISCCTRL_CSCR2Y_WIDE | |
| 266 | FIMC_REG_CISCCTRL_CSCY2R_WIDE); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 267 | |
| 268 | if (!sc->enabled) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 269 | cfg |= FIMC_REG_CISCCTRL_SCALERBYPASS; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 270 | |
| 271 | if (sc->scaleup_h) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 272 | cfg |= FIMC_REG_CISCCTRL_SCALEUP_H; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 273 | |
| 274 | if (sc->scaleup_v) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 275 | cfg |= FIMC_REG_CISCCTRL_SCALEUP_V; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 276 | |
| 277 | if (sc->copy_mode) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 278 | cfg |= FIMC_REG_CISCCTRL_ONE2ONE; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 279 | |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 280 | if (ctx->in_path == FIMC_IO_DMA) { |
Sylwester Nawrocki | dafb9c7 | 2011-12-01 14:02:24 -0300 | [diff] [blame] | 281 | switch (src_frame->fmt->color) { |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 282 | case FIMC_FMT_RGB565: |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 283 | cfg |= FIMC_REG_CISCCTRL_INRGB_FMT_RGB565; |
Sylwester Nawrocki | dafb9c7 | 2011-12-01 14:02:24 -0300 | [diff] [blame] | 284 | break; |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 285 | case FIMC_FMT_RGB666: |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 286 | cfg |= FIMC_REG_CISCCTRL_INRGB_FMT_RGB666; |
Sylwester Nawrocki | dafb9c7 | 2011-12-01 14:02:24 -0300 | [diff] [blame] | 287 | break; |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 288 | case FIMC_FMT_RGB888: |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 289 | cfg |= FIMC_REG_CISCCTRL_INRGB_FMT_RGB888; |
Sylwester Nawrocki | dafb9c7 | 2011-12-01 14:02:24 -0300 | [diff] [blame] | 290 | break; |
| 291 | } |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 292 | } |
| 293 | |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 294 | if (ctx->out_path == FIMC_IO_DMA) { |
Sylwester Nawrocki | dafb9c7 | 2011-12-01 14:02:24 -0300 | [diff] [blame] | 295 | u32 color = dst_frame->fmt->color; |
| 296 | |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 297 | if (color >= FIMC_FMT_RGB444 && color <= FIMC_FMT_RGB565) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 298 | cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB565; |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 299 | else if (color == FIMC_FMT_RGB666) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 300 | cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB666; |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 301 | else if (color == FIMC_FMT_RGB888) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 302 | cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB888; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 303 | } else { |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 304 | cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB888; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 305 | |
| 306 | if (ctx->flags & FIMC_SCAN_MODE_INTERLACED) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 307 | cfg |= FIMC_REG_CISCCTRL_INTERLACE; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 308 | } |
| 309 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 310 | writel(cfg, dev->regs + FIMC_REG_CISCCTRL); |
Hyunwoong Kim | b241c6d | 2010-12-28 11:27:13 -0300 | [diff] [blame] | 311 | } |
| 312 | |
| 313 | void fimc_hw_set_mainscaler(struct fimc_ctx *ctx) |
| 314 | { |
| 315 | struct fimc_dev *dev = ctx->fimc_dev; |
Sylwester Nawrocki | bb7c276 | 2012-04-27 09:33:23 -0300 | [diff] [blame^] | 316 | struct fimc_variant *variant = dev->variant; |
Hyunwoong Kim | b241c6d | 2010-12-28 11:27:13 -0300 | [diff] [blame] | 317 | struct fimc_scaler *sc = &ctx->scaler; |
| 318 | u32 cfg; |
| 319 | |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 320 | dbg("main_hratio= 0x%X main_vratio= 0x%X", |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 321 | sc->main_hratio, sc->main_vratio); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 322 | |
Hyunwoong Kim | b241c6d | 2010-12-28 11:27:13 -0300 | [diff] [blame] | 323 | fimc_hw_set_scaler(ctx); |
| 324 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 325 | cfg = readl(dev->regs + FIMC_REG_CISCCTRL); |
| 326 | cfg &= ~(FIMC_REG_CISCCTRL_MHRATIO_MASK | |
| 327 | FIMC_REG_CISCCTRL_MVRATIO_MASK); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 328 | |
Sylwester Nawrocki | 70f66ea | 2010-12-28 11:37:55 -0300 | [diff] [blame] | 329 | if (variant->has_mainscaler_ext) { |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 330 | cfg |= FIMC_REG_CISCCTRL_MHRATIO_EXT(sc->main_hratio); |
| 331 | cfg |= FIMC_REG_CISCCTRL_MVRATIO_EXT(sc->main_vratio); |
| 332 | writel(cfg, dev->regs + FIMC_REG_CISCCTRL); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 333 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 334 | cfg = readl(dev->regs + FIMC_REG_CIEXTEN); |
Hyunwoong Kim | b241c6d | 2010-12-28 11:27:13 -0300 | [diff] [blame] | 335 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 336 | cfg &= ~(FIMC_REG_CIEXTEN_MVRATIO_EXT_MASK | |
| 337 | FIMC_REG_CIEXTEN_MHRATIO_EXT_MASK); |
| 338 | cfg |= FIMC_REG_CIEXTEN_MHRATIO_EXT(sc->main_hratio); |
| 339 | cfg |= FIMC_REG_CIEXTEN_MVRATIO_EXT(sc->main_vratio); |
| 340 | writel(cfg, dev->regs + FIMC_REG_CIEXTEN); |
Sylwester Nawrocki | 70f66ea | 2010-12-28 11:37:55 -0300 | [diff] [blame] | 341 | } else { |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 342 | cfg |= FIMC_REG_CISCCTRL_MHRATIO(sc->main_hratio); |
| 343 | cfg |= FIMC_REG_CISCCTRL_MVRATIO(sc->main_vratio); |
| 344 | writel(cfg, dev->regs + FIMC_REG_CISCCTRL); |
Sylwester Nawrocki | 70f66ea | 2010-12-28 11:37:55 -0300 | [diff] [blame] | 345 | } |
Hyunwoong Kim | b241c6d | 2010-12-28 11:27:13 -0300 | [diff] [blame] | 346 | } |
| 347 | |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 348 | void fimc_hw_en_capture(struct fimc_ctx *ctx) |
| 349 | { |
| 350 | struct fimc_dev *dev = ctx->fimc_dev; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 351 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 352 | u32 cfg = readl(dev->regs + FIMC_REG_CIIMGCPT); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 353 | |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 354 | if (ctx->out_path == FIMC_IO_DMA) { |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 355 | /* one shot mode */ |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 356 | cfg |= FIMC_REG_CIIMGCPT_CPT_FREN_ENABLE | |
| 357 | FIMC_REG_CIIMGCPT_IMGCPTEN; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 358 | } else { |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 359 | /* Continuous frame capture mode (freerun). */ |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 360 | cfg &= ~(FIMC_REG_CIIMGCPT_CPT_FREN_ENABLE | |
| 361 | FIMC_REG_CIIMGCPT_CPT_FRMOD_CNT); |
| 362 | cfg |= FIMC_REG_CIIMGCPT_IMGCPTEN; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 363 | } |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 364 | |
| 365 | if (ctx->scaler.enabled) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 366 | cfg |= FIMC_REG_CIIMGCPT_IMGCPTEN_SC; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 367 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 368 | cfg |= FIMC_REG_CIIMGCPT_IMGCPTEN; |
| 369 | writel(cfg, dev->regs + FIMC_REG_CIIMGCPT); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 370 | } |
| 371 | |
Sylwester Nawrocki | ee7160e | 2011-08-26 14:57:06 -0300 | [diff] [blame] | 372 | void fimc_hw_set_effect(struct fimc_ctx *ctx, bool active) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 373 | { |
| 374 | struct fimc_dev *dev = ctx->fimc_dev; |
| 375 | struct fimc_effect *effect = &ctx->effect; |
Sylwester Nawrocki | ee7160e | 2011-08-26 14:57:06 -0300 | [diff] [blame] | 376 | u32 cfg = 0; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 377 | |
Sylwester Nawrocki | ee7160e | 2011-08-26 14:57:06 -0300 | [diff] [blame] | 378 | if (active) { |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 379 | cfg |= FIMC_REG_CIIMGEFF_IE_SC_AFTER | |
| 380 | FIMC_REG_CIIMGEFF_IE_ENABLE; |
Sylwester Nawrocki | ee7160e | 2011-08-26 14:57:06 -0300 | [diff] [blame] | 381 | cfg |= effect->type; |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 382 | if (effect->type == FIMC_REG_CIIMGEFF_FIN_ARBITRARY) |
| 383 | cfg |= (effect->pat_cb << 13) | effect->pat_cr; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 384 | } |
| 385 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 386 | writel(cfg, dev->regs + FIMC_REG_CIIMGEFF); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 387 | } |
| 388 | |
Sylwester Nawrocki | dafb9c7 | 2011-12-01 14:02:24 -0300 | [diff] [blame] | 389 | void fimc_hw_set_rgb_alpha(struct fimc_ctx *ctx) |
| 390 | { |
| 391 | struct fimc_dev *dev = ctx->fimc_dev; |
| 392 | struct fimc_frame *frame = &ctx->d_frame; |
| 393 | u32 cfg; |
| 394 | |
| 395 | if (!(frame->fmt->flags & FMT_HAS_ALPHA)) |
| 396 | return; |
| 397 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 398 | cfg = readl(dev->regs + FIMC_REG_CIOCTRL); |
| 399 | cfg &= ~FIMC_REG_CIOCTRL_ALPHA_OUT_MASK; |
Sylwester Nawrocki | dafb9c7 | 2011-12-01 14:02:24 -0300 | [diff] [blame] | 400 | cfg |= (frame->alpha << 4); |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 401 | writel(cfg, dev->regs + FIMC_REG_CIOCTRL); |
Sylwester Nawrocki | dafb9c7 | 2011-12-01 14:02:24 -0300 | [diff] [blame] | 402 | } |
| 403 | |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 404 | static void fimc_hw_set_in_dma_size(struct fimc_ctx *ctx) |
| 405 | { |
| 406 | struct fimc_dev *dev = ctx->fimc_dev; |
| 407 | struct fimc_frame *frame = &ctx->s_frame; |
| 408 | u32 cfg_o = 0; |
| 409 | u32 cfg_r = 0; |
| 410 | |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 411 | if (FIMC_IO_LCDFIFO == ctx->out_path) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 412 | cfg_r |= FIMC_REG_CIREAL_ISIZE_AUTOLOAD_EN; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 413 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 414 | cfg_o |= (frame->f_height << 16) | frame->f_width; |
| 415 | cfg_r |= (frame->height << 16) | frame->width; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 416 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 417 | writel(cfg_o, dev->regs + FIMC_REG_ORGISIZE); |
| 418 | writel(cfg_r, dev->regs + FIMC_REG_CIREAL_ISIZE); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 419 | } |
| 420 | |
| 421 | void fimc_hw_set_in_dma(struct fimc_ctx *ctx) |
| 422 | { |
| 423 | struct fimc_dev *dev = ctx->fimc_dev; |
| 424 | struct fimc_frame *frame = &ctx->s_frame; |
| 425 | struct fimc_dma_offset *offset = &frame->dma_offset; |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 426 | u32 cfg; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 427 | |
| 428 | /* Set the pixel offsets. */ |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 429 | cfg = (offset->y_v << 16) | offset->y_h; |
| 430 | writel(cfg, dev->regs + FIMC_REG_CIIYOFF); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 431 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 432 | cfg = (offset->cb_v << 16) | offset->cb_h; |
| 433 | writel(cfg, dev->regs + FIMC_REG_CIICBOFF); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 434 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 435 | cfg = (offset->cr_v << 16) | offset->cr_h; |
| 436 | writel(cfg, dev->regs + FIMC_REG_CIICROFF); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 437 | |
| 438 | /* Input original and real size. */ |
| 439 | fimc_hw_set_in_dma_size(ctx); |
| 440 | |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 441 | /* Use DMA autoload only in FIFO mode. */ |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 442 | fimc_hw_en_autoload(dev, ctx->out_path == FIMC_IO_LCDFIFO); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 443 | |
| 444 | /* Set the input DMA to process single frame only. */ |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 445 | cfg = readl(dev->regs + FIMC_REG_MSCTRL); |
| 446 | cfg &= ~(FIMC_REG_MSCTRL_INFORMAT_MASK |
| 447 | | FIMC_REG_MSCTRL_IN_BURST_COUNT_MASK |
| 448 | | FIMC_REG_MSCTRL_INPUT_MASK |
| 449 | | FIMC_REG_MSCTRL_C_INT_IN_MASK |
| 450 | | FIMC_REG_MSCTRL_2P_IN_ORDER_MASK); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 451 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 452 | cfg |= (FIMC_REG_MSCTRL_IN_BURST_COUNT(4) |
| 453 | | FIMC_REG_MSCTRL_INPUT_MEMORY |
| 454 | | FIMC_REG_MSCTRL_FIFO_CTRL_FULL); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 455 | |
| 456 | switch (frame->fmt->color) { |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 457 | case FIMC_FMT_RGB565...FIMC_FMT_RGB888: |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 458 | cfg |= FIMC_REG_MSCTRL_INFORMAT_RGB; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 459 | break; |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 460 | case FIMC_FMT_YCBCR420: |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 461 | cfg |= FIMC_REG_MSCTRL_INFORMAT_YCBCR420; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 462 | |
Sylwester Nawrocki | ef7af59 | 2010-12-08 14:05:08 -0300 | [diff] [blame] | 463 | if (frame->fmt->colplanes == 2) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 464 | cfg |= ctx->in_order_2p | FIMC_REG_MSCTRL_C_INT_IN_2PLANE; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 465 | else |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 466 | cfg |= FIMC_REG_MSCTRL_C_INT_IN_3PLANE; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 467 | |
| 468 | break; |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 469 | case FIMC_FMT_YCBYCR422...FIMC_FMT_CRYCBY422: |
Sylwester Nawrocki | ef7af59 | 2010-12-08 14:05:08 -0300 | [diff] [blame] | 470 | if (frame->fmt->colplanes == 1) { |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 471 | cfg |= ctx->in_order_1p |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 472 | | FIMC_REG_MSCTRL_INFORMAT_YCBCR422_1P; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 473 | } else { |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 474 | cfg |= FIMC_REG_MSCTRL_INFORMAT_YCBCR422; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 475 | |
Sylwester Nawrocki | ef7af59 | 2010-12-08 14:05:08 -0300 | [diff] [blame] | 476 | if (frame->fmt->colplanes == 2) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 477 | cfg |= ctx->in_order_2p |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 478 | | FIMC_REG_MSCTRL_C_INT_IN_2PLANE; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 479 | else |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 480 | cfg |= FIMC_REG_MSCTRL_C_INT_IN_3PLANE; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 481 | } |
| 482 | break; |
| 483 | default: |
| 484 | break; |
| 485 | } |
| 486 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 487 | writel(cfg, dev->regs + FIMC_REG_MSCTRL); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 488 | |
| 489 | /* Input/output DMA linear/tiled mode. */ |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 490 | cfg = readl(dev->regs + FIMC_REG_CIDMAPARAM); |
| 491 | cfg &= ~FIMC_REG_CIDMAPARAM_TILE_MASK; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 492 | |
| 493 | if (tiled_fmt(ctx->s_frame.fmt)) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 494 | cfg |= FIMC_REG_CIDMAPARAM_R_64X32; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 495 | |
| 496 | if (tiled_fmt(ctx->d_frame.fmt)) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 497 | cfg |= FIMC_REG_CIDMAPARAM_W_64X32; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 498 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 499 | writel(cfg, dev->regs + FIMC_REG_CIDMAPARAM); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 500 | } |
| 501 | |
| 502 | |
| 503 | void fimc_hw_set_input_path(struct fimc_ctx *ctx) |
| 504 | { |
| 505 | struct fimc_dev *dev = ctx->fimc_dev; |
| 506 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 507 | u32 cfg = readl(dev->regs + FIMC_REG_MSCTRL); |
| 508 | cfg &= ~FIMC_REG_MSCTRL_INPUT_MASK; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 509 | |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 510 | if (ctx->in_path == FIMC_IO_DMA) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 511 | cfg |= FIMC_REG_MSCTRL_INPUT_MEMORY; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 512 | else |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 513 | cfg |= FIMC_REG_MSCTRL_INPUT_EXTCAM; |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 514 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 515 | writel(cfg, dev->regs + FIMC_REG_MSCTRL); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 516 | } |
| 517 | |
| 518 | void fimc_hw_set_output_path(struct fimc_ctx *ctx) |
| 519 | { |
| 520 | struct fimc_dev *dev = ctx->fimc_dev; |
| 521 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 522 | u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); |
| 523 | cfg &= ~FIMC_REG_CISCCTRL_LCDPATHEN_FIFO; |
Sylwester Nawrocki | 3d112d9 | 2012-04-26 06:26:29 -0300 | [diff] [blame] | 524 | if (ctx->out_path == FIMC_IO_LCDFIFO) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 525 | cfg |= FIMC_REG_CISCCTRL_LCDPATHEN_FIFO; |
| 526 | writel(cfg, dev->regs + FIMC_REG_CISCCTRL); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 527 | } |
| 528 | |
| 529 | void fimc_hw_set_input_addr(struct fimc_dev *dev, struct fimc_addr *paddr) |
| 530 | { |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 531 | u32 cfg = readl(dev->regs + FIMC_REG_CIREAL_ISIZE); |
| 532 | cfg |= FIMC_REG_CIREAL_ISIZE_ADDR_CH_DIS; |
| 533 | writel(cfg, dev->regs + FIMC_REG_CIREAL_ISIZE); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 534 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 535 | writel(paddr->y, dev->regs + FIMC_REG_CIIYSA(0)); |
| 536 | writel(paddr->cb, dev->regs + FIMC_REG_CIICBSA(0)); |
| 537 | writel(paddr->cr, dev->regs + FIMC_REG_CIICRSA(0)); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 538 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 539 | cfg &= ~FIMC_REG_CIREAL_ISIZE_ADDR_CH_DIS; |
| 540 | writel(cfg, dev->regs + FIMC_REG_CIREAL_ISIZE); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 541 | } |
| 542 | |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 543 | void fimc_hw_set_output_addr(struct fimc_dev *dev, |
| 544 | struct fimc_addr *paddr, int index) |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 545 | { |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 546 | int i = (index == -1) ? 0 : index; |
| 547 | do { |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 548 | writel(paddr->y, dev->regs + FIMC_REG_CIOYSA(i)); |
| 549 | writel(paddr->cb, dev->regs + FIMC_REG_CIOCBSA(i)); |
| 550 | writel(paddr->cr, dev->regs + FIMC_REG_CIOCRSA(i)); |
Sylwester Nawrocki | 548aafc | 2010-10-08 05:01:14 -0300 | [diff] [blame] | 551 | dbg("dst_buf[%d]: 0x%X, cb: 0x%X, cr: 0x%X", |
| 552 | i, paddr->y, paddr->cb, paddr->cr); |
| 553 | } while (index == -1 && ++i < FIMC_MAX_OUT_BUFS); |
Sylwester Nawrocki | 5fd8f73 | 2010-08-03 09:50:29 -0300 | [diff] [blame] | 554 | } |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 555 | |
| 556 | int fimc_hw_set_camera_polarity(struct fimc_dev *fimc, |
Sylwester Nawrocki | df7e09a | 2010-12-27 14:42:15 -0300 | [diff] [blame] | 557 | struct s5p_fimc_isp_info *cam) |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 558 | { |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 559 | u32 cfg = readl(fimc->regs + FIMC_REG_CIGCTRL); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 560 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 561 | cfg &= ~(FIMC_REG_CIGCTRL_INVPOLPCLK | FIMC_REG_CIGCTRL_INVPOLVSYNC | |
| 562 | FIMC_REG_CIGCTRL_INVPOLHREF | FIMC_REG_CIGCTRL_INVPOLHSYNC | |
| 563 | FIMC_REG_CIGCTRL_INVPOLFIELD); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 564 | |
Sylwester Nawrocki | 12ecf56 | 2011-09-19 12:38:35 -0300 | [diff] [blame] | 565 | if (cam->flags & V4L2_MBUS_PCLK_SAMPLE_FALLING) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 566 | cfg |= FIMC_REG_CIGCTRL_INVPOLPCLK; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 567 | |
Sylwester Nawrocki | 12ecf56 | 2011-09-19 12:38:35 -0300 | [diff] [blame] | 568 | if (cam->flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 569 | cfg |= FIMC_REG_CIGCTRL_INVPOLVSYNC; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 570 | |
Sylwester Nawrocki | 12ecf56 | 2011-09-19 12:38:35 -0300 | [diff] [blame] | 571 | if (cam->flags & V4L2_MBUS_HSYNC_ACTIVE_LOW) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 572 | cfg |= FIMC_REG_CIGCTRL_INVPOLHREF; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 573 | |
Sylwester Nawrocki | 12ecf56 | 2011-09-19 12:38:35 -0300 | [diff] [blame] | 574 | if (cam->flags & V4L2_MBUS_HSYNC_ACTIVE_LOW) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 575 | cfg |= FIMC_REG_CIGCTRL_INVPOLHSYNC; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 576 | |
Sylwester Nawrocki | 12ecf56 | 2011-09-19 12:38:35 -0300 | [diff] [blame] | 577 | if (cam->flags & V4L2_MBUS_FIELD_EVEN_LOW) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 578 | cfg |= FIMC_REG_CIGCTRL_INVPOLFIELD; |
Sylwester Nawrocki | 12ecf56 | 2011-09-19 12:38:35 -0300 | [diff] [blame] | 579 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 580 | writel(cfg, fimc->regs + FIMC_REG_CIGCTRL); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 581 | |
| 582 | return 0; |
| 583 | } |
| 584 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 585 | struct mbus_pixfmt_desc { |
| 586 | u32 pixelcode; |
| 587 | u32 cisrcfmt; |
| 588 | u16 bus_width; |
| 589 | }; |
| 590 | |
| 591 | static const struct mbus_pixfmt_desc pix_desc[] = { |
| 592 | { V4L2_MBUS_FMT_YUYV8_2X8, FIMC_REG_CISRCFMT_ORDER422_YCBYCR, 8 }, |
| 593 | { V4L2_MBUS_FMT_YVYU8_2X8, FIMC_REG_CISRCFMT_ORDER422_YCRYCB, 8 }, |
| 594 | { V4L2_MBUS_FMT_VYUY8_2X8, FIMC_REG_CISRCFMT_ORDER422_CRYCBY, 8 }, |
| 595 | { V4L2_MBUS_FMT_UYVY8_2X8, FIMC_REG_CISRCFMT_ORDER422_CBYCRY, 8 }, |
| 596 | }; |
| 597 | |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 598 | int fimc_hw_set_camera_source(struct fimc_dev *fimc, |
Sylwester Nawrocki | df7e09a | 2010-12-27 14:42:15 -0300 | [diff] [blame] | 599 | struct s5p_fimc_isp_info *cam) |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 600 | { |
| 601 | struct fimc_frame *f = &fimc->vid_cap.ctx->s_frame; |
| 602 | u32 cfg = 0; |
Sylwester Nawrocki | 3d0ce7e | 2010-12-27 15:02:16 -0300 | [diff] [blame] | 603 | u32 bus_width; |
| 604 | int i; |
| 605 | |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 606 | if (cam->bus_type == FIMC_ITU_601 || cam->bus_type == FIMC_ITU_656) { |
Sylwester Nawrocki | 3d0ce7e | 2010-12-27 15:02:16 -0300 | [diff] [blame] | 607 | for (i = 0; i < ARRAY_SIZE(pix_desc); i++) { |
Sylwester Nawrocki | 237e026 | 2011-08-24 20:35:30 -0300 | [diff] [blame] | 608 | if (fimc->vid_cap.mf.code == pix_desc[i].pixelcode) { |
Sylwester Nawrocki | 3d0ce7e | 2010-12-27 15:02:16 -0300 | [diff] [blame] | 609 | cfg = pix_desc[i].cisrcfmt; |
| 610 | bus_width = pix_desc[i].bus_width; |
| 611 | break; |
| 612 | } |
| 613 | } |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 614 | |
Sylwester Nawrocki | 3d0ce7e | 2010-12-27 15:02:16 -0300 | [diff] [blame] | 615 | if (i == ARRAY_SIZE(pix_desc)) { |
Sylwester Nawrocki | 30c9939 | 2011-06-10 15:36:48 -0300 | [diff] [blame] | 616 | v4l2_err(fimc->vid_cap.vfd, |
Sylwester Nawrocki | 3d0ce7e | 2010-12-27 15:02:16 -0300 | [diff] [blame] | 617 | "Camera color format not supported: %d\n", |
Sylwester Nawrocki | 237e026 | 2011-08-24 20:35:30 -0300 | [diff] [blame] | 618 | fimc->vid_cap.mf.code); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 619 | return -EINVAL; |
| 620 | } |
| 621 | |
| 622 | if (cam->bus_type == FIMC_ITU_601) { |
Sylwester Nawrocki | 3d0ce7e | 2010-12-27 15:02:16 -0300 | [diff] [blame] | 623 | if (bus_width == 8) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 624 | cfg |= FIMC_REG_CISRCFMT_ITU601_8BIT; |
Sylwester Nawrocki | 3d0ce7e | 2010-12-27 15:02:16 -0300 | [diff] [blame] | 625 | else if (bus_width == 16) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 626 | cfg |= FIMC_REG_CISRCFMT_ITU601_16BIT; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 627 | } /* else defaults to ITU-R BT.656 8-bit */ |
Sylwester Nawrocki | ee7160e | 2011-08-26 14:57:06 -0300 | [diff] [blame] | 628 | } else if (cam->bus_type == FIMC_MIPI_CSI2) { |
| 629 | if (fimc_fmt_is_jpeg(f->fmt->color)) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 630 | cfg |= FIMC_REG_CISRCFMT_ITU601_8BIT; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 631 | } |
| 632 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 633 | cfg |= (f->o_width << 16) | f->o_height; |
| 634 | writel(cfg, fimc->regs + FIMC_REG_CISRCFMT); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 635 | return 0; |
| 636 | } |
| 637 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 638 | void fimc_hw_set_camera_offset(struct fimc_dev *fimc, struct fimc_frame *f) |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 639 | { |
| 640 | u32 hoff2, voff2; |
| 641 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 642 | u32 cfg = readl(fimc->regs + FIMC_REG_CIWDOFST); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 643 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 644 | cfg &= ~(FIMC_REG_CIWDOFST_HOROFF_MASK | FIMC_REG_CIWDOFST_VEROFF_MASK); |
| 645 | cfg |= FIMC_REG_CIWDOFST_OFF_EN | |
| 646 | (f->offs_h << 16) | f->offs_v; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 647 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 648 | writel(cfg, fimc->regs + FIMC_REG_CIWDOFST); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 649 | |
| 650 | /* See CIWDOFSTn register description in the datasheet for details. */ |
| 651 | hoff2 = f->o_width - f->width - f->offs_h; |
| 652 | voff2 = f->o_height - f->height - f->offs_v; |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 653 | cfg = (hoff2 << 16) | voff2; |
| 654 | writel(cfg, fimc->regs + FIMC_REG_CIWDOFST2); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 655 | } |
| 656 | |
| 657 | int fimc_hw_set_camera_type(struct fimc_dev *fimc, |
Sylwester Nawrocki | df7e09a | 2010-12-27 14:42:15 -0300 | [diff] [blame] | 658 | struct s5p_fimc_isp_info *cam) |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 659 | { |
| 660 | u32 cfg, tmp; |
| 661 | struct fimc_vid_cap *vid_cap = &fimc->vid_cap; |
Sylwester Nawrocki | 20676a4 | 2012-03-21 06:21:30 -0300 | [diff] [blame] | 662 | u32 csis_data_alignment = 32; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 663 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 664 | cfg = readl(fimc->regs + FIMC_REG_CIGCTRL); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 665 | |
| 666 | /* Select ITU B interface, disable Writeback path and test pattern. */ |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 667 | cfg &= ~(FIMC_REG_CIGCTRL_TESTPAT_MASK | FIMC_REG_CIGCTRL_SELCAM_ITU_A | |
| 668 | FIMC_REG_CIGCTRL_SELCAM_MIPI | FIMC_REG_CIGCTRL_CAMIF_SELWB | |
| 669 | FIMC_REG_CIGCTRL_SELCAM_MIPI_A | FIMC_REG_CIGCTRL_CAM_JPEG); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 670 | |
| 671 | if (cam->bus_type == FIMC_MIPI_CSI2) { |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 672 | cfg |= FIMC_REG_CIGCTRL_SELCAM_MIPI; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 673 | |
| 674 | if (cam->mux_id == 0) |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 675 | cfg |= FIMC_REG_CIGCTRL_SELCAM_MIPI_A; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 676 | |
| 677 | /* TODO: add remaining supported formats. */ |
Sylwester Nawrocki | ee7160e | 2011-08-26 14:57:06 -0300 | [diff] [blame] | 678 | switch (vid_cap->mf.code) { |
| 679 | case V4L2_MBUS_FMT_VYUY8_2X8: |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 680 | tmp = FIMC_REG_CSIIMGFMT_YCBCR422_8BIT; |
Sylwester Nawrocki | ee7160e | 2011-08-26 14:57:06 -0300 | [diff] [blame] | 681 | break; |
| 682 | case V4L2_MBUS_FMT_JPEG_1X8: |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 683 | tmp = FIMC_REG_CSIIMGFMT_USER(1); |
| 684 | cfg |= FIMC_REG_CIGCTRL_CAM_JPEG; |
Sylwester Nawrocki | ee7160e | 2011-08-26 14:57:06 -0300 | [diff] [blame] | 685 | break; |
| 686 | default: |
Sylwester Nawrocki | 30c9939 | 2011-06-10 15:36:48 -0300 | [diff] [blame] | 687 | v4l2_err(fimc->vid_cap.vfd, |
| 688 | "Not supported camera pixel format: %d", |
Sylwester Nawrocki | 237e026 | 2011-08-24 20:35:30 -0300 | [diff] [blame] | 689 | vid_cap->mf.code); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 690 | return -EINVAL; |
| 691 | } |
Sylwester Nawrocki | 20676a4 | 2012-03-21 06:21:30 -0300 | [diff] [blame] | 692 | tmp |= (csis_data_alignment == 32) << 8; |
Sylwester Nawrocki | e0eec9a | 2011-02-21 12:09:01 -0300 | [diff] [blame] | 693 | |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 694 | writel(tmp, fimc->regs + FIMC_REG_CSIIMGFMT); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 695 | |
| 696 | } else if (cam->bus_type == FIMC_ITU_601 || |
Sylwester Nawrocki | e0eec9a | 2011-02-21 12:09:01 -0300 | [diff] [blame] | 697 | cam->bus_type == FIMC_ITU_656) { |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 698 | if (cam->mux_id == 0) /* ITU-A, ITU-B: 0, 1 */ |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 699 | cfg |= FIMC_REG_CIGCTRL_SELCAM_ITU_A; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 700 | } else if (cam->bus_type == FIMC_LCD_WB) { |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 701 | cfg |= FIMC_REG_CIGCTRL_CAMIF_SELWB; |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 702 | } else { |
| 703 | err("invalid camera bus type selected\n"); |
| 704 | return -EINVAL; |
| 705 | } |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 706 | writel(cfg, fimc->regs + FIMC_REG_CIGCTRL); |
Sylwester Nawrocki | 5f3cc44 | 2010-10-07 10:06:16 -0300 | [diff] [blame] | 707 | |
| 708 | return 0; |
| 709 | } |
Sylwester Nawrocki | c83a1ff | 2012-05-02 06:14:49 -0300 | [diff] [blame] | 710 | |
| 711 | void fimc_hw_clear_irq(struct fimc_dev *dev) |
| 712 | { |
| 713 | u32 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); |
| 714 | cfg |= FIMC_REG_CIGCTRL_IRQ_CLR; |
| 715 | writel(cfg, dev->regs + FIMC_REG_CIGCTRL); |
| 716 | } |
| 717 | |
| 718 | void fimc_hw_enable_scaler(struct fimc_dev *dev, bool on) |
| 719 | { |
| 720 | u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); |
| 721 | if (on) |
| 722 | cfg |= FIMC_REG_CISCCTRL_SCALERSTART; |
| 723 | else |
| 724 | cfg &= ~FIMC_REG_CISCCTRL_SCALERSTART; |
| 725 | writel(cfg, dev->regs + FIMC_REG_CISCCTRL); |
| 726 | } |
| 727 | |
| 728 | void fimc_hw_activate_input_dma(struct fimc_dev *dev, bool on) |
| 729 | { |
| 730 | u32 cfg = readl(dev->regs + FIMC_REG_MSCTRL); |
| 731 | if (on) |
| 732 | cfg |= FIMC_REG_MSCTRL_ENVID; |
| 733 | else |
| 734 | cfg &= ~FIMC_REG_MSCTRL_ENVID; |
| 735 | writel(cfg, dev->regs + FIMC_REG_MSCTRL); |
| 736 | } |
| 737 | |
| 738 | void fimc_hw_dis_capture(struct fimc_dev *dev) |
| 739 | { |
| 740 | u32 cfg = readl(dev->regs + FIMC_REG_CIIMGCPT); |
| 741 | cfg &= ~(FIMC_REG_CIIMGCPT_IMGCPTEN | FIMC_REG_CIIMGCPT_IMGCPTEN_SC); |
| 742 | writel(cfg, dev->regs + FIMC_REG_CIIMGCPT); |
| 743 | } |
| 744 | |
| 745 | /* Return an index to the buffer actually being written. */ |
| 746 | u32 fimc_hw_get_frame_index(struct fimc_dev *dev) |
| 747 | { |
| 748 | u32 reg; |
| 749 | |
| 750 | if (dev->variant->has_cistatus2) { |
| 751 | reg = readl(dev->regs + FIMC_REG_CISTATUS2) & 0x3F; |
| 752 | return reg > 0 ? --reg : reg; |
| 753 | } |
| 754 | |
| 755 | reg = readl(dev->regs + FIMC_REG_CISTATUS); |
| 756 | |
| 757 | return (reg & FIMC_REG_CISTATUS_FRAMECNT_MASK) >> |
| 758 | FIMC_REG_CISTATUS_FRAMECNT_SHIFT; |
| 759 | } |
| 760 | |
| 761 | /* Locking: the caller holds fimc->slock */ |
| 762 | void fimc_activate_capture(struct fimc_ctx *ctx) |
| 763 | { |
| 764 | fimc_hw_enable_scaler(ctx->fimc_dev, ctx->scaler.enabled); |
| 765 | fimc_hw_en_capture(ctx); |
| 766 | } |
| 767 | |
| 768 | void fimc_deactivate_capture(struct fimc_dev *fimc) |
| 769 | { |
| 770 | fimc_hw_en_lastirq(fimc, true); |
| 771 | fimc_hw_dis_capture(fimc); |
| 772 | fimc_hw_enable_scaler(fimc, false); |
| 773 | fimc_hw_en_lastirq(fimc, false); |
| 774 | } |