Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 1 | /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*- |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | */ |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 3 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
| 5 | * All Rights Reserved. |
Dave Airlie | bc54fd1 | 2005-06-23 22:46:46 +1000 | [diff] [blame] | 6 | * |
| 7 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 8 | * copy of this software and associated documentation files (the |
| 9 | * "Software"), to deal in the Software without restriction, including |
| 10 | * without limitation the rights to use, copy, modify, merge, publish, |
| 11 | * distribute, sub license, and/or sell copies of the Software, and to |
| 12 | * permit persons to whom the Software is furnished to do so, subject to |
| 13 | * the following conditions: |
| 14 | * |
| 15 | * The above copyright notice and this permission notice (including the |
| 16 | * next paragraph) shall be included in all copies or substantial portions |
| 17 | * of the Software. |
| 18 | * |
| 19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| 20 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 21 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
| 22 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR |
| 23 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 24 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 25 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 26 | * |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 27 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | |
| 29 | #include "drmP.h" |
| 30 | #include "drm.h" |
| 31 | #include "i915_drm.h" |
| 32 | #include "i915_drv.h" |
| 33 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | #define MAX_NOPID ((u32)~0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 36 | /** These are the interrupts used by the driver */ |
| 37 | #define I915_INTERRUPT_ENABLE_MASK (I915_USER_INTERRUPT | \ |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 38 | I915_ASLE_INTERRUPT | \ |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 39 | I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | \ |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 40 | I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 41 | |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 42 | void |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 43 | i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask) |
| 44 | { |
| 45 | if ((dev_priv->irq_mask_reg & mask) != 0) { |
| 46 | dev_priv->irq_mask_reg &= ~mask; |
| 47 | I915_WRITE(IMR, dev_priv->irq_mask_reg); |
| 48 | (void) I915_READ(IMR); |
| 49 | } |
| 50 | } |
| 51 | |
| 52 | static inline void |
| 53 | i915_disable_irq(drm_i915_private_t *dev_priv, u32 mask) |
| 54 | { |
| 55 | if ((dev_priv->irq_mask_reg & mask) != mask) { |
| 56 | dev_priv->irq_mask_reg |= mask; |
| 57 | I915_WRITE(IMR, dev_priv->irq_mask_reg); |
| 58 | (void) I915_READ(IMR); |
| 59 | } |
| 60 | } |
| 61 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 62 | /** |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 63 | * i915_pipe_enabled - check if a pipe is enabled |
| 64 | * @dev: DRM device |
| 65 | * @pipe: pipe to check |
| 66 | * |
| 67 | * Reading certain registers when the pipe is disabled can hang the chip. |
| 68 | * Use this routine to make sure the PLL is running and the pipe is active |
| 69 | * before reading such registers if unsure. |
| 70 | */ |
| 71 | static int |
| 72 | i915_pipe_enabled(struct drm_device *dev, int pipe) |
| 73 | { |
| 74 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 75 | unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF; |
| 76 | |
| 77 | if (I915_READ(pipeconf) & PIPEACONF_ENABLE) |
| 78 | return 1; |
| 79 | |
| 80 | return 0; |
| 81 | } |
| 82 | |
Keith Packard | 42f52ef | 2008-10-18 19:39:29 -0700 | [diff] [blame] | 83 | /* Called from drm generic code, passed a 'crtc', which |
| 84 | * we use as a pipe index |
| 85 | */ |
| 86 | u32 i915_get_vblank_counter(struct drm_device *dev, int pipe) |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 87 | { |
| 88 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 89 | unsigned long high_frame; |
| 90 | unsigned long low_frame; |
| 91 | u32 high1, high2, low, count; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 92 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 93 | high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH; |
| 94 | low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL; |
| 95 | |
| 96 | if (!i915_pipe_enabled(dev, pipe)) { |
| 97 | DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe); |
| 98 | return 0; |
| 99 | } |
| 100 | |
| 101 | /* |
| 102 | * High & low register fields aren't synchronized, so make sure |
| 103 | * we get a low value that's stable across two reads of the high |
| 104 | * register. |
| 105 | */ |
| 106 | do { |
| 107 | high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >> |
| 108 | PIPE_FRAME_HIGH_SHIFT); |
| 109 | low = ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >> |
| 110 | PIPE_FRAME_LOW_SHIFT); |
| 111 | high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >> |
| 112 | PIPE_FRAME_HIGH_SHIFT); |
| 113 | } while (high1 != high2); |
| 114 | |
| 115 | count = (high1 << 8) | low; |
| 116 | |
| 117 | return count; |
| 118 | } |
| 119 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 120 | irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) |
| 121 | { |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 122 | struct drm_device *dev = (struct drm_device *) arg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 123 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 124 | u32 iir; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 125 | u32 pipea_stats, pipeb_stats; |
| 126 | int vblank = 0; |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 127 | |
Eric Anholt | 630681d | 2008-10-06 15:14:12 -0700 | [diff] [blame] | 128 | atomic_inc(&dev_priv->irq_received); |
| 129 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 130 | if (dev->pdev->msi_enabled) |
| 131 | I915_WRITE(IMR, ~0); |
| 132 | iir = I915_READ(IIR); |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 133 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 134 | if (iir == 0) { |
| 135 | if (dev->pdev->msi_enabled) { |
| 136 | I915_WRITE(IMR, dev_priv->irq_mask_reg); |
| 137 | (void) I915_READ(IMR); |
| 138 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 139 | return IRQ_NONE; |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 140 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 141 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 142 | /* |
| 143 | * Clear the PIPE(A|B)STAT regs before the IIR otherwise |
| 144 | * we may get extra interrupts. |
| 145 | */ |
| 146 | if (iir & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT) { |
| 147 | pipea_stats = I915_READ(PIPEASTAT); |
| 148 | if (!(dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A)) |
| 149 | pipea_stats &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE | |
| 150 | PIPE_VBLANK_INTERRUPT_ENABLE); |
| 151 | else if (pipea_stats & (PIPE_START_VBLANK_INTERRUPT_STATUS| |
| 152 | PIPE_VBLANK_INTERRUPT_STATUS)) { |
| 153 | vblank++; |
Keith Packard | 42f52ef | 2008-10-18 19:39:29 -0700 | [diff] [blame] | 154 | drm_handle_vblank(dev, 0); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 155 | } |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 156 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 157 | I915_WRITE(PIPEASTAT, pipea_stats); |
| 158 | } |
| 159 | if (iir & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) { |
| 160 | pipeb_stats = I915_READ(PIPEBSTAT); |
| 161 | /* Ack the event */ |
| 162 | I915_WRITE(PIPEBSTAT, pipeb_stats); |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 163 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 164 | /* The vblank interrupt gets enabled even if we didn't ask for |
| 165 | it, so make sure it's shut down again */ |
| 166 | if (!(dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B)) |
| 167 | pipeb_stats &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE | |
| 168 | PIPE_VBLANK_INTERRUPT_ENABLE); |
| 169 | else if (pipeb_stats & (PIPE_START_VBLANK_INTERRUPT_STATUS| |
| 170 | PIPE_VBLANK_INTERRUPT_STATUS)) { |
| 171 | vblank++; |
Keith Packard | 42f52ef | 2008-10-18 19:39:29 -0700 | [diff] [blame] | 172 | drm_handle_vblank(dev, 1); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 173 | } |
Dave Airlie | 6e5fca5 | 2006-03-20 18:34:29 +1100 | [diff] [blame] | 174 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 175 | if (pipeb_stats & I915_LEGACY_BLC_EVENT_STATUS) |
| 176 | opregion_asle_intr(dev); |
| 177 | I915_WRITE(PIPEBSTAT, pipeb_stats); |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 178 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 179 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 180 | I915_WRITE(IIR, iir); |
| 181 | if (dev->pdev->msi_enabled) |
| 182 | I915_WRITE(IMR, dev_priv->irq_mask_reg); |
| 183 | (void) I915_READ(IIR); /* Flush posted writes */ |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 184 | |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 185 | if (dev_priv->sarea_priv) |
| 186 | dev_priv->sarea_priv->last_dispatch = |
| 187 | READ_BREADCRUMB(dev_priv); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 188 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 189 | if (iir & I915_USER_INTERRUPT) { |
| 190 | dev_priv->mm.irq_gem_seqno = i915_get_gem_seqno(dev); |
| 191 | DRM_WAKEUP(&dev_priv->irq_queue); |
| 192 | } |
| 193 | |
| 194 | if (iir & I915_ASLE_INTERRUPT) |
| 195 | opregion_asle_intr(dev); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 196 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 197 | return IRQ_HANDLED; |
| 198 | } |
| 199 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 200 | static int i915_emit_irq(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 201 | { |
| 202 | drm_i915_private_t *dev_priv = dev->dev_private; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 203 | RING_LOCALS; |
| 204 | |
| 205 | i915_kernel_lost_context(dev); |
| 206 | |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 207 | DRM_DEBUG("\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 208 | |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 209 | dev_priv->counter++; |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 210 | if (dev_priv->counter > 0x7FFFFFFFUL) |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 211 | dev_priv->counter = 1; |
| 212 | if (dev_priv->sarea_priv) |
| 213 | dev_priv->sarea_priv->last_enqueue = dev_priv->counter; |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 214 | |
| 215 | BEGIN_LP_RING(6); |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 216 | OUT_RING(MI_STORE_DWORD_INDEX); |
| 217 | OUT_RING(5 << MI_STORE_DWORD_INDEX_SHIFT); |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 218 | OUT_RING(dev_priv->counter); |
| 219 | OUT_RING(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 220 | OUT_RING(0); |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 221 | OUT_RING(MI_USER_INTERRUPT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 222 | ADVANCE_LP_RING(); |
Dave Airlie | bc5f452 | 2007-11-05 12:50:58 +1000 | [diff] [blame] | 223 | |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 224 | return dev_priv->counter; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 225 | } |
| 226 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 227 | void i915_user_irq_get(struct drm_device *dev) |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 228 | { |
| 229 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 230 | unsigned long irqflags; |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 231 | |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 232 | spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 233 | if (dev->irq_enabled && (++dev_priv->user_irq_refcount == 1)) |
| 234 | i915_enable_irq(dev_priv, I915_USER_INTERRUPT); |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 235 | spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 236 | } |
| 237 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 238 | void i915_user_irq_put(struct drm_device *dev) |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 239 | { |
| 240 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 241 | unsigned long irqflags; |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 242 | |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 243 | spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 244 | BUG_ON(dev->irq_enabled && dev_priv->user_irq_refcount <= 0); |
| 245 | if (dev->irq_enabled && (--dev_priv->user_irq_refcount == 0)) |
| 246 | i915_disable_irq(dev_priv, I915_USER_INTERRUPT); |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 247 | spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 248 | } |
| 249 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 250 | static int i915_wait_irq(struct drm_device * dev, int irq_nr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 251 | { |
| 252 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 253 | int ret = 0; |
| 254 | |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 255 | DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 256 | READ_BREADCRUMB(dev_priv)); |
| 257 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 258 | if (READ_BREADCRUMB(dev_priv) >= irq_nr) { |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 259 | if (dev_priv->sarea_priv) { |
| 260 | dev_priv->sarea_priv->last_dispatch = |
| 261 | READ_BREADCRUMB(dev_priv); |
| 262 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 263 | return 0; |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 264 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 266 | if (dev_priv->sarea_priv) |
| 267 | dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 268 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 269 | i915_user_irq_get(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 270 | DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ, |
| 271 | READ_BREADCRUMB(dev_priv) >= irq_nr); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 272 | i915_user_irq_put(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 273 | |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 274 | if (ret == -EBUSY) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 275 | DRM_ERROR("EBUSY -- rec: %d emitted: %d\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 276 | READ_BREADCRUMB(dev_priv), (int)dev_priv->counter); |
| 277 | } |
| 278 | |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 279 | if (dev_priv->sarea_priv) |
| 280 | dev_priv->sarea_priv->last_dispatch = |
| 281 | READ_BREADCRUMB(dev_priv); |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 282 | |
| 283 | return ret; |
| 284 | } |
| 285 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 286 | /* Needs the lock as it touches the ring. |
| 287 | */ |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 288 | int i915_irq_emit(struct drm_device *dev, void *data, |
| 289 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 290 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 291 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 292 | drm_i915_irq_emit_t *emit = data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 293 | int result; |
| 294 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 295 | RING_LOCK_TEST_WITH_RETURN(dev, file_priv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 296 | |
| 297 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 298 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 299 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 300 | } |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 301 | mutex_lock(&dev->struct_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | result = i915_emit_irq(dev); |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 303 | mutex_unlock(&dev->struct_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 305 | if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 306 | DRM_ERROR("copy_to_user\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 307 | return -EFAULT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 308 | } |
| 309 | |
| 310 | return 0; |
| 311 | } |
| 312 | |
| 313 | /* Doesn't need the hardware lock. |
| 314 | */ |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 315 | int i915_irq_wait(struct drm_device *dev, void *data, |
| 316 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 317 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 318 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 319 | drm_i915_irq_wait_t *irqwait = data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 320 | |
| 321 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 322 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 323 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 324 | } |
| 325 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 326 | return i915_wait_irq(dev, irqwait->irq_seq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 327 | } |
| 328 | |
Keith Packard | 42f52ef | 2008-10-18 19:39:29 -0700 | [diff] [blame] | 329 | /* Called from drm generic code, passed 'crtc' which |
| 330 | * we use as a pipe index |
| 331 | */ |
| 332 | int i915_enable_vblank(struct drm_device *dev, int pipe) |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 333 | { |
| 334 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 335 | u32 pipestat_reg = 0; |
| 336 | u32 pipestat; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 337 | u32 interrupt = 0; |
| 338 | unsigned long irqflags; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 339 | |
| 340 | switch (pipe) { |
| 341 | case 0: |
| 342 | pipestat_reg = PIPEASTAT; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 343 | interrupt = I915_DISPLAY_PIPE_A_EVENT_INTERRUPT; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 344 | break; |
| 345 | case 1: |
| 346 | pipestat_reg = PIPEBSTAT; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 347 | interrupt = I915_DISPLAY_PIPE_B_EVENT_INTERRUPT; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 348 | break; |
| 349 | default: |
| 350 | DRM_ERROR("tried to enable vblank on non-existent pipe %d\n", |
| 351 | pipe); |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 352 | return 0; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 353 | } |
| 354 | |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 355 | spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); |
Eric Anholt | 053d7f2 | 2008-10-17 15:41:26 -0700 | [diff] [blame] | 356 | /* Enabling vblank events in IMR comes before PIPESTAT write, or |
| 357 | * there's a race where the PIPESTAT vblank bit gets set to 1, so |
| 358 | * the OR of enabled PIPESTAT bits goes to 1, so the PIPExEVENT in |
| 359 | * ISR flashes to 1, but the IIR bit doesn't get set to 1 because |
| 360 | * IMR masks it. It doesn't ever get set after we clear the masking |
| 361 | * in IMR because the ISR bit is edge, not level-triggered, on the |
| 362 | * OR of PIPESTAT bits. |
| 363 | */ |
| 364 | i915_enable_irq(dev_priv, interrupt); |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 365 | pipestat = I915_READ(pipestat_reg); |
| 366 | if (IS_I965G(dev)) |
| 367 | pipestat |= PIPE_START_VBLANK_INTERRUPT_ENABLE; |
| 368 | else |
| 369 | pipestat |= PIPE_VBLANK_INTERRUPT_ENABLE; |
| 370 | /* Clear any stale interrupt status */ |
| 371 | pipestat |= (PIPE_START_VBLANK_INTERRUPT_STATUS | |
| 372 | PIPE_VBLANK_INTERRUPT_STATUS); |
| 373 | I915_WRITE(pipestat_reg, pipestat); |
| 374 | (void) I915_READ(pipestat_reg); /* Posting read */ |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 375 | spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 376 | |
| 377 | return 0; |
| 378 | } |
| 379 | |
Keith Packard | 42f52ef | 2008-10-18 19:39:29 -0700 | [diff] [blame] | 380 | /* Called from drm generic code, passed 'crtc' which |
| 381 | * we use as a pipe index |
| 382 | */ |
| 383 | void i915_disable_vblank(struct drm_device *dev, int pipe) |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 384 | { |
| 385 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 386 | u32 pipestat_reg = 0; |
| 387 | u32 pipestat; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 388 | u32 interrupt = 0; |
| 389 | unsigned long irqflags; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 390 | |
| 391 | switch (pipe) { |
| 392 | case 0: |
| 393 | pipestat_reg = PIPEASTAT; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 394 | interrupt = I915_DISPLAY_PIPE_A_EVENT_INTERRUPT; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 395 | break; |
| 396 | case 1: |
| 397 | pipestat_reg = PIPEBSTAT; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 398 | interrupt = I915_DISPLAY_PIPE_B_EVENT_INTERRUPT; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 399 | break; |
| 400 | default: |
| 401 | DRM_ERROR("tried to disable vblank on non-existent pipe %d\n", |
| 402 | pipe); |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 403 | return; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 404 | break; |
| 405 | } |
| 406 | |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 407 | spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); |
| 408 | i915_disable_irq(dev_priv, interrupt); |
| 409 | pipestat = I915_READ(pipestat_reg); |
| 410 | pipestat &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE | |
| 411 | PIPE_VBLANK_INTERRUPT_ENABLE); |
| 412 | /* Clear any stale interrupt status */ |
| 413 | pipestat |= (PIPE_START_VBLANK_INTERRUPT_STATUS | |
| 414 | PIPE_VBLANK_INTERRUPT_STATUS); |
| 415 | I915_WRITE(pipestat_reg, pipestat); |
| 416 | (void) I915_READ(pipestat_reg); /* Posting read */ |
| 417 | spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 418 | } |
| 419 | |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 420 | /* Set the vblank monitor pipe |
| 421 | */ |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 422 | int i915_vblank_pipe_set(struct drm_device *dev, void *data, |
| 423 | struct drm_file *file_priv) |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 424 | { |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 425 | drm_i915_private_t *dev_priv = dev->dev_private; |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 426 | |
| 427 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 428 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 429 | return -EINVAL; |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 430 | } |
| 431 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | 5b51694 | 2006-10-25 00:08:23 +1000 | [diff] [blame] | 432 | return 0; |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 433 | } |
| 434 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 435 | int i915_vblank_pipe_get(struct drm_device *dev, void *data, |
| 436 | struct drm_file *file_priv) |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 437 | { |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 438 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 439 | drm_i915_vblank_pipe_t *pipe = data; |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 440 | |
| 441 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 442 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 443 | return -EINVAL; |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 444 | } |
| 445 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 446 | pipe->pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 447 | |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 448 | return 0; |
| 449 | } |
| 450 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 451 | /** |
| 452 | * Schedule buffer swap at given vertical blank. |
| 453 | */ |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 454 | int i915_vblank_swap(struct drm_device *dev, void *data, |
| 455 | struct drm_file *file_priv) |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 456 | { |
Eric Anholt | bd95e0a | 2008-11-04 12:01:24 -0800 | [diff] [blame^] | 457 | /* The delayed swap mechanism was fundamentally racy, and has been |
| 458 | * removed. The model was that the client requested a delayed flip/swap |
| 459 | * from the kernel, then waited for vblank before continuing to perform |
| 460 | * rendering. The problem was that the kernel might wake the client |
| 461 | * up before it dispatched the vblank swap (since the lock has to be |
| 462 | * held while touching the ringbuffer), in which case the client would |
| 463 | * clear and start the next frame before the swap occurred, and |
| 464 | * flicker would occur in addition to likely missing the vblank. |
| 465 | * |
| 466 | * In the absence of this ioctl, userland falls back to a correct path |
| 467 | * of waiting for a vblank, then dispatching the swap on its own. |
| 468 | * Context switching to userland and back is plenty fast enough for |
| 469 | * meeting the requirements of vblank swapping. |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 470 | */ |
Eric Anholt | bd95e0a | 2008-11-04 12:01:24 -0800 | [diff] [blame^] | 471 | return -EINVAL; |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 472 | } |
| 473 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 474 | /* drm_dma.h hooks |
| 475 | */ |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 476 | void i915_driver_irq_preinstall(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 477 | { |
| 478 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 479 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 480 | I915_WRITE(HWSTAM, 0xeffe); |
| 481 | I915_WRITE(IMR, 0xffffffff); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 482 | I915_WRITE(IER, 0x0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 483 | } |
| 484 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 485 | int i915_driver_irq_postinstall(struct drm_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 486 | { |
| 487 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 488 | int ret, num_pipes = 2; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 489 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 490 | /* Set initial unmasked IRQs to just the selected vblank pipes. */ |
| 491 | dev_priv->irq_mask_reg = ~0; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 492 | |
| 493 | ret = drm_vblank_init(dev, num_pipes); |
| 494 | if (ret) |
| 495 | return ret; |
| 496 | |
| 497 | dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; |
| 498 | dev_priv->irq_mask_reg &= ~I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT; |
| 499 | dev_priv->irq_mask_reg &= ~I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT; |
| 500 | |
| 501 | dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */ |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 502 | |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 503 | dev_priv->irq_mask_reg &= I915_INTERRUPT_ENABLE_MASK; |
| 504 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 505 | I915_WRITE(IMR, dev_priv->irq_mask_reg); |
| 506 | I915_WRITE(IER, I915_INTERRUPT_ENABLE_MASK); |
| 507 | (void) I915_READ(IER); |
| 508 | |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 509 | opregion_enable_asle(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 510 | DRM_INIT_WAITQUEUE(&dev_priv->irq_queue); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 511 | |
| 512 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 513 | } |
| 514 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 515 | void i915_driver_irq_uninstall(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 516 | { |
| 517 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 518 | u32 temp; |
Dave Airlie | 91e3738 | 2006-02-18 15:17:04 +1100 | [diff] [blame] | 519 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 520 | if (!dev_priv) |
| 521 | return; |
| 522 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 523 | dev_priv->vblank_pipe = 0; |
| 524 | |
| 525 | I915_WRITE(HWSTAM, 0xffffffff); |
| 526 | I915_WRITE(IMR, 0xffffffff); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 527 | I915_WRITE(IER, 0x0); |
Dave Airlie | 91e3738 | 2006-02-18 15:17:04 +1100 | [diff] [blame] | 528 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 529 | temp = I915_READ(PIPEASTAT); |
| 530 | I915_WRITE(PIPEASTAT, temp); |
| 531 | temp = I915_READ(PIPEBSTAT); |
| 532 | I915_WRITE(PIPEBSTAT, temp); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 533 | temp = I915_READ(IIR); |
| 534 | I915_WRITE(IIR, temp); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 535 | } |