Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-realview/core.c |
| 3 | * |
| 4 | * Copyright (C) 1999 - 2003 ARM Limited |
| 5 | * Copyright (C) 2000 Deep Blue Solutions Ltd |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 20 | */ |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 21 | #include <linux/init.h> |
Russell King | 1be7228 | 2005-10-31 16:57:06 +0000 | [diff] [blame] | 22 | #include <linux/platform_device.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 23 | #include <linux/dma-mapping.h> |
Kay Sievers | edbaa60 | 2011-12-21 16:26:03 -0800 | [diff] [blame] | 24 | #include <linux/device.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 25 | #include <linux/interrupt.h> |
Russell King | a62c80e | 2006-01-07 13:52:45 +0000 | [diff] [blame] | 26 | #include <linux/amba/bus.h> |
| 27 | #include <linux/amba/clcd.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 28 | #include <linux/io.h> |
Steve Glendinning | c5142e8 | 2009-01-20 13:23:30 +0000 | [diff] [blame] | 29 | #include <linux/smsc911x.h> |
Catalin Marinas | 6be62ba | 2009-02-12 15:59:21 +0100 | [diff] [blame] | 30 | #include <linux/ata_platform.h> |
Linus Walleij | 6ef297f | 2009-09-22 14:29:36 +0100 | [diff] [blame] | 31 | #include <linux/amba/mmci.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 32 | #include <linux/gfp.h> |
Marc Zyngier | b8b87ae | 2011-05-18 10:51:49 +0100 | [diff] [blame] | 33 | #include <linux/mtd/physmap.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 34 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 35 | #include <mach/hardware.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 36 | #include <asm/irq.h> |
Colin Tuckley | 68c3d93 | 2008-11-10 14:10:11 +0000 | [diff] [blame] | 37 | #include <asm/mach-types.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 38 | #include <asm/hardware/arm_timer.h> |
Russell King | c5a0adb | 2010-01-16 20:16:10 +0000 | [diff] [blame] | 39 | #include <asm/hardware/icst.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 40 | |
| 41 | #include <asm/mach/arch.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 42 | #include <asm/mach/irq.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 43 | #include <asm/mach/map.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 44 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 45 | |
Catalin Marinas | ee8c957 | 2009-05-30 14:00:17 +0100 | [diff] [blame] | 46 | #include <mach/platform.h> |
| 47 | #include <mach/irqs.h> |
Rob Herring | 8a9618f | 2010-10-06 16:18:08 +0100 | [diff] [blame] | 48 | #include <asm/hardware/timer-sp.h> |
Catalin Marinas | ee8c957 | 2009-05-30 14:00:17 +0100 | [diff] [blame] | 49 | |
Russell King | 3cb5ee4 | 2011-01-18 20:13:20 +0000 | [diff] [blame] | 50 | #include <plat/clcd.h> |
Russell King | 1da0c89 | 2010-12-15 21:56:47 +0000 | [diff] [blame] | 51 | #include <plat/sched_clock.h> |
| 52 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 53 | #include "core.h" |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 54 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 55 | #define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET) |
| 56 | |
Marc Zyngier | 667f390 | 2011-05-18 10:51:55 +0100 | [diff] [blame] | 57 | static void realview_flash_set_vpp(struct platform_device *pdev, int on) |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 58 | { |
| 59 | u32 val; |
| 60 | |
| 61 | val = __raw_readl(REALVIEW_FLASHCTRL); |
| 62 | if (on) |
| 63 | val |= REALVIEW_FLASHPROG_FLVPPEN; |
| 64 | else |
| 65 | val &= ~REALVIEW_FLASHPROG_FLVPPEN; |
| 66 | __raw_writel(val, REALVIEW_FLASHCTRL); |
| 67 | } |
| 68 | |
Marc Zyngier | b8b87ae | 2011-05-18 10:51:49 +0100 | [diff] [blame] | 69 | static struct physmap_flash_data realview_flash_data = { |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 70 | .width = 4, |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 71 | .set_vpp = realview_flash_set_vpp, |
| 72 | }; |
| 73 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 74 | struct platform_device realview_flash_device = { |
Marc Zyngier | b8b87ae | 2011-05-18 10:51:49 +0100 | [diff] [blame] | 75 | .name = "physmap-flash", |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 76 | .id = 0, |
| 77 | .dev = { |
| 78 | .platform_data = &realview_flash_data, |
| 79 | }, |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 80 | }; |
| 81 | |
Catalin Marinas | a44ddfd | 2008-04-18 22:43:10 +0100 | [diff] [blame] | 82 | int realview_flash_register(struct resource *res, u32 num) |
| 83 | { |
| 84 | realview_flash_device.resource = res; |
| 85 | realview_flash_device.num_resources = num; |
| 86 | return platform_device_register(&realview_flash_device); |
| 87 | } |
| 88 | |
Steve Glendinning | c5142e8 | 2009-01-20 13:23:30 +0000 | [diff] [blame] | 89 | static struct smsc911x_platform_config smsc911x_config = { |
| 90 | .flags = SMSC911X_USE_32BIT, |
| 91 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, |
| 92 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, |
| 93 | .phy_interface = PHY_INTERFACE_MODE_MII, |
Catalin Marinas | 0a5b2f6 | 2008-12-01 14:54:59 +0000 | [diff] [blame] | 94 | }; |
| 95 | |
Catalin Marinas | 0a38133 | 2008-12-01 14:54:58 +0000 | [diff] [blame] | 96 | static struct platform_device realview_eth_device = { |
Steve Glendinning | c5142e8 | 2009-01-20 13:23:30 +0000 | [diff] [blame] | 97 | .name = "smsc911x", |
Catalin Marinas | 0a38133 | 2008-12-01 14:54:58 +0000 | [diff] [blame] | 98 | .id = 0, |
| 99 | .num_resources = 2, |
| 100 | }; |
| 101 | |
| 102 | int realview_eth_register(const char *name, struct resource *res) |
| 103 | { |
| 104 | if (name) |
| 105 | realview_eth_device.name = name; |
| 106 | realview_eth_device.resource = res; |
Steve Glendinning | c5142e8 | 2009-01-20 13:23:30 +0000 | [diff] [blame] | 107 | if (strcmp(realview_eth_device.name, "smsc911x") == 0) |
| 108 | realview_eth_device.dev.platform_data = &smsc911x_config; |
Catalin Marinas | 0a38133 | 2008-12-01 14:54:58 +0000 | [diff] [blame] | 109 | |
| 110 | return platform_device_register(&realview_eth_device); |
| 111 | } |
| 112 | |
Catalin Marinas | 7db2171 | 2009-02-12 16:00:21 +0100 | [diff] [blame] | 113 | struct platform_device realview_usb_device = { |
| 114 | .name = "isp1760", |
| 115 | .num_resources = 2, |
| 116 | }; |
| 117 | |
| 118 | int realview_usb_register(struct resource *res) |
| 119 | { |
| 120 | realview_usb_device.resource = res; |
| 121 | return platform_device_register(&realview_usb_device); |
| 122 | } |
| 123 | |
Catalin Marinas | 6be62ba | 2009-02-12 15:59:21 +0100 | [diff] [blame] | 124 | static struct pata_platform_info pata_platform_data = { |
| 125 | .ioport_shift = 1, |
| 126 | }; |
| 127 | |
| 128 | static struct resource pata_resources[] = { |
| 129 | [0] = { |
| 130 | .start = REALVIEW_CF_BASE, |
| 131 | .end = REALVIEW_CF_BASE + 0xff, |
| 132 | .flags = IORESOURCE_MEM, |
| 133 | }, |
| 134 | [1] = { |
| 135 | .start = REALVIEW_CF_BASE + 0x100, |
| 136 | .end = REALVIEW_CF_BASE + SZ_4K - 1, |
| 137 | .flags = IORESOURCE_MEM, |
| 138 | }, |
| 139 | }; |
| 140 | |
| 141 | struct platform_device realview_cf_device = { |
| 142 | .name = "pata_platform", |
| 143 | .id = -1, |
| 144 | .num_resources = ARRAY_SIZE(pata_resources), |
| 145 | .resource = pata_resources, |
| 146 | .dev = { |
| 147 | .platform_data = &pata_platform_data, |
| 148 | }, |
| 149 | }; |
| 150 | |
Russell King | 6b65cd7 | 2006-12-10 21:21:32 +0100 | [diff] [blame] | 151 | static struct resource realview_i2c_resource = { |
| 152 | .start = REALVIEW_I2C_BASE, |
| 153 | .end = REALVIEW_I2C_BASE + SZ_4K - 1, |
| 154 | .flags = IORESOURCE_MEM, |
| 155 | }; |
| 156 | |
| 157 | struct platform_device realview_i2c_device = { |
| 158 | .name = "versatile-i2c", |
Catalin Marinas | 533ad5e | 2009-02-12 15:58:20 +0100 | [diff] [blame] | 159 | .id = 0, |
Russell King | 6b65cd7 | 2006-12-10 21:21:32 +0100 | [diff] [blame] | 160 | .num_resources = 1, |
| 161 | .resource = &realview_i2c_resource, |
| 162 | }; |
| 163 | |
Catalin Marinas | 533ad5e | 2009-02-12 15:58:20 +0100 | [diff] [blame] | 164 | static struct i2c_board_info realview_i2c_board_info[] = { |
| 165 | { |
Russell King | 64e8be6 | 2009-07-18 15:51:55 +0100 | [diff] [blame] | 166 | I2C_BOARD_INFO("ds1338", 0xd0 >> 1), |
Catalin Marinas | 533ad5e | 2009-02-12 15:58:20 +0100 | [diff] [blame] | 167 | }, |
| 168 | }; |
| 169 | |
| 170 | static int __init realview_i2c_init(void) |
| 171 | { |
| 172 | return i2c_register_board_info(0, realview_i2c_board_info, |
| 173 | ARRAY_SIZE(realview_i2c_board_info)); |
| 174 | } |
| 175 | arch_initcall(realview_i2c_init); |
| 176 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 177 | #define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET) |
| 178 | |
Russell King | 98b0979 | 2009-07-09 15:17:41 +0100 | [diff] [blame] | 179 | /* |
| 180 | * This is only used if GPIOLIB support is disabled |
| 181 | */ |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 182 | static unsigned int realview_mmc_status(struct device *dev) |
| 183 | { |
| 184 | struct amba_device *adev = container_of(dev, struct amba_device, dev); |
| 185 | u32 mask; |
| 186 | |
Linus Walleij | 48f1d5a | 2010-07-02 10:24:03 +0100 | [diff] [blame] | 187 | if (machine_is_realview_pb1176()) { |
| 188 | static bool inserted = false; |
| 189 | |
| 190 | /* |
| 191 | * The PB1176 does not have the status register, |
| 192 | * assume it is inserted at startup, then invert |
| 193 | * for each call so card insertion/removal will |
| 194 | * be detected anyway. This will not be called if |
| 195 | * GPIO on PL061 is active, which is the proper |
| 196 | * way to do this on the PB1176. |
| 197 | */ |
| 198 | inserted = !inserted; |
| 199 | return inserted ? 0 : 1; |
| 200 | } |
| 201 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 202 | if (adev->res.start == REALVIEW_MMCI0_BASE) |
| 203 | mask = 1; |
| 204 | else |
| 205 | mask = 2; |
| 206 | |
Russell King | 74bc809 | 2010-07-29 15:58:59 +0100 | [diff] [blame] | 207 | return readl(REALVIEW_SYSMCI) & mask; |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 208 | } |
| 209 | |
Linus Walleij | 6ef297f | 2009-09-22 14:29:36 +0100 | [diff] [blame] | 210 | struct mmci_platform_data realview_mmc0_plat_data = { |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 211 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
| 212 | .status = realview_mmc_status, |
Russell King | 98b0979 | 2009-07-09 15:17:41 +0100 | [diff] [blame] | 213 | .gpio_wp = 17, |
| 214 | .gpio_cd = 16, |
Rabin Vincent | 2971944 | 2010-08-09 12:54:43 +0100 | [diff] [blame] | 215 | .cd_invert = true, |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 216 | }; |
| 217 | |
Linus Walleij | 6ef297f | 2009-09-22 14:29:36 +0100 | [diff] [blame] | 218 | struct mmci_platform_data realview_mmc1_plat_data = { |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 219 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
| 220 | .status = realview_mmc_status, |
Russell King | 98b0979 | 2009-07-09 15:17:41 +0100 | [diff] [blame] | 221 | .gpio_wp = 19, |
| 222 | .gpio_cd = 18, |
Rabin Vincent | 2971944 | 2010-08-09 12:54:43 +0100 | [diff] [blame] | 223 | .cd_invert = true, |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 224 | }; |
| 225 | |
Russell King | 631e55f | 2011-01-11 13:05:01 +0000 | [diff] [blame] | 226 | void __init realview_init_early(void) |
Russell King | cf30fb4 | 2008-11-08 20:05:55 +0000 | [diff] [blame] | 227 | { |
Russell King | 631e55f | 2011-01-11 13:05:01 +0000 | [diff] [blame] | 228 | void __iomem *sys = __io_address(REALVIEW_SYS_BASE); |
| 229 | |
Russell King | 631e55f | 2011-01-11 13:05:01 +0000 | [diff] [blame] | 230 | versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000); |
Russell King | cf30fb4 | 2008-11-08 20:05:55 +0000 | [diff] [blame] | 231 | } |
Russell King | cf30fb4 | 2008-11-08 20:05:55 +0000 | [diff] [blame] | 232 | |
| 233 | /* |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 234 | * CLCD support. |
| 235 | */ |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 236 | #define SYS_CLCD_NLCDIOON (1 << 2) |
| 237 | #define SYS_CLCD_VDDPOSSWITCH (1 << 3) |
| 238 | #define SYS_CLCD_PWR3V5SWITCH (1 << 4) |
| 239 | #define SYS_CLCD_ID_MASK (0x1f << 8) |
| 240 | #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8) |
| 241 | #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8) |
| 242 | #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8) |
| 243 | #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8) |
| 244 | #define SYS_CLCD_ID_VGA (0x1f << 8) |
| 245 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 246 | /* |
| 247 | * Disable all display connectors on the interface module. |
| 248 | */ |
| 249 | static void realview_clcd_disable(struct clcd_fb *fb) |
| 250 | { |
| 251 | void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; |
| 252 | u32 val; |
| 253 | |
| 254 | val = readl(sys_clcd); |
| 255 | val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH; |
| 256 | writel(val, sys_clcd); |
| 257 | } |
| 258 | |
| 259 | /* |
| 260 | * Enable the relevant connector on the interface module. |
| 261 | */ |
| 262 | static void realview_clcd_enable(struct clcd_fb *fb) |
| 263 | { |
| 264 | void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; |
| 265 | u32 val; |
| 266 | |
Catalin Marinas | 9e7714d | 2006-03-16 14:10:20 +0000 | [diff] [blame] | 267 | /* |
| 268 | * Enable the PSUs |
| 269 | */ |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 270 | val = readl(sys_clcd); |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 271 | val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH; |
| 272 | writel(val, sys_clcd); |
| 273 | } |
| 274 | |
Russell King | 3cb5ee4 | 2011-01-18 20:13:20 +0000 | [diff] [blame] | 275 | /* |
| 276 | * Detect which LCD panel is connected, and return the appropriate |
| 277 | * clcd_panel structure. Note: we do not have any information on |
| 278 | * the required timings for the 8.4in panel, so we presently assume |
| 279 | * VGA timings. |
| 280 | */ |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 281 | static int realview_clcd_setup(struct clcd_fb *fb) |
| 282 | { |
Russell King | 3cb5ee4 | 2011-01-18 20:13:20 +0000 | [diff] [blame] | 283 | void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; |
| 284 | const char *panel_name, *vga_panel_name; |
Colin Tuckley | c34a102 | 2008-11-10 14:10:12 +0000 | [diff] [blame] | 285 | unsigned long framesize; |
Russell King | 3cb5ee4 | 2011-01-18 20:13:20 +0000 | [diff] [blame] | 286 | u32 val; |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 287 | |
Russell King | 3cb5ee4 | 2011-01-18 20:13:20 +0000 | [diff] [blame] | 288 | if (machine_is_realview_eb()) { |
Colin Tuckley | c34a102 | 2008-11-10 14:10:12 +0000 | [diff] [blame] | 289 | /* VGA, 16bpp */ |
| 290 | framesize = 640 * 480 * 2; |
Russell King | 3cb5ee4 | 2011-01-18 20:13:20 +0000 | [diff] [blame] | 291 | vga_panel_name = "VGA"; |
| 292 | } else { |
Colin Tuckley | c34a102 | 2008-11-10 14:10:12 +0000 | [diff] [blame] | 293 | /* XVGA, 16bpp */ |
| 294 | framesize = 1024 * 768 * 2; |
Russell King | 3cb5ee4 | 2011-01-18 20:13:20 +0000 | [diff] [blame] | 295 | vga_panel_name = "XVGA"; |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 296 | } |
| 297 | |
Russell King | 3cb5ee4 | 2011-01-18 20:13:20 +0000 | [diff] [blame] | 298 | val = readl(sys_clcd) & SYS_CLCD_ID_MASK; |
| 299 | if (val == SYS_CLCD_ID_SANYO_3_8) |
| 300 | panel_name = "Sanyo TM38QV67A02A"; |
| 301 | else if (val == SYS_CLCD_ID_SANYO_2_5) |
| 302 | panel_name = "Sanyo QVGA Portrait"; |
| 303 | else if (val == SYS_CLCD_ID_EPSON_2_2) |
| 304 | panel_name = "Epson L2F50113T00"; |
| 305 | else if (val == SYS_CLCD_ID_VGA) |
| 306 | panel_name = vga_panel_name; |
| 307 | else { |
| 308 | pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val); |
| 309 | panel_name = vga_panel_name; |
| 310 | } |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 311 | |
Russell King | 3cb5ee4 | 2011-01-18 20:13:20 +0000 | [diff] [blame] | 312 | fb->panel = versatile_clcd_get_panel(panel_name); |
| 313 | if (!fb->panel) |
| 314 | return -EINVAL; |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 315 | |
Russell King | 3cb5ee4 | 2011-01-18 20:13:20 +0000 | [diff] [blame] | 316 | return versatile_clcd_setup_dma(fb, framesize); |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 317 | } |
| 318 | |
| 319 | struct clcd_board clcd_plat_data = { |
| 320 | .name = "RealView", |
Russell King | 3cb5ee4 | 2011-01-18 20:13:20 +0000 | [diff] [blame] | 321 | .caps = CLCD_CAP_ALL, |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 322 | .check = clcdfb_check, |
| 323 | .decode = clcdfb_decode, |
| 324 | .disable = realview_clcd_disable, |
| 325 | .enable = realview_clcd_enable, |
| 326 | .setup = realview_clcd_setup, |
Russell King | 3cb5ee4 | 2011-01-18 20:13:20 +0000 | [diff] [blame] | 327 | .mmap = versatile_clcd_mmap_dma, |
| 328 | .remove = versatile_clcd_remove_dma, |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 329 | }; |
| 330 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 331 | /* |
| 332 | * Where is the timer (VA)? |
| 333 | */ |
Catalin Marinas | 8019273 | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 334 | void __iomem *timer0_va_base; |
| 335 | void __iomem *timer1_va_base; |
| 336 | void __iomem *timer2_va_base; |
| 337 | void __iomem *timer3_va_base; |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 338 | |
| 339 | /* |
Catalin Marinas | a8655e8 | 2008-02-04 17:30:57 +0100 | [diff] [blame] | 340 | * Set up the clock source and clock events devices |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 341 | */ |
Catalin Marinas | 8cc4c54 | 2008-02-04 17:43:02 +0100 | [diff] [blame] | 342 | void __init realview_timer_init(unsigned int timer_irq) |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 343 | { |
| 344 | u32 val; |
| 345 | |
| 346 | /* |
| 347 | * set clock frequency: |
| 348 | * REALVIEW_REFCLK is 32KHz |
| 349 | * REALVIEW_TIMCLK is 1MHz |
| 350 | */ |
| 351 | val = readl(__io_address(REALVIEW_SCTL_BASE)); |
| 352 | writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) | |
| 353 | (REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) | |
| 354 | (REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) | |
| 355 | (REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) | val, |
| 356 | __io_address(REALVIEW_SCTL_BASE)); |
| 357 | |
| 358 | /* |
| 359 | * Initialise to a known state (all timers off) |
| 360 | */ |
Catalin Marinas | 8019273 | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 361 | writel(0, timer0_va_base + TIMER_CTRL); |
| 362 | writel(0, timer1_va_base + TIMER_CTRL); |
| 363 | writel(0, timer2_va_base + TIMER_CTRL); |
| 364 | writel(0, timer3_va_base + TIMER_CTRL); |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 365 | |
Russell King | fb593cf | 2011-05-12 12:08:23 +0100 | [diff] [blame] | 366 | sp804_clocksource_init(timer3_va_base, "timer3"); |
Russell King | 57cc4f7 | 2011-05-12 15:31:13 +0100 | [diff] [blame] | 367 | sp804_clockevents_init(timer0_va_base, timer_irq, "timer0"); |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 368 | } |
Catalin Marinas | 5b39d15 | 2009-11-04 12:19:04 +0000 | [diff] [blame] | 369 | |
| 370 | /* |
| 371 | * Setup the memory banks. |
| 372 | */ |
Russell King | 0744a3e | 2010-12-20 10:37:50 +0000 | [diff] [blame] | 373 | void realview_fixup(struct tag *tags, char **from, struct meminfo *meminfo) |
Catalin Marinas | 5b39d15 | 2009-11-04 12:19:04 +0000 | [diff] [blame] | 374 | { |
| 375 | /* |
| 376 | * Most RealView platforms have 512MB contiguous RAM at 0x70000000. |
| 377 | * Half of this is mirrored at 0. |
| 378 | */ |
| 379 | #ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET |
| 380 | meminfo->bank[0].start = 0x70000000; |
| 381 | meminfo->bank[0].size = SZ_512M; |
| 382 | meminfo->nr_banks = 1; |
| 383 | #else |
| 384 | meminfo->bank[0].start = 0; |
| 385 | meminfo->bank[0].size = SZ_256M; |
| 386 | meminfo->nr_banks = 1; |
| 387 | #endif |
| 388 | } |